From 6a64c56acb7e188f60c8c2d20cb4560f7f236766 Mon Sep 17 00:00:00 2001 From: Minxing Chu Date: Mon, 12 Oct 2026 07:35:29 +0000 Subject: [PATCH 1/7] glayout.sharing: explicit diffusion and gate sharing across transistors A SharingPlan fixes, for one group of same-polarity transistors, the finger order, the orientations, which neighbouring fingers share a diffusion node and how the gates are tied into poly straps. validate_plan checks a plan before any geometry is drawn (structured errors), build_mos_group draws it for any MappedPDK, and the sharing that really happened is measured again on the drawn shapes. group_candidates / named_plans enumerate plans over six discrete axes. Co-Authored-By: Claude Opus 5.5 --- src/glayout/sharing/README.md | 47 ++++ src/glayout/sharing/__init__.py | 16 ++ src/glayout/sharing/enumeration.py | 195 +++++++++++++ src/glayout/sharing/evidence.py | 109 +++++++ src/glayout/sharing/group.py | 438 +++++++++++++++++++++++++++++ src/glayout/sharing/rules.py | 269 ++++++++++++++++++ src/glayout/sharing/spec.py | 152 ++++++++++ 7 files changed, 1226 insertions(+) create mode 100644 src/glayout/sharing/README.md create mode 100644 src/glayout/sharing/__init__.py create mode 100644 src/glayout/sharing/enumeration.py create mode 100644 src/glayout/sharing/evidence.py create mode 100644 src/glayout/sharing/group.py create mode 100644 src/glayout/sharing/rules.py create mode 100644 src/glayout/sharing/spec.py diff --git a/src/glayout/sharing/README.md b/src/glayout/sharing/README.md new file mode 100644 index 00000000..908aa024 --- /dev/null +++ b/src/glayout/sharing/README.md @@ -0,0 +1,47 @@ +# glayout.sharing + +Diffusion and gate sharing across the transistors of one device group, written as an explicit plan that is checked +before any geometry is drawn and measured again on the geometry afterwards. Design notes: +[`benchmarks/textbook_sharing/docs/DESIGN.md`](../../../benchmarks/textbook_sharing/docs/DESIGN.md). + +| name | what it does | +|---|---| +| `DeviceSpec` | one SPICE transistor: id, `nfet`/`pfet`, drain, gate, source, body net, total width, length, finger count | +| `SharingPlan`, `FingerRef`, `GateGroup` | finger order, orientations, diffusion joins and gate straps of one group | +| `validate_plan(rules, devices, plan)` | checks a plan without drawing; returns an `EligibilityReport` (`ok`, `errors` with `code`, `message`, `where`) | +| `build_mos_group(pdk, devices, plan=...)` | draws the group for a `MappedPDK`; returns a `GroupResult` (component, metal-2 pins, applied plan, sharing evidence, geometry stats); raises `SharingPlanRejected` for an illegal plan | +| `independent_plan(devices)` | every transistor on its own (what base gLayout builds) | +| `group_candidates(pdk, devices)`, `named_plans(pdk, devices)` | the six-axis enumeration with legality and de-duplication; the named modes `independent`, `diffusion_only`, `gate_only`, `combined` | +| `evidence_from_gds(...)` | the sharing evidence recomputed from a GDS file | +| `rules_for(pdk)`, `OVERRIDES` | design-rule values used by the builder, with the audited deviations from the generic rule table | + +## Example: the PMOS mirror of a five-transistor OTA (SKY130) + +```python +from glayout.pdk.sky130_mapped import sky130_mapped_pdk as pdk +from glayout.sharing import (DeviceSpec, SharingPlan, FingerRef, GateGroup, validate_plan, build_mos_group, + rules_for, group_candidates) + +m4 = DeviceSpec("M4", "pfet", d="net22", g="net22", s="VDD", b="VDD", width_total=2.0, length=0.3, nf=4) +m5 = DeviceSpec("M5", "pfet", d="VOUT1", g="net22", s="VDD", b="VDD", width_total=2.0, length=0.3, nf=4) + +# M4's four fingers, then M5's; alternating orientation, every boundary shared (the M4|M5 boundary is VDD on both +# sides), and one poly strap on top for both gates (net22) with its pad at the right end +plan = SharingPlan(finger_order=[FingerRef("M4", k) for k in range(4)] + [FingerRef("M5", k) for k in range(4)], + orientations=["SD", "DS"] * 4, diffusion_joins=[True] * 7, + gate_groups=[GateGroup(tuple(range(8)), "top", "right")]) +assert validate_plan(rules_for(pdk), [m4, m5], plan).ok + +res = build_mos_group(pdk, [m4, m5], plan=plan, name="pmos_mirror") +ev = res.physical_sharing_evidence # measured on the drawn shapes, not taken from the plan +print(ev["active_islands"], ev["n_cross_device_shared_nodes"], ev["n_cross_device_gate_conductors"]) # 1 1 1 + +plan.orientations[4] = "DS" # M5 now shows its drain (VOUT1) to M4's source (VDD) +print(validate_plan(rules_for(pdk), [m4, m5], plan).errors[0]["code"]) # join_net_mismatch + +print(group_candidates(pdk, [m4, m5])["counts"]) # {'raw': 256, 'static_illegal': 8, 'equivalent_duplicate': 147, 'unique': 101} +``` + +The same calls work for `gf180_mapped_pdk` and `ihp130_mapped_pdk`. The plan never changes the netlist: widths, +lengths, finger counts and body nets come from the `DeviceSpec`s, and a plan that would need a different netlist is +rejected. diff --git a/src/glayout/sharing/__init__.py b/src/glayout/sharing/__init__.py new file mode 100644 index 00000000..4fcbe46f --- /dev/null +++ b/src/glayout/sharing/__init__.py @@ -0,0 +1,16 @@ +"""glayout.sharing: diffusion and gate sharing across the transistors of a device group. + +A SharingPlan states, for one group of same-polarity transistors, the order of the unit fingers, their orientation, +which neighbours share a diffusion node and how the gates are grouped into poly straps. validate_plan checks a plan +before any geometry is drawn; build_mos_group draws it for the active PDK and recomputes, from the drawn rectangles, +how many diffusion nodes and gate conductors are really shared. group_candidates / named_plans enumerate plans over +six discrete axes. +""" +from .spec import DeviceSpec, SharingPlan, FingerRef, GateGroup, GroupResult, EligibilityReport, SharingPlanRejected +from .rules import rules_for, GroupRules, OVERRIDES +from .group import build_mos_group, validate_plan, independent_plan +from .enumeration import group_candidates, named_plans, AXES, RAW_PER_GROUP +from .evidence import evidence_from_gds, evidence_from_regions +__all__ = ["DeviceSpec", "SharingPlan", "FingerRef", "GateGroup", "GroupResult", "EligibilityReport", "SharingPlanRejected", + "rules_for", "GroupRules", "OVERRIDES", "build_mos_group", "validate_plan", "independent_plan", + "evidence_from_gds", "evidence_from_regions", "group_candidates", "named_plans", "AXES", "RAW_PER_GROUP"] diff --git a/src/glayout/sharing/enumeration.py b/src/glayout/sharing/enumeration.py new file mode 100644 index 00000000..5d1b6002 --- /dev/null +++ b/src/glayout/sharing/enumeration.py @@ -0,0 +1,195 @@ +"""Candidate enumeration: six discrete axes per device group. + +Axis values meaning +arrangement block | interleave | abba | mirror finger order family (abba: exactly 2 devices with + even nf; mirror: every device has even nf; + otherwise the tuple is rejected) +orientation alt_SD | alt_DS | seek_SD | seek_DS alt_*: orientations alternate along the row starting + with source-left (SD) or drain-left (DS); + seek_*: start SD/DS, then every finger takes the + orientation whose left terminal carries the net of the + previous finger's right terminal (else it alternates) +diffusion none | all_legal none: only joins between adjacent fingers of the SAME + device (standard multi-finger device); all_legal: + every adjacent boundary whose facing nets are equal +gate per_device | per_net one poly strap per device | one per gate net +strap_start bottom | top side of the first strap group (by first finger); + later groups take that side unless their interval + overlaps a group already there, then the other side; + overlap on both sides -> rejected (unroutable) +contact_end left | right pad end of every strap (two top straps: the left one + must reach left, the right one right; a contradicting + value is rejected) + +Raw tuples per group: 4 x 4 x 2 x 2 x 2 x 2 = 256. Orientation uses the 'seek' policies rather than a uniform +source-left or source-right orientation: a uniform orientation puts S|D of the same device face to face at every finger +boundary, so no node could be shared even inside one device, and every such candidate is dominated by its alternating +counterpart, while the seek policies make cross-device sharing reachable for block and interleaved orders. +Each tuple -> SharingPlan -> static legality (validate_plan + strap routability) -> canonical plan id (geometry-relevant +fields) -> duplicates removed. No geometry is generated and no measurement is used here. Plans written directly as a +SharingPlan can express more than these axes (any finger order or strap partition); the enumeration is a family, not +the whole plan space.""" +from __future__ import annotations +import itertools +from .spec import DeviceSpec, SharingPlan, FingerRef, GateGroup +from .group import validate_plan, independent_plan +from .rules import rules_for + +ARRANGEMENTS = ("block", "interleave", "abba", "mirror") +ORIENTATIONS = ("alt_SD", "alt_DS", "seek_SD", "seek_DS") +DIFFUSION = ("none", "all_legal") +GATE = ("per_device", "per_net") +STRAP_START = ("bottom", "top") +CONTACT_END = ("left", "right") +AXES = {"arrangement": ARRANGEMENTS, "orientation": ORIENTATIONS, "diffusion": DIFFUSION, "gate": GATE, + "strap_start": STRAP_START, "contact_end": CONTACT_END} +RAW_PER_GROUP = 4 * 4 * 2 * 2 * 2 * 2 + + +def _order(devices, arrangement): + ids = [d.logical_id for d in devices]; nf = {d.logical_id: d.nf for d in devices} + fingers = {i: [FingerRef(i, k) for k in range(nf[i])] for i in ids} + if arrangement == "block": + return [f for i in ids for f in fingers[i]], None + if arrangement == "interleave": + if len(ids) < 2: return [f for i in ids for f in fingers[i]], None + out = []; q = {i: list(fingers[i]) for i in ids} + while any(q.values()): + for i in ids: + if q[i]: out.append(q[i].pop(0)) + return out, None + if arrangement == "abba": + if len(ids) != 2 or any(nf[i] % 2 for i in ids): + return None, "abba needs exactly two devices with even finger counts" + a, b = ids; fa, fb = list(fingers[a]), list(fingers[b]); out = [] + while fa or fb: + if fa: out.append(fa.pop(0)) + if fb: out.append(fb.pop(0)) + if fb: out.append(fb.pop(0)) + if fa: out.append(fa.pop(0)) + return out, None + if arrangement == "mirror": + if any(nf[i] % 2 for i in ids): + return None, "mirror needs even finger counts for every device" + halves = [fingers[i][: nf[i] // 2] for i in ids]; rest = [fingers[i][nf[i] // 2:] for i in ids] + return [f for h in halves for f in h] + [f for h in reversed(rest) for f in h], None + raise ValueError(arrangement) + + +def _orientations(order, dev, policy): + out = [] + start = "SD" if policy.endswith("SD") else "DS" + for i, f in enumerate(order): + if i == 0: + out.append(start); continue + if policy.startswith("alt"): + out.append("DS" if out[-1] == "SD" else "SD"); continue + pd = dev[order[i - 1].device]; d = dev[f.device] + prev_right = pd.d if out[-1] == "SD" else pd.s + if d.s == prev_right: out.append("SD") + elif d.d == prev_right: out.append("DS") + else: out.append("DS" if out[-1] == "SD" else "SD") + return out + + +def _joins(order, orient, dev, diffusion): + j = [] + for i in range(len(order) - 1): + a, b = order[i], order[i + 1]; da, db = dev[a.device], dev[b.device] + ar = da.d if orient[i] == "SD" else da.s + bl = db.s if orient[i + 1] == "SD" else db.d + same = a.device == b.device + j.append(bool(ar == bl and (same or diffusion == "all_legal"))) + return j + + +def _gate_groups(order, dev, gate, strap_start, contact_end): + n = len(order) + key = (lambda p: order[p].device) if gate == "per_device" else (lambda p: dev[order[p].device].g) + groups = {} + for p in range(n): groups.setdefault(key(p), []).append(p) + glist = sorted((tuple(v) for v in groups.values()), key=lambda g: g[0]) + other = "top" if strap_start == "bottom" else "bottom" + def reach(g, side, end): + lo, hi = min(g), max(g) + if side == "top": return (0, hi) if end == "left" else (lo, n - 1) + return (lo, hi) + assigned = [] # (group, side) + for g in glist: + lo, hi = min(g), max(g) + def clash(side): + for h, s in assigned: + if s != side: continue + if lo <= max(h) and min(h) <= hi: return True + return False + if not clash(strap_start): assigned.append((g, strap_start)) + elif not clash(other): assigned.append((g, other)) + else: return None, "gate straps overlap on both sides (unroutable)" + tops = [g for g, s in assigned if s == "top"] + ends = {} + if len(tops) > 2: + return None, "more than two top straps" + if len(tops) == 2: + a, b = sorted(tops, key=lambda g: min(g)) + ends[a] = "left"; ends[b] = "right" + if contact_end == "right": + return None, "two top straps need left/right pad ends; contact_end=right contradicts the left strap" + out = [] + for g, s in assigned: + out.append(GateGroup(tuple(g), s, ends.get(g, contact_end))) + return out, None + + +def group_candidates(pdk, devices: list[DeviceSpec]): + """Enumerate all raw tuples of one group. Returns {'rows': [...], 'unique': {plan_id: (tuple, plan)}, 'counts': {...}}.""" + rules = rules_for(pdk); dev = {d.logical_id: d for d in devices} + rows = []; unique = {} + for t in itertools.product(*AXES.values()): + tup = dict(zip(AXES.keys(), t)) + order, why = _order(devices, tup["arrangement"]) + if order is None: + rows.append({"tuple": tup, "status": "static_illegal", "reason": why}); continue + orient = _orientations(order, dev, tup["orientation"]) + joins = _joins(order, orient, dev, tup["diffusion"]) + gg, why = _gate_groups(order, dev, tup["gate"], tup["strap_start"], tup["contact_end"]) + if gg is None: + rows.append({"tuple": tup, "status": "static_illegal", "reason": why}); continue + plan = SharingPlan(order, orient, joins, gg, mode_label="axes:" + ",".join(f"{v}" for v in t)) + rep = validate_plan(rules, devices, plan) + if not rep.ok: + rows.append({"tuple": tup, "status": "static_illegal", "reason": "; ".join(e["code"] if isinstance(e, dict) else str(e) for e in rep.errors)}); continue + pid = plan.plan_id() + if pid in unique: + rows.append({"tuple": tup, "status": "equivalent_duplicate", "plan_id": pid, "duplicate_of": unique[pid][0]}); continue + unique[pid] = (tup, plan) + rows.append({"tuple": tup, "status": "unique", "plan_id": pid, "summary": plan.summary()}) + counts = {"raw": len(rows), "static_illegal": sum(r["status"] == "static_illegal" for r in rows), + "equivalent_duplicate": sum(r["status"] == "equivalent_duplicate" for r in rows), "unique": len(unique)} + return {"rows": rows, "unique": unique, "counts": counts} + + +NAMED_FLAGS = {"diffusion_only": ("all_legal", "per_device"), "gate_only": ("none", "per_net"), "combined": ("all_legal", "per_net")} + + +def named_plans(pdk, devices, cand=None): + """Named modes of one group. independent = devices in order, alternating fingers per device, one bottom strap per + device (what a generator that builds one transistor at a time produces). diffusion_only / gate_only / combined = the first unique candidate, + in the fixed axis order of AXES, whose diffusion/gate values are the mode's and that really shares (>= 1 + cross-device diffusion join for diffusion modes, >= 1 multi-device strap for gate modes; both for combined).""" + cand = cand or group_candidates(pdk, devices) + out = {"independent": independent_plan(devices)} + for mode, (dflag, gflag) in NAMED_FLAGS.items(): + pick = None + for row in cand["rows"]: + if row["status"] != "unique": continue + t = row["tuple"] + if t["diffusion"] != dflag or t["gate"] != gflag: continue + s = row["summary"] + need_d = mode in ("diffusion_only", "combined"); need_g = mode in ("gate_only", "combined") + if need_d and s["cross_device_diffusion_joins"] == 0: continue + if need_g and s["cross_device_gate_groups"] == 0: continue + pick = cand["unique"][row["plan_id"]][1]; break + if pick is not None: + pick.mode_label = mode + ":" + pick.mode_label + out[mode] = pick + return out diff --git a/src/glayout/sharing/evidence.py b/src/glayout/sharing/evidence.py new file mode 100644 index 00000000..fc04b34e --- /dev/null +++ b/src/glayout/sharing/evidence.py @@ -0,0 +1,109 @@ +"""Physical sharing evidence derived from geometry (never from plan labels). + +Two entry points: + evidence_from_rects - used by build_mos_group on the rectangles it just drew + evidence_from_gds - used by the evaluator on a written GDS file (independent re-derivation) +Both reduce to evidence_from_regions, which works on merged klayout Regions. +""" +from __future__ import annotations +import klayout.db as kdb + +DBU = 0.001 + + +def _region(rects, layer, dbu=DBU): + r = kdb.Region() + for (x0, y0, x1, y1) in rects.get(tuple(layer), []): + r.insert(kdb.Box(int(round(x0 / dbu)), int(round(y0 / dbu)), int(round(x1 / dbu)), int(round(y1 / dbu)))) + r.merge() + return r + + +def evidence_from_regions(active: kdb.Region, poly: kdb.Region, cont: kdb.Region, met1: kdb.Region, + node_records, gate_records, W, n_devices, dbu=DBU) -> dict: + """node_records: [{node, x, net, terminals:[dev:T], ...}], gate_records: [{device, x, net, group}]""" + def pt(x, y): + return kdb.Point(int(round(x / dbu)), int(round(y / dbu))) + islands = [p for p in active.merged().each()] + def island_of(x, y): + p = pt(x, y) + for i, isl in enumerate(islands): + if isl.inside(p): return i + return None + # diffusion nodes -> islands; a node shared across devices is a cross-device diffusion share + node_island = {}; cross_nodes = []; dev_islands = {} + for nd in node_records: + isl = island_of(nd["x"], W / 2) + node_island[nd["node"]] = isl + devs = sorted({t.split(":")[0] for t in nd["terminals"]}) + for d in devs: dev_islands.setdefault(d, set()).add(isl) + if len(devs) > 1: + cross_nodes.append({"node": nd["node"], "island": isl, "net": nd["net"], "terminals": nd["terminals"]}) + # gate conductors: connected poly components containing gates of >1 device + polys = [p for p in poly.merged().each()] + comp_devs = {} + for g in gate_records: + p = pt(g["x"], W / 2) + for i, pp in enumerate(polys): + if pp.inside(p): + comp_devs.setdefault(i, set()).add(g["device"]); break + shared_gate = [{"poly_component": i, "devices": sorted(d)} for i, d in comp_devs.items() if len(d) > 1] + # transistor count = connected regions of poly AND active + chan = (poly & active).merged() + n_channels = chan.count() + # contacts on active vs on poly + cont_act = (cont & active).count(); cont_poly = (cont & poly).count() + # island sharing: islands hosting >1 device + isl_devs = {} + for d, s in dev_islands.items(): + for i in s: isl_devs.setdefault(i, set()).add(d) + shared_islands = [{"island": i, "devices": sorted(ds)} for i, ds in isl_devs.items() if len(ds) > 1] + return { + "active_islands": len(islands), + "shared_diffusion_islands": shared_islands, + "cross_device_shared_nodes": cross_nodes, + "n_cross_device_shared_nodes": len(cross_nodes), + "shared_gate_conductors": shared_gate, + "n_cross_device_gate_conductors": len(shared_gate), + "poly_components": len(polys), + "channel_regions": n_channels, + "expected_fingers": len(gate_records), + "extra_mos_check": "ok" if n_channels == len(gate_records) else f"mismatch: {n_channels} channel regions vs {len(gate_records)} fingers", + "contacts_on_active": cont_act, "contacts_on_poly": cont_poly, + "active_area_um2": round(active.area() * dbu * dbu, 6), + "active_perimeter_um": round(active.merged().perimeter() * dbu, 4), + "poly_area_um2": round(poly.area() * dbu * dbu, 6), + "met1_area_um2": round(met1.area() * dbu * dbu, 6), + } + + +def evidence_from_rects(rules, rects, node_records, gate_records, W, n_devices, plan) -> dict: + lay = rules.layers + ev = evidence_from_regions(_region(rects, lay["active"]), _region(rects, lay["poly"]), _region(rects, lay["cont"]), _region(rects, lay["met1"]), + node_records, gate_records, W, n_devices) + ev["source"] = "builder_rectangles" + ev["plan_summary"] = plan.summary() + ev["consistency"] = { + "cross_device_joins_requested": plan.summary()["cross_device_diffusion_joins"], + "cross_device_nodes_found": ev["n_cross_device_shared_nodes"], + "cross_device_gate_groups_requested": plan.summary()["cross_device_gate_groups"], + "cross_device_gate_conductors_found": ev["n_cross_device_gate_conductors"], + } + return ev + + +def evidence_from_gds(gds_path: str, rules, node_records, gate_records, W, n_devices, cell=None, origin=(0.0, 0.0)) -> dict: + """Re-derive the evidence from a GDS file. node/gate records are in the group's local frame; origin shifts them.""" + ly = kdb.Layout(); ly.read(str(gds_path)) + top = ly.cell(cell) if cell else ly.top_cell() + dbu = ly.dbu + def reg(layer): + li = ly.layer(kdb.LayerInfo(int(layer[0]), int(layer[1]))) + return kdb.Region(top.begin_shapes_rec(li)).merged() + lay = rules.layers + ox = origin[0] + nr = [dict(n, x=n["x"] + ox) for n in node_records] + gr = [dict(g, x=g["x"] + ox) for g in gate_records] + ev = evidence_from_regions(reg(lay["active"]), reg(lay["poly"]), reg(lay["cont"]), reg(lay["met1"]), nr, gr, W, n_devices, dbu=dbu) + ev["source"] = "gds_file" + return ev diff --git a/src/glayout/sharing/group.py b/src/glayout/sharing/group.py new file mode 100644 index 00000000..0226829f --- /dev/null +++ b/src/glayout/sharing/group.py @@ -0,0 +1,438 @@ +"""build_mos_group: connection-aware joint construction of several logical MOS devices. + +Geometry is generated column by column from the plan (not by boolean-merging +finished devices): unit fingers are placed in the requested order, a diffusion +node between two fingers is drawn once and shared only when the plan joins the +fingers and the facing terminals carry the same net, and gate fingers of one +gate group are tied by a single poly strap outside the channel with its own +contact pad. All pins are exported as met2 pads on the top edge (source/drain +and top-strap gates) or on the bottom edge (bottom-strap gates), so that a +row-based channel router can connect them without knowing the internals. + +Coordinate convention (local): the channel active spans y in [0, W]; fingers +are ordered left to right along x. +""" +from __future__ import annotations +import math +from dataclasses import dataclass, field +from typing import Optional +from .spec import DeviceSpec, SharingPlan, FingerRef, GateGroup, EligibilityReport, SharingPlanRejected, GroupResult +from .rules import rules_for, snap, snap_up, GRID + + +@dataclass +class _Node: + index: int + island: int + x: float # contact column centre + net: str + terminals: list # [(device, 'S'|'D')] + is_end: bool + pin_row: int = 0 # 0 or 1 (staggered) + pin_name: str = "" + + +@dataclass +class _Gate: + pos: int + device: str + k: int + net: str + x: float # gate centre + group: int + island: int + + +@dataclass +class _Rects: + rects: dict = field(default_factory=dict) # layer tuple -> list of (x0,y0,x1,y1) + + def add(self, layer, x0, y0, x1, y1): + if layer is None: + return + if x1 < x0: x0, x1 = x1, x0 + if y1 < y0: y0, y1 = y1, y0 + self.rects.setdefault(tuple(layer), []).append((snap(x0), snap(y0), snap(x1), snap(y1))) + + +def validate_plan(rules, devices: list[DeviceSpec], plan: SharingPlan) -> EligibilityReport: + rep = EligibilityReport(ok=True) + if not devices: + rep.add_error("no_devices", "group needs at least one device"); return rep + ids = [d.logical_id for d in devices] + if len(set(ids)) != len(ids): + rep.add_error("duplicate_ids", "logical ids must be unique") + roles = {d.model_role for d in devices} + if len(roles) > 1: + rep.add_error("mixed_polarity", f"cannot share across polarities {sorted(roles)}") + if any(d.m != 1 for d in devices): + rep.add_error("multiplier_unsupported", "SPICE m>1 must be expanded into fingers before building a group") + Ls = {round(d.length, 4) for d in devices} + if len(Ls) > 1: + rep.add_error("length_mismatch", f"all devices of a group must share L, got {sorted(Ls)}") + uws = {round(d.unit_width, 4) for d in devices} + if len(uws) > 1: + rep.add_error("unit_width_mismatch", f"all devices of a group must share the unit finger width, got {sorted(uws)}") + bodies = {d.b for d in devices} + if len(bodies) > 1: + rep.add_error("body_mismatch", f"devices of one group must share the body net, got {sorted(bodies)}") + uw = devices[0].unit_width + if uw + 1e-9 < rules.min_contactable_width: + rep.add_error("unit_width_below_contactable", f"unit width {uw:.3f} < contactable minimum {rules.min_contactable_width:.3f} (dogbone not supported)") + if devices[0].length + 1e-9 < rules.L_min: + rep.add_error("length_below_min", f"L={devices[0].length} < min {rules.L_min}") + if rep.errors: + return rep + # finger coverage + expected = {(d.logical_id, k) for d in devices for k in range(d.nf)} + got = [(f.device, f.index) for f in plan.finger_order] + if len(got) != len(set(got)) or set(got) != expected: + rep.add_error("finger_coverage", "finger_order must list every unit finger of every device exactly once", + {"missing": sorted(expected - set(got)), "extra": sorted(set(got) - expected)}) + return rep + n = len(got) + if len(plan.orientations) != n or any(o not in ("SD", "DS") for o in plan.orientations): + rep.add_error("orientations", "orientations must be a list of 'SD'/'DS' with one entry per finger"); return rep + if len(plan.diffusion_joins) != n - 1: + rep.add_error("joins_length", "diffusion_joins must have n-1 entries"); return rep + dev = {d.logical_id: d for d in devices} + def lr(p): + f = plan.finger_order[p]; d = dev[f.device] + return (d.s, d.d) if plan.orientations[p] == "SD" else (d.d, d.s) + for i in range(n - 1): + if plan.diffusion_joins[i]: + rn = lr(i)[1]; ln = lr(i + 1)[1 - 1] + if rn != ln: + rep.add_error("join_net_mismatch", f"fingers {i} and {i+1} cannot share a diffusion node: nets {rn} vs {ln}", {"position": i}) + # gate groups + seen = {} + for gi, g in enumerate(plan.gate_groups): + for p in g.fingers: + if p < 0 or p >= n: + rep.add_error("gate_group_index", f"gate group {gi} references position {p}") + elif p in seen: + rep.add_error("gate_group_partition", f"position {p} is in gate groups {seen[p]} and {gi}") + seen[p] = gi + nets = {dev[plan.finger_order[p].device].g for p in g.fingers if 0 <= p < n} + if len(nets) > 1: + rep.add_error("gate_group_net_mismatch", f"gate group {gi} ties different gate nets {sorted(nets)}", {"group": gi}) + if g.side not in ("bottom", "top") or g.pad_end not in ("left", "right"): + rep.add_error("gate_group_fields", f"gate group {gi} has invalid side/pad_end") + if len(seen) != n: + rep.add_error("gate_group_partition", "every finger must belong to exactly one gate group") + if rep.errors: + return rep + # strap routability: bottom straps span their own interval; top straps reach from their fingers to the pad end + bottom = [(min(g.fingers), max(g.fingers), gi) for gi, g in enumerate(plan.gate_groups) if g.side == "bottom"] + top = [] + for gi, g in enumerate(plan.gate_groups): + if g.side == "top": + lo, hi = min(g.fingers), max(g.fingers) + if plan.gate_contact_policy == "both_ends": + lo, hi = 0, n - 1 + elif g.pad_end == "left": + lo = 0 + else: + hi = n - 1 + top.append((lo, hi, gi)) + for a in range(len(bottom)): + for b in range(a + 1, len(bottom)): + la, ha, ga = bottom[a]; lb, hb, gb = bottom[b] + if la <= hb and lb <= ha: + rep.add_error("gate_strap_interleave_unroutable", f"bottom straps of gate groups {ga} and {gb} overlap; move one to side 'top'", {"groups": [ga, gb]}) + for a in range(len(top)): + for b in range(a + 1, len(top)): + la, ha, ga = top[a]; lb, hb, gb = top[b] + if la <= hb and lb <= ha: + rep.add_error("gate_strap_interleave_unroutable", f"top straps of gate groups {ga} and {gb} overlap in reach", {"groups": [ga, gb]}) + rep.checks = {"fingers": n, "islands": len(plan.islands()), "bottom_groups": len(bottom), "top_groups": len(top)} + return rep + + +def independent_plan(devices: list[DeviceSpec]) -> SharingPlan: + """Canonical plan with no cross-device sharing: devices consecutive, own strap each.""" + order, orient, joins, groups = [], [], [], [] + pos = 0 + for di, d in enumerate(devices): + start = pos + for k in range(d.nf): + order.append(FingerRef(d.logical_id, k)); orient.append("SD" if k % 2 == 0 else "DS") + if k > 0: joins.append(True) + pos += 1 + if di < len(devices) - 1: joins.append(False) + groups.append(GateGroup(tuple(range(start, pos)), "bottom", "left")) + return SharingPlan(order, orient, joins, groups, mode_label="independent") + + +def build_mos_group(pdk, devices: list[DeviceSpec], connectivity=None, plan: Optional[SharingPlan] = None, + constraints: Optional[dict] = None, name: str = "mos_group") -> GroupResult: + from glayout.backend import Component + rules = rules_for(pdk) + constraints = constraints or {} + if plan is None: + plan = independent_plan(devices) + rep = validate_plan(rules, devices, plan) + if not rep.ok: + raise SharingPlanRejected(rep) + dev = {d.logical_id: d for d in devices} + n = plan.n(); W = snap(devices[0].unit_width); L = snap(devices[0].length) + pol = devices[0].model_role + R = rules + + # ---------------- x layout ---------------- + islands = plan.islands() + nodes: list[_Node] = []; gates: list[_Gate] = [] + gate_group_of = {} + for gi, g in enumerate(plan.gate_groups): + for p in g.fingers: gate_group_of[p] = gi + x = 0.0 + island_x = [] # (x0, x1) active extents + def lr(p): + f = plan.finger_order[p]; d = dev[f.device] + return (("S", d.s), ("D", d.d)) if plan.orientations[p] == "SD" else (("D", d.d), ("S", d.s)) + # inner node width: contact rules, and metal-1 bar spacing between adjacent nodes (bars are cont_w + 2*m1 enclosure wide) + inner_node = snap_up(max(2 * R.cont_gate_sep + R.cont_w, R.m1_sep + R.m1_bar_w() - L)) + # gap between islands: active spacing, and metal-1 spacing between the end bars / pin pads that stick out past the active end + outer_m1_half = max(R.m1_bar_w(), R.via1_m1_w()) / 2 + active_end_half = R.cont_w / 2 + R.act_enc_cont + island_gap = snap_up(max(R.act_sep, R.m1_sep + 2 * max(0.0, outer_m1_half - active_end_half))) + # end node: same gate-to-contact offset as inner nodes so that end bars keep metal spacing to the first inner bar + end_off = max(snap_up(R.cont_gate_sep + R.cont_w / 2), snap_up(inner_node / 2)) + end_ext = snap_up(end_off + R.cont_w / 2 + R.act_enc_cont) # active beyond last gate at an island end + end_ext = max(end_ext, snap_up(R.act_sd_ext_min)) + for isl, (a, b) in enumerate(islands): + x0 = x + # left end node + cx = snap(x0 + end_ext - end_off) + t, net = lr(a)[0] + nodes.append(_Node(len(nodes), isl, cx, net, [(plan.finger_order[a].device, t)], True)) + xg = snap(x0 + end_ext) + for p in range(a, b + 1): + f = plan.finger_order[p] + gates.append(_Gate(p, f.device, f.index, dev[f.device].g, xg + L / 2, gate_group_of[p], isl)) + right_t, right_net = lr(p)[1] + if p < b: + cx = snap(xg + L + inner_node / 2) + nxt_t, nxt_net = lr(p + 1)[0] + assert nxt_net == right_net + nodes.append(_Node(len(nodes), isl, cx, right_net, [(f.device, right_t), (plan.finger_order[p + 1].device, nxt_t)], False)) + xg = snap(xg + L + inner_node) + else: + cx = snap(xg + L + end_off) + nodes.append(_Node(len(nodes), isl, cx, right_net, [(f.device, right_t)], True)) + x1 = snap(xg + L + end_ext) + island_x.append((x0, x1)) + x = snap(x1 + island_gap) + x_act_min, x_act_max = island_x[0][0], island_x[-1][1] + + # ---------------- vertical structure ---------------- + strap_w = snap_up(R.poly_w_min) + bottom_groups = [gi for gi, g in enumerate(plan.gate_groups) if g.side == "bottom"] + top_groups = [gi for gi, g in enumerate(plan.gate_groups) if g.side == "top"] + pos_side = {p: plan.gate_groups[gate_group_of[p]].side for p in range(n)} + def interval(gi): + g = plan.gate_groups[gi]; lo, hi = min(g.fingers), max(g.fingers) + if g.side == "top": + if plan.gate_contact_policy == "both_ends": lo, hi = 0, n - 1 + elif g.pad_end == "left": lo = 0 + else: hi = n - 1 + return lo, hi + need_off_bottom = False + for gi in bottom_groups: + lo, hi = interval(gi) + if any(pos_side[p] == "top" for p in range(lo, hi + 1)): need_off_bottom = True + need_off_top = False + for gi in top_groups: + lo, hi = interval(gi) + if any(pos_side[p] == "bottom" for p in range(lo, hi + 1)): need_off_top = True + y_sb_top = snap(-R.endcap - (R.poly_sep if need_off_bottom else 0.0)) # bottom strap band top edge + y_sb_bot = snap(y_sb_top - strap_w) + y_st_bot = snap(W + R.endcap + (R.poly_sep if need_off_top else 0.0)) + y_st_top = snap(y_st_bot + strap_w) + # gate pad sizes + gpad_poly = snap_up(max(R.cont_w + 2 * R.poly_enc_cont, R.poly_w_min, R.sq_from_area(R.poly_area_min))) + gpad_m1 = snap_up(max(R.cont_w + 2 * R.m1_enc_cont, R.m1_w, R.sq_from_area(R.m1_area_min), R.via1_m1_w())) + gpad_m2 = R.via1_pad_w() + gpad = snap_up(max(gpad_poly, gpad_m1)) + # bottom gate pad levels: level0 directly below strap band, level1 further down + pad_pitch_y = snap_up(gpad + max(R.poly_sep, R.m1_sep, R.m2_sep)) + y_pad0_top = y_sb_bot + def pad_y(level): + top = snap(y_pad0_top - level * pad_pitch_y) + return top - gpad, top + # S/D pin rows above the top band (or above endcap if no top band) + m1_bar_w = R.m1_bar_w() + pin_pad = R.via1_pad_w() + pin_m1 = R.via1_m1_w() + y_top_geom = y_st_top if top_groups else snap(W + R.endcap) + pin_row_pitch = snap_up(pin_pad + R.m2_sep) + y_pinA = snap(y_top_geom + max(R.m1_sep, R.poly_act_sep, 0.1)) + y_pinB = snap(y_pinA + pin_row_pitch) + pin_rows = (y_pinA, y_pinB) + + rects = _Rects(); lay = R.layers + comp = Component(name) + ports = {}; pin_nets = {}; pin_meta = {} + + # ---------------- active / implant / well ---------------- + for (x0, x1) in island_x: + rects.add(lay["active"], x0, 0, x1, W) + if pol == "nfet": + enc = R.nimp_enc_act + if R.nimp_layer is not None: + rects.add(R.nimp_layer, x_act_min - enc, -enc, x_act_max + enc, W + enc) + else: + enc = max(R.pimp_enc_act, R.pimp_enc_gate) + rects.add(R.pimp_layer, x_act_min - enc, -enc, x_act_max + enc, W + enc) + nwe = R.nwell_enc_pact + rects.add(R.nwell_layer, x_act_min - nwe, -nwe, x_act_max + nwe, W + nwe) + + # ---------------- contacts and S/D bars ---------------- + ncont = max(1, int(math.floor((W - 2 * R.act_enc_cont - R.cont_w) / (R.cont_w + R.cont_sep) + 1e-9)) + 1) + while ncont > 1 and (ncont * R.cont_w + (ncont - 1) * R.cont_sep) > W - 2 * R.act_enc_cont + 1e-9: + ncont -= 1 + hcol = ncont * R.cont_w + (ncont - 1) * R.cont_sep + yc0 = snap((W - hcol) / 2) + if yc0 < R.act_enc_cont - 1e-9: + yc0 = snap_up(R.act_enc_cont) + for i, nd in enumerate(nodes): + nd.pin_row = i % 2 + half = R.cont_w / 2 + for c in range(ncont): + y0 = snap(yc0 + c * (R.cont_w + R.cont_sep)) + rects.add(lay["cont"], nd.x - half, y0, nd.x + half, y0 + R.cont_w) + bar_y0 = snap(yc0 - R.m1_enc_cont) + ypin = pin_rows[nd.pin_row] + rects.add(lay["met1"], nd.x - m1_bar_w / 2, bar_y0, nd.x + m1_bar_w / 2, ypin + pin_m1 / 2) + # via1 + met2 pad (pin) + rects.add(lay["met1"], nd.x - pin_m1 / 2, ypin - pin_m1 / 2, nd.x + pin_m1 / 2, ypin + pin_m1 / 2) + rects.add(lay["via1"], nd.x - R.via1_w / 2, ypin - R.via1_w / 2, nd.x + R.via1_w / 2, ypin + R.via1_w / 2) + rects.add(lay["met2"], nd.x - pin_pad / 2, ypin - pin_pad / 2, nd.x + pin_pad / 2, ypin + pin_pad / 2) + pname = f"sd{i}" + nd.pin_name = pname + comp.add_port(name=pname, center=(nd.x, snap(ypin + pin_pad / 2)), width=pin_pad, orientation=90, layer=lay["met2"]) + pin_nets[pname] = nd.net + pin_meta[pname] = {"side": "top", "x": nd.x, "y": snap(ypin + pin_pad / 2), "width": pin_pad, "net": nd.net, + "terminals": [f"{d}:{t}" for d, t in nd.terminals], "node": i, "island": nd.island} + for d, t in nd.terminals: + ports.setdefault(f"{d}:{t}", []).append(pname) + + # ---------------- gates, straps, gate pads ---------------- + gate_pin_count = 0 + bottom_level = {} + for li, gi in enumerate(sorted(bottom_groups, key=lambda gi: min(plan.gate_groups[gi].fingers))): + bottom_level[gi] = li % 2 + gpad_records = [] + for gi, g in enumerate(plan.gate_groups): + gxs = [gates[p].x for p in g.fingers] + lo, hi = min(g.fingers), max(g.fingers) + net = dev[plan.finger_order[lo].device].g + if g.side == "bottom": + yb0, yb1 = y_sb_bot, y_sb_top + # strap over the finger interval + rects.add(lay["poly"], min(gxs) - L / 2, yb0, max(gxs) + L / 2, yb1) + # pads: at the strap's first gate (and last gate if both_ends) + level = bottom_level[gi] + pad_xs = [gates[lo].x] if plan.gate_contact_policy == "single_end" else sorted({gates[lo].x, gates[hi].x}) + if plan.gate_contact_policy == "single_end" and g.pad_end == "right": + pad_xs = [gates[hi].x] + for pxe in pad_xs: + px = snap(pxe) # pad/contact geometry on the 5 nm grid; the stub follows the exact gate edges + py0, py1 = pad_y(level) + rects.add(lay["poly"], pxe - L / 2, py1 - GRID, pxe + L / 2, yb0 + GRID) # poly stub from strap to pad + rects.add(lay["poly"], px - gpad / 2, py0, px + gpad / 2, py1) + cy = snap((py0 + py1) / 2) + rects.add(lay["cont"], px - R.cont_w / 2, cy - R.cont_w / 2, px + R.cont_w / 2, cy + R.cont_w / 2) + if R.pdk_name == "sky130": # nitride poly cut around every poly contact (npc.1 width 0.27, enclosure 0.10) + npc_h = max(0.27, R.cont_w + 0.2) / 2 + rects.add((95, 20), px - npc_h, cy - npc_h, px + npc_h, cy + npc_h) + rects.add(lay["met1"], px - gpad_m1 / 2, cy - gpad_m1 / 2, px + gpad_m1 / 2, cy + gpad_m1 / 2) + rects.add(lay["via1"], px - R.via1_w / 2, cy - R.via1_w / 2, px + R.via1_w / 2, cy + R.via1_w / 2) + rects.add(lay["met2"], px - gpad_m2 / 2, cy - gpad_m2 / 2, px + gpad_m2 / 2, cy + gpad_m2 / 2) + pname = f"g{gate_pin_count}"; gate_pin_count += 1 + comp.add_port(name=pname, center=(px, snap(cy - gpad_m2 / 2)), width=gpad_m2, orientation=270, layer=lay["met2"]) + pin_nets[pname] = net + pin_meta[pname] = {"side": "bottom", "x": px, "y": snap(cy - gpad_m2 / 2), "width": gpad_m2, "net": net, + "terminals": sorted({f"{plan.finger_order[p].device}:G" for p in g.fingers}), "gate_group": gi} + for d in sorted({plan.finger_order[p].device for p in g.fingers}): + ports.setdefault(f"{d}:G", []).append(pname) + gpad_records.append({"group": gi, "x": px, "y": cy, "side": "bottom"}) + else: + yb0, yb1 = y_st_bot, y_st_top + d_pad = snap_up(max(R.contpoly_act_sep, R.m1_sep + 2 * R.m1_enc_cont - R.act_enc_cont, R.poly_act_sep + R.poly_enc_cont)) + ends = [] + if plan.gate_contact_policy == "both_ends": + ends = ["left", "right"] + else: + ends = [g.pad_end] + xs_reach = [min(gxs) - L / 2, max(gxs) + L / 2] + for e in ends: + if e == "left": + px = snap(x_act_min - d_pad - R.cont_w / 2 - R.poly_enc_cont - (gpad - R.cont_w - 2 * R.poly_enc_cont) / 2) + xs_reach[0] = min(xs_reach[0], px - gpad / 2) + else: + px = snap(x_act_max + d_pad + R.cont_w / 2 + R.poly_enc_cont + (gpad - R.cont_w - 2 * R.poly_enc_cont) / 2) + xs_reach[1] = max(xs_reach[1], px + gpad / 2) + cy = snap((yb0 + yb1) / 2) + pad_bot = snap(cy - gpad / 2); pad_top = snap(cy + gpad / 2) + rects.add(lay["poly"], px - gpad / 2, pad_bot, px + gpad / 2, pad_top) + rects.add(lay["cont"], px - R.cont_w / 2, cy - R.cont_w / 2, px + R.cont_w / 2, cy + R.cont_w / 2) + if R.pdk_name == "sky130": + npc_h = max(0.27, R.cont_w + 0.2) / 2 + rects.add((95, 20), px - npc_h, cy - npc_h, px + npc_h, cy + npc_h) + # met1 pad and riser to the pin row (use the row opposite to the nearest end node) + near_node = nodes[0] if e == "left" else nodes[-1] + row = 1 - near_node.pin_row + ypin = pin_rows[row] + rects.add(lay["met1"], px - gpad_m1 / 2, cy - gpad_m1 / 2, px + gpad_m1 / 2, cy + gpad_m1 / 2) + rects.add(lay["met1"], px - m1_bar_w / 2, cy, px + m1_bar_w / 2, ypin + pin_m1 / 2) + rects.add(lay["met1"], px - pin_m1 / 2, ypin - pin_m1 / 2, px + pin_m1 / 2, ypin + pin_m1 / 2) + rects.add(lay["via1"], px - R.via1_w / 2, ypin - R.via1_w / 2, px + R.via1_w / 2, ypin + R.via1_w / 2) + rects.add(lay["met2"], px - pin_pad / 2, ypin - pin_pad / 2, px + pin_pad / 2, ypin + pin_pad / 2) + pname = f"g{gate_pin_count}"; gate_pin_count += 1 + comp.add_port(name=pname, center=(px, snap(ypin + pin_pad / 2)), width=pin_pad, orientation=90, layer=lay["met2"]) + pin_nets[pname] = net + pin_meta[pname] = {"side": "top", "x": px, "y": snap(ypin + pin_pad / 2), "width": pin_pad, "net": net, + "terminals": sorted({f"{plan.finger_order[p].device}:G" for p in g.fingers}), "gate_group": gi} + for d in sorted({plan.finger_order[p].device for p in g.fingers}): + ports.setdefault(f"{d}:G", []).append(pname) + gpad_records.append({"group": gi, "x": px, "y": cy, "side": "top"}) + rects.add(lay["poly"], xs_reach[0], yb0, xs_reach[1], yb1) + # gate fingers + for gt in gates: + side = plan.gate_groups[gt.group].side + y0 = y_sb_top - GRID if side == "bottom" else snap(-R.endcap) + y1 = y_st_bot + GRID if side == "top" else snap(W + R.endcap) + rects.add(lay["poly"], gt.x - L / 2, y0, gt.x + L / 2, y1) + + # ---------------- emit ---------------- + for layer, rl in rects.rects.items(): + for (x0, y0, x1, y1) in rl: + comp.add_polygon([(x0, y0), (x1, y0), (x1, y1), (x0, y1)], layer=layer) + bbox = _bbox(rects) + device_map = {} + for d in devices: + device_map[d.logical_id] = { + "fingers": [{"position": gt.pos, "k": gt.k, "x": gt.x, "island": gt.island, "gate_group": gt.group} for gt in gates if gt.device == d.logical_id], + "terminals": {t: ports.get(f"{d.logical_id}:{t}", []) for t in ("D", "G", "S")}, + "nets": d.nets(), "width_total": d.width_total, "unit_width": W, "length": L, "nf": d.nf, + } + node_records = [{"node": nd.index, "island": nd.island, "x": nd.x, "net": nd.net, "terminals": [f"{a}:{b}" for a, b in nd.terminals], "is_end": nd.is_end, "pin": nd.pin_name} for nd in nodes] + from .evidence import evidence_from_rects + evidence = evidence_from_rects(rules, rects.rects, node_records, [{"pos": g.pos, "device": g.device, "x": g.x, "net": g.net, "group": g.group} for g in gates], W, len(devices), plan) + stats = {"bbox": bbox, "width": snap(bbox[2] - bbox[0]), "height": snap(bbox[3] - bbox[1]), "n_fingers": n, "n_islands": len(islands), + "n_sd_nodes": len(nodes), "n_sd_contacts": len(nodes) * ncont, "contacts_per_node": ncont, "n_gate_pads": gate_pin_count, + "unit_width": W, "length": L, "pin_rows": pin_rows, "active_bbox": (x_act_min, 0.0, x_act_max, W), "bands": {"bottom": [y_sb_bot, y_sb_top], "top": [y_st_bot, y_st_top] if top_groups else None}} + comp.info["pin_meta"] = pin_meta + comp.info["pin_nets"] = pin_nets + comp.info["group_stats"] = stats + return GroupResult(component=comp, ports=ports, pin_nets=pin_nets, device_map=device_map, applied_plan=plan.to_json(), + eligibility_report=rep.to_json(), physical_sharing_evidence=evidence, geometry_stats=stats) + + +def _bbox(rects: _Rects): + xs0 = []; ys0 = []; xs1 = []; ys1 = [] + for rl in rects.rects.values(): + for (x0, y0, x1, y1) in rl: + xs0.append(x0); ys0.append(y0); xs1.append(x1); ys1.append(y1) + return (min(xs0), min(ys0), max(xs1), max(ys1)) diff --git a/src/glayout/sharing/rules.py b/src/glayout/sharing/rules.py new file mode 100644 index 00000000..f7d113c1 --- /dev/null +++ b/src/glayout/sharing/rules.py @@ -0,0 +1,269 @@ +"""Design-rule adapter for the shared-group builder. + +All numbers come from the MappedPDK generic rule table (``pdk.get_grule``) +except where that table is missing an entry or is known to disagree with the +foundry rule deck. Those cases are listed explicitly in ``OVERRIDES`` with the +foundry rule identifier so that they can be audited. Nothing here relaxes a +foundry rule: every override is equal to or more conservative than the deck. +""" +from __future__ import annotations +from dataclasses import dataclass, field +from typing import Optional + +GRID = 0.005 # manufacturing grid used by all three PDKs (sky130, gf180mcu, sg13g2) + + +def snap(x: float, grid: float = GRID) -> float: + return round(round(x / grid) * grid, 4) + + +def snap_up(x: float, grid: float = GRID) -> float: + import math + return round(math.ceil(round(x / grid, 6)) * grid, 4) + + +def snap2(x: float, grid: float = GRID) -> float: + """Snap to twice the grid (keeps centred shapes on grid).""" + return snap(x, 2 * grid) + + +# Explicit, auditable overrides: pdk -> key -> (value, rule id / justification) +OVERRIDES = { + "ihp130": { + "act_enc_cont": (0.07, "Cnt.c"), + "poly_enc_cont": (0.07, "Cnt.d"), + "cont_gate_sep": (0.11, "Cnt.f (Cont on Activ to GatPoly)"), + "contpoly_act_sep": (0.14, "Cnt.e (Cont on GatPoly to Activ)"), + "m1_enc_cont": (0.05, "M1.c1 endcap (M1.c is 0.00)"), + "m1_enc_via1": (0.05, "V1.c1 endcap"), + "m2_enc_via1": (0.05, "M2.c1 endcap"), + "m2_enc_via2": (0.05, "V2.c1 endcap"), + "m3_enc_via2": (0.05, "M3.c1 endcap"), + "endcap": (0.18, "Gat.c"), + "poly_act_sep": (0.07, "Gat.d"), + "poly_sep": (0.18, "Gat.b"), + "pimp_enc_act": (0.18, "pSD.c"), + "pimp_enc_gate": (0.30, "pSD.i (pSD enclosure of PFET gate)"), + "pimp_w_min": (0.31, "pSD.a"), + "pimp_sep": (0.31, "pSD.b"), + "pimp_to_nact": (0.18, "pSD.d"), + "nimp_layer": (None, "SG13G2 Activ is n+ by default; nSD drawing is not required for NMOS"), + "nwell_enc_pact": (0.31, "NW.c"), + "nwell_enc_ntap": (0.24, "NW.e"), + "nwell_to_nact": (0.31, "NW.d"), + "nwell_to_ptap": (0.24, "NW.f"), + "nwell_w_min": (0.62, "NW.a"), + "m1_area_min": (0.09, "M1.d"), + "m2_area_min": (0.144, "M2.d"), + "m3_area_min": (0.144, "M3.d"), + "poly_area_min": (0.09, "Gat.e"), + "act_area_min": (0.122, "Act.d"), + "act_sd_ext_min": (0.23, "Act.c"), + "m3_w": (0.20, "M3.a"), "m3_sep": (0.21, "M3.b"), + "via2_w": (0.19, "V2.a"), "via2_sep": (0.22, "V2.b"), + "tap_act_sep": (0.21, "Act.b (same layer) + pSD.d 0.18 implant spacing handled separately"), + "pimp_to_ntap": (0.16, "Cnt.g1 0.09 pSD space to Cont on nSD-Activ + Cnt.c 0.07 (and pSD.d1 0.03)"), + }, + "sky130": { + # sky130 generic layers in gLayout: met1=li1, via1=mcon, met2=met1, via2=via, met3=met2 + "contpoly_act_sep": (0.19, "licon.11/poly licon to diff (conservative)"), + "poly_act_sep": (0.075, "poly.7"), + "m1_area_min": (0.0561, "li.6"), + "m2_area_min": (0.083, "m1.6"), + "m3_area_min": (0.0676, "m2.6"), + "poly_area_min": (0.0, "n/a"), + "act_area_min": (0.0, "n/a"), + "act_sd_ext_min": (0.0, "n/a"), + "pimp_enc_gate": (0.125, "psdm enclosure (same as diff)"), + "nwell_enc_pact": (0.18, "nwell.3"), + "nwell_enc_ntap": (0.18, "nwell.3"), + "nwell_to_nact": (0.34, "difftap.9 / nwell spacing to ndiff (conservative)"), + "nwell_to_ptap": (0.13, "difftap.10"), + "nwell_w_min": (0.84, "nwell.1"), + "tap_act_sep": (0.27, "difftap.3"), + "pimp_to_nact": (0.13, "nsdm/psdm spacing to diff"), + "pimp_to_ntap": (0.13, "psdm spacing to n+ tap diffusion"), + }, + "gf180": { + "poly_sep": (0.24, "PL.3a (generic table has no poly spacing entry)"), + "contpoly_act_sep": (0.15, "poly contact to COMP, conservative value (rule id not confirmed)"), + "poly_act_sep": (0.1, "PL.5a"), + "m1_area_min": (0.1444, "metal-1 minimum area, conservative value (rule id not confirmed)"), + "m2_area_min": (0.1444, "M2.3"), + "m3_area_min": (0.1444, "M3.3"), + "poly_area_min": (0.0, "n/a"), + "act_area_min": (0.2025, "DF.6"), + "act_sd_ext_min": (0.24, "DF.3a"), + "pimp_enc_gate": (0.16, "PP.5 (same as comp enclosure)"), + "nwell_enc_pact": (0.43, "nwell enclosure of PCOMP, conservative value (rule id not confirmed)"), + "nwell_enc_ntap": (0.12, "NW enclosure of ncomp tap"), + "nwell_to_nact": (0.43, "NW spacing to ncomp (conservative)"), + "nwell_to_ptap": (0.12, "nwell to pcomp tap"), + "nwell_w_min": (0.86, "NW.1a"), + "tap_act_sep": (0.28, "DF.4"), + "pimp_to_nact": (0.16, "PP spacing to NCOMP"), + "pimp_to_ntap": (0.16, "PP spacing to NCOMP tap"), + }, +} + + +@dataclass +class GroupRules: + pdk_name: str + grid: float + L_min: float + poly_w_min: float + poly_sep: float + endcap: float + poly_act_sep: float + act_w_min: float + act_sep: float + cont_w: float + cont_sep: float + act_enc_cont: float + poly_enc_cont: float + cont_gate_sep: float + contpoly_act_sep: float + m1_w: float + m1_sep: float + m1_enc_cont: float + via1_w: float + via1_sep: float + m1_enc_via1: float + m2_enc_via1: float + m2_w: float + m2_sep: float + via2_w: float + via2_sep: float + m2_enc_via2: float + m3_enc_via2: float + m3_w: float + m3_sep: float + nimp_layer: Optional[tuple] + pimp_layer: Optional[tuple] + nimp_enc_act: float + pimp_enc_act: float + pimp_enc_gate: float + imp_w_min: float + imp_sep: float + pimp_to_nact: float + pimp_to_ntap: float + nwell_layer: tuple + nwell_enc_pact: float + nwell_enc_ntap: float + nwell_to_nact: float + nwell_to_ptap: float + nwell_w_min: float + tap_act_sep: float + act_enc_cont_tap: float + m1_area_min: float + m2_area_min: float + m3_area_min: float + poly_area_min: float + act_area_min: float + act_sd_ext_min: float + layers: dict = field(default_factory=dict) + overrides_used: dict = field(default_factory=dict) + + # ---- derived ------------------------------------------------------- + @property + def min_contactable_width(self) -> float: + """Smallest unit finger width that hosts one contact without a dogbone.""" + return snap_up(self.cont_w + 2 * self.act_enc_cont) + + def m1_bar_w(self) -> float: + return snap_up(max(self.m1_w, self.cont_w + 2 * self.m1_enc_cont)) + + def via1_pad_w(self) -> float: + return snap_up(max(self.m2_w, self.via1_w + 2 * self.m2_enc_via1, self.sq_from_area(self.m2_area_min))) + + def via1_m1_w(self) -> float: + return snap_up(max(self.m1_w, self.via1_w + 2 * self.m1_enc_via1)) + + @staticmethod + def sq_from_area(area: float) -> float: + import math + return math.sqrt(area) if area > 0 else 0.0 + + def to_json(self) -> dict: + d = {k: v for k, v in self.__dict__.items() if k not in ("layers",)} + d["layers"] = {k: list(v) if v else None for k, v in self.layers.items()} + return d + + +def _ov(pdk_name: str, key: str, default, used: dict): + ov = OVERRIDES.get(pdk_name, {}) + if key in ov: + used[key] = {"value": ov[key][0], "rule": ov[key][1]} + return ov[key][0] + return default + + +def rules_for(pdk) -> GroupRules: + g = pdk.get_grule + name = pdk.name + used = {} + + def ovr(key, default): + return _ov(name, key, default, used) + + def gr(a, b=None, key="min_separation", default=None): + try: + v = g(a, b)[key] if b else g(a)[key] + return v if v is not None else default + except Exception: + return default + + layers = { + "active": pdk.get_glayer("active_diff"), "poly": pdk.get_glayer("poly"), "cont": pdk.get_glayer("mcon"), + "met1": pdk.get_glayer("met1"), "via1": pdk.get_glayer("via1"), "met2": pdk.get_glayer("met2"), + "via2": pdk.get_glayer("via2"), "met3": pdk.get_glayer("met3"), + "nwell": pdk.get_glayer("nwell"), "nimp": pdk.get_glayer("n+s/d"), "pimp": pdk.get_glayer("p+s/d"), + "tap": pdk.get_glayer("active_tap"), + } + for lay in ("met1", "met2", "met3"): + for suf in ("_pin", "_label"): + try: layers[lay + suf] = pdk.get_glayer(lay + suf) + except Exception: layers[lay + suf] = None + nimp = ovr("nimp_layer", layers["nimp"]) + r = GroupRules( + pdk_name=name, grid=GRID, + L_min=gr("poly", key="min_width"), poly_w_min=gr("poly", key="min_width"), + poly_sep=ovr("poly_sep", gr("poly", key="min_separation")), + endcap=ovr("endcap", gr("poly", "active_diff", "overhang")), + poly_act_sep=ovr("poly_act_sep", gr("poly", "active_diff", "min_separation", 0.1)), + act_w_min=gr("active_diff", key="min_width"), act_sep=gr("active_diff", key="min_separation"), + cont_w=gr("mcon", key="width"), cont_sep=gr("mcon", key="min_separation"), + act_enc_cont=ovr("act_enc_cont", gr("active_diff", "mcon", "min_enclosure")), + poly_enc_cont=ovr("poly_enc_cont", max(gr("poly", "mcon", "min_enclosure", 0.0), gr("mcon", "poly", "min_enclosure", 0.0))), + cont_gate_sep=ovr("cont_gate_sep", gr("poly", "mcon", "min_separation")), + contpoly_act_sep=ovr("contpoly_act_sep", 0.2), + m1_w=gr("met1", key="min_width"), m1_sep=gr("met1", key="min_separation"), + m1_enc_cont=ovr("m1_enc_cont", gr("mcon", "met1", "min_enclosure", 0.0)), + via1_w=gr("via1", key="width"), via1_sep=gr("via1", key="min_separation"), + m1_enc_via1=ovr("m1_enc_via1", gr("met1", "via1", "min_enclosure", 0.0)), + m2_enc_via1=ovr("m2_enc_via1", gr("via1", "met2", "min_enclosure", 0.0)), + m2_w=gr("met2", key="min_width"), m2_sep=gr("met2", key="min_separation"), + via2_w=ovr("via2_w", gr("via2", key="width")), via2_sep=ovr("via2_sep", gr("via2", key="min_separation")), + m2_enc_via2=ovr("m2_enc_via2", gr("met2", "via2", "min_enclosure", 0.0)), + m3_enc_via2=ovr("m3_enc_via2", gr("via2", "met3", "min_enclosure", 0.0)), + m3_w=ovr("m3_w", gr("met3", key="min_width")), m3_sep=ovr("m3_sep", gr("met3", key="min_separation")), + nimp_layer=nimp, pimp_layer=layers["pimp"], + nimp_enc_act=gr("n+s/d", "active_diff", "min_enclosure", 0.13), + pimp_enc_act=ovr("pimp_enc_act", gr("p+s/d", "active_diff", "min_enclosure", 0.13)), + pimp_enc_gate=ovr("pimp_enc_gate", gr("p+s/d", "active_diff", "min_enclosure", 0.13)), + imp_w_min=ovr("pimp_w_min", gr("p+s/d", key="min_width", default=0.38)), + imp_sep=ovr("pimp_sep", gr("p+s/d", key="min_separation", default=0.38)), + pimp_to_nact=ovr("pimp_to_nact", 0.18), pimp_to_ntap=ovr("pimp_to_ntap", 0.18), + nwell_layer=layers["nwell"], + nwell_enc_pact=ovr("nwell_enc_pact", gr("nwell", "active_tap", "min_enclosure", 0.18)), + nwell_enc_ntap=ovr("nwell_enc_ntap", gr("nwell", "active_tap", "min_enclosure", 0.18)), + nwell_to_nact=ovr("nwell_to_nact", 0.34), nwell_to_ptap=ovr("nwell_to_ptap", 0.24), + nwell_w_min=ovr("nwell_w_min", gr("nwell", key="min_width")), + tap_act_sep=ovr("tap_act_sep", gr("active_diff", "active_tap", "min_separation", 0.27)), + act_enc_cont_tap=max(gr("active_tap", "mcon", "min_enclosure", 0.0), ovr("act_enc_cont", gr("active_diff", "mcon", "min_enclosure"))), + m1_area_min=ovr("m1_area_min", 0.0), m2_area_min=ovr("m2_area_min", 0.0), m3_area_min=ovr("m3_area_min", 0.0), + poly_area_min=ovr("poly_area_min", 0.0), act_area_min=ovr("act_area_min", 0.0), act_sd_ext_min=ovr("act_sd_ext_min", 0.0), + layers=layers, overrides_used=used, + ) + return r diff --git a/src/glayout/sharing/spec.py b/src/glayout/sharing/spec.py new file mode 100644 index 00000000..91a73072 --- /dev/null +++ b/src/glayout/sharing/spec.py @@ -0,0 +1,152 @@ +"""Data model for connection-aware shared MOS construction. + +A *logical device* (DeviceSpec) is one SPICE transistor with its four nets and +its electrical size (total width, length, number of unit fingers). A +*SharingPlan* describes only the physical organisation of the unit fingers of a +group of logical devices: finger order, finger orientation, which adjacent +fingers share a diffusion node, and which gate fingers are tied together by a +poly strap. A plan never changes the netlist: it cannot remove a device, +change a width/length or a body connection. Illegal plans are rejected with a +structured EligibilityReport instead of silently producing an independent +layout. +""" +from __future__ import annotations +from dataclasses import dataclass, field, asdict +from typing import Literal +import hashlib, json + +Polarity = Literal["nfet", "pfet"] +Side = Literal["bottom", "top"] +End = Literal["left", "right"] + + +@dataclass(frozen=True) +class DeviceSpec: + logical_id: str + model_role: Polarity # 'nfet' or 'pfet' (resolved to a PDK model name by the PDK) + d: str + g: str + s: str + b: str + width_total: float # um, electrical total width (sum over fingers) + length: float # um + nf: int = 1 # number of unit fingers; unit width = width_total / nf + m: int = 1 # SPICE multiplier is not supported for shared groups (must be 1) + + @property + def unit_width(self) -> float: + return self.width_total / self.nf + + def nets(self) -> dict: + return {"D": self.d, "G": self.g, "S": self.s, "B": self.b} + + +@dataclass(frozen=True) +class FingerRef: + device: str + index: int # 0..nf-1 within the device + + +@dataclass(frozen=True) +class GateGroup: + fingers: tuple[int, ...] # positions in finger_order (0..n-1) + side: Side = "bottom" # strap side (poly strap below or above the active) + pad_end: End = "left" # which end of the group hosts the contact pad(s) + + +@dataclass +class SharingPlan: + finger_order: list[FingerRef] + orientations: list[Literal["SD", "DS"]] # per position: left terminal then right terminal + diffusion_joins: list[bool] # len n-1: True -> fingers i and i+1 share one diffusion node + gate_groups: list[GateGroup] # partition of positions into poly-strap groups + gate_contact_policy: Literal["single_end", "both_ends"] = "single_end" + access_sides: dict = field(default_factory=lambda: {"sd": "top", "gate": "strap_side"}) + dummy_policy: Literal["none"] = "none" + mode_label: str = "custom" # free text: independent / diffusion_only / gate_only / combined / custom + + # ---- canonical form ------------------------------------------------- + def canonical(self) -> dict: + return { + "finger_order": [[f.device, f.index] for f in self.finger_order], + "orientations": list(self.orientations), + "diffusion_joins": [bool(x) for x in self.diffusion_joins], + "gate_groups": sorted([[sorted(g.fingers), g.side, g.pad_end] for g in self.gate_groups]), + "gate_contact_policy": self.gate_contact_policy, + "access_sides": dict(sorted(self.access_sides.items())), + "dummy_policy": self.dummy_policy, + } + + def plan_id(self) -> str: + return hashlib.sha256(json.dumps(self.canonical(), sort_keys=True).encode()).hexdigest()[:16] + + def to_json(self) -> dict: + d = self.canonical(); d["mode_label"] = self.mode_label; d["plan_id"] = self.plan_id(); return d + + @staticmethod + def from_json(d: dict) -> "SharingPlan": + return SharingPlan( + finger_order=[FingerRef(a, int(b)) for a, b in d["finger_order"]], + orientations=list(d["orientations"]), + diffusion_joins=[bool(x) for x in d["diffusion_joins"]], + gate_groups=[GateGroup(tuple(int(i) for i in g[0]), g[1], g[2]) for g in d["gate_groups"]], + gate_contact_policy=d.get("gate_contact_policy", "single_end"), + access_sides=d.get("access_sides", {"sd": "top", "gate": "strap_side"}), + dummy_policy=d.get("dummy_policy", "none"), + mode_label=d.get("mode_label", "custom"), + ) + + # ---- derived structure --------------------------------------------- + def n(self) -> int: + return len(self.finger_order) + + def islands(self) -> list[tuple[int, int]]: + """Return [(first_pos, last_pos)] of maximal runs of joined fingers.""" + out = []; start = 0 + for i in range(self.n() - 1): + if not self.diffusion_joins[i]: + out.append((start, i)); start = i + 1 + out.append((start, self.n() - 1)) + return out + + def summary(self) -> dict: + n_cross = 0; n_cross_gate = 0 + for i, j in enumerate(self.diffusion_joins): + if j and self.finger_order[i].device != self.finger_order[i + 1].device: n_cross += 1 + for g in self.gate_groups: + if len({self.finger_order[p].device for p in g.fingers}) > 1: n_cross_gate += 1 + return {"fingers": self.n(), "islands": len(self.islands()), "cross_device_diffusion_joins": n_cross, + "cross_device_gate_groups": n_cross_gate, "gate_groups": len(self.gate_groups)} + + +@dataclass +class EligibilityReport: + ok: bool + errors: list[dict] = field(default_factory=list) # {"code":..., "message":..., "where":...} + warnings: list[dict] = field(default_factory=list) + checks: dict = field(default_factory=dict) + + def add_error(self, code: str, message: str, where=None): + self.ok = False; self.errors.append({"code": code, "message": message, "where": where}) + + def to_json(self) -> dict: + return asdict(self) + + +class SharingPlanRejected(ValueError): + """Raised by build_mos_group when a plan is illegal. Carries the structured report.""" + def __init__(self, report: EligibilityReport): + self.report = report + super().__init__("; ".join(f"{e['code']}: {e['message']}" for e in report.errors)) + + +@dataclass +class GroupResult: + component: object # layout Component (gdsfactory / gdstk backend) + ports: dict # terminal key "dev:T" -> list of port names (met2 pins) + pin_nets: dict # port name -> net + device_map: dict # logical device -> fingers/nodes/islands in the geometry + applied_plan: dict # canonical plan + plan_id + eligibility_report: dict + physical_sharing_evidence: dict # derived from the produced geometry, not from the plan + geometry_stats: dict # bbox, widths, counts From 81c4043ffd89c1d069bd2ea45dcea5f42aa8a331 Mon Sep 17 00:00:00 2001 From: Minxing Chu Date: Mon, 12 Oct 2026 07:35:29 +0000 Subject: [PATCH 2/7] textbook_sharing: benchmark package, tests and scripts 18 textbook topologies on SKY130, GF180MCU and IHP SG13G2: size derivation and schematic qualification, row and channel assembly of the sharing groups, verification (official DRC decks, LVS, extracted-size check, R+C extraction, post-layout simulation against frozen specifications, blinded visual review), the plan-selection study with a plan-level cost rule, model sessions through a restricted plan interface, every analysis behind the results, and checks that rebuild recorded layouts. Runs in the pinned IIC-OSIC-TOOLS image with a locked Python environment. Co-Authored-By: Claude Opus 5.5 --- benchmarks/textbook_sharing/.gitignore | 3 + benchmarks/textbook_sharing/pytest.ini | 5 + .../textbook_sharing/requirements-lock.txt | 100 +++ .../textbook_sharing/scripts/env_lock.sh | 12 + .../scripts/reproduce_clean.sh | 38 ++ .../textbook_sharing/scripts/run_all.sh | 33 + .../scripts/run_in_container.sh | 19 + .../textbook_sharing/scripts/setup_env.sh | 15 + benchmarks/textbook_sharing/tests/conftest.py | 4 + .../textbook_sharing/tests/test_data.py | 26 + .../textbook_sharing/tests/test_docs.py | 89 +++ .../tests/test_enumeration.py | 20 + .../tests/test_layout_reproduces_records.py | 23 + .../tests/test_plan_parser.py | 33 + .../tests/test_sharing_plan.py | 35 + .../textbook_sharing/__init__.py | 3 + .../textbook_sharing/analysis/__init__.py | 0 .../textbook_sharing/analysis/all.py | 40 ++ .../analysis/arrangement_bandwidth.py | 36 + .../analysis/benchmark_table.py | 69 ++ .../analysis/cost_decomposition.py | 108 +++ .../analysis/cost_validation.py | 96 +++ .../textbook_sharing/analysis/example.py | 57 ++ .../analysis/geometry_check.py | 65 ++ .../textbook_sharing/analysis/interface.py | 55 ++ .../textbook_sharing/analysis/ledger.py | 115 ++++ .../textbook_sharing/analysis/models.py | 96 +++ .../analysis/pex_sensitivity.py | 32 + .../textbook_sharing/analysis/pvt.py | 84 +++ .../textbook_sharing/analysis/report.py | 243 +++++++ .../analysis/review_coverage.py | 76 +++ .../textbook_sharing/analysis/scope.py | 107 +++ .../textbook_sharing/analysis/selection.py | 104 +++ .../textbook_sharing/assembly/__init__.py | 14 + .../textbook_sharing/assembly/adapters.py | 20 + .../textbook_sharing/assembly/engine.py | 625 ++++++++++++++++++ .../textbook_sharing/assembly/passives.py | 195 ++++++ .../textbook_sharing/assembly/pincell.py | 32 + .../textbook_sharing/build_cases.py | 125 ++++ .../textbook_sharing/calibrate_res.py | 29 + .../textbook_sharing/cases.py | 42 ++ .../textbook_sharing/circuits.py | 138 ++++ .../textbook_sharing/freeze.py | 41 ++ .../textbook_sharing/textbook_sharing/grid.py | 77 +++ .../textbook_sharing/layout.py | 100 +++ .../textbook_sharing/llm/__init__.py | 0 .../textbook_sharing/llm/agent_sessions.py | 141 ++++ .../textbook_sharing/llm/evaluate.py | 104 +++ .../textbook_sharing/llm/interface_base.md | 45 ++ .../textbook_sharing/llm/interface_sharing.md | 71 ++ .../textbook_sharing/llm/make_examples.py | 67 ++ .../textbook_sharing/llm/plan_parser.py | 163 +++++ .../textbook_sharing/llm/run_codex.py | 117 ++++ .../textbook_sharing/llm/tasks.py | 82 +++ .../textbook_sharing/matching.py | 58 ++ .../textbook_sharing/netlist.py | 89 +++ .../textbook_sharing/nominal.py | 118 ++++ .../textbook_sharing/overrides.py | 50 ++ .../textbook_sharing/paths.py | 62 ++ .../textbook_sharing/textbook_sharing/pdk.py | 20 + .../textbook_sharing/presim.py | 26 + .../textbook_sharing/qualify.py | 89 +++ .../textbook_sharing/redesign_search.py | 57 ++ .../textbook_sharing/resim.py | 81 +++ .../textbook_sharing/review/__init__.py | 0 .../review/check_connectivity.py | 83 +++ .../review/check_gate_pads.py | 44 ++ .../textbook_sharing/review/composite.py | 114 ++++ .../textbook_sharing/review/render_gds.py | 98 +++ .../textbook_sharing/review/resolve_auto.py | 36 + .../textbook_sharing/review/reviewer_guide.md | 59 ++ .../textbook_sharing/review/visual_review.py | 173 +++++ .../textbook_sharing/run_case.py | 111 ++++ .../textbook_sharing/run_grid.py | 55 ++ .../textbook_sharing/selection/__init__.py | 0 .../textbook_sharing/selection/catalogue.py | 68 ++ .../textbook_sharing/selection/cost.py | 130 ++++ .../textbook_sharing/selection/fixed_order.py | 38 ++ .../selection/run_selection.py | 110 +++ .../textbook_sharing/selection/strategies.py | 157 +++++ .../textbook_sharing/selection/timing.py | 59 ++ .../textbook_sharing/testbench.py | 508 ++++++++++++++ .../textbook_sharing/verify/__init__.py | 0 .../textbook_sharing/verify/drc.py | 81 +++ .../textbook_sharing/verify/lvs.py | 149 +++++ .../textbook_sharing/verify/pex_sim.py | 100 +++ .../textbook_sharing/verify/physical.py | 69 ++ .../textbook_sharing/verify/pipeline.py | 82 +++ .../textbook_sharing/verify/record.py | 38 ++ .../textbook_sharing/verify/sizing.py | 95 +++ 90 files changed, 7176 insertions(+) create mode 100644 benchmarks/textbook_sharing/.gitignore create mode 100644 benchmarks/textbook_sharing/pytest.ini create mode 100644 benchmarks/textbook_sharing/requirements-lock.txt create mode 100755 benchmarks/textbook_sharing/scripts/env_lock.sh create mode 100755 benchmarks/textbook_sharing/scripts/reproduce_clean.sh create mode 100755 benchmarks/textbook_sharing/scripts/run_all.sh create mode 100755 benchmarks/textbook_sharing/scripts/run_in_container.sh create mode 100755 benchmarks/textbook_sharing/scripts/setup_env.sh create mode 100644 benchmarks/textbook_sharing/tests/conftest.py create mode 100644 benchmarks/textbook_sharing/tests/test_data.py create mode 100644 benchmarks/textbook_sharing/tests/test_docs.py create mode 100644 benchmarks/textbook_sharing/tests/test_enumeration.py create mode 100644 benchmarks/textbook_sharing/tests/test_layout_reproduces_records.py create mode 100644 benchmarks/textbook_sharing/tests/test_plan_parser.py create mode 100644 benchmarks/textbook_sharing/tests/test_sharing_plan.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/all.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/arrangement_bandwidth.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/benchmark_table.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/cost_decomposition.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/cost_validation.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/example.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/geometry_check.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/interface.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/ledger.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/models.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/pex_sensitivity.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/pvt.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/report.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/review_coverage.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/scope.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/analysis/selection.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/assembly/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/assembly/adapters.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/assembly/engine.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/assembly/passives.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/assembly/pincell.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/build_cases.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/calibrate_res.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/cases.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/circuits.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/freeze.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/grid.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/layout.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/agent_sessions.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/evaluate.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/interface_base.md create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/interface_sharing.md create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/make_examples.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/plan_parser.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/run_codex.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/llm/tasks.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/matching.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/netlist.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/nominal.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/overrides.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/paths.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/pdk.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/presim.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/qualify.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/redesign_search.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/resim.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/check_connectivity.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/check_gate_pads.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/composite.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/render_gds.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/resolve_auto.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/reviewer_guide.md create mode 100644 benchmarks/textbook_sharing/textbook_sharing/review/visual_review.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/run_case.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/run_grid.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/catalogue.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/cost.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/fixed_order.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/run_selection.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/strategies.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/selection/timing.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/testbench.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/__init__.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/drc.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/lvs.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/pex_sim.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/physical.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/pipeline.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/record.py create mode 100644 benchmarks/textbook_sharing/textbook_sharing/verify/sizing.py diff --git a/benchmarks/textbook_sharing/.gitignore b/benchmarks/textbook_sharing/.gitignore new file mode 100644 index 00000000..0e2102c7 --- /dev/null +++ b/benchmarks/textbook_sharing/.gitignore @@ -0,0 +1,3 @@ +# unpacked run records or new runs, and the local Python environment +runs/ +.env/ diff --git a/benchmarks/textbook_sharing/pytest.ini b/benchmarks/textbook_sharing/pytest.ini new file mode 100644 index 00000000..3a7b43c2 --- /dev/null +++ b/benchmarks/textbook_sharing/pytest.ini @@ -0,0 +1,5 @@ +[pytest] +testpaths = tests +# Pydantic deprecation warnings raised by the upstream gLayout primitives and by gdsfactory +filterwarnings = + ignore::DeprecationWarning diff --git a/benchmarks/textbook_sharing/requirements-lock.txt b/benchmarks/textbook_sharing/requirements-lock.txt new file mode 100644 index 00000000..fd21fc39 --- /dev/null +++ b/benchmarks/textbook_sharing/requirements-lock.txt @@ -0,0 +1,100 @@ +annotated-doc==0.0.5 +annotated-types==0.8.0 +asttokens==3.0.2 +attrs==26.1.0 +certifi==2026.7.22 +cffi==2.1.1 +charset-normalizer==3.5.2 +click==8.5.0 +cloudpickle==3.1.2 +cmd2==2.7.0 +colorama==0.4.6 +comm==0.2.3 +contourpy==1.3.2 +cycler==0.12.1 +defusedxml==0.7.1 +docopt==0.6.2 +executing==2.2.1 +flatdict==4.1.0 +fonttools==4.66.1 +gdsfactory==7.7.0 +gdstk==0.9.62 +idna==3.20 +iniconfig==2.3.1 +ipython==9.17.1 +ipython_pygments_lexers==1.1.1 +ipywidgets==8.1.9 +jedi==0.20.0 +Jinja2==3.1.6 +joblib==1.6.0 +jsonschema==4.26.0 +jsonschema-specifications==2025.9.1 +jupyterlab_widgets==3.0.17 +kiwisolver==1.5.1 +klayout==0.28.17.post1 +loguru==0.7.3 +lxml==6.1.3 +markdown-it-py==4.2.0 +MarkupSafe==3.0.4 +matplotlib==3.10.0 +matplotlib-inline==0.2.2 +mdurl==0.1.2 +networkx==3.6.1 +nltk==3.10.3 +numpy==1.24.0 +omegaconf==2.4.0 +orjson==3.13.0 +packaging==26.3 +pandas==2.3.0 +parso==0.8.7 +pexpect==4.9.0 +pillow==12.3.0 +pluggy==1.6.0 +ply==3.11 +prettyprint==0.1.5 +PrettyPrintTree==2.0.2 +prompt_toolkit==3.0.53 +psutil==7.2.2 +ptyprocess==0.7.0 +pure_eval==0.2.4 +pycparser==3.11 +pydantic==2.14.0 +pydantic-extra-types==2.11.1 +pydantic-settings==2.15.0 +pydantic_core==2.50.0 +Pygments==2.21.0 +pymupdf==1.28.2 +pyparsing==3.3.3 +pyperclip==1.11.0 +PySpice==1.5 +pytest==9.1.1 +python-dateutil==2.9.0.post0 +python-dotenv==1.2.4 +pytz==2026.5 +PyYAML==6.0.3 +qrcode==8.2 +rectpack==0.2.2 +referencing==0.37.0 +regex==2026.9.29 +requests==2.34.2 +rich==15.0.0 +rich-argparse==1.8.0 +rpds-py==2026.9.1 +scipy==1.15.3 +shapely==2.1.2 +shellingham==1.5.4 +six==1.17.0 +stack-data==0.6.3 +svgutils==0.3.4 +toolz==1.2.0 +tqdm==4.70.1 +traitlets==5.16.1 +typer==0.27.3 +types-PyYAML==6.0.12.20260906 +typing-inspection==0.4.4 +typing_extensions==4.16.0 +tzdata==2026.5 +urllib3==2.8.0 +watchdog==6.0.0 +wcwidth==0.9.2 +widgetsnbextension==4.0.16 diff --git a/benchmarks/textbook_sharing/scripts/env_lock.sh b/benchmarks/textbook_sharing/scripts/env_lock.sh new file mode 100755 index 00000000..30d5431b --- /dev/null +++ b/benchmarks/textbook_sharing/scripts/env_lock.sh @@ -0,0 +1,12 @@ +#!/bin/bash +# Record the environment of a run into /environment/: container image digest, EDA tool and PDK versions, +# Python packages and the repository commit. +set -e +HERE=$(cd "$(dirname "$0")/.." && pwd) +O=${TSB_RESULTS:-$HERE/results}/environment; mkdir -p "$O" +IMAGE=${TSB_IMAGE:-hpretl/iic-osic-tools@sha256:7ef29be71a33b5b8994cde7f7476dfefd1af94f2922354242d1579346feec462} +docker image inspect "$IMAGE" --format '{{.Id}} {{index .RepoDigests 0}}' > "$O/container_image.txt" +"$HERE/scripts/run_in_container.sh" "magic --version; netgen -batch quit 2>&1 | head -1; ngspice -v 2>&1 | grep ngspice | head -1; klayout -v; python --version; ls /foss/pdks" > "$O/tools_and_pdks.txt" 2>&1 +"$HERE/scripts/run_in_container.sh" "python -m pip freeze" > "$O/python_freeze.txt" 2>/dev/null +git -C "$HERE" rev-parse HEAD > "$O/git_head.txt" +echo "written $O"; ls -la "$O" diff --git a/benchmarks/textbook_sharing/scripts/reproduce_clean.sh b/benchmarks/textbook_sharing/scripts/reproduce_clean.sh new file mode 100755 index 00000000..78aa7e70 --- /dev/null +++ b/benchmarks/textbook_sharing/scripts/reproduce_clean.sh @@ -0,0 +1,38 @@ +#!/bin/bash +# Clean-process reproduction: export the committed tree (git archive HEAD) into a fresh folder, rebuild and verify a +# few cases there from scratch (geometry, DRC, LVS, extraction, post-layout simulation), then compare geometry hash, +# area, status, every verification stage and the post-layout measures with the recorded runs (default: +# /runs). Nothing from the recorded runs is copied into the fresh tree. +# usage: scripts/reproduce_clean.sh [CASE/PDK/SIZE/MODE ...] +set -e +HERE=$(cd "$(dirname "$0")/.." && pwd); REPO=$(cd "$HERE/../.." && pwd) +REF=${TSB_RUNS:-$HERE/runs}; OUT=${TSB_RESULTS:-$HERE/results}/analysis +STAMP=$(date -u +%Y%m%dT%H%M%SZ); C=${TSB_REPRO_DIR:-/tmp/tsb_repro_$STAMP} +CASES=${*:-"C08/sky130/sW1_sL1/combined C08/gf180/sW1_sL1/combined C08/ihp130/sW1_sL1/combined C11/ihp130/sW1_sL1/gate_only C02/gf180/sW1_sL1/combined"} +mkdir -p "$C/tree"; git -C "$REPO" archive HEAD | tar -x -C "$C/tree" +git -C "$REPO" rev-parse HEAD > "$C/SOURCE_COMMIT.txt" +TSB_RUNS="$C/runs" TSB_RESULTS="$C/results" TSB_ENV=${TSB_ENV:-$HERE/.env} \ + "$C/tree/benchmarks/textbook_sharing/scripts/run_in_container.sh" "python - <<'PY' +from textbook_sharing.run_case import run +from textbook_sharing import paths +for spec in '$CASES'.split(): + cid, pdk, size, mode = spec.split('/') + r = run(paths.CASES / cid / pdk / size, paths.GRID_RUNS / cid / pdk / size / mode, mode=mode, label='repro') + print(spec, r.get('primary_status'), r.get('area_um2'), flush=True) +PY" +mkdir -p "$OUT" +python3 - "$C" "$REF" "$OUT/repro_clean_$STAMP.json" $CASES <<'PY' +import json, sys +from pathlib import Path +fresh, ref, out, specs = Path(sys.argv[1]), Path(sys.argv[2]), sys.argv[3], sys.argv[4:] +runs = [] +for spec in specs: + a = json.load(open(fresh / "runs/grid" / spec / "result.json")); b = json.load(open(ref / "grid" / spec / "result.json")) + match = {k: a.get(k) == b.get(k) for k in ("geometry_hash", "area_um2", "primary_status", "verify")} + ma, mb = (a.get("postsim") or {}).get("measures") or {}, (b.get("postsim") or {}).get("measures") or {} + diffs = [abs(ma[k] - mb[k]) / max(abs(mb[k]), 1e-30) for k in mb if isinstance(mb[k], (int, float)) and isinstance(ma.get(k), (int, float))] + runs.append({"run": spec, "match": match, "max_rel_measure_diff": max(diffs) if diffs else None}) + print(spec, match, "largest relative difference of a post-layout measure:", runs[-1]["max_rel_measure_diff"]) +json.dump({"commit": (fresh / "SOURCE_COMMIT.txt").read_text().strip(), "runs": runs}, open(out, "w"), indent=1) +PY +echo "fresh tree in $C; summary in $OUT/repro_clean_$STAMP.json" diff --git a/benchmarks/textbook_sharing/scripts/run_all.sh b/benchmarks/textbook_sharing/scripts/run_all.sh new file mode 100755 index 00000000..9ae52120 --- /dev/null +++ b/benchmarks/textbook_sharing/scripts/run_all.sh @@ -0,0 +1,33 @@ +#!/bin/bash +# Run the whole benchmark in the order of the protocol: case definitions and rules first; the development sizes next, +# from which the fixed mode order is frozen and the cost rule is checked; then the held-out sizes, the selection study, +# the corner simulations and the analyses. Every stage is resumable (finished runs are skipped); frozen rules +# (data/frozen/) and freeze checkpoints (/freeze/) are never overwritten. The model sessions are not started +# here: they need a logged-in model CLI or an agent interface (docs/MODELS.md). The grid and the selection study take +# days of CPU time on a 16-core machine. +set -e +HERE=$(cd "$(dirname "$0")/.." && pwd); C="$HERE/scripts/run_in_container.sh"; J=${JOBS:-16} +RES=${TSB_RESULTS:-$HERE/results}; DEV=sW1_sL1,sW1_sL1.5 +stage() { echo "== $1"; } +freeze() { [ -f "$RES/freeze/$1.json" ] || $C "python -m textbook_sharing.freeze $1 '$2'"; } +stage "1 cases: derive sizes, qualify, freeze specifications" +$C "python -m textbook_sharing.build_cases --jobs $J" +freeze cases_and_rules "size grid, qualification rule and frozen specifications, before any layout" +stage "2 main grid, development sizes" +$C "python -m textbook_sharing.run_grid --sizes $DEV --jobs $J" +stage "3 fixed mode order and cost rule, from the development sizes only" +[ -f "$HERE/data/frozen/fixed_order.json" ] || $C "python -m textbook_sharing.selection.fixed_order --sizes $DEV" +$C "python -m textbook_sharing.analysis.cost_validation --sizes $DEV --out $RES/analysis/cost_validation_dev.json" +freeze cost_and_order "cost rule and fixed mode order, before the held-out sizes" +stage "4 main grid, all sizes" +$C "python -m textbook_sharing.run_grid --jobs $J" +stage "5 selection catalogues and their full evaluation" +$C "python -m textbook_sharing.selection.run_selection --stage all --jobs $J" +stage "6 controlled timing of the selection methods" +$C "python -m textbook_sharing.selection.timing --jobs 10 --out $RES/analysis/timing_controlled.json" +stage "7 corners (PVT)" +$C "python -m textbook_sharing.analysis.pvt --jobs $J --out $RES/analysis/pvt.json" +stage "8 analyses and the generated documents" +$C "python -m textbook_sharing.analysis.all --with-geometry" +stage "9 clean-process reproduction" +"$HERE/scripts/reproduce_clean.sh" diff --git a/benchmarks/textbook_sharing/scripts/run_in_container.sh b/benchmarks/textbook_sharing/scripts/run_in_container.sh new file mode 100755 index 00000000..83b8771e --- /dev/null +++ b/benchmarks/textbook_sharing/scripts/run_in_container.sh @@ -0,0 +1,19 @@ +#!/bin/bash +# Run a command inside the pinned IIC-OSIC-TOOLS image (EDA tools and PDKs), with this repository mounted at the same +# absolute path and the Python environment created by scripts/setup_env.sh. +# usage: scripts/run_in_container.sh "" (the command starts in benchmarks/textbook_sharing) +set -e +HERE=$(cd "$(dirname "$0")/.." && pwd) # benchmarks/textbook_sharing +REPO=$(cd "$HERE/../.." && pwd) # repository root (provides src/glayout) +ENV=${TSB_ENV:-$HERE/.env} +IMAGE=${TSB_IMAGE:-hpretl/iic-osic-tools@sha256:7ef29be71a33b5b8994cde7f7476dfefd1af94f2922354242d1579346feec462} +MOUNTS=(-v "$REPO:$REPO") +for d in "${TSB_RUNS:-}" "${TSB_RESULTS:-}" "${TSB_ENV:-}"; do + if [ -n "$d" ]; then mkdir -p "$d"; MOUNTS+=(-v "$d:$d"); fi +done +exec docker run --rm -u "$(id -u):$(id -g)" "${MOUNTS[@]}" -w "$HERE" \ + -e HOME="$ENV/home" -e PDK_ROOT=/foss/pdks \ + -e PATH="$ENV/py311/bin:/foss/tools/bin:/foss/tools/klayout:/usr/local/bin:/usr/bin:/bin" \ + -e PYTHONPATH="$REPO/src:$HERE" -e GLAYOUT_BACKEND=gdsfactory -e TSB_RUNS -e TSB_RESULTS \ + -e PYTHONDONTWRITEBYTECODE=1 -e MPLCONFIGDIR="$ENV/home/mpl" -e OMP_NUM_THREADS=1 -e OPENBLAS_NUM_THREADS=1 \ + -e TZ=UTC -e LC_ALL=C.UTF-8 -e LANG=C.UTF-8 --entrypoint /bin/bash "$IMAGE" -c "$*" diff --git a/benchmarks/textbook_sharing/scripts/setup_env.sh b/benchmarks/textbook_sharing/scripts/setup_env.sh new file mode 100755 index 00000000..8a26551c --- /dev/null +++ b/benchmarks/textbook_sharing/scripts/setup_env.sh @@ -0,0 +1,15 @@ +#!/bin/bash +# Create the pinned Python 3.11 environment used by every step (micromamba + pip, versions from requirements-lock.txt) +# under benchmarks/textbook_sharing/.env (or $TSB_ENV). Run once on a Linux x86-64 host with network access. +set -e +HERE=$(cd "$(dirname "$0")/.." && pwd) +ENV=${TSB_ENV:-$HERE/.env} +mkdir -p "$ENV/home" +if [ ! -x "$ENV/bin/micromamba" ]; then + curl -Ls https://micro.mamba.pm/api/micromamba/linux-64/2.9.0 | tar -xj -C "$ENV" bin/micromamba +fi +[ -x "$ENV/py311/bin/python" ] || "$ENV/bin/micromamba" create -y -p "$ENV/py311" -c conda-forge python=3.11.17 pip +"$ENV/py311/bin/python" -m pip install --no-deps -r "$HERE/requirements-lock.txt" +# ngspice: one thread per simulation (parallelism comes from running many simulations at once) +printf 'set num_threads=1\n' > "$ENV/home/.spiceinit" +echo "environment ready in $ENV" diff --git a/benchmarks/textbook_sharing/tests/conftest.py b/benchmarks/textbook_sharing/tests/conftest.py new file mode 100644 index 00000000..2b1f85c7 --- /dev/null +++ b/benchmarks/textbook_sharing/tests/conftest.py @@ -0,0 +1,4 @@ +import os +os.environ.setdefault("GLAYOUT_BACKEND", "gdsfactory") +from textbook_sharing import paths +paths.setup_imports() diff --git a/benchmarks/textbook_sharing/tests/test_data.py b/benchmarks/textbook_sharing/tests/test_data.py new file mode 100644 index 00000000..1ef7e618 --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_data.py @@ -0,0 +1,26 @@ +"""Consistency of the shipped case data and of the run records (when extracted into ).""" +import json, hashlib, collections +import pytest +from textbook_sharing import paths + + +def test_case_manifests(): + dirs = sorted(paths.CASES.glob("*/*/*/manifest.json")) + assert len(dirs) == 639 # 648 requests minus 9 parameter-illegal ones + for m in dirs: + man = json.load(open(m)) + for name, sha in man.items(): + assert hashlib.sha256((m.parent / name).read_bytes()).hexdigest() == sha, (m.parent, name) + + +def test_case_build_counts(): + recs = json.load(open(paths.RESULTS / "case_build.json")) + c = collections.Counter(r["stage"] for r in recs) + assert len(recs) == 648 and c["parameter_illegal"] == 9 and c["schematic_not_qualified"] == 88 and c["qualified"] == 551 + + +@pytest.mark.skipif(not (paths.GRID_RUNS).exists(), reason="run records not extracted (tar -xJf results/run_records.tar.xz)") +def test_ledger_matches_records(): + L = json.load(open(paths.RESULTS / "count_ledger.json"))["cases"] + assert (L["requested"], L["formal_entries"], L["mode_rows"]["total"]) == (648, 547, 2204) + assert L["mode_rows"]["by_status"] == {"auto_passed": 1608, "NA": 592, "spec_failed": 4} diff --git a/benchmarks/textbook_sharing/tests/test_docs.py b/benchmarks/textbook_sharing/tests/test_docs.py new file mode 100644 index 00000000..720082b7 --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_docs.py @@ -0,0 +1,89 @@ +"""The documents agree with the result tables: the generated documents are up to date, and every number quoted in the +hand-written documents is the number in results/.""" +import json, tarfile +from textbook_sharing import paths +from textbook_sharing.analysis import report + + +def J(name): + return json.load(open(paths.RESULTS / name)) + + +def doc(name): + return " ".join((paths.ROOT / name).read_text().split()) # whitespace-normalised, so line breaks do not matter + + +def pct(x, nd=1): + return f"{100 * x:.{nd}f}" + + +def present(name, expected): + text = doc(name) + missing = [e for e in expected if " ".join(e.split()) not in text] + assert not missing, f"{name}: {missing}" + + +def test_generated_documents_are_current(): + assert (paths.ROOT / "docs/PARAMETER_SPACE.md").read_text() == report.parameter_space() + assert (paths.ROOT / "docs/RESULTS.md").read_text() == report.results() + + +def test_readme(): + ex = J("analysis/running_example.json"); st = ex["steps"] + L = J("count_ledger.json")["cases"]; bt = J("analysis/benchmark_table.json") + cd = J("analysis/cost_decomposition.json"); c = cd["by_mode"]["combined"]; im = cd["increase_mechanisms"] + ho = J("analysis/cost_validation_heldout.json")["summary"]; sel = J("analysis/selection_summary.json")["summary"]["by_method"] + sa = J("analysis/scope_audit.json"); b = sa["interface_comparison"]["base-gLayout interface"] + sharing = sum(1 for r in bt["rows"] if r["outcomes"].get("formal") and r["modes_applicable_in_formal"]) + assert {round(s["gain_db"], 1) for s in st} == {round(st[-1]["gain_db"], 1)} and {round(s["ugf_hz"] / 1e6, 1) for s in st} == {round(st[-1]["ugf_hz"] / 1e6, 1)} + present("README.md", [ + f"unshared layout is {st[0]['area_um2']:.1f} um^2", + f"{st[-1]['area_um2']:.1f} um^2, {pct(-st[-1]['change_vs_unshared'])} % smaller", + f"the gain ({st[-1]['gain_db']:.1f} dB) and unity-gain frequency ({st[-1]['ugf_hz'] / 1e6:.1f} MHz)", + f"gives {ex['named_mode_combined']['area_um2']:.1f} um^2", + f"{L['requested']} requests (18 topologies x 3 PDKs x 12 sizes) give {L['formal_entries']} formal entries in " + f"{bt['totals']['topologies_with_formal_entries']} topologies; {sharing} topologies admit sharing", + f"makes {c['classes']['positive']} of {c['n']} verified layouts smaller (mean {pct(c['mean_rel'])} %, up to {pct(c['min_rel'])} %)", + f"Of the {im['n']} area increases over all modes, {im['assembly_only']} come from routing and row assembly", + f"and {im['by_primary']['wider_row']} from a shared cell", + f"for {pct(ho['sign_correct'] / ho['n_pairs'], 0)} % of the pairs", + f"within {pct(sel['cost_rank']['1']['gap_balanced_when_found'])} % of the best of a 64-plan catalogue", + f"in {sa['best_known_source']['model proposal']} of {sa['task_sets']['model_tasks']} tasks", + f"{b['sessions_equal_to_reference']} of {b['sessions']} sessions end at the unshared area", + f"{len(list(paths.CASES.glob('*/*/*/case.json')))} case folders"]) + + +def test_models_doc(): + sa = J("analysis/scope_audit.json"); b = sa["interface_comparison"]["base-gLayout interface"]; s = sa["interface_comparison"]["sharing interface"] + li = J("analysis/llm_interface.json"); au = J("analysis/agent_session_audit.json")["summary"] + oai = [x for x in J("analysis/llm_summary.json")["sessions"] if x["tag"].startswith("openai")] + present("docs/MODELS.md", [ + f"In {sa['best_known_source']['model proposal']} of the {sa['task_sets']['model_tasks']} tasks a model found", + f"{b['sessions_equal_to_reference']} of {b['sessions']} sessions end at the area of the unshared layout", + f"the same model saves {pct(-s['vs_reference'])} % on average", + f"is on average {pct(li['summary']['capability']['mean_gap_of_best_base_expressible_candidate'])} % above", + f"All {len(oai) + li['summary']['base']['sessions']} OpenAI sessions ({len(oai)} main, {li['summary']['base']['sessions']} interface comparison)", + f"Of the {au['sessions']} sessions, {au['clean']} made only allowed calls; {au['in_folder_edit_sessions']} also edited", + f"{au['auto_flagged']} were flagged automatically", + f"The first {au['launch_text_counts']['A']} sessions received launch text A, the last {au['launch_text_counts']['B']} text B"]) + assert all(x["isolation_breach"] is False for x in oai) + assert au["after_manual_review"]["foreign_information_access"] == 0 + + +def test_verification_doc(): + rs = J("analysis/resim_after_testbench_fix.json")["counts"] + worse = sum(n for k, n in rs.items() if k.startswith("auto_passed->") and not k.endswith("auto_passed")) + pex = J("analysis/pex_sensitivity_C10_gf180.json")[0]["rc_measures"] + assert worse == 0 + present("docs/VERIFICATION.md", [f"no passing layout failed, {rs.get('spec_failed->auto_passed', 0)} failing layouts passed", + f"settled {abs(pex['vo1'] - pex['vo2']):.2f} V apart"]) + + +def test_data_doc(): + cases = list(paths.CASES.glob("*/*/*/case.json")); nominal = list((paths.DATA / "nominal").glob("*/*.json")) + build = J("case_build.json") + with tarfile.open(paths.RESULTS / "run_records.tar.xz") as t: + files = sum(1 for m in t.getmembers() if m.isfile()) + present("docs/DATA.md", [f"JSON and model text ({files:,} files)".replace(",", " "), f"passed the size derivation ({len(cases)})", f"every topology and PDK ({len(nominal)})", + f"one record per request ({len(build)})", + f"including the {sum(r['stage'] == 'parameter_illegal' for r in build)} parameter-illegal ones"]) diff --git a/benchmarks/textbook_sharing/tests/test_enumeration.py b/benchmarks/textbook_sharing/tests/test_enumeration.py new file mode 100644 index 00000000..152da30d --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_enumeration.py @@ -0,0 +1,20 @@ +"""Six-axis enumeration of the five-transistor OTA at its nominal size (SKY130): 256 raw tuples per group, 10 distinct +legal plans for the NMOS group and 101 for the PMOS group, i.e. 1010 plans for the circuit.""" +from glayout.sharing import group_candidates, named_plans, RAW_PER_GROUP +from textbook_sharing import paths +from textbook_sharing.run_case import load_case_dir +from textbook_sharing.circuits import CIRCUITS +from textbook_sharing.layout import device_specs, sharing_groups +from textbook_sharing.pdk import pdk_obj + + +def test_ota_plan_space(): + case, _ = load_case_dir(paths.CASES / "C08" / "sky130" / "sW1_sL1") + groups = sharing_groups(device_specs(CIRCUITS["C08"], case.sizing)) + assert [[d.logical_id for d in g] for g in groups] == [["M1", "M2", "M3"], ["M4", "M5"]] + pdk = pdk_obj("sky130") + counts = [group_candidates(pdk, g)["counts"] for g in groups] + assert all(c["raw"] == RAW_PER_GROUP == 256 for c in counts) + assert [c["unique"] for c in counts] == [10, 101] + named = named_plans(pdk, groups[0]) + assert named["gate_only"] is None and named["combined"] is None # M1, M2, M3 have three different gate nets diff --git a/benchmarks/textbook_sharing/tests/test_layout_reproduces_records.py b/benchmarks/textbook_sharing/tests/test_layout_reproduces_records.py new file mode 100644 index 00000000..ce9c6c85 --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_layout_reproduces_records.py @@ -0,0 +1,23 @@ +"""Rebuilding two recorded OTA layouts (SKY130, nominal size) reproduces their recorded bounding-box areas exactly: +the unshared plan (256.0048 um^2) and the best verified plan of its catalogue (196.0921 um^2).""" +from textbook_sharing import paths +from textbook_sharing.run_case import load_case_dir +from textbook_sharing.circuits import CIRCUITS +from textbook_sharing.layout import build, device_specs, sharing_groups +from textbook_sharing.llm.plan_parser import parse_program, to_sharing_plan +from textbook_sharing.pdk import pdk_obj +from test_plan_parser import PROGRAM + + +def test_unshared_and_best_plan_areas(): + case, _ = load_case_dir(paths.CASES / "C08" / "sky130" / "sW1_sL1"); circ = CIRCUITS["C08"]; pdk = pdk_obj("sky130") + ref = build(pdk, circ, case.sizing, mode="independent", name="test_ota_unshared") + assert round(ref["assembly_stats"]["area_um2"], 4) == 256.0048 + groups = sharing_groups(device_specs(circ, case.sizing)); calls = parse_program(PROGRAM) + plans = {str(i): to_sharing_plan(calls[i], g, pdk).to_json() for i, g in enumerate(groups)} + best = build(pdk, circ, case.sizing, name="test_ota_best", plans=plans) + assert round(best["assembly_stats"]["area_um2"], 4) == 196.0921 + chans = {} + for tr in ref["trunks"]: chans.setdefault(tr["channel"], set()).add(tr["net"]) + assert chans.get(2) == {"net22"} # unshared: a top channel only for net22 + assert 2 not in {tr["channel"] for tr in best["trunks"]} # best plan: no top channel diff --git a/benchmarks/textbook_sharing/tests/test_plan_parser.py b/benchmarks/textbook_sharing/tests/test_plan_parser.py new file mode 100644 index 00000000..c97246a3 --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_plan_parser.py @@ -0,0 +1,33 @@ +"""The restricted program format: accepted constructs expand into SharingPlans, anything else is rejected.""" +import pytest +from textbook_sharing.llm.plan_parser import parse_program, to_sharing_plan, ParseError +from textbook_sharing import paths +from textbook_sharing.run_case import load_case_dir +from textbook_sharing.circuits import CIRCUITS +from textbook_sharing.layout import device_specs, sharing_groups +from textbook_sharing.pdk import pdk_obj + +PROGRAM = '''plans = { + 0: axis_plan(arrangement="block", orientation="seek_SD", diffusion="all_legal", gate="per_device", + strap_start="bottom", contact_end="left"), + 1: SharingPlan(finger_order=[("M4",0),("M4",1),("M4",2),("M4",3),("M5",0),("M5",1),("M5",2),("M5",3)], + orientations=["SD","DS"]*4, diffusion_joins=[True]*7, + gate_groups=[GateGroup(fingers=tuple(range(8)), side="top", pad_end="right")])}''' + + +def groups(): + case, _ = load_case_dir(paths.CASES / "C08" / "sky130" / "sW1_sL1") + return sharing_groups(device_specs(CIRCUITS["C08"], case.sizing)) + + +def test_program_expands_to_plans(): + g = groups(); pdk = pdk_obj("sky130"); calls = parse_program(PROGRAM) + p0 = to_sharing_plan(calls[0], g[0], pdk); p1 = to_sharing_plan(calls[1], g[1], pdk) + assert all(p0.diffusion_joins) and p0.orientations[16] == "DS" # M3 turned so that net23 meets net23 + assert p1.summary()["cross_device_gate_groups"] == 1 and p1.summary()["islands"] == 1 + + +@pytest.mark.parametrize("code", ["import os\nplans = {}", "plans = {0: __import__('os')}", "x = 1"]) +def test_anything_else_is_rejected(code): + with pytest.raises(ParseError): + parse_program(code) diff --git a/benchmarks/textbook_sharing/tests/test_sharing_plan.py b/benchmarks/textbook_sharing/tests/test_sharing_plan.py new file mode 100644 index 00000000..3741a88c --- /dev/null +++ b/benchmarks/textbook_sharing/tests/test_sharing_plan.py @@ -0,0 +1,35 @@ +"""SharingPlan legality, construction and the sharing evidence recomputed from the drawn geometry (the PMOS mirror +M4/M5 of the five-transistor OTA, SKY130, nominal size).""" +from glayout.sharing import DeviceSpec, SharingPlan, FingerRef, GateGroup, validate_plan, build_mos_group, rules_for, independent_plan +from textbook_sharing.pdk import pdk_obj + +M4 = DeviceSpec("M4", "pfet", d="net22", g="net22", s="VDD", b="VDD", width_total=2.0, length=0.3, nf=4) +M5 = DeviceSpec("M5", "pfet", d="VOUT1", g="net22", s="VDD", b="VDD", width_total=2.0, length=0.3, nf=4) + + +def shared_plan(): + return SharingPlan(finger_order=[FingerRef("M4", k) for k in range(4)] + [FingerRef("M5", k) for k in range(4)], + orientations=["SD", "DS"] * 4, diffusion_joins=[True] * 7, + gate_groups=[GateGroup(tuple(range(8)), "top", "right")]) + + +def test_independent_plan_is_legal(): + pdk = pdk_obj("sky130") + assert validate_plan(rules_for(pdk), [M4, M5], independent_plan([M4, M5])).ok + + +def test_join_across_different_nets_is_rejected(): + pdk = pdk_obj("sky130"); plan = shared_plan() + plan.orientations[4] = "DS" # M5's first finger now shows its drain (VOUT1) to M4's source (VDD) + rep = validate_plan(rules_for(pdk), [M4, M5], plan) + assert not rep.ok and rep.errors[0]["code"] == "join_net_mismatch" + + +def test_shared_plan_builds_and_evidence_is_recomputed(): + pdk = pdk_obj("sky130") + res = build_mos_group(pdk, [M4, M5], plan=shared_plan(), name="test_pmos_mirror") + ev = res.physical_sharing_evidence + assert ev["active_islands"] == 1 # VDD shared at the M4|M5 boundary + assert ev["n_cross_device_shared_nodes"] == 1 + assert ev["n_cross_device_gate_conductors"] == 1 # one net22 strap for both gates + assert ev["consistency"]["cross_device_nodes_found"] == ev["consistency"]["cross_device_joins_requested"] diff --git a/benchmarks/textbook_sharing/textbook_sharing/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/__init__.py new file mode 100644 index 00000000..ec16fb44 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/__init__.py @@ -0,0 +1,3 @@ +"""Textbook layout-sharing benchmark for gLayout: 18 textbook analog topologies on SKY130, GF180MCU and IHP SG13G2, +the size grid and frozen specifications, the row assembler, the verification flow, plan selection, the language-model +protocol, visual review and the analyses behind every reported number. See ../README.md.""" diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/all.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/all.py new file mode 100644 index 00000000..2ccff058 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/all.py @@ -0,0 +1,40 @@ +"""Recompute every analysis table from the run records, in dependency order, into / and /analysis/. + +By default only the analyses that read run records are run. --with-geometry also re-runs the cost-rule validation +(it rebuilds the unshared assembly of every case, a few minutes); the corner simulations (analysis.pvt) and the +controlled timing (selection.timing) are separate commands because they run simulations or time geometry builds. +usage: python -m textbook_sharing.analysis.all [--with-geometry]""" +import argparse, subprocess, sys +from textbook_sharing import paths + +DEV = "sW1_sL1,sW1_sL1.5" +HELD_OUT = "sW0.5_sL1,sW0.5_sL1.5,sW0.5_sL2,sW1_sL2,sW1.5_sL1,sW1.5_sL1.5,sW1.5_sL2,sW2_sL1,sW2_sL1.5,sW2_sL2" + + +def run(mod, *args): + print("==", mod, *args, flush=True) + subprocess.run([sys.executable, "-m", f"textbook_sharing.{mod}", *args], check=True) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--with-geometry", action="store_true"); a = ap.parse_args() + A = paths.ANALYSIS; A.mkdir(parents=True, exist_ok=True) + run("analysis.ledger") + run("analysis.benchmark_table", "--out", str(A / "benchmark_table.json")) + run("analysis.cost_decomposition", "--out", str(A / "cost_decomposition.json")) + if a.with_geometry: + run("analysis.cost_validation", "--sizes", DEV, "--out", str(A / "cost_validation_dev.json")) + run("analysis.cost_validation", "--sizes", DEV, "--channel-rule", "none", "--out", str(A / "cost_validation_dev_no_channel.json")) + run("analysis.cost_validation", "--sizes", HELD_OUT, "--out", str(A / "cost_validation_heldout.json")) + run("analysis.selection", "--out", str(A / "selection_summary.json")) + run("analysis.models", "--out", str(A / "llm_summary.json"), "--tags", "openai_gpt-6.1-sol,anthropic_claude-sonnet") + run("analysis.interface", "--out", str(A / "llm_interface.json")) + run("analysis.scope", "--out", str(A / "scope_audit.json")) + run("analysis.arrangement_bandwidth", "--topology", "C16", "--out", str(A / "arrangement_bandwidth_C16.json")) + run("analysis.review_coverage", "--out", str(A / "review_coverage.json")) + run("analysis.example", "--out", str(A / "running_example.json")) + run("analysis.report") + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/arrangement_bandwidth.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/arrangement_bandwidth.py new file mode 100644 index 00000000..7bb7d677 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/arrangement_bandwidth.py @@ -0,0 +1,36 @@ +"""Electrical cost of finger arrangement in the selection catalogue: per task and per group axis value, status counts +and mean post-layout f3db / gain (all evaluated candidates). Written for the C16 bandwidth failures (resistor-loaded +pair: f3db ~ 1/(2 pi R_L C_out), interleaving lengthens the output nets). +usage: python -m textbook_sharing.analysis.arrangement_bandwidth --topology C16 --out /analysis/arrangement_bandwidth_C16.json""" +import json, glob, argparse, collections, statistics +from pathlib import Path +from textbook_sharing import paths + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--topology", default="C16"); ap.add_argument("--out", required=True); a = ap.parse_args() + out = {} + for td in sorted(glob.glob(str(paths.SELECTION_RUNS / f"{a.topology}_*"))): + cat = json.load(open(Path(td) / "catalogue.json")); agg = collections.defaultdict(lambda: {"status": collections.Counter(), "f3db": [], "gain_lf": [], "area": []}) + for cid, e in cat["entries"].items(): + rp = Path(td) / cid / "result.json" + if not rp.exists(): continue + r = json.load(open(rp)); m = (r.get("postsim") or {}).get("measures") or {} + for gi, pid in enumerate(e["plan_ids"]): + tup = next((t for p, t in cat["tables"][gi]["unique"] if p == pid), None) + for ax in ("arrangement", "orientation", "diffusion", "gate", "strap_start"): + k = f"group{gi}.{ax}={tup[ax] if tup else 'independent'}" + agg[k]["status"][r["primary_status"]] += 1 + if m.get("f3db"): agg[k]["f3db"].append(m["f3db"]) + if m.get("gain_lf") is not None: agg[k]["gain_lf"].append(m["gain_lf"]) + if r.get("area_um2"): agg[k]["area"].append(r["area_um2"]) + out[Path(td).name] = {k: {"status": dict(v["status"]), "mean_f3db_MHz": statistics.mean(v["f3db"]) / 1e6 if v["f3db"] else None, + "mean_gain_dB": statistics.mean(v["gain_lf"]) if v["gain_lf"] else None, "mean_area_um2": statistics.mean(v["area"]) if v["area"] else None} + for k, v in sorted(agg.items())} + json.dump(out, open(a.out, "w"), indent=1) + for t, d in out.items(): + print(t); [print(" ", k, v["status"], None if v["mean_f3db_MHz"] is None else round(v["mean_f3db_MHz"], 1)) for k, v in d.items() if ".arrangement=" in k] + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/benchmark_table.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/benchmark_table.py new file mode 100644 index 00000000..6fc81b6d --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/benchmark_table.py @@ -0,0 +1,69 @@ +"""Per-topology benchmark table: devices, sharing groups, plan space at the nominal size, request outcomes over the +36 size/PDK points, applicable sharing modes among the formal entries, and membership in the selection and model +studies. No layout is generated: plan counts come from the static enumeration (legality + de-duplication only). +usage: python -m textbook_sharing.analysis.benchmark_table --out /analysis/benchmark_table.json""" +import json, glob, argparse, collections, math +from pathlib import Path +from textbook_sharing import paths +MODES = ("independent", "diffusion_only", "gate_only", "combined") + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.testbench import CATEGORY + from textbook_sharing.run_case import load_case_dir, pdk_obj + from textbook_sharing.layout import device_specs, sharing_groups + from glayout.sharing import group_candidates + L = json.load(open(paths.LEDGER)); formal = set(L["formal_entries"]) + diag = {d["case_id"]: d["reason"] for d in L["diagnostic"]} + illegal = set() + for f in glob.glob(str(paths.CASES / "*/*/*/case.json")): + c = json.load(open(f)) + if c.get("status") == "parameter_illegal" or c.get("parameter_illegal"): illegal.add(c.get("case_id")) + sel = {Path(d).parent.name for d in glob.glob(str(paths.SELECTION_RUNS / "*/catalogue.json"))} + llm = {Path(d).name for d in glob.glob(str(paths.MODEL_RUNS / "openai_gpt-6.1-sol" / "*")) if Path(d).is_dir()} + pdk = pdk_obj("sky130"); rows = [] + for cid in sorted(CIRCUITS): + c = CIRCUITS[cid]; kinds = collections.Counter(d.kind for d in c.devices) + case, _ = load_case_dir(str(paths.CASES / cid / "sky130" / "sW1_sL1")) + groups = sharing_groups(device_specs(c, case.sizing)); per = [] + for g in groups: + cnt = group_candidates(pdk, g)["counts"] + per.append({"devices": [d.logical_id for d in g], "fingers": sum(d.nf for d in g), "unique_plans": cnt["unique"], "raw": cnt.get("raw", 256), + "static_illegal": cnt.get("static_illegal"), "equivalent_duplicate": cnt.get("equivalent_duplicate")}) + ids = [f"{cid}_{p}_{s}" for p in ("sky130", "gf180", "ihp130") for s in + [f"sW{sw:g}_sL{sl:g}" for sw in (0.5, 1, 1.5, 2) for sl in (1, 1.5, 2)]] + outcome = collections.Counter() + for i in ids: + if i in formal: outcome["formal"] += 1 + else: outcome[diag.get(i, "parameter_illegal")] += 1 + appl = collections.Counter() + for i in ids: + if i not in formal: continue + _, pk, sz = i.split("_", 2) + for m in MODES[1:]: + f = paths.GRID_RUNS / cid / pk / sz / m / "result.json" + if f.exists() and json.load(open(f)).get("primary_status") not in (None, "NA"): appl[m] += 1 + rows.append({"topology": cid, "name": c.name if hasattr(c, "name") else getattr(c, "family", ""), "category": CATEGORY[cid], + "mos": kinds.get("nfet", 0) + kinds.get("pfet", 0), "res": kinds.get("res", 0), "cap": kinds.get("cap", 0), + "groups_nominal_sky130": per, "plan_space_nominal_sky130": math.prod(g["unique_plans"] for g in per), + "requests": len(ids), "outcomes": dict(outcome), + "formal_by_pdk": {p: sum(1 for i in ids if i in formal and f"_{p}_" in i) for p in ("sky130", "gf180", "ihp130")}, + "modes_applicable_in_formal": dict(appl), "selection_tasks": sum(1 for t in sel if t.startswith(cid + "_")), + "model_tasks": sum(1 for t in llm if t.startswith(cid + "_"))}) + tot = collections.Counter() + for r in rows: + for k, v in r["outcomes"].items(): tot[k] += v + out = {"rows": rows, "totals": {"requests": sum(r["requests"] for r in rows), "outcomes": dict(tot), + "topologies_with_formal_entries": sum(1 for r in rows if r["outcomes"].get("formal")), + "selection_tasks": sum(r["selection_tasks"] for r in rows), "model_tasks": sum(r["model_tasks"] for r in rows)}} + json.dump(out, open(a.out, "w"), indent=1) + for r in rows: + print(r["topology"], r["category"], r["mos"], r["res"], r["cap"], [g["unique_plans"] for g in r["groups_nominal_sky130"]], r["plan_space_nominal_sky130"], + r["outcomes"], r["formal_by_pdk"], r["modes_applicable_in_formal"], r["selection_tasks"], r["model_tasks"]) + print(out["totals"]) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_decomposition.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_decomposition.py new file mode 100644 index 00000000..24f05840 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_decomposition.py @@ -0,0 +1,108 @@ +"""Physical cost of sharing on the main grid (measured geometry; every pair = one case, one sharing mode vs. the +independent reference of the same case, both built by the same assembler). + A0 = W0*H0 (reference), A1 = W1*H1; dW = W0 - W1 (width saved), dH = H1 - H0 (height added) + A1 = (W0 - dW)(H0 + dH) -> sharing reduces area iff H0*dW > (W0 - dW)*dH +dW is split into: group width change of the row that sets the DUT width (shared diffusion / fewer island gaps / pad +overhang) and the rest (row-dominance changes, x shifts). dH is split into MOS row height change (strap bands, pad +levels) and routing-channel height change (tracks). passive_dominated: the widest row is a passive row in both layouts +(so MOS width savings cannot reduce the DUT width). +Area terms (exact: they add up to A1 - A0), with S = the largest row span (cells + tap strips): + wider_row = (S1 - S0) * H1 the row that sets the width got wider (its cells are wider) + stub_separation = ((W1 - W0) - (S1 - S0)) * H1 + width added outside the rows: a row shifted sideways, or a net split into + two trunks joined beyond the row ends, to keep the metal-2 stubs of two + rows apart in a channel + taller_mos_rows = W0 * dH_mos_rows, routing_tracks = W0 * dH_channels, other_height = W0 * dH_other +For every area increase the positive terms are listed and the largest one is its primary mechanism. +Classes: positive (A1 < A0 by > 0.5 %), negative (A1 > A0 by > 0.5 %), neutral. Only pairs where both layouts pass +every automatic stage are used for area statements; all pairs are listed. +usage: python -m textbook_sharing.analysis.cost_decomposition --out /analysis/cost_decomposition.json""" +import json, glob, argparse, collections, statistics +from pathlib import Path +from textbook_sharing import paths +DEAD = 0.005 +MODES = ("diffusion_only", "gate_only", "combined") + + +def span(row): + return row["width"] + 2 * row["tap_extent"] + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + rows = [] + for ind in sorted(glob.glob(str(paths.GRID_RUNS / "*/*/*/independent/result.json"))): + b = json.load(open(ind)); cid, pdk, size = Path(ind).parts[-5:-2] + if not b.get("assembly_stats"): continue + sb = b["assembly_stats"] + for m in MODES: + f = Path(ind).parent.parent / m / "result.json" + if not f.exists(): continue + r = json.load(open(f)) + if r.get("primary_status") == "NA" or not r.get("assembly_stats"): continue + s1 = r["assembly_stats"] + W0, H0, W1, H1 = sb["width"], sb["height"], s1["width"], s1["height"] + A0, A1 = W0 * H0, W1 * H1; dW, dH = W0 - W1, H1 - H0 + rd0, rd1 = sb["row_dims"], s1["row_dims"] + w0i = max(range(len(rd0)), key=lambda i: span(rd0[i])); w1i = max(range(len(rd1)), key=lambda i: span(rd1[i])) + mos_dh = sum(x["height"] - y["height"] for x, y in zip(rd1, rd0) if x["kind"] in ("n", "p")) + ch_dh = sum(s1["channel_heights"]) - sum(sb["channel_heights"]) + mos_spans0 = {x["kind"]: span(x) for x in rd0 if x["kind"] in ("n", "p")}; mos_spans1 = {x["kind"]: span(x) for x in rd1 if x["kind"] in ("n", "p")} + row_dw = {k: round(mos_spans0[k] - mos_spans1.get(k, mos_spans0[k]), 4) for k in mos_spans0} + rel = A1 / A0 - 1 + cls = "positive" if rel < -DEAD else "negative" if rel > DEAD else "neutral" + dS = round(max(map(span, rd1)) - max(map(span, rd0)), 4); r4 = lambda v: round(v, 4) # lengths on the 0.1 nm scale + terms = {"wider_row": dS * H1, "stub_separation": r4(W1 - W0 - dS) * H1, "taller_mos_rows": W0 * r4(mos_dh), + "routing_tracks": W0 * r4(ch_dh), "other_height": W0 * r4(dH - mos_dh - ch_dh)} + rows.append({"case": f"{cid}_{pdk}_{size}", "topology": cid, "pdk": pdk, "size": size, "mode": m, + "both_auto_passed": b.get("primary_status") == "auto_passed" and r.get("primary_status") == "auto_passed", + "status_ref": b.get("primary_status"), "status_mode": r.get("primary_status"), + "A0": round(A0, 3), "A1": round(A1, 3), "rel": round(rel, 5), "class": cls, "W0": W0, "H0": H0, "W1": W1, "H1": H1, + "dW": round(dW, 4), "dH": round(dH, 4), "condition_lhs_H0dW": round(H0 * dW, 4), "condition_rhs_W1dH": round((W0 - dW) * dH, 4), + "dH_mos_rows": round(mos_dh, 4), "dH_channels": round(ch_dh, 4), "dH_other": round(dH - mos_dh - ch_dh, 4), + "row_span_saving": row_dw, "max_mos_row_span_saving": max(row_dw.values()) if row_dw else 0.0, + "widest_row_ref": rd0[w0i]["kind"], "widest_row_mode": rd1[w1i]["kind"], + "passive_dominated": rd0[w0i]["kind"] == "passive" and rd1[w1i]["kind"] == "passive", + "area_terms": {k: round(v, 3) for k, v in terms.items()}, + "channel_strategy_ref": sb.get("channel_strategy"), "channel_strategy_mode": s1.get("channel_strategy"), + "gds_ref": b.get("gds"), "gds_mode": r.get("gds"), "geometry_hash_ref": b.get("geometry_hash"), "geometry_hash_mode": r.get("geometry_hash"), + "geometry_identical": b.get("geometry_hash") == r.get("geometry_hash")}) + ok = [x for x in rows if x["both_auto_passed"]] + def summ(xs): + c = collections.Counter(x["class"] for x in xs) + rel = [x["rel"] for x in xs] + return {"n": len(xs), "classes": dict(c), "mean_rel": statistics.mean(rel) if rel else None, "median_rel": statistics.median(rel) if rel else None, + "min_rel": min(rel) if rel else None, "max_rel": max(rel) if rel else None, + "passive_dominated": sum(x["passive_dominated"] for x in xs), "geometry_identical_to_ref": sum(x["geometry_identical"] for x in xs)} + by_mode = {m: summ([x for x in ok if x["mode"] == m]) for m in MODES} + by_topo = {t: {m: summ([x for x in ok if x["topology"] == t and x["mode"] == m]) for m in MODES} for t in sorted({x["topology"] for x in ok})} + by_pdk = {p: {m: summ([x for x in ok if x["pdk"] == p and x["mode"] == m]) for m in MODES} for p in ("sky130", "gf180", "ihp130")} + # area increases: which terms add area, and the largest one + neg = [x for x in ok if x["class"] == "negative"] + for x in neg: + pos = {k: v for k, v in x["area_terms"].items() if v > 1e-6} + x["increase_terms"] = sorted(pos, key=lambda k: -pos[k]); x["primary_mechanism"] = x["increase_terms"][0] + terms = ("routing_tracks", "stub_separation", "wider_row", "taller_mos_rows", "other_height") + mech = {"n": len(neg), "by_primary": dict(collections.Counter(x["primary_mechanism"] for x in neg)), + "with_term": {t: sum(t in x["increase_terms"] for x in neg) for t in terms}, + "tracks_and_stub_separation": sum({"routing_tracks", "stub_separation"} <= set(x["increase_terms"]) for x in neg), + "assembly_only": sum(set(x["increase_terms"]) <= {"routing_tracks", "stub_separation", "other_height"} for x in neg), + "pairs": [{k: x[k] for k in ("case", "mode", "rel", "dW", "dH", "area_terms", "increase_terms", "primary_mechanism", + "channel_strategy_ref", "channel_strategy_mode", "row_span_saving")} for x in sorted(neg, key=lambda x: -x["rel"])]} + # examples: largest saving, largest loss, a passive-dominated pair (same scale figures are made from these) + ex = {} + pos = sorted([x for x in ok if x["class"] == "positive"], key=lambda x: x["rel"]) + if pos: ex["positive"] = pos[0] + if neg: ex["negative"] = sorted(neg, key=lambda x: -x["rel"])[0] + pdom = sorted([x for x in ok if x["passive_dominated"] and x["max_mos_row_span_saving"] > 0.5], key=lambda x: -x["max_mos_row_span_saving"]) + if pdom: ex["passive_dominated"] = pdom[0] + out = {"n_pairs_all": len(rows), "n_pairs_both_auto_passed": len(ok), "by_mode": by_mode, "by_topology": by_topo, "by_pdk": by_pdk, + "increase_mechanisms": mech, "examples": ex, "rows": rows, "dead_band": DEAD} + json.dump(out, open(a.out, "w"), indent=1) + print(json.dumps({k: out[k] for k in ("n_pairs_all", "n_pairs_both_auto_passed", "by_mode")}, indent=1)) + print(json.dumps({k: v for k, v in mech.items() if k != "pairs"})) + for k, v in ex.items(): print(k, v["case"], v["mode"], v["rel"], "dW", v["dW"], "dH", v["dH"], "pdom", v["passive_dominated"]) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_validation.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_validation.py new file mode 100644 index 00000000..cea363b1 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/cost_validation.py @@ -0,0 +1,96 @@ +"""Validate the cost rule (cost.py) on main-grid runs: for every case whose independent run produced geometry and every +other mode that produced geometry, predict the mode's area from its plans + the independent run's assembly only, and +compare with the measured bounding-box area. Reports sign accuracy of (A_mode - A_independent) with a dead band, and +every sign error with its type. usage: python -m textbook_sharing.analysis.cost_validation --sizes sW1_sL1,sW1_sL1.5 --out """ +from __future__ import annotations +import json, glob, argparse, collections +from pathlib import Path +from textbook_sharing import paths +DEAD = 0.005 # |relative change| below 0.5 % counts as "no change" + + +def sign(x): + return 0 if abs(x) < DEAD else (1 if x > 0 else -1) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--sizes", default=None); ap.add_argument("--out", required=True); ap.add_argument("--channel-rule", default=None); a = ap.parse_args() + from textbook_sharing.run_case import load_case_dir, pdk_obj + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import device_specs, sharing_groups + from glayout.sharing import SharingPlan, rules_for + from textbook_sharing.selection import cost + from textbook_sharing.layout import build + sizes = a.sizes.split(",") if a.sizes else None + rows = []; model_mismatch = [] + for ind in sorted(glob.glob(str(paths.GRID_RUNS / "*/*/*/independent/result.json"))): + base = json.load(open(ind)); parts = Path(ind).parts; cid, pdkn, size = parts[-5], parts[-4], parts[-3] + if sizes and size not in sizes: continue + if not base.get("assembly_stats") or "row_dims" not in base["assembly_stats"]: continue + case, cj = load_case_dir(base["case_dir"]); circ = CIRCUITS[cid]; pdk = pdk_obj(pdkn); R = rules_for(pdk) + groups = sharing_groups(device_specs(circ, case.sizing)) + base_plans = [SharingPlan.from_json(ap_["plan"]) for ap_ in base["applied_plans"]] + # the estimate procedure builds the baseline once (grid runs predate the channel_net_sources stat): rebuild it + # and confirm it is the same assembly + rb = build(pdk, circ, case.sizing, mode="independent", name=f"{cid}_{pdkn}_{size}_costbase".replace(".", "p")) + if abs(rb["assembly_stats"]["area_um2"] - base["assembly_stats"]["area_um2"]) > 1e-3: + raise SystemExit(f"rebuilt baseline differs for {cid} {pdkn} {size}") + bstats = rb["assembly_stats"] + Nmodel = cost.channel_nets(bstats, groups, base_plans, [f"grp{i}" for i in range(len(groups))]) + Nreal = [set() for _ in Nmodel] + for d in bstats["channel_net_sources"]["cells"].values(): + for ch, nets in d.items(): Nreal[int(ch)] |= set(nets) + for ch, nets in bstats["channel_net_sources"]["taps"].items(): Nreal[int(ch)] |= set(nets) + if Nmodel != Nreal: model_mismatch.append(f"{cid}_{pdkn}_{size}") + bd = [cost.group_dims(R, g, p) for g, p in zip(groups, base_plans)] + kinds = [r["kind"] for r in base["assembly_stats"]["row_dims"]] + grow = [kinds.index("n" if g[0].model_role == "nfet" else "p") for g in groups] + A0 = base["assembly_stats"]["area_um2"] + for m in ("diffusion_only", "gate_only", "combined"): + mp = Path(ind).parent.parent / m / "result.json" + if not mp.exists(): continue + r = json.load(open(mp)) + if not r.get("assembly_stats"): continue + plans = [SharingPlan.from_json(ap_["plan"]) for ap_ in r["applied_plans"]] + e = cost.estimate(R, groups, plans, bd, bstats, grow, base_plans=base_plans, channel_rule=a.channel_rule) + A1 = r["assembly_stats"]["area_um2"]; d_true = (A1 - A0) / A0; d_hat = (e["area_hat"] - A0) / A0 + row = {"case": f"{cid}_{pdkn}_{size}", "mode": m, "A0": A0, "A_true": A1, "A_hat": e["area_hat"], "d_true": round(d_true, 5), "d_hat": round(d_hat, 5), + "sign_true": sign(d_true), "sign_hat": sign(d_hat), "passive_dominated": e["passive_dominated"], + "row_shift_true": r["assembly_stats"].get("row_x_shift"), "channel_true": r["assembly_stats"].get("channel_heights"), + "channel_base": base["assembly_stats"].get("channel_heights"), "strategy": r["assembly_stats"].get("channel_strategy"), + "channel_dh_hat": e.get("channel_dh")} + if row["sign_true"] != row["sign_hat"]: + ch_change = [round(x - y, 3) for x, y in zip(row["channel_true"] or [], row["channel_base"] or [])] + pred = e.get("channel_dh") or [0.0] * len(ch_change) + sh0 = base["assembly_stats"].get("row_x_shift") or []; sh1 = r["assembly_stats"].get("row_x_shift") or [] + d_shift = max([abs((a1 - a0)) for a0, a1 in zip(sh0, sh1)] + [0.0]) + ch_err = any(abs(x - y) > 1e-6 for x, y in zip(ch_change, pred)) + row["row_shift_change_um"] = round(d_shift, 3) + if ch_err and d_shift > 0.3: row["error_type"] = "routing channel height mis-predicted + row x-shift changed" + elif ch_err: row["error_type"] = "routing channel height mis-predicted" + elif d_shift > 0.3: row["error_type"] = "row x-shift changed (cross-row via conflict, not modelled)" + elif row["strategy"] != base["assembly_stats"].get("channel_strategy"): row["error_type"] = "assembly channel strategy changed" + else: row["error_type"] = "group dimension estimate" + row["channel_change"] = ch_change + rows.append(row) + n = len(rows); ok = sum(r["sign_true"] == r["sign_hat"] for r in rows) + conf = collections.Counter((r["sign_true"], r["sign_hat"]) for r in rows) + errs = collections.Counter(r.get("error_type") for r in rows if r["sign_true"] != r["sign_hat"]) + abs_err = sorted(abs(r["d_hat"] - r["d_true"]) for r in rows) + import collections as _c + def acc(key): + d = _c.defaultdict(lambda: [0, 0]) + for r in rows: d[key(r)][0] += r["sign_true"] == r["sign_hat"]; d[key(r)][1] += 1 + return {k: {"correct": v[0], "n": v[1]} for k, v in sorted(d.items())} + by = {"pdk": acc(lambda r: r["case"].split("_")[1]), "topology": acc(lambda r: r["case"].split("_")[0]), "mode": acc(lambda r: r["mode"])} + summ = {"by": by, "n_pairs": n, "sign_correct": ok, "confusion(true,hat)": {f"{k[0]},{k[1]}": v for k, v in conf.items()}, "error_types": dict(errs), + "median_abs_error_rel": abs_err[n // 2] if n else None, "p90_abs_error_rel": abs_err[int(0.9 * n)] if n else None, "dead_band": DEAD, "pin_model_mismatch_cases": model_mismatch, + "rule": "textbook_sharing.selection.cost v2", "channel_rule": a.channel_rule or cost.CHANNEL_RULE} + json.dump({"summary": summ, "rows": rows}, open(a.out, "w"), indent=1) + print(json.dumps(summ, indent=1)) + for r in rows: + if r["sign_true"] != r["sign_hat"]: print(" ERR", r["case"], r["mode"], r["d_true"], r["d_hat"], r.get("error_type"), r.get("channel_change"), r.get("channel_dh_hat")) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/example.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/example.py new file mode 100644 index 00000000..dfbddbdb --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/example.py @@ -0,0 +1,57 @@ +"""The running example of the documentation: the five-transistor OTA (C08) in SKY130 at the nominal size, taken from the +unshared layout to the best catalogue plan one decision at a time. All five layouts are candidates of the selection +catalogue of this case, so each was built and fully verified; this module only reads their records. +usage: python -m textbook_sharing.analysis.example --out /analysis/running_example.json""" +import argparse, json +from textbook_sharing import paths + +TASK = "C08_sky130_sW1_sL1" +STEPS = [("c1ebe43136e1", "unshared reference"), + ("cc0a97e9039c", "group 0 shares its net23 diffusion nodes"), + ("c051fabe4412", "group 1 also shares its VDD node (side case)"), + ("cd7b91d3467f", "group 1 shares VDD and drives both gates (net22) with one strap"), + ("c15f7f08c7b4", "that strap is turned toward the middle channel")] + + +def group_summary(plan, ev): + return {"devices": plan["devices"], + "shared_diffusion_nets": [n["net"] for n in ev["cross_device_shared_nodes"]], + "gate_straps": [{"fingers": len(g[0]), "side": g[1], "pad_end": g[2]} for g in plan["plan"]["gate_groups"]], + "shared_gate_conductors": [g["devices"] for g in ev["shared_gate_conductors"]], + "active_islands": ev["active_islands"]} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + d = paths.SELECTION_RUNS / TASK + cat = json.load(open(d / "catalogue.json"))["ledger"] + case = json.load(open(paths.CASES / "C08/sky130/sW1_sL1/specs.json")) + steps = [] + for cid, what in STEPS: + r = json.load(open(d / cid / "result.json")); st = r["assembly_stats"] + rv = json.load(open(d / cid / "verify/review/review_record.json")) + steps.append({"candidate": cid, "decision": what, "status": r["primary_status"], "visual_review": rv["visual"]["verdict"], + "area_um2": r["area_um2"], "width_um": st["width"], "height_um": st["height"], + "rows": [{"kind": x["kind"], "width_um": x["width"], "height_um": x["height"]} for x in st["row_dims"]], + "channel_heights_um": st["channel_heights"], + "groups": [group_summary(p, e) for p, e in zip(r["applied_plans"], r["evidence"])], + "gain_db": r["postsim"]["measures"].get("gain_lf"), "ugf_hz": r["postsim"]["measures"].get("ugf")}) + ref = steps[0]["area_um2"] + for s in steps: + s["change_vs_unshared"] = round(s["area_um2"] / ref - 1, 5) + comb = json.load(open(paths.GRID_RUNS / "C08/sky130/sW1_sL1/combined/result.json")) + out = {"task": TASK, "steps": steps, + "plan_space": {"plans_per_group": [g["unique"] for g in cat["per_group"]], "plans": cat["global_product_of_unique"], + "catalogue_size": cat["selected_for_evaluation"]}, + "named_mode_combined": {"area_um2": comb["area_um2"], "status": comb["primary_status"], + "unshared_groups": [i for i, p in enumerate(comb["applied_plans"]) if p["plan"]["mode_label"] == "independent"], + "change_vs_unshared": round(comb["area_um2"] / ref - 1, 5), + "above_best": round(comb["area_um2"] / steps[-1]["area_um2"] - 1, 5)}, + "specs": {"gain_db_min": case["gain_lf"]["min"], "ugf_hz_min": case["ugf"]["min"]}} + json.dump(out, open(a.out, "w"), indent=1) + for s in steps: + print(s["candidate"], s["area_um2"], s["width_um"], s["height_um"], f"{100 * s['change_vs_unshared']:+.1f} %", s["status"], s["visual_review"]) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/geometry_check.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/geometry_check.py new file mode 100644 index 00000000..414518b5 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/geometry_check.py @@ -0,0 +1,65 @@ +"""Rebuild the geometry of every recorded layout with this code (geometry only, no verification) and compare the +cell-name-independent geometry hash and the bounding box with the record. This needs only Python and KLayout, so it is +a quick check that the recorded runs and the code in this repository describe the same layouts. +usage: python -m textbook_sharing.analysis.geometry_check [--roots grid,selection,models] [--jobs 16] --out """ +import argparse, glob, json, tempfile, collections +from multiprocessing import Pool +from pathlib import Path +from textbook_sharing import paths + + +def records(roots): + out = [] + for root in roots: + for f in sorted(glob.glob(str(paths.RUNS / root / "**" / "result.json"), recursive=True)): + if "/verify/" in f: continue + r = json.load(open(f)) + if r.get("geometry_hash") and r.get("applied_plans"): + out.append(f) + return out + + +def check(job): + i, f = job + from textbook_sharing.layout import build + from textbook_sharing.run_case import load_case_dir + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.pdk import pdk_obj + from textbook_sharing.analysis.ledger import geometry_hash + r = json.load(open(f)); case, _ = load_case_dir(r["case_dir"]) + plans = {str(p["group"]): p["plan"] for p in r["applied_plans"]} + try: + b = build(pdk_obj(case.pdk), CIRCUITS[case.circuit_id], case.sizing, name=f"chk{i}", plans=plans) + with tempfile.TemporaryDirectory() as td: + g = Path(td) / "chk.gds"; b["component"].write_gds(str(g)); h = geometry_hash(str(g)) + st = b["assembly_stats"] + return {"record": paths.rel(Path(f).parent), "hash_match": h == r["geometry_hash"], + "bbox_match": (round(st["width"], 4), round(st["height"], 4)) == (round(r["assembly_stats"]["width"], 4), round(r["assembly_stats"]["height"], 4)), + "hash": h, "recorded_hash": r["geometry_hash"]} + except Exception as e: + return {"record": paths.rel(Path(f).parent), "error": repr(e)[:300]} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--roots", default="grid,selection,models"); ap.add_argument("--jobs", type=int, default=16) + ap.add_argument("--out", required=True); a = ap.parse_args() + fs = records(a.roots.split(",")) + res = [] + with Pool(a.jobs, maxtasksperchild=200) as pool: + for x in pool.imap_unordered(check, enumerate(fs), chunksize=4): + res.append(x) + if len(res) % 200 == 0 or len(res) == len(fs): + print(f"{len(res)}/{len(fs)} rebuilt, {sum(1 for y in res if not y.get('hash_match'))} not matching", flush=True) + res.sort(key=lambda x: x["record"]) + by_root = collections.defaultdict(collections.Counter) + for x in res: + root = x["record"].split("/")[1] + by_root[root]["records"] += 1 + by_root[root]["error" if "error" in x else ("hash_match" if x["hash_match"] else ("bbox_match_only" if x["bbox_match"] else "differs"))] += 1 + out = {"summary": {k: dict(v) for k, v in by_root.items()}, "not_matching": [x for x in res if not x.get("hash_match")]} + json.dump(out, open(a.out, "w"), indent=1) + print(json.dumps(out["summary"], indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/interface.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/interface.py new file mode 100644 index 00000000..fb62b62b --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/interface.py @@ -0,0 +1,55 @@ +"""Interface comparison (same model, same settings, same tasks): sharing interface (main-experiment sessions) vs the +base-gLayout capability interface (fet_row). Also capability coverage: on each task, the best feasible candidate of the +selection catalogue among plans the base interface can express (no cross-device diffusion node, no shared gate +conductor) vs the overall best. +usage: python -m textbook_sharing.analysis.interface --out /analysis/llm_interface.json""" +import json, glob, argparse, statistics +from pathlib import Path +from textbook_sharing import paths +ARMS = {"sharing": "openai_gpt-6.1-sol", "base": "openai_gpt-6.1-sol_baseiface"} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + from textbook_sharing.analysis.models import session_rows, ref_area, best_evaluated + from textbook_sharing.selection.strategies import share_score + tasks = sorted({Path(d).name for d in glob.glob(str(paths.MODEL_RUNS / ARMS["base"] / "*"))}) + rows = {}; summ = {} + for arm, tag in ARMS.items(): + rs = [] + for t in tasks: + for sd in sorted(glob.glob(str(paths.MODEL_RUNS / tag / t / "r*"))): + sess, done, reps = session_rows(sd) + if not reps: continue + feas = [r["run"]["area_um2"] for r in reps if r["status"] == "evaluated" and r["run"]["primary_status"] == "auto_passed" and r["run"].get("area_um2")] + b = min(feas) if feas else None; ra = ref_area(t); be, _ = best_evaluated(t) + rs.append({"task": t, "rep": Path(sd).name, "proposals": len(reps), "first_legal": reps[0]["status"] == "evaluated", + "best": b, "vs_reference": (b / ra - 1) if b and ra else None, "vs_best_evaluated": (b / be - 1) if b and be else None}) + rows[arm] = rs + ok = [r for r in rs if r["vs_best_evaluated"] is not None] + summ[arm] = {"sessions": len(rs), "tasks": len({r["task"] for r in rs}), "first_legal_rate": statistics.mean(r["first_legal"] for r in rs) if rs else None, + "gap8": statistics.mean(r["vs_best_evaluated"] for r in ok) if ok else None, + "ref8": statistics.mean(r["vs_reference"] for r in ok if r["vs_reference"] is not None) if ok else None} + cov = {} + for t in tasks: + td = paths.SELECTION_RUNS / t + if not (td / "catalogue.json").exists(): continue + cat = json.load(open(td / "catalogue.json")); allf = []; basef = [] + for c in cat["entries"]: + rp = td / c / "result.json" + if not rp.exists(): continue + r = json.load(open(rp)) + if r.get("primary_status") == "auto_passed" and r.get("area_um2"): + allf.append(r["area_um2"]) + if share_score(cat, c) == 0: basef.append(r["area_um2"]) + cov[t] = {"best_all": min(allf) if allf else None, "best_base_expressible": min(basef) if basef else None, + "base_gap": (min(basef) / min(allf) - 1) if allf and basef else None} + gaps = [v["base_gap"] for v in cov.values() if v["base_gap"] is not None] + summ["capability"] = {"tasks": len(cov), "mean_gap_of_best_base_expressible_candidate": statistics.mean(gaps) if gaps else None, + "note": "base-expressible = catalogue candidates with no cross-device diffusion join and no shared gate conductor"} + json.dump({"summary": summ, "rows": rows, "coverage": cov, "tasks": tasks}, open(a.out, "w"), indent=1) + print(json.dumps(summ, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/ledger.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/ledger.py new file mode 100644 index 00000000..6df097bc --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/ledger.py @@ -0,0 +1,115 @@ +"""Count ledger (machine-readable + reader table). Every class is mutually exclusive; totals are asserted. +Case level (648 requested = 18 topologies x 3 PDKs x 12 size points): + requested = parameter_illegal + duplicate + distinct_legal + distinct_legal = schematic_not_qualified + qualified + qualified = reference_first_failure[stage] (independent-mode run of the main grid; or not_run) + reference_auto_passed + formal entry = reference_auto_passed (diagnostic set = everything else that was requested, with its reason) +Mode level (main grid, qualified cases x 4 modes): NA (mode not applicable) / not_run / first failing stage / auto_passed, + plus geometry-identical-to-another-mode counts (same GDS content apart from the cell name). +Candidate level (selection): per task raw tuples / static illegal / equivalent duplicates / unique per group, + global product, selected, evaluated, first failing stage / auto_passed. +Visual review is a separate dimension: pending / pass / suspicious / fail, and its intersection with auto_passed. +usage: python -m textbook_sharing.analysis.ledger -> /count_ledger.json + count_ledger.md""" +from __future__ import annotations +import json, glob, collections, hashlib +from pathlib import Path +from textbook_sharing import paths +STAGES = ["rejected_plan", "build_failed", "drc_failed", "lvs_failed", "constraints_failed", "pex_failed", "simulation_failed", "spec_failed", "physical_review_failed"] + + +def review_verdict(res): + rp = paths.resolve(res["gds"]).parent / "verify" / "review" / "review_record.json" if res.get("gds") else None + if rp is None: return "no_record" + if rp.exists(): + rec = json.load(open(rp)); v = (rec.get("visual") or {}).get("verdict", "review_pending") + if v in ("suspicious", "fail"): # the reviewer's verdict is kept; the objective resolution is shown next to it + v += "(" + (rec.get("visual_resolution") or {}).get("outcome", "unresolved") + ")" + return v + return "no_record" + + +def geometry_hash(gds): + """GDS content hash with the cell name removed (modes that produced identical geometry share it).""" + try: + import klayout.db as kdb + ly = kdb.Layout(); ly.read(gds); top = ly.top_cell(); h = hashlib.sha256() + for li in sorted(ly.layer_indexes(), key=lambda i: (ly.get_info(i).layer, ly.get_info(i).datatype)): + info = ly.get_info(li); reg = kdb.Region(top.begin_shapes_rec(li)); reg.merge() + h.update(f"{info.layer}/{info.datatype}:".encode()) + for poly in sorted(str(p) for p in reg.each()): h.update(poly.encode()) + return h.hexdigest()[:16] + except Exception as e: + return None + + +def main(): + by_id = {r["case_id"]: r for r in json.load(open(paths.RESULTS / "case_build.json"))} # one record per request + req = list(by_id.values()) + L = {"requested": len(req)} + st = collections.Counter(r["stage"] for r in req) + L["parameter_illegal"] = st["parameter_illegal"]; L["duplicate"] = st["duplicate"] + L["distinct_legal"] = st["schematic_not_qualified"] + st["qualified"] + L["schematic_not_qualified"] = st["schematic_not_qualified"]; L["qualified"] = st["qualified"] + assert L["requested"] == L["parameter_illegal"] + L["duplicate"] + L["distinct_legal"] + ref = collections.Counter(); formal = []; diag = []; mode_rows = collections.Counter(); mode_by = collections.defaultdict(collections.Counter) + identical = collections.Counter(); review = collections.Counter(); review_auto = collections.Counter() + for r in req: + if r["stage"] != "qualified": + diag.append({"case_id": r["case_id"], "reason": r["stage"], "detail": (r.get("derivation") or {}).get("reason") or "; ".join((r.get("qualification") or {}).get("reasons", [])[:3]) or r.get("duplicate_of")}); continue + base = paths.GRID_RUNS / r["circuit_id"] / r["pdk"] / r["size"] + rr = base / "independent" / "result.json" + s = json.load(open(rr)).get("primary_status") if rr.exists() else "not_run" + ref[s] += 1 + if s == "auto_passed": formal.append(r["case_id"]) + else: diag.append({"case_id": r["case_id"], "reason": "reference_" + s}) + hashes = {} + for m in ("independent", "diffusion_only", "gate_only", "combined"): + mp = base / m / "result.json" + ms = json.load(open(mp)) if mp.exists() else {"primary_status": "not_run"} + mode_rows[ms["primary_status"]] += 1; mode_by[m][ms["primary_status"]] += 1 + if ms.get("gds"): + v = review_verdict(ms); review[v] += 1 + if ms["primary_status"] == "auto_passed": review_auto[v] += 1 + gp = paths.resolve(ms["gds"]) + gh = ms.get("geometry_hash") or (geometry_hash(str(gp)) if gp.exists() else None); hashes[m] = gh + if hashes: + seen = {} + for m, gh in hashes.items(): + if gh and gh in seen: identical[f"{m}=={seen[gh]}"] += 1 + else: seen[gh] = m + L["reference"] = dict(ref); L["formal_entries"] = len(formal); L["diagnostic"] = len(diag) + assert L["qualified"] == sum(ref.values()) + assert L["requested"] == L["formal_entries"] + L["diagnostic"] + L["mode_rows"] = {"total": sum(mode_rows.values()), "by_status": dict(mode_rows), "by_mode": {m: dict(c) for m, c in mode_by.items()}, + "geometry_identical_pairs": dict(identical)} + L["visual_review_main_grid"] = {"all_kept_gds": dict(review), "auto_passed_gds": dict(review_auto)} + # candidates + cand = {"tasks": 0, "per_task": {}} + agg = collections.Counter() + for td in sorted(glob.glob(str(paths.SELECTION_RUNS / "*/catalogue.json"))): + cat = json.load(open(td)); tdir = Path(td).parent; cand["tasks"] += 1 + ev = collections.Counter(); rv = collections.Counter() + for cid in cat["entries"]: + rp = tdir / cid / "result.json" + if rp.exists(): + rs = json.load(open(rp)); ev[rs.get("primary_status")] += 1 + if rs.get("gds"): rv[review_verdict(rs)] += 1 + else: ev["not_run"] += 1 + cand["per_task"][cat["task_id"]] = {"ledger": cat["ledger"], "evaluated": dict(ev), "review": dict(rv)} + agg["selected"] += cat["ledger"]["selected_for_evaluation"] + for k, v in ev.items(): agg[f"eval:{k}"] += v + for k, v in rv.items(): agg[f"review:{k}"] += v + cand["totals"] = dict(agg) + out = paths.RESULTS; out.mkdir(parents=True, exist_ok=True) + json.dump({"cases": L, "formal_entries": formal, "diagnostic": diag, "candidates": cand}, open(out / "count_ledger.json", "w"), indent=1) + md = ["# Count ledger", "", "| level | count |", "|---|---|"] + for k in ("requested", "parameter_illegal", "duplicate", "distinct_legal", "schematic_not_qualified", "qualified", "formal_entries", "diagnostic"): + md.append(f"| {k} | {L[k]} |") + md += ["", "reference (independent mode) first status: " + json.dumps(dict(ref)), "", "mode rows: " + json.dumps(L["mode_rows"]["by_status"]), + "", "selection candidates: " + json.dumps(cand["totals"])] + (out / "count_ledger.md").write_text("\n".join(md) + "\n") + print("\n".join(md)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/models.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/models.py new file mode 100644 index 00000000..9e1e7491 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/models.py @@ -0,0 +1,96 @@ +"""Aggregate model sessions (/models///r/). +Per session: proposals made (each counts, incl. rejected and repeated), first proposal legal (passed parse + legality), +EDA verifications actually run (non-duplicate evaluated proposals), statuses, best feasible (auto_passed) area after +k = 1, 2, 4, 8 proposals, its ratio to the task's reference (independent) area and to the best feasible candidate of the +selection catalogue of the same task when that task was evaluated ("best of the evaluated set"), wall time. +Aggregates per model tag: session-level rates, topology-balanced means, and per-task paired comparisons. +usage: python -m textbook_sharing.analysis.models --out /analysis/llm_summary.json [--tags a,b]""" +import json, glob, argparse, statistics, collections +from pathlib import Path +from textbook_sharing import paths +KS = (1, 2, 4, 8) + + +def session_rows(sd): + sd = Path(sd); reps = [] + for f in sorted(sd.glob("p*_report.json"), key=lambda p: int(p.name[1:].split("_")[0])): + reps.append(json.load(open(f))) + sess = json.load(open(sd / "session.json")) if (sd / "session.json").exists() else {} + done = json.load(open(sd / "session_done.json")) if (sd / "session_done.json").exists() else {} + return sess, done, reps + + +def ref_area(task_id): + cid, pdk, size = task_id.split("_", 2) + f = paths.GRID_RUNS / cid / pdk / size / "independent/result.json" + r = json.load(open(f)) if f.exists() else {} + return r.get("area_um2") if r.get("primary_status") == "auto_passed" else None + + +def best_evaluated(task_id): + td = paths.SELECTION_RUNS / task_id + if not (td / "catalogue.json").exists(): return None, None + cat = json.load(open(td / "catalogue.json")); vals = []; done = 0 + for c in cat["entries"]: + rp = td / c / "result.json" + if rp.exists(): + done += 1; r = json.load(open(rp)) + if r.get("primary_status") == "auto_passed" and r.get("area_um2"): vals.append(r["area_um2"]) + return (min(vals) if vals else None), done == len(cat["entries"]) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); ap.add_argument("--tags", default=None); a = ap.parse_args() + tags = a.tags.split(",") if a.tags else sorted(p.name for p in (paths.MODEL_RUNS).iterdir() if p.is_dir()) + sessions = [] + for tag in tags: + for sd in sorted(glob.glob(str(paths.MODEL_RUNS / tag / "*" / "r*"))): + sess, done, reps = session_rows(sd) + if not reps: continue + task = Path(sd).parent.name; ra = ref_area(task); be, be_complete = best_evaluated(task) + first_legal = reps[0]["status"] == "evaluated" + evaluated = [r for r in reps if r["status"] == "evaluated"] + fresh = [r for r in evaluated if not r.get("duplicate_of")] + st = collections.Counter((r["run"]["primary_status"] if r["status"] == "evaluated" else "rejected_program") for r in reps) + best = {} + for k in KS: + feas = [r["run"]["area_um2"] for r in reps[:k] if r["status"] == "evaluated" and r["run"]["primary_status"] == "auto_passed" and r["run"].get("area_um2")] + b = min(feas) if feas else None + best[str(k)] = {"best_area": b, "vs_reference": (b / ra - 1) if (b and ra) else None, "vs_best_evaluated": (b / be - 1) if (b and be) else None} + sessions.append({"tag": tag, "task": task, "topology": task.split("_")[0], "rep": Path(sd).name, "n_proposals": len(reps), "first_legal": first_legal, + "n_rejected": sum(1 for r in reps if r["status"] != "evaluated"), "n_duplicates": sum(1 for r in evaluated if r.get("duplicate_of")), + "eda_verifications": len(fresh), "statuses": dict(st), + "drc_lvs_clean": sum(1 for r in evaluated if (r["run"].get("verify") or {}).get("drc") == "passed" and (r["run"].get("verify") or {}).get("lvs") == "passed"), + "auto_passed": sum(1 for r in evaluated if r["run"]["primary_status"] == "auto_passed"), + "best": best, "reference_area": ra, "best_evaluated_area": be, "best_evaluated_complete": be_complete, + "evaluator_s": round(sum(r.get("evaluator_s", 0) for r in reps), 1), + "model_s": round(sum(c.get("seconds", 0) for c in (done.get("calls") or [])), 1) if done else None, + "usage": [c.get("usage") for c in (done.get("calls") or [])] if done else None, + "isolation_breach": done.get("isolation_breach_any") if done else None, "interface": sess.get("interface", "sharing")}) + summ = {} + for tag in tags: + ss = [s for s in sessions if s["tag"] == tag] + if not ss: continue + evald = sum(s["n_proposals"] - s["n_rejected"] for s in ss) + d = {"sessions": len(ss), "tasks": len({s["task"] for s in ss}), "proposals": sum(s["n_proposals"] for s in ss), + "eda_verifications": sum(s["eda_verifications"] for s in ss), "first_legal_rate": statistics.mean(s["first_legal"] for s in ss), + "rejected_rate": sum(s["n_rejected"] for s in ss) / max(1, sum(s["n_proposals"] for s in ss)), + "drc_lvs_clean_rate_of_evaluated": sum(s["drc_lvs_clean"] for s in ss) / max(1, evald), + "auto_passed_rate_of_evaluated": sum(s["auto_passed"] for s in ss) / max(1, evald), "by_k": {}} + for k in KS: + found = [s["best"][str(k)]["best_area"] is not None for s in ss] + vr = {}; vb = {} + for s in ss: + x = s["best"][str(k)] + if x["vs_reference"] is not None: vr.setdefault(s["topology"], []).append(x["vs_reference"]) + if x["vs_best_evaluated"] is not None: vb.setdefault(s["topology"], []).append(x["vs_best_evaluated"]) + bal = lambda dd: statistics.mean(statistics.mean(v) for v in dd.values()) if dd else None + d["by_k"][str(k)] = {"found_rate": statistics.mean(found), "vs_reference_balanced": bal(vr), "vs_best_evaluated_balanced": bal(vb), + "n_vs_best_evaluated": sum(len(v) for v in vb.values())} + summ[tag] = d + json.dump({"summary": summ, "sessions": sessions}, open(a.out, "w"), indent=1) + print(json.dumps(summ, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/pex_sensitivity.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/pex_sensitivity.py new file mode 100644 index 00000000..3342c0cc --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/pex_sensitivity.py @@ -0,0 +1,32 @@ +"""Extraction sensitivity (separate from the formal results): re-extract a kept layout with capacitance only, run the +SAME testbench deck against that netlist, and compare the measures with the formal R+C result. +usage: python -m textbook_sharing.analysis.pex_sensitivity [ ...] --out """ +import re, json, argparse +from pathlib import Path + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("runs", nargs="+"); ap.add_argument("--out", required=True); a = ap.parse_args() + from textbook_sharing.verify import pex_sim + from textbook_sharing.verify.lvs import run + rows = [] + for rd in a.runs: + rd = Path(rd).resolve(); r = json.load(open(rd / "result.json")); pdk = r["case_dir"].split("/")[-2] + rc_net = next((rd / "verify/pex").glob("*_pex.spice")); top = re.search(r"^\.subckt\s+(\S+)", rc_net.read_text(), re.M | re.I).group(1) + od = rd / "sensitivity_c_only"; od.mkdir(exist_ok=True) + saved = dict(pex_sim.PEX_POLICY[pdk]); pex_sim.PEX_POLICY[pdk] = {"with_resist": False, "extresist_tolerance": None, "note": "sensitivity: C only"} + try: px = pex_sim.pex(pdk, r["gds"], top, od) + finally: pex_sim.PEX_POLICY[pdk] = saved + deck = next((rd / "postsim").glob("tb_*.spice")).read_text() + deck = deck.replace(str(rc_net), px["spice"]); assert px["spice"] in deck + (od / "tb_c_only.spice").write_text(deck) + run(f"ngspice -b {od}/tb_c_only.spice -o {od}/tb_c_only.out", str(od), od / "tb_c_only.log", timeout=900) + m = pex_sim.read_measures((od / "tb_c_only.out").read_text(errors="replace")) + row = {"run": paths.rel(rd), "status": r["primary_status"], "rc_measures": r["postsim"].get("measures"), "c_only_measures": m, + "c_only_counts": {k: px.get(k) for k in ("n_res", "n_cap", "n_devices")}, "spec": {k: v["spec"] for k, v in (r["postsim"].get("spec") or {}).items()}} + rows.append(row); print(json.dumps({k: row[k] for k in ("run", "status")}), {k: (row["rc_measures"] or {}).get(k) for k in row["spec"]}, {k: m.get(k) for k in row["spec"]}) + json.dump(rows, open(a.out, "w"), indent=1) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/pvt.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/pvt.py new file mode 100644 index 00000000..10beaac6 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/pvt.py @@ -0,0 +1,84 @@ +"""PVT robustness of declared configurations (post-layout, extracted netlists unchanged; interconnect R/C at nominal). +Conditions (device corner, temperature, supply): TT 27 C VDD | SS 27 C VDD | FF 27 C VDD | SS 85 C 0.9 VDD | FF -40 C 1.1 VDD. +Layouts per (topology, PDK) at the nominal size sW1_sL1 of the selection topologies: the formal reference (independent), +the named combined mode (main grid), and the best feasible candidate of the selection catalogue ("best of the evaluated +set"). Every layout is checked against the case's frozen NOMINAL specifications under every condition (no re-freezing); +this measures how often sharing adds or removes failures relative to the reference, not corner sign-off. +No Monte Carlo is run (no mismatch statistics are claimed). +usage: python -m textbook_sharing.analysis.pvt --jobs 16 --out /analysis/pvt.json""" +from __future__ import annotations +import json, glob, copy, re, argparse, collections +from pathlib import Path +from multiprocessing import Pool +from textbook_sharing import paths +CONDITIONS = [("TT_27C_VDD", "tt", 27, 1.0), ("SS_27C_VDD", "ss", 27, 1.0), ("FF_27C_VDD", "ff", 27, 1.0), + ("SS_85C_0.9VDD", "ss", 85, 0.9), ("FF_m40C_1.1VDD", "ff", -40, 1.1)] +SIZE = "sW1_sL1" + + +def targets(): + from textbook_sharing.grid import SELECTION_TOPOLOGIES + out = [] + for cid in SELECTION_TOPOLOGIES: + for pdk in ("sky130", "gf180", "ihp130"): + g = paths.GRID_RUNS / cid / pdk / SIZE + ind = g / "independent/result.json" + if not ind.exists() or json.load(open(ind)).get("primary_status") != "auto_passed": continue + out.append((f"{cid}_{pdk}", "reference", str(ind))) + comb = g / "combined/result.json" + if comb.exists() and json.load(open(comb)).get("primary_status") == "auto_passed": out.append((f"{cid}_{pdk}", "combined", str(comb))) + td = paths.SELECTION_RUNS / f"{cid}_{pdk}_{SIZE}" + feas = [] + for rp in glob.glob(str(td / "*/result.json")): + r = json.load(open(rp)) + if r.get("primary_status") == "auto_passed" and r.get("area_um2"): feas.append((r["area_um2"], rp)) + if feas: out.append((f"{cid}_{pdk}", "best_evaluated", sorted(feas)[0][1])) + return out + + +def job(args): + key, role, rp, cond = args + from textbook_sharing.run_case import load_case_dir + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.testbench import make_testbench + from textbook_sharing.testbench import check_specs, derived + from textbook_sharing.verify.pex_sim import simulate, read_measures + name, corner, temp, vs = cond + r = json.load(open(rp)); od = Path(rp).parent + pexsp = next((od / "verify" / "pex").glob("*_pex.spice")) + top = re.search(r"^\.subckt\s+(\S+)", pexsp.read_text(), re.M | re.I).group(1) + case, cj = load_case_dir(r["case_dir"]); case = copy.deepcopy(case) + case.supply = {k: (v * vs if k == "VDD" else v) for k, v in case.supply.items()} + tb = make_testbench(CIRCUITS[case.circuit_id], top, str(pexsp), case, case.pdk) + tb = f".temp {temp}\n" + tb + out = paths.PVT_RUNS / key / role / name + s = simulate(case.pdk, tb, out, name="tb", corner=corner) + meas = derived(read_measures(Path(s["out"]).read_text(errors="replace"))) if Path(s["out"]).exists() else {} + sp = check_specs(meas, case.specs) + st = s["status"] if s["status"] != "passed" else sp["status"] + return {"key": key, "role": role, "condition": name, "status": st, "measures": meas, "spec": sp.get("details"), "result": rp, "geometry_hash": r.get("geometry_hash"), + "area_um2": r.get("area_um2")} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--jobs", type=int, default=16); ap.add_argument("--out", required=True); a = ap.parse_args() + T = targets(); jobs = [(k, role, rp, c) for k, role, rp in T for c in CONDITIONS] + print("layouts", len(T), "simulations", len(jobs), flush=True) + with Pool(a.jobs) as pool: rows = pool.map(job, jobs, chunksize=1) + by = collections.defaultdict(dict) + for x in rows: by[(x["key"], x["condition"])][x["role"]] = x["status"] == "passed" + comp = {} + for role in ("combined", "best_evaluated"): + c = collections.Counter() + for (k, cond), d in by.items(): + if role not in d or "reference" not in d: continue + ref, sh = d["reference"], d[role] + c["co_pass" if ref and sh else "co_fail" if (not ref and not sh) else "sharing_added_failure" if ref else "sharing_removed_failure"] += 1 + comp[role] = dict(c) + json.dump({"conditions": CONDITIONS, "targets": T, "rows": rows, "comparison_vs_reference": comp, + "note": "interconnect R/C extracted at nominal; device corners only; frozen nominal specs; no Monte Carlo"}, open(a.out, "w"), indent=1, default=str) + print(json.dumps(comp, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/report.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/report.py new file mode 100644 index 00000000..a2b33026 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/report.py @@ -0,0 +1,243 @@ +"""Write docs/RESULTS.md and docs/PARAMETER_SPACE.md from the result tables, so that every number in these two documents +is read from a file in / (each section names its source file). +usage: python -m textbook_sharing.analysis.report""" +import json, glob +from pathlib import Path +from textbook_sharing import paths + +DOCS = paths.ROOT / "docs" +NAMES = {"C01": "basic current mirror", "C02": "cascode current mirror", "C03": "Wilson current mirror", "C04": "CS amplifier, current-source load", + "C05": "source follower", "C06": "cascode amplifier, cascode load", "C07": "diff. pair, current-source loads", "C08": "five-transistor OTA", + "C09": "telescopic OTA", "C10": "folded-cascode OTA (fully differential)", "C11": "two-stage Miller op amp", "C12": "CMOS inverter amplifier", + "C13": "wide-swing cascode mirror", "C14": "regulated cascode mirror", "C15": "CS amplifier, resistor load", "C16": "diff. pair, resistor loads", + "C17": "degenerated diff. pair", "C18": "class-AB output stage"} +ORDER = ["C01", "C02", "C03", "C13", "C14", "C04", "C06", "C12", "C15", "C05", "C07", "C16", "C17", "C08", "C09", "C10", "C11", "C18"] +MODEL_LABEL = {"openai_gpt-6.1-sol": "OpenAI (Codex CLI)", "anthropic_claude-sonnet": "Anthropic (agent session)"} + + +def J(name): + return json.load(open(paths.RESULTS / name)) + + +def pct(x, nd=1): + return f"{100 * x:.{nd}f}" + + +def r2(x): + """Two decimals, rounding half up on the decimal value.""" + from decimal import Decimal, ROUND_HALF_UP + return str(Decimal(repr(round(x, 6))).quantize(Decimal("0.01"), rounding=ROUND_HALF_UP)) + + +def signed(x, nd=1): + return ("+" if x > 0 else "") + pct(x, nd) + + +def parameter_space(): + bt = J("analysis/benchmark_table.json"); rows = {r["topology"]: r for r in bt["rows"]}; t = bt["totals"] + L = J("count_ledger.json")["cases"] + out = ["# Parameter space and counts", "", + "Generated by `python -m textbook_sharing.analysis.report` from `results/analysis/benchmark_table.json`, " + "`results/count_ledger.json` and `results/analysis/scope_audit.json`; do not edit by hand.", "", + "## Three nested levels", "", + "1. **Process**: SKY130 (1.8 V devices), GF180MCU (3.3 V), IHP SG13G2 (1.2 V low-voltage devices).", + "2. **Size**: every transistor width is scaled by sW in {0.5, 1, 1.5, 2} and every length by sL in {1, 1.5, 2}, i.e. " + "12 size points per topology and process. Widths are scaled through the finger count when that stays an integer " + "for every device, otherwise through the unit finger width, so every width ratio inside a circuit is kept; a request " + "whose unit finger width falls below the PDK minimum or off the 5 nm grid is parameter-illegal " + "(`textbook_sharing/grid.py`). Resistor and capacitor values, supply, bias and load are not scaled.", + "3. **Plan**: for each sharing group, six discrete axes (arrangement 4 values, orientation policy 4, diffusion 2, gate 2, " + "first strap side 2, pad end 2) give 256 tuples; illegal tuples and tuples that build the same geometry as another " + "are removed (`src/glayout/sharing/enumeration.py`). The plans of a circuit are the product over its groups. Plans " + "written directly as a `SharingPlan` can express more than these axes.", "", + f"Requests: {len(rows)} topologies x 3 PDKs x 12 sizes = **{t['requests']}**.", "", + "## Per topology", "", + "Columns: devices; distinct legal plans per sharing group and per circuit at the nominal size in SKY130 (static " + "enumeration, no layout built); outcome of the 36 size/PDK requests; sharing kinds that apply to at least one formal " + "entry (D diffusion, G gate; 'none' = every group holds a single transistor).", "", + "| ID | topology | MOS / R / C | plans per group | plans per circuit | formal SKY130 / GF180 / IHP | not qualified | illegal | reference misses spec | sharing |", + "|---|---|---|---|---:|---|---:|---:|---:|---|"] + for cid in ORDER: + r = rows[cid]; o = r["outcomes"]; m = r["modes_applicable_in_formal"]; f = r["formal_by_pdk"] + if not o.get("formal"): + share = "(no formal entry)" + else: + share = " ".join(x for x, k in (("D", "diffusion_only"), ("G", "gate_only")) if m.get(k)) or "none" + out.append(f"| {cid} | {NAMES[cid]} | {r['mos']} / {r['res']} / {r['cap']} | {' x '.join(str(g['unique_plans']) for g in r['groups_nominal_sky130'])} | " + f"{r['plan_space_nominal_sky130']:,} | {f['sky130']} / {f['gf180']} / {f['ihp130']} | {o.get('schematic_not_qualified', 0)} | " + f"{o.get('parameter_illegal', 0)} | {o.get('reference_spec_failed', 0)} | {share} |") + noshare = [c for c in ORDER if not rows[c]["modes_applicable_in_formal"] and rows[c]["outcomes"].get("formal")] + out += ["", "## Count ledger (mutually exclusive classes)", "", + "| class | count |", "|---|---:|", + f"| requests | {L['requested']} |", f"| parameter-illegal | {L['parameter_illegal']} |", + f"| schematic not qualified (diagnostic) | {L['schematic_not_qualified']} |", f"| qualified | {L['qualified']} |", + f"| unshared reference misses a frozen specification (diagnostic) | {L['qualified'] - L['formal_entries']} |", + f"| **formal entries** | **{L['formal_entries']}** |", "", + f"* {t['topologies_with_formal_entries']} of {len(rows)} topologies have formal entries. Every point of the class-AB " + "stage (C18) misses its schematic floors, also after a bounded redesign search (`results/redesign_search/`).", + f"* {t['topologies_with_formal_entries'] - len(noshare)} topologies admit sharing across devices. In " + f"{', '.join(noshare)} no two transistors of the same polarity, length and unit width share a source/drain or gate " + "net, so every group holds one transistor and only the unshared layout exists.", + f"* Main grid: every qualified request in the four named modes = {L['mode_rows']['total']} runs: " + + ", ".join(f"{k} {v}" for k, v in L["mode_rows"]["by_status"].items()) + ". NA = the mode shares nothing in any " + "group of that circuit (no run is made); the failures are the unshared references of the table above.", ""] + S = J("analysis/scope_audit.json")["task_sets"] + others = sorted(k for k in S["dropped"] if not k.startswith("C18")) + out += ["## Task sets of the plan-selection and model studies", "", + f"* Selection: {S['designed_selection']} points designed (C02, C08, C09, C11, C16, C18 x 3 PDKs x sW in {{1, 2}} x " + f"sL in {{1, 2}}). The class-AB points and {len(others)} others are not qualified ({', '.join(others)}), leaving " + f"**{S['selection']} tasks** in {len(S['selection_topologies'])} topologies. Per task the catalogue holds at most 64 " + "plans: the four named modes plus a seeded stratified sample, or every plan when the circuit has at most 64 " + "(C02: 64, C16: 49).", + f"* Model sessions: the **{S['model_tasks']}** selection tasks at sW = 2 (sL 1 and 2), 3 sessions per task and model.", + f"* Interface comparison: the **{S['interface_tasks']}** model tasks at sW2_sL1, OpenAI model only, 3 sessions per task.", ""] + return "\n".join(out) + "\n" + + +def results(): + o = ["# Results", "", "Generated by `python -m textbook_sharing.analysis.report` from the tables in `results/`; do not edit by " + "hand. The tables themselves are recomputed from the run records with `python -m textbook_sharing.analysis.all`.", ""] + ex = J("analysis/running_example.json"); g0, g1 = (", ".join(g["devices"]) for g in ex["steps"][0]["groups"]) + ps = ex["plan_space"]; nm = ex["named_mode_combined"] + o += ["## Running example", "", f"Source: `results/analysis/running_example.json`. Five-transistor OTA (C08), SKY130, nominal size; " + f"group 0 = {g0} (NMOS), group 1 = {g1} (PMOS). The circuit has {' x '.join(map(str, ps['plans_per_group']))} = {ps['plans']} " + f"distinct plans; its selection catalogue holds {ps['catalogue_size']}. Specifications: gain >= {ex['specs']['gain_db_min']} dB, " + f"unity-gain frequency >= {ex['specs']['ugf_hz_min'] / 1e6:.2f} MHz.", "", + "| candidate | decision | shared diffusion nets (group 0; group 1) | gate straps (group 0; group 1) | W x H (um) | area (um^2) | change | gain (dB) | UGF (MHz) | checks, review |", + "|---|---|---|---|---|---:|---:|---:|---:|---|"] + for st in ex["steps"]: + nets = "; ".join(", ".join(g["shared_diffusion_nets"]) or "-" for g in st["groups"]) + straps = "; ".join(f"{len(g['gate_straps'])} " + "/".join(sorted({x["side"] for x in g["gate_straps"]})) for g in st["groups"]) + o.append(f"| `{st['candidate']}` | {st['decision']} | {nets} | {straps} | {r2(st['width_um'])} x {r2(st['height_um'])} | {st['area_um2']:.1f} | " + f"{signed(st['change_vs_unshared'])} % | {st['gain_db']:.2f} | {st['ugf_hz'] / 1e6:.1f} | {st['status']}, {st['visual_review']} |") + left = ", ".join(f"group {i}" for i in nm["unshared_groups"]) or "no group" + o += ["", f"For comparison, the named mode 'combined' (in each group the first plan in axis order that shares both diffusion and " + f"gates; a group that cannot share both stays unshared, here {left}): {nm['area_um2']:.1f} um^2 ({signed(nm['change_vs_unshared'])} %), " + f"{pct(nm['above_best'])} % above the last step. The last step removes the top routing channel: channel heights " + f"{ex['steps'][-2]['channel_heights_um']} -> {ex['steps'][-1]['channel_heights_um']} um.", ""] + cd = J("analysis/cost_decomposition.json") + o += ["## What sharing gains and costs (main grid)", "", f"Source: `results/analysis/cost_decomposition.json`. {cd['n_pairs_both_auto_passed']} pairs " + "(one case, one sharing mode against the unshared layout of the same case) in which both layouts pass every check. " + "Smaller / larger: area change beyond +-0.5 %.", "", + "| mode | pairs | smaller | larger | mean change | min | max | a passive row sets the width |", "|---|---:|---:|---:|---:|---:|---:|---:|"] + for m in ("diffusion_only", "gate_only", "combined"): + s = cd["by_mode"][m] + o.append(f"| {m} | {s['n']} | {s['classes'].get('positive', 0)} | {s['classes'].get('negative', 0)} | {signed(s['mean_rel'])} % | " + f"{signed(s['min_rel'])} % | {signed(s['max_rel'])} % | {s['passive_dominated']} |") + im = cd["increase_mechanisms"]; wt = im["with_term"] + stub = [x for x in im["pairs"] if "stub_separation" in x["increase_terms"]] + cell = [x for x in im["pairs"] if x["primary_mechanism"] == "wider_row"] + o += ["", f"**Where the {im['n']} area increases come from.** Each increase A1 - A0 is split exactly into five terms " + "(definitions in `analysis/cost_decomposition.py`); a pair can have several positive terms.", "", + "| term | pairs with this term | largest term |", "|---|---:|---:|", + f"| extra routing tracks (taller channels) | {wt['routing_tracks']} | {im['by_primary'].get('routing_tracks', 0)} |", + f"| width outside the rows to keep the metal-2 stubs of two rows apart ({sum(x['channel_strategy_mode'] != 'split' for x in stub)} by " + f"shifting a row, {sum(x['channel_strategy_mode'] == 'split' for x in stub)} by splitting a net into two trunks joined beyond the row ends) | " + f"{wt['stub_separation']} | {im['by_primary'].get('stub_separation', 0)} |", + f"| wider row that sets the width (shared cell wider) | {wt['wider_row']} | {im['by_primary'].get('wider_row', 0)} |", + f"| taller MOS rows | {wt['taller_mos_rows']} | {im['by_primary'].get('taller_mos_rows', 0)} |", "", + f"{im['assembly_only']} of {im['n']} increases come from routing and row assembly only ({im['tracks_and_stub_separation']} have both " + f"assembly terms). In the other {len(cell)} ({', '.join(sorted({x['case'] + ' ' + x['mode'] for x in cell}))}) the shared cell itself is " + f"wider: the gate straps that overlap on the bottom side move to the top, and a top strap's contact pad sits beyond the end " + f"of the active area, so the PMOS row grows by {-min(cell[0]['row_span_saving'].values()):.2f} um while the layout gets " + f"{-cell[0]['dH']:.2f} um lower.", ""] + dv = J("analysis/cost_validation_dev.json")["summary"]; dn = J("analysis/cost_validation_dev_no_channel.json")["summary"]; ho = J("analysis/cost_validation_heldout.json")["summary"] + o += ["## Plan-level cost rule", "", + "The rule estimates each candidate's width and height from its plans, the design rules and one unshared assembly per " + "case, without building the candidate (`selection/cost.py`).", "", + f"* Development sizes (sW1_sL1, sW1_sL1.5): sign of the area change correct for {dv['sign_correct']}/{dv['n_pairs']} pairs, " + f"{dn['sign_correct']}/{dn['n_pairs']} without the routing-channel term (`results/analysis/cost_validation_dev*.json`).", + f"* The ten held-out sizes, rule frozen before they were measured: {ho['sign_correct']}/{ho['n_pairs']} " + f"({pct(ho['sign_correct'] / ho['n_pairs'], 0)} %) (`results/analysis/cost_validation_heldout.json`).", ""] + sel = J("analysis/selection_summary.json")["summary"]; bm = sel["by_method"] + o += ["## Choosing a plan within the catalogue", "", f"Source: `results/analysis/selection_summary.json`. {sel['n_tasks_with_feasible']} tasks; every " + "catalogue plan was built and verified, and each method is replayed on the same records. Gap = area of the best passing " + "plan found after n full verifications over the best passing catalogue plan, minus 1 (topology-balanced mean). Minutes = " + "wall time per task, including the method's own geometry work.", "", + "| method | gap n = 1 | gap n = 4 | gap n = 16 | min at n = 1 | min at n = 16 |", "|---|---:|---:|---:|---:|---:|"] + for k, lab in (("baseline_independent", "unshared plan only"), ("fixed_mode", "fixed mode order"), ("share_most", "share most"), ("random", "random (10 seeds)"), + ("neighbourhood", "neighbourhood search"), ("geometry_first", "build all, then rank"), ("cost_rank", "cost rule")): + g = lambda n: (pct(bm[k][n]["gap_balanced_when_found"]) + " %") if bm[k][n]["gap_balanced_when_found"] is not None else "-" + o.append(f"| {lab} | {g('1')} | {g('4')} | {g('16')} | {bm[k]['1']['time_s_balanced'] / 60:.1f} | {bm[k]['16']['time_s_balanced'] / 60:.1f} |") + L = J("analysis/llm_summary.json")["summary"]; SA = J("analysis/scope_audit.json"); C = SA["same_task_comparison_model_tasks"] + o += ["", "## Language models on the same tasks", "", "Sources: `results/analysis/llm_summary.json`, `results/analysis/scope_audit.json`, " + "`results/analysis/llm_interface.json`, `results/analysis/agent_session_audit.json`. Protocol: `docs/MODELS.md`.", "", + "| model | sessions | proposals | EDA verifications | first program legal | built layouts passing every check |", "|---|---:|---:|---:|---:|---:|"] + for tag in ("openai_gpt-6.1-sol", "anthropic_claude-sonnet"): + s = L[tag] + o.append(f"| {MODEL_LABEL[tag]} | {s['sessions']} | {s['proposals']} | {s['eda_verifications']} | {pct(s['first_legal_rate'], 0)} % | " + f"{pct(s['auto_passed_rate_of_evaluated'])} % |") + o += ["", f"Models are not limited to the catalogue: in {SA['best_known_source'].get('model proposal', 0)} of {SA['task_sets']['model_tasks']} tasks " + "a model's layout is smaller than every catalogue plan. On these tasks every method is therefore measured against the best " + "layout known for the task (catalogue and every model proposal); gap in %, topology-balanced:", "", + "| method | after 1 | after 2 | after 4 | after 8 |", "|---|---:|---:|---:|---:|"] + for k, lab, unit in (("cost_rank", "cost rule (verifications)", "ver."), ("random", "random order (verifications)", "ver."), + ("openai_gpt-6.1-sol", "OpenAI model (proposals)", "prop."), ("anthropic_claude-sonnet", "Anthropic model (proposals)", "prop.")): + o.append(f"| {lab} | " + " | ".join(pct(C[k][f'{n} {unit}']['vs_best_known']) for n in (1, 2, 4, 8)) + " |") + o.append(f"| unshared layout | {pct(C['unshared reference']['vs_best_known'])} | | | |") + I = SA["interface_comparison"]; b = I["base-gLayout interface"]; s2 = I["sharing interface"] + au = J("analysis/agent_session_audit.json")["summary"]; mr = au["after_manual_review"] + oai = [x for x in J("analysis/llm_summary.json")["sessions"] if x["tag"].startswith("openai")] + o += ["", "**Interface comparison** (OpenAI model, same tasks, settings and budget). With an interface that offers only what base " + f"gLayout expresses per group, {b['sessions_equal_to_reference']} of {b['sessions']} sessions end at the area of the unshared " + f"layout (mean change {100 * b['vs_reference']:.2f} %); with the sharing interface the mean change is {100 * s2['vs_reference']:.1f} %. " + "The comparison measures what an interface lets a model express, not how well a model searches.", "", + f"**Isolation.** {sum(x['isolation_breach'] is False for x in oai)} of {len(oai)} OpenAI sessions contain no tool call in their " + f"event logs. Of the {au['sessions']} " + f"Anthropic agent sessions, {au['clean']} made only allowed tool calls, {au['in_folder_edit_sessions']} also edited their own " + f"proposal files with text tools, and {au['auto_flagged']} were flagged automatically; on manual review one was benign and one read " + f"the output file of its own backgrounded submit command (its own tool report); {mr['foreign_information_access']} sessions " + "accessed outside information.", ""] + pv = J("analysis/pvt.json")["comparison_vs_reference"]; ab = J("analysis/arrangement_bandwidth_C16.json") + drops = [1 - d["group0.arrangement=interleave"]["mean_f3db_MHz"] / d["group0.arrangement=block"]["mean_f3db_MHz"] for d in ab.values() + if d.get("group0.arrangement=block", {}).get("mean_f3db_MHz") and d.get("group0.arrangement=interleave", {}).get("mean_f3db_MHz")] + lab = {"combined": "named mode 'combined'", "best_evaluated": "best catalogue plan"} + o += ["## Electrical side and robustness", "", + f"* Resistor-loaded pair (C16): interleaving the input fingers lowers the bandwidth by {pct(min(drops), 0)}-{pct(max(drops), 0)} % against " + "block placement (`results/analysis/arrangement_bandwidth_C16.json`).", + "* Five corner, temperature and supply conditions, interconnect at nominal R+C, no Monte Carlo, against the nominal frozen " + "specifications (`results/analysis/pvt.json`), compared with the unshared reference of the same case: " + + "; ".join(f"{lab.get(role, role)}: {c.get('co_pass', 0)} joint passes, {c.get('co_fail', 0)} joint failures, " + f"{c.get('sharing_added_failure', 0)} failures added by sharing" for role, c in pv.items()) + ".", ""] + rc = J("analysis/review_coverage.json"); te = J("analysis/testbench_equivalence.json") + setlab = {"main_grid": "every main-grid layout", "reported": "every reported layout", "pvt_targets": "every PVT layout"} + o += ["## Visual review and reproducibility", "", + "* Blind visual review (`results/analysis/review_coverage.json`; protocol in `textbook_sharing/review/reviewer_guide.md`): " + + "; ".join(f"{setlab.get(k, k)}: {v['n']}, effective verdict " + ", ".join(f"{a} {n}" for a, n in v["group_effective"].items()) + for k, v in rc.items() if k != "all_records_effective") + + f". {rc['all_records_effective'].get('review_pending', 0)} selection-catalogue records outside the reported set were not reviewed.", + f"* The testbench generator in this repository reproduces the recorded decks of all {te['cases']} case folders apart from " + f"comment lines ({te['identical_without_comments']} of {te['cases']}; `results/analysis/testbench_equivalence.json`)."] + gp, dp = paths.ANALYSIS / "geometry_check.json", paths.ANALYSIS / "geometry_check_diagnosis.json" + if gp.exists(): + g = json.load(open(gp)); sm = g["summary"]; tot = sum(v["records"] for v in sm.values()); same = sum(v.get("hash_match", 0) for v in sm.values()) + names = {"grid": "main-grid layout", "selection": "selection candidate", "models": "model proposal"} + full = [names.get(k, k) for k, v in sm.items() if v.get("hash_match", 0) == v["records"]] + line = (f"* Geometry of every recorded layout rebuilt with this code (`results/analysis/geometry_check.json`): {same} of {tot} have the " + f"recorded geometry hash, including every {' and every '.join(full)}.") + if dp.exists() and tot > same: + d = json.load(open(dp)); rv = d["reverification"] + line += (f" The other {d['n']} ({d['description']}) differ only on layer {', '.join(d['layers'])} ({d['layer_names']}): the rebuild adds " + f"{d['added_um2'][0]:.2f} um^2 and removes nothing, and every bounding box is unchanged. A full re-verification of all {rv['n']} with " + f"this code gives the recorded status, area and stage results for " + f"{'every one of them' if rv['same_status_area_stages'] == rv['n'] else str(rv['same_status_area_stages'])}; post-layout measures differ by at most " + f"{rv['max_rel_measure_diff']:.1e} (relative) (`results/analysis/geometry_check_diagnosis.json`).") + o.append(line) + rp = sorted(glob.glob(str(paths.ANALYSIS / "repro_clean_*.json"))) + if rp: + r = json.load(open(rp[-1])); ok = sum(1 for x in r["runs"] if all(x["match"].values())) + worst = max((x["max_rel_measure_diff"] or 0.0) for x in r["runs"]) + o.append(f"* Clean-checkout rebuild of commit `{r['commit'][:12]}` (`results/analysis/{Path(rp[-1]).name}`): {ok} of " + f"{len(r['runs'])} layouts, built and verified from scratch, match the recorded geometry hash, area, status and every " + f"verification stage; the post-layout measures differ by at most {worst:.1e} (relative).") + return "\n".join(o) + "\n" + + +def main(): + DOCS.mkdir(parents=True, exist_ok=True) + (DOCS / "PARAMETER_SPACE.md").write_text(parameter_space()); (DOCS / "RESULTS.md").write_text(results()) + print("written docs/PARAMETER_SPACE.md, docs/RESULTS.md") + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/review_coverage.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/review_coverage.py new file mode 100644 index 00000000..42a6c59c --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/review_coverage.py @@ -0,0 +1,76 @@ +"""Visual-review coverage of the reported layouts. + +Effective verdict of a layout: the reviewer's verdict, where a 'suspicious' or 'fail' verdict counts as passed only when +it was resolved by objective checks (visual_resolution.outcome == 'resolved_ok'). Verdicts are taken over the +cell-name-independent geometry group, so a verdict reused from an identical layout counts. +Checked sets: every main-grid layout; the reported set (the best passing proposal of every model session, the best +passing plan and the named-mode plans of every selection task); the PVT targets; optional extra run folders. +usage: python -m textbook_sharing.analysis.review_coverage [--extra ] --out /analysis/review_coverage.json""" +import json, glob, argparse, collections +from pathlib import Path +from textbook_sharing.review.visual_review import groups, ROOTS +from textbook_sharing import paths + + +def eff(rec): + v = rec["visual"]["verdict"] + if v in ("suspicious", "fail"): + o = rec.get("visual_resolution", {}).get("outcome") + return "pass" if o == "resolved_ok" else ("confirmed_issue" if o else "unresolved_" + v) + return v + + +def reported_set(): + """Run folders of the layouts that are reported: best passing proposal per model session, best passing plan and + named-mode plans per selection task.""" + out = [] + for sd in glob.glob(str(paths.MODEL_RUNS / "*" / "*" / "r*")): + best = None + for f in glob.glob(sd + "/p*_report.json"): + r = json.load(open(f)) + if r.get("status") == "evaluated" and not r.get("duplicate_of") and r["run"]["primary_status"] == "auto_passed" and r["run"].get("area_um2"): + k = int(Path(f).name[1:].split("_")[0]) + if best is None or r["run"]["area_um2"] < best[0]: best = (r["run"]["area_um2"], f"{sd}/p{k}_run") + if best: out.append(best[1]) + for cat_f in glob.glob(str(paths.SELECTION_RUNS / "*" / "catalogue.json")): + td = Path(cat_f).parent; cat = json.load(open(cat_f)); feas = [] + for cid, e in cat["entries"].items(): + rp = td / cid / "result.json" + if not rp.exists(): continue + r = json.load(open(rp)) + if any(l.startswith("named:") for l in e.get("labels", [])): out.append(str(td / cid)) + if r.get("primary_status") == "auto_passed" and r.get("area_um2"): feas.append((r["area_um2"], str(td / cid))) + if feas: out.append(min(feas)[1]) + return sorted({str(Path(x).resolve()) for x in out}) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--extra", default=None); ap.add_argument("--out", default=str(paths.ANALYSIS / "review_coverage.json")); a = ap.parse_args() + g = groups(ROOTS); by_dir = {} + for k, recs in g.items(): + es = {eff(r) for _, r in recs} + ge = "pass" if "pass" in es and not (es & {"confirmed_issue", "unresolved_suspicious", "unresolved_fail"}) else sorted(es)[0] + for rp, r in recs: + by_dir[str(Path(rp).parent.parent.parent.resolve())] = (ge, eff(r)) + grid_root = str(paths.GRID_RUNS.resolve()) + "/" + sets = {"main_grid": sorted(d for d in by_dir if d.startswith(grid_root)), "reported": reported_set()} + pv = paths.ANALYSIS / "pvt.json" + if pv.exists(): + sets["pvt_targets"] = sorted({str(paths.resolve(t[2]).parent.resolve()) for t in json.load(open(pv))["targets"]}) + if a.extra: + sets["extra"] = sorted({str(paths.resolve(l.strip()).resolve()) for l in open(a.extra) if l.strip()}) + out = {} + for name, dirs in sets.items(): + c = collections.Counter(); bad = [] + for d in dirs: + ge = by_dir.get(d, ("no_record", None))[0]; c[ge] += 1 + if ge != "pass": bad.append([paths.rel(d), ge]) + out[name] = {"n": len(dirs), "group_effective": dict(c), "not_pass": bad[:50]} + out["all_records_effective"] = dict(collections.Counter(v[1] for v in by_dir.values())) + Path(a.out).parent.mkdir(parents=True, exist_ok=True) + json.dump(out, open(a.out, "w"), indent=1) + print(json.dumps({k: (v if k == "all_records_effective" else {"n": v["n"], "eff": v["group_effective"]}) for k, v in out.items()}, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/scope.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/scope.py new file mode 100644 index 00000000..35c891cf --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/scope.py @@ -0,0 +1,107 @@ +"""Scope audit of the comparisons (no new runs; reads the existing results). +1. Task sets: designed selection grid (6 topologies x 3 PDKs x 4 sizes), what drops out and why, the selection set, + the model-session set and the interface-comparison set. +2. Same-task comparison on the model-session tasks: every selection method after n verifications and every model + after n proposals, measured against (a) the best feasible candidate of the task's sampled catalogue and (b) the best + feasible layout known for the task (catalogue + every model proposal of every arm). The catalogue is a sample of + at most 64 plans, so a model can beat (a); (b) puts all methods on one reference. +3. Interface comparison: per arm, change vs the unshared reference and gap to the best known layout. +Topology-balanced means (mean over topologies of the mean over that topology's tasks; repetitions/seeds averaged +inside a task first). usage: python -m textbook_sharing.analysis.scope --out /analysis/scope_audit.json""" +import json, glob, argparse, statistics, collections +from pathlib import Path +from textbook_sharing import paths +SEL_TOPOS = ["C02", "C08", "C09", "C11", "C16", "C18"]; PDKS = ["sky130", "gf180", "ihp130"] +SEL_SIZES = ["sW1_sL1", "sW1_sL2", "sW2_sL1", "sW2_sL2"] +MAIN_TAGS = ["openai_gpt-6.1-sol", "anthropic_claude-sonnet"]; BASE_TAG = "openai_gpt-6.1-sol_baseiface" + + +def bal(vals): + """vals: {task: [values]} -> topology-balanced mean.""" + by = collections.defaultdict(list) + for t, v in vals.items(): + v = [x for x in v if x is not None] + if v: by[t.split("_")[0]].append(statistics.mean(v)) + return statistics.mean(statistics.mean(v) for v in by.values()) if by else None + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + from textbook_sharing.selection.strategies import evaluate_task, FIXED_ORDER + from textbook_sharing.analysis.models import ref_area, best_evaluated, session_rows + L = json.load(open(paths.LEDGER)) + diag = {d["case_id"]: d for d in L["diagnostic"]} + designed = [f"{c}_{p}_{s}" for c in SEL_TOPOS for p in PDKS for s in SEL_SIZES] + sel = sorted(Path(d).parent.name for d in glob.glob(str(paths.SELECTION_RUNS / "*/catalogue.json"))) + dropped = {t: (diag.get(t, {}).get("reason", "not formal") + (": " + diag[t]["detail"] if t in diag and diag[t].get("detail") else "")) for t in designed if t not in sel} + llm_tasks = sorted({Path(d).name for tag in MAIN_TAGS for d in glob.glob(str(paths.MODEL_RUNS / tag / "*")) if Path(d).is_dir()}) + if_tasks = sorted({Path(d).name for d in glob.glob(str(paths.MODEL_RUNS / BASE_TAG / "*")) if Path(d).is_dir()}) + sets = {"designed_selection": len(designed), "dropped": dropped, "selection": len(sel), "selection_topologies": sorted({t.split("_")[0] for t in sel}), + "model_tasks": len(llm_tasks), "model_tasks_rule": "selection tasks at sW = 2 (sL 1 and 2)", "model_tasks_ok": all(t in sel and "_sW2_" in t for t in llm_tasks), + "interface_tasks": len(if_tasks), "interface_tasks_rule": "model tasks at sW2_sL1", "interface_tasks_ok": all(t.endswith("sW2_sL1") and t in llm_tasks for t in if_tasks)} + # ---- sessions: best feasible area after k proposals + sess = collections.defaultdict(lambda: collections.defaultdict(list)) # tag -> task -> [ {k: area} ] + for tag in MAIN_TAGS + [BASE_TAG]: + for sd in sorted(glob.glob(str(paths.MODEL_RUNS / tag / "*" / "r*"))): + _, _, reps = session_rows(sd) + if not reps: continue + best = {}; cur = None + for i, r in enumerate(reps, 1): + if r.get("status") == "evaluated" and r["run"]["primary_status"] == "auto_passed" and r["run"].get("area_um2"): + cur = r["run"]["area_um2"] if cur is None else min(cur, r["run"]["area_um2"]) + if i in (1, 2, 4, 8): best[i] = cur + for k in (1, 2, 4, 8): best.setdefault(k, cur) + sess[tag][Path(sd).parent.name].append(best) + # ---- selection methods on the model tasks + meth = {} + for t in llm_tasks: + rows = evaluate_task(paths.SELECTION_RUNS / t, fixed_order=FIXED_ORDER) + for r in rows: + for n in ("1", "2", "4", "8", "16"): + meth.setdefault(r["method"], collections.defaultdict(lambda: collections.defaultdict(list)))[n][t].append(r["prefix"][n]["best_area"]) + best_cat = {t: best_evaluated(t)[0] for t in llm_tasks} + best_known = {} + for t in llm_tasks: + cands = [best_cat[t]] + [b[8] for tag in sess for b in sess[tag].get(t, []) if b.get(8)] + best_known[t] = min(c for c in cands if c) + src = {t: ("catalogue" if abs(best_known[t] - best_cat[t]) < 1e-9 else "model proposal") for t in llm_tasks} + who = {} + for t in llm_tasks: + if src[t] == "catalogue": continue + who[t] = sorted({tag for tag in sess for b in sess[tag].get(t, []) if b.get(8) and abs(b[8] - best_known[t]) < 1e-9}) + def gaps(area_by_task, ref): + return {t: [(x / ref[t] - 1) if x else None for x in v] for t, v in area_by_task.items()} + same = {} + for m, d in meth.items(): + same[m] = {f"{n} ver.": {"vs_catalogue_best": bal(gaps(d[n], best_cat)), "vs_best_known": bal(gaps(d[n], best_known))} for n in ("1", "2", "4", "8", "16")} + for tag in MAIN_TAGS: + same[tag] = {} + for k in (1, 2, 4, 8): + ab = {t: [b[k] for b in v] for t, v in sess[tag].items()} + same[tag][f"{k} prop."] = {"vs_catalogue_best": bal(gaps(ab, best_cat)), "vs_best_known": bal(gaps(ab, best_known)), + "sessions": sum(len(v) for v in ab.values())} + g8 = [b[8] / best_cat[t] - 1 for t, v in sess[tag].items() for b in v if b[8]] + same[tag]["sessions_below_catalogue_best"] = sum(g < -1e-9 for g in g8); same[tag]["sessions_equal"] = sum(abs(g) < 1e-9 for g in g8) + same[tag]["sessions_above"] = sum(g > 1e-9 for g in g8) + ref = {t: ref_area(t) for t in llm_tasks} + same["unshared reference"] = {"vs_catalogue_best": bal({t: [ref[t] / best_cat[t] - 1] for t in llm_tasks}), "vs_best_known": bal({t: [ref[t] / best_known[t] - 1] for t in llm_tasks})} + # ---- interface comparison (14 tasks) + itf = {} + for arm, tag in (("sharing interface", MAIN_TAGS[0]), ("base-gLayout interface", BASE_TAG)): + ab = {t: [b[8] for b in sess[tag][t]] for t in if_tasks} + itf[arm] = {"sessions": sum(len(v) for v in ab.values()), "vs_reference": bal({t: [(x / ref[t] - 1) if x else None for x in v] for t, v in ab.items()}), + "vs_catalogue_best": bal(gaps(ab, best_cat)), "vs_best_known": bal(gaps(ab, best_known)), + "sessions_equal_to_reference": sum(1 for t, v in ab.items() for x in v if x and abs(x / ref[t] - 1) < 1e-3)} + itf["unshared reference"] = {"vs_catalogue_best": bal({t: [ref[t] / best_cat[t] - 1] for t in if_tasks}), "vs_best_known": bal({t: [ref[t] / best_known[t] - 1] for t in if_tasks})} + out = {"task_sets": sets, "model_tasks": llm_tasks, "interface_tasks": if_tasks, "best_known_source": dict(collections.Counter(src.values())), + "best_known_found_by": who, + "best_known_by_task": {t: {"catalogue_best": best_cat[t], "best_known": best_known[t], "source": src[t], "reference": ref[t]} for t in llm_tasks}, + "same_task_comparison_model_tasks": same, "interface_comparison": itf, + "note": "selection methods choose only among the <=64 sampled catalogue plans; models may propose any legal plan"} + json.dump(out, open(a.out, "w"), indent=1) + print(json.dumps({k: out[k] for k in ("task_sets", "best_known_source", "interface_comparison")}, indent=1)) + for m, d in same.items(): print(m, json.dumps(d)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/analysis/selection.py b/benchmarks/textbook_sharing/textbook_sharing/analysis/selection.py new file mode 100644 index 00000000..c1be4dc8 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/analysis/selection.py @@ -0,0 +1,104 @@ +"""Aggregate the plan-selection experiment (offline replay on fully verified catalogues). +Per task and method: best feasible area after n verifications (n = 1, 2, 4, 8, 16), gap to the best feasible candidate +of the evaluated set ("best of the evaluated set", not a global optimum), found/not found, time. Random = mean over 10 +seeds. Aggregates: (a) per-task paired comparison vs the cost ranking, (b) topology-balanced mean (mean over +topologies of the mean over that topology's tasks), (c) 95 % intervals by cluster bootstrap over topologies (B = 2000, +seed 20261011). Tasks whose evaluated set has no feasible candidate are reported separately. +usage: python -m textbook_sharing.analysis.selection --out /analysis/selection_summary.json""" +import json, glob, random, statistics, argparse, collections +from pathlib import Path +from textbook_sharing.selection.strategies import evaluate_task, PREFIXES, FIXED_ORDER +from textbook_sharing import paths + +METHODS = ["baseline_independent", "fixed_mode", "share_most", "random", "neighbourhood", "cost_rank", "geometry_first"] + + +def per_task_rows(td): + rows = evaluate_task(td, fixed_order=FIXED_ORDER) + out = {} + for m in METHODS: + rs = [r for r in rows if r["method"] == m] + if not rs: continue + d = {} + for n in PREFIXES: + ps = [r["prefix"][str(n)] for r in rs] + found = [p["best_area"] is not None for p in ps] + gaps = [p["gap"] for p in ps if p["gap"] is not None] + d[str(n)] = {"found_rate": sum(found) / len(found), "gap_mean_found": statistics.mean(gaps) if gaps else None, + "gap_or_inf": statistics.mean([p["gap"] if p["gap"] is not None else float("inf") for p in ps]), + "time_s": statistics.mean(p["time_s"] for p in ps)} + out[m] = {"prefix": d, "precompute_s": statistics.mean(r["precompute_s"] for r in rs), "n_runs": len(rs), + "first_feasible_query": [r["first_feasible_query"] for r in rs]} + r0 = rows[0] + return {"task": Path(td).name, "n_evaluated": r0["n_evaluated"], "n_feasible": r0["n_feasible"], "best_evaluated": r0["best_evaluated"], "methods": out} + + +def topo(task): + return task.split("_")[0] + + +def balanced(vals_by_task, tasks): + by = collections.defaultdict(list) + for t in tasks: + v = vals_by_task.get(t) + if v is not None: by[topo(t)].append(v) + means = [statistics.mean(v) for v in by.values() if v] + return statistics.mean(means) if means else None, by + + +def boot(vals_by_task, tasks, B=2000, seed=20261011): + _, by = balanced(vals_by_task, tasks); keys = sorted(by); r = random.Random(seed); est = [] + for _ in range(B): + samp = [r.choice(keys) for _ in keys] + est.append(statistics.mean(statistics.mean(by[k]) for k in samp)) + est.sort(); return [est[int(0.025 * B)], est[int(0.975 * B) - 1]] + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); a = ap.parse_args() + tds = sorted(d for d in glob.glob(str(paths.SELECTION_RUNS / "*")) if (Path(d) / "catalogue.json").exists()) + tasks = []; incomplete = [] + for td in tds: + cat = json.load(open(Path(td) / "catalogue.json")) + done = sum(1 for c in cat["entries"] if (Path(td) / c / "result.json").exists()) + if done < len(cat["entries"]): incomplete.append({"task": Path(td).name, "done": done, "n": len(cat["entries"])}); continue + tasks.append(per_task_rows(td)) + feas = [t for t in tasks if t["n_feasible"] > 0]; nofeas = [t["task"] for t in tasks if t["n_feasible"] == 0] + names = [t["task"] for t in feas] + summ = {"n_tasks_complete": len(tasks), "n_tasks_with_feasible": len(feas), "tasks_without_feasible": nofeas, "incomplete": incomplete, + "topologies": sorted({topo(t) for t in names}), "fixed_order": FIXED_ORDER, "by_method": {}} + for m in METHODS: + mm = {} + for n in PREFIXES: + fr = {t["task"]: t["methods"][m]["prefix"][str(n)]["found_rate"] for t in feas if m in t["methods"]} + gp = {t["task"]: t["methods"][m]["prefix"][str(n)]["gap_mean_found"] for t in feas if m in t["methods"] and t["methods"][m]["prefix"][str(n)]["gap_mean_found"] is not None} + tm = {t["task"]: t["methods"][m]["prefix"][str(n)]["time_s"] for t in feas if m in t["methods"]} + zero = {t["task"]: 1.0 if (t["methods"][m]["prefix"][str(n)]["gap_mean_found"] is not None and t["methods"][m]["prefix"][str(n)]["gap_mean_found"] < 1e-9) else 0.0 for t in feas if m in t["methods"]} + mm[str(n)] = {"found_rate_balanced": balanced(fr, names)[0], "found_rate_ci": boot(fr, names), + "gap_balanced_when_found": balanced(gp, names)[0], "gap_ci": boot(gp, list(gp)) if gp else None, + "hit_best_rate_balanced": balanced(zero, names)[0], "time_s_balanced": balanced(tm, names)[0], "n_tasks": len(fr)} + summ["by_method"][m] = mm + # paired comparison vs cost_rank at each budget: fraction of tasks where the method's best area is better / equal / worse + pair = {} + for m in METHODS: + if m == "cost_rank": continue + pm = {} + for n in PREFIXES: + w = e = l = 0 + for t in feas: + a_ = t["methods"].get(m, {}).get("prefix", {}).get(str(n), {}).get("gap_or_inf"); b_ = t["methods"]["cost_rank"]["prefix"][str(n)]["gap_or_inf"] + if a_ is None: continue + if abs(a_ - b_) < 1e-9 or (a_ == b_): e += 1 + elif a_ < b_: w += 1 + else: l += 1 + pm[str(n)] = {"better": w, "equal": e, "worse": l} + pair[m] = pm + summ["paired_vs_cost_rank"] = pair + json.dump({"summary": summ, "tasks": tasks}, open(a.out, "w"), indent=1) + print(json.dumps({k: summ[k] for k in ("n_tasks_complete", "n_tasks_with_feasible", "tasks_without_feasible", "incomplete")}, indent=1)[:1500]) + for m in METHODS: + print(m, {n: (round(v["found_rate_balanced"] or 0, 3), None if v["gap_balanced_when_found"] is None else round(v["gap_balanced_when_found"], 4), round(v["time_s_balanced"] or 0)) for n, v in summ["by_method"][m].items()}) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/assembly/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/assembly/__init__.py new file mode 100644 index 00000000..92bcc976 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/assembly/__init__.py @@ -0,0 +1,14 @@ +"""textbook_sharing.assembly: harness-provided row/channel assembly for small analog cells. + +Used identically by the baseline (upstream gLayout primitives) and the extended +(glayout.sharing groups) tracks. It knows nothing about sharing: it takes +*pin cells* (a layout component plus a list of net-labelled pins on its top or +bottom edge), stacks them in polarity-homogeneous rows, connects equal nets +with met3 trunks in the channels between rows via met2 stubs, adds tap strips, +row-level well/implant blankets and port labels, and reports geometry +statistics (bounding box, wire length, via counts). +""" +from .pincell import PinCell, Pin +from .engine import RowSpec, assemble, AssemblyError +from glayout.sharing.rules import rules_for, GroupRules +__all__ = ["PinCell", "Pin", "RowSpec", "assemble", "AssemblyError", "rules_for", "GroupRules"] diff --git a/benchmarks/textbook_sharing/textbook_sharing/assembly/adapters.py b/benchmarks/textbook_sharing/textbook_sharing/assembly/adapters.py new file mode 100644 index 00000000..3ad4a7be --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/assembly/adapters.py @@ -0,0 +1,20 @@ +"""Adapters that turn layout components into textbook_sharing.assembly PinCells.""" +from __future__ import annotations +from .pincell import PinCell, Pin + + +def from_group_result(res, name: str, polarity: str, body_net: str) -> PinCell: + """glayout.sharing GroupResult -> PinCell (pins are already met2 pads on the top/bottom edges).""" + comp = res.component + meta = comp.info["pin_meta"] + pins = [] + for pname, m in meta.items(): + pins.append(Pin(pname, m["net"], m["x"], m["y"], m["side"], m["width"], tuple(comp.ports[pname].layer), m.get("terminals", []))) + bb = res.geometry_stats["bbox"] + W = res.geometry_stats["unit_width"] + # active extent: from the outermost diffusion pins when the group does not report it (y spans [0, W]) + act_x0 = min(m["x"] for m in meta.values() if m["side"] == "top" and "node" in m) - 0.5 + act_x1 = max(m["x"] for m in meta.values() if m["side"] == "top" and "node" in m) + 0.5 + active_bbox = res.geometry_stats.get("active_bbox", (act_x0, 0.0, act_x1, W)) + return PinCell(name, comp, pins, polarity, tuple(bb), active_bbox=active_bbox, body_net=body_net, + info={"group_stats": res.geometry_stats, "evidence": res.physical_sharing_evidence, "device_map": res.device_map, "applied_plan": res.applied_plan}) diff --git a/benchmarks/textbook_sharing/textbook_sharing/assembly/engine.py b/benchmarks/textbook_sharing/textbook_sharing/assembly/engine.py new file mode 100644 index 00000000..73cdd109 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/assembly/engine.py @@ -0,0 +1,625 @@ +"""Row/channel assembly engine (see package docstring).""" +from __future__ import annotations +import math +from dataclasses import dataclass +from typing import Optional +from glayout.sharing.rules import rules_for, snap, snap_up, GRID + + +class AssemblyError(RuntimeError): + pass + + +@dataclass +class RowSpec: + cells: list # list[PinCell], left to right + polarity: str # 'n', 'p', 'passive' + flip: bool = False # mirror vertically (pins that were 'top' face down) + body_net: Optional[str] = None # net for the tap strips of this row + taps: bool = True + gap: Optional[float] = None # override cell gap + + +@dataclass +class _PlacedPin: + net: str; x: float; y: float; width: float; row: int; channel: int; name: str; cell: str; key: str = "" + + def k(self): + return self.key or self.net + + +class _Rects: + def __init__(self): + self.r = {} + def add(self, layer, x0, y0, x1, y1): + if layer is None: return + if x1 < x0: x0, x1 = x1, x0 + if y1 < y0: y0, y1 = y1, y0 + self.r.setdefault(tuple(layer), []).append((snap(x0), snap(y0), snap(x1), snap(y1))) + + +def _flip_component(comp, y0, y1): + """Return a mirrored copy (y -> y0+y1-y) of a component via a reference.""" + return comp + + +def assemble(pdk, rows: list, ports: list, name: str = "dut", labels: bool = True, extra_nets_order: Optional[list] = None, + channel_margin: Optional[float] = None, port_layer: str = "met3") -> dict: + """Channel rule (identical for every sharing mode): assemble with the 'shared' channel strategy (one trunk per + net and channel; cross-row stub conflicts are resolved by shifting the upper row) and, when some net is fed from both + rows of a channel, also with the 'split' strategy (such a net gets one trunk for the lower-row stubs and one for the + upper-row stubs, joined by a met2 jumper beyond the pins, so lower and upper stubs never overlap and no row shift is + needed). The result with the smaller bounding-box area is returned (ties: shared); both areas are recorded.""" + trials = {} + try: + trials["shared"] = _assemble(pdk, rows, ports, name + "__trial_shared", labels, extra_nets_order, channel_margin, port_layer, split_shared=False) + except AssemblyError as e: + trials["shared_error"] = repr(e) + if any(_cross_fed(rows)): + try: + trials["split"] = _assemble(pdk, rows, ports, name + "__trial_split", labels, extra_nets_order, channel_margin, port_layer, split_shared=True) + except AssemblyError as e: + trials["split_error"] = repr(e) + cands = [(trials[k]["stats"]["area_um2"], 0 if k == "shared" else 1, k) for k in ("shared", "split") if k in trials] + if not cands: + raise AssemblyError(f"both channel strategies failed: {trials}") + best = min(cands)[2]; out = trials[best] + # trials are built under distinct internal cell names (no registry collision); the kept one gets the requested name + comp = out["component"] + if hasattr(comp, "unlock"): comp.unlock() + comp.name = name + if comp.name != name: + raise AssemblyError(f"could not rename assembled cell to {name!r} (got {comp.name!r})") + out["stats"]["channel_strategy"] = best + out["stats"]["channel_strategy_trials"] = {k: (v["stats"]["area_um2"] if isinstance(v, dict) else v) for k, v in trials.items()} + out["component"].info["assembly_stats"] = out["stats"] + return out + + +def _cross_fed(rows): + """yield True for every (channel, net) that receives pins from both the row below and the row above.""" + feed = {} + for ri, row in enumerate(rows): + for c in row.cells: + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + feed.setdefault((ch, p.net), set()).add("lower" if ch == ri + 1 else "upper") + for v in feed.values(): + yield v == {"lower", "upper"} + + +def _channel_net_sources(rows) -> dict: + """{"cells": {cell_name: {channel: [nets]}}, "taps": {channel: [nets]}} for the row/flip structure of `rows`.""" + cells = {}; taps = {} + for ri, row in enumerate(rows): + for c in row.cells: + d = cells.setdefault(c.name, {}) + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + d.setdefault(str(ch), set()).add(p.net) + if row.taps and row.body_net: + ch = ri + 1 if not row.flip else ri + taps.setdefault(str(ch), set()).add(row.body_net) + return {"cells": {k: {ch: sorted(v) for ch, v in d.items()} for k, d in cells.items()}, + "taps": {ch: sorted(v) for ch, v in taps.items()}, + "row_of_cell": {c.name: ri for ri, row in enumerate(rows) for c in row.cells}, + "row_flip": [bool(row.flip) for row in rows]} + + +def _assemble(pdk, rows: list, ports: list, name: str = "dut", labels: bool = True, extra_nets_order: Optional[list] = None, + channel_margin: Optional[float] = None, port_layer: str = "met3", split_shared: bool = False) -> dict: + """Place rows bottom-to-top, route nets through channels, add taps/blankets/labels. + Returns {"component", "stats", "pin_map", "trunks", ...}.""" + from glayout.backend import Component + R = rules_for(pdk); lay = R.layers + comp = Component(name + "_hier") + rects = _Rects() + trunk_w = snap_up(max(R.m3_w, R.via2_w + 2 * R.m3_enc_via2, R.sq_from_area(R.m3_area_min))) + track_pitch = snap_up(trunk_w + R.m3_sep) + via2_m2_pad = snap_up(max(R.m2_w, R.via2_w + 2 * R.m2_enc_via2)) + stub_w = snap_up(R.m2_w) + ch_margin = channel_margin if channel_margin is not None else snap_up(max(R.m2_sep, R.m3_sep) + via2_m2_pad / 2 + R.m2_sep) + tap_w = snap_up(R.cont_w + 2 * R.act_enc_cont_tap) + nrows = len(rows) + + # ---------- 1. place cells in rows (x), compute row heights ---------- + placed = [] # per row: list of (cell, x_offset, y_offset, flipped) + row_dims = [] + for ri, row in enumerate(rows): + gap = row.gap if row.gap is not None else snap_up(max(R.act_sep, R.poly_sep, R.m1_sep, R.m2_sep, R.imp_sep if row.polarity == "p" else 0.0) + 0.1) + x = 0.0; items = [] + ymin = min(c.bbox[1] for c in row.cells); ymax = max(c.bbox[3] for c in row.cells) + for ci, c in enumerate(row.cells): + items.append((c, snap(x - c.bbox[0]))) + x = snap(x + (c.bbox[2] - c.bbox[0]) + gap) + width = snap(x - gap) + # MOS rows carry a horizontal tie strip on their gate side (cell-local bottom): reserve its height + if row.taps and row.body_net and row.polarity in ("n", "p"): + ymin = snap(ymin - snap_up(max(R.tap_act_sep, R.pimp_to_nact + R.pimp_enc_act) + tap_w + 0.1)) + placed.append(items); row_dims.append((width, ymin, ymax)) + + # ---------- 2. determine channel nets ---------- + # channel c lies between row c-1 (below) and row c (above); c in 0..nrows + chan_nets = [dict() for _ in range(nrows + 1)] # channel -> net -> list of pins (filled after y placement) + pin_channel = {} + for ri, row in enumerate(rows): + for c in row.cells: + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + pin_channel[(ri, c.name, p.name)] = ch + chan_nets[ch].setdefault(p.net, []) + if row.taps and row.body_net: + ch = ri + 1 if not row.flip else ri + chan_nets[ch].setdefault(row.body_net, []) + # track order: deterministic by first appearance in the port list, then alphabetic + order_hint = {n: i for i, n in enumerate(list(ports) + list(extra_nets_order or []))} + # which rows feed each (channel, net): lower row = ch-1, upper row = ch + feed = {} + for ri, row in enumerate(rows): + for c in row.cells: + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + feed.setdefault((ch, p.net), set()).add("lower" if ch == ri + 1 else "upper") + if row.taps and row.body_net: + ch = ri + 1 if not row.flip else ri + feed.setdefault((ch, row.body_net), set()).add("lower" if ch == ri + 1 else "upper") + # ---- split channel strategy: trunk entities keyed per (net, feeding side) for nets fed from both rows ---- + split_set = {k for k, v in feed.items() if v == {"lower", "upper"}} if split_shared else set() + def K(ch, net, ri): + if (ch, net) in split_set: + return f"{net}|{'L' if ch == ri + 1 else 'U'}" + return net + def ORIG(k): + return k.split("|")[0] + if split_set: + chan_nets = [dict() for _ in range(nrows + 1)]; feed2 = {} + for ri, row in enumerate(rows): + for c in row.cells: + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + k = K(ch, p.net, ri); chan_nets[ch].setdefault(k, []) + feed2.setdefault((ch, k), set()).add("lower" if ch == ri + 1 else "upper") + if row.taps and row.body_net: + ch = ri + 1 if not row.flip else ri + k = K(ch, row.body_net, ri); chan_nets[ch].setdefault(k, []) + feed2.setdefault((ch, k), set()).add("lower" if ch == ri + 1 else "upper") + feed = feed2 + def band(ch, n): + f = feed.get((ch, n), set()) + if f == {"lower"}: return 0 + if f == {"upper"}: return 2 + return 1 + # x-extent of each (channel, net) trunk, used to pack non-overlapping trunks on one track. + # Extents depend on the final row x shifts, which depend on channel heights (track counts): iterate to a fixed point. + def compute_net_x(shifts): + nx = {} + for ri, row in enumerate(rows): + for c, xoff in placed[ri]: + for p in c.pins: + side = p.side if not row.flip else ("bottom" if p.side == "top" else "top") + ch = ri + 1 if side == "top" else ri + gx = shifts[ri] + xoff + p.x + kk = K(ch, p.net, ri) + lo, hi = nx.get((ch, kk), (1e9, -1e9)) + nx[(ch, kk)] = (min(lo, gx), max(hi, gx)) + return nx + + def pack_tracks(net_x): + multi_hint = {} + for (ch, n), _ in net_x.items(): + multi_hint.setdefault(ORIG(n), set()).add((ch, n)) + for ch in range(nrows + 1): + for n in chan_nets[ch]: + multi_hint.setdefault(ORIG(n), set()).add((ch, n)) + chan_tracks = []; chan_ntracks = []; chan_ivs = [] + for ch in range(nrows + 1): + nets = sorted(chan_nets[ch].keys(), key=lambda n: (band(ch, n), order_hint.get(n, 10 ** 6), n)) + tracks = {}; occ = [] + for n in nets: + lo, hi = net_x.get((ch, n), (0.0, 0.0)) + if len(multi_hint.get(ORIG(n), ())) > 1: + hi = 1e9 # reaches the riser on the right + if (ch - 1 >= 0 and ORIG(n) == rows[ch - 1].body_net) or (ch < nrows and ORIG(n) == rows[ch].body_net): + lo, hi = -1e9, 1e9 # tap strips sit at both ends of the row + lo -= trunk_w + R.m3_sep; hi += trunk_w + R.m3_sep + t = None + for ti, iv in enumerate(occ): + if iv["band"] != band(ch, n): continue + if all(hi < a or lo > b for a, b in iv["ivs"]): + t = ti; break + if t is None: + occ.append({"band": band(ch, n), "ivs": []}); t = len(occ) - 1 + occ[t]["ivs"].append((lo, hi)); tracks[n] = t + chan_tracks.append(tracks); chan_ntracks.append(len(occ)); chan_ivs.append(occ) + return chan_tracks, chan_ntracks + + def tracks_valid(net_x, chan_tracks): + """No two nets on one track may overlap in x (with spacing margin).""" + for ch in range(nrows + 1): + per = {} + for n, t in chan_tracks[ch].items(): + lo, hi = net_x.get((ch, n), (0.0, 0.0)) + if (ch - 1 >= 0 and ORIG(n) == rows[ch - 1].body_net) or (ch < nrows and ORIG(n) == rows[ch].body_net): lo, hi = -1e9, 1e9 + per.setdefault(t, []).append((lo - trunk_w - R.m3_sep, hi + trunk_w + R.m3_sep, n)) + for t, ivs in per.items(): + for i in range(len(ivs)): + for j in range(i + 1, len(ivs)): + a, b = ivs[i], ivs[j] + if not (a[1] < b[0] or b[1] < a[0]): return False + return True + + shifts0 = [0.0] * nrows + net_x = compute_net_x(shifts0) + chan_tracks, chan_ntracks = pack_tracks(net_x) + chan_height = [ (chan_ntracks[ch] * track_pitch + 2 * ch_margin) if chan_tracks[ch] else 0.0 for ch in range(nrows + 1)] + for _pass in range(4): + # ---------- 3. vertical placement of rows and channels ---------- + y = 0.0 + chan_y0 = []; row_y = [] + for ri in range(nrows): + chan_y0.append(y); y = snap(y + chan_height[ri]) + width, ymin, ymax = row_dims[ri] + row_y.append(y) # row local y=ymin maps to row_y + y = snap(y + (ymax - ymin)) + chan_y0.append(y); y = snap(y + chan_height[nrows]) + + # tap strips: positions at the row ends + tap_gap_n = snap_up(max(R.tap_act_sep, R.pimp_to_nact + R.pimp_enc_act, R.nimp_enc_act + R.imp_sep * 0)) # p+ tap next to n+ active + tap_gap_p = snap_up(max(R.tap_act_sep, max(R.pimp_enc_act, R.pimp_enc_gate) + R.pimp_to_ntap)) # n+ tap next to p+ active (implant blanket to tap) + row_x_shift = [0.0] * nrows + tap_extent = {} + for ri, row in enumerate(rows): + if row.taps and row.body_net and row.polarity in ("n", "p"): + tg = tap_gap_n if row.polarity == "n" else tap_gap_p + tap_extent[ri] = snap_up(tg + tap_w + max(R.m1_sep, 0.1)) + else: + tap_extent[ri] = 0.0 + # centre rows horizontally relative to the widest (keeps things compact); taps add to the left of each row + max_w = max(row_dims[ri][0] + 2 * tap_extent[ri] for ri in range(nrows)) + for ri in range(nrows): + row_x_shift[ri] = snap((max_w - (row_dims[ri][0] + 2 * tap_extent[ri])) / 2 + tap_extent[ri]) + + # ---------- 4. collect pins in global coordinates ---------- + def pin_global(ri, c, xoff, p): + row = rows[ri]; width, ymin, ymax = row_dims[ri] + gx = snap(row_x_shift[ri] + xoff + p.x) + if not row.flip: + gy = snap(row_y[ri] + (p.y - ymin)) + side = p.side + else: + gy = snap(row_y[ri] + (ymax - p.y)) + side = "bottom" if p.side == "top" else "top" + return gx, gy, side + + pins_g = [] + for ri, items in enumerate(placed): + for c, xoff in items: + for p in c.pins: + gx, gy, side = pin_global(ri, c, xoff, p) + ch = ri + 1 if side == "top" else ri + pins_g.append(_PlacedPin(p.net, gx, gy, p.width, ri, ch, p.name, c.name, K(ch, p.net, ri))) + + # a via2 pad of one net next to the stub of another net (pads of different nets never share a track) + min_dx = snap_up(max(stub_w, via2_m2_pad, R.via1_pad_w()) / 2 + stub_w / 2 + R.m2_sep) + # ---------- 4b. tap strips: compute pin positions (row-relative) before conflict resolution ---------- + tap_specs = [] # dicts with row-relative geometry; drawn after row shifts are final + for ri, row in enumerate(rows): + if not (row.taps and row.body_net and row.polarity in ("n", "p")): continue + width, ymin, ymax = row_dims[ri] + tg = tap_gap_n if row.polarity == "n" else tap_gap_p + acts = [c.active_bbox or c.bbox for c, _ in placed[ri]] + ay0 = min(a[1] for a in acts); ay1 = max(a[3] for a in acts) + if not row.flip: + gy0 = snap(row_y[ri] + (ay0 - ymin)); gy1 = snap(row_y[ri] + (ay1 - ymin)) + else: + gy0 = snap(row_y[ri] + (ymax - ay1)); gy1 = snap(row_y[ri] + (ay0 - ymin) * 0 + (ymax - ay0)) + # minimum tap length for active min area, centred on the row active span + span = gy1 - gy0 + need = snap_up(max(span, R.act_area_min / tap_w if tap_w > 0 else 0.0, R.act_w_min)) + if need > span: + ext = snap_up((need - span) / 2); gy0 = snap(gy0 - ext); gy1 = snap(gy1 + ext) + rx0_act = min((c.active_bbox or c.bbox)[0] + xo for c, xo in placed[ri]) + rx1_act = max((c.active_bbox or c.bbox)[2] + xo for c, xo in placed[ri]) + ch = ri + 1 if not row.flip else ri + pad = R.via1_pad_w() + row_pins_x = [p.x + xo for c, xo in placed[ri] for p in c.pins] + tap_clear = snap_up(max(min_dx, max(p.width for c, _ in placed[ri] for p in c.pins) / 2 + pad / 2 + R.m2_sep)) + # the cell bbox may extend beyond the active (gate pads / risers): keep metal spacing from it as well + rx0_bb = min(c.bbox[0] + xo for c, xo in placed[ri]); rx1_bb = max(c.bbox[2] + xo for c, xo in placed[ri]) + bb_clear = snap_up(max(R.m1_sep, R.m2_sep, R.act_sep) + tap_w / 2 + 0.05) + rxc_L = min(snap(rx0_act - tg - tap_w / 2), snap(min(row_pins_x) - tap_clear), snap(rx0_bb - bb_clear)) + rxc_R = max(snap(rx1_act + tg + tap_w / 2), snap(max(row_pins_x) + tap_clear), snap(rx1_bb + bb_clear)) + for side, rxc in (("L", rxc_L), ("R", rxc_R)): + pin_y = snap(row_y[ri] + (ymax - ymin)) if ch == ri + 1 else snap(row_y[ri]) + vy = snap(pin_y - pad / 2) if ch == ri + 1 else snap(pin_y + pad / 2) + edge_y = snap(vy + pad / 2) if ch == ri + 1 else snap(vy - pad / 2) + pp = _PlacedPin(row.body_net, snap(row_x_shift[ri] + rxc), edge_y, pad, ri, ch, f"tap{side}", f"row{ri}", K(ch, row.body_net, ri)) + pins_g.append(pp) + tap_specs.append({"row": ri, "side": side, "rxc": rxc, "gy0": gy0, "gy1": gy1, "vy": vy, "pin_y": pin_y, "ch": ch, "pin": pp, + "rx0_act": rx0_act, "rx1_act": rx1_act, "tg": tg}) + + # ---------- 5. stub conflict check and row shifting (upper rows shift right) ---------- + def trunk_y(ch, net): + return snap(chan_y0[ch] + ch_margin + chan_tracks[ch][net] * track_pitch + trunk_w / 2) + def stub_span(pp): + ty = trunk_y(pp.channel, pp.k()) + return (min(pp.y, ty), max(pp.y, ty)) + def conflicts_for(pins): + out = [] + for i in range(len(pins)): + for j in range(i + 1, len(pins)): + a, b = pins[i], pins[j] + if a.channel != b.channel: continue + if a.net == b.net and a.k() != b.k(): + continue # split entities of one net: lower stub ends below the upper trunk entity, no overlap + if a.net == b.net: + # same net: vias on the same trunk must either coincide exactly or keep via spacing + dx = abs(a.x - b.x) + if dx > 1e-9 and dx + 1e-9 < R.via2_w + R.via2_sep: + out.append((a, b)) + continue + if abs(a.x - b.x) + 1e-9 >= min_dx: continue + sa, sb = stub_span(a), stub_span(b) + if sa[0] <= sb[1] + R.m2_sep and sb[0] <= sa[1] + R.m2_sep: + out.append((a, b)) + return out + # same-row conflicts cannot be fixed by shifting rows + for a, b in conflicts_for(pins_g): + if a.row == b.row: + raise AssemblyError(f"stub conflict inside row {a.row} between {a.cell}.{a.name} ({a.net}) and {b.cell}.{b.name} ({b.net}) at x={a.x},{b.x}") + # resolve cross-row conflicts row by row (from row 1 upwards) with the smallest |shift| that clears them + for ri in range(1, nrows): + lower = [pp for pp in pins_g if pp.row < ri]; mine = [pp for pp in pins_g if pp.row == ri] + def ok(shift): + moved = [_PlacedPin(pp.net, snap(pp.x + shift), pp.y, pp.width, pp.row, pp.channel, pp.name, pp.cell, pp.key) for pp in mine] + return not any(a.row != b.row for a, b in conflicts_for(lower + moved)) + chosen = None + step = 2 * GRID + span = max(8.0, sum(row_dims[r][0] for r in range(nrows)) + 4.0) + for k in range(0, int(span / step)): + for sgn in ((1,) if k == 0 else (1, -1)): + sh = snap(sgn * k * step) + if ok(sh): chosen = sh; break + if chosen is not None: break + if chosen is None: + raise AssemblyError(f"could not resolve stub conflicts for row {ri} by shifting") + if chosen != 0.0: + for pp in pins_g: + if pp.row == ri: pp.x = snap(pp.x + chosen) + row_x_shift[ri] = snap(row_x_shift[ri] + chosen) + # keep everything at x >= 0 + xmin_all = min(min(row_x_shift[ri] + min(c.bbox[0] + xo for c, xo in placed[ri]) for ri in range(nrows)), min(pp.x - pp.width for pp in pins_g)) + if xmin_all < 0: + d = snap_up(-xmin_all) + for pp in pins_g: pp.x = snap(pp.x + d) + for ri in range(nrows): row_x_shift[ri] = snap(row_x_shift[ri] + d) + + # verify the packed tracks against the final x shifts; repack and re-place when they overlap + net_x = compute_net_x(row_x_shift) + if tracks_valid(net_x, chan_tracks): + break + chan_tracks, chan_ntracks = pack_tracks(net_x) + chan_height = [ (chan_ntracks[ch] * track_pitch + 2 * ch_margin) if chan_tracks[ch] else 0.0 for ch in range(nrows + 1)] + else: + raise AssemblyError("track packing did not converge") + # ---------- 6. place cell geometry ---------- + for ri, items in enumerate(placed): + row = rows[ri]; width, ymin, ymax = row_dims[ri] + for c, xoff in items: + ref = comp << c.component + if row.flip: + ref.mirror_y() if hasattr(ref, "mirror_y") else ref.mirror((0, 0), (1, 0)) + ref.move((snap(row_x_shift[ri] + xoff), snap(row_y[ri] + ymax))) + else: + ref.move((snap(row_x_shift[ri] + xoff), snap(row_y[ri] - ymin))) + + # ---------- 7. trunks, stubs, vias ---------- + for pp in pins_g: + if not pp.name.startswith("tap"): + chan_nets[pp.channel].setdefault(pp.k(), []).append(pp) + tap_records = [] + for ts in tap_specs: + ri = ts["row"]; row = rows[ri]; pp = ts["pin"] + xc = snap(row_x_shift[ri] + ts["rxc"]); pp.x = xc + ty0, ty1 = ts["gy0"], ts["gy1"]; vy = ts["vy"]; pin_y = ts["pin_y"]; ch = ts["ch"] + rects.add(lay["tap"], xc - tap_w / 2, ty0, xc + tap_w / 2, ty1) + imp = R.pimp_layer if row.polarity == "n" else R.nimp_layer + ienc = R.pimp_enc_act if row.polarity == "n" else R.nimp_enc_act + if imp is not None: + rects.add(imp, xc - tap_w / 2 - ienc, ty0 - ienc, xc + tap_w / 2 + ienc, ty1 + ienc) + ncont = max(1, int(math.floor((ty1 - ty0 - 2 * R.act_enc_cont_tap - R.cont_w) / (R.cont_w + R.cont_sep) + 1e-9)) + 1) + hcol = ncont * R.cont_w + (ncont - 1) * R.cont_sep + cy = snap((ty0 + ty1 - hcol) / 2) + for k in range(ncont): + yy = snap(cy + k * (R.cont_w + R.cont_sep)) + rects.add(lay["cont"], xc - R.cont_w / 2, yy, xc + R.cont_w / 2, yy + R.cont_w) + m1w = R.m1_bar_w(); pad = R.via1_pad_w(); pm1 = R.via1_m1_w() + if ch == ri + 1: + rects.add(lay["met1"], xc - m1w / 2, cy - R.m1_enc_cont, xc + m1w / 2, vy) + else: + rects.add(lay["met1"], xc - m1w / 2, vy, xc + m1w / 2, cy + hcol + R.m1_enc_cont) + rects.add(lay["met1"], xc - pm1 / 2, vy - pm1 / 2, xc + pm1 / 2, vy + pm1 / 2) + rects.add(lay["via1"], xc - R.via1_w / 2, vy - R.via1_w / 2, xc + R.via1_w / 2, vy + R.via1_w / 2) + rects.add(lay["met2"], xc - pad / 2, vy - pad / 2, xc + pad / 2, vy + pad / 2) + chan_nets[ch].setdefault(pp.k(), []).append(pp) + tap_records.append({"row": ri, "side": ts["side"], "x": xc, "y0": ty0, "y1": ty1, "net": row.body_net, "contacts": ncont}) + # horizontal tie strip along the gate side of each MOS row, joined to the two end strips by metal-1 (U-shaped tie) + implant_bridges = [] + for ri, row in enumerate(rows): + if not (row.taps and row.body_net and row.polarity in ("n", "p")): continue + width, ymin, ymax = row_dims[ri] + taps_here = [t for t in tap_records if t["row"] == ri] + if len(taps_here) < 2: continue + xl = min(t["x"] for t in taps_here); xr = max(t["x"] for t in taps_here) + strip_local_y = snap(ymin + 0.1 + tap_w / 2) # local y of the strip centre (below the cells' bottom) + if not row.flip: gy = snap(row_y[ri] + (strip_local_y - ymin)) + else: gy = snap(row_y[ri] + (ymax - strip_local_y)) + y0s, y1s = snap(gy - tap_w / 2), snap(gy + tap_w / 2) + rects.add(lay["tap"], xl - tap_w / 2, y0s, xr + tap_w / 2, y1s) + imp = R.pimp_layer if row.polarity == "n" else R.nimp_layer + ienc = R.pimp_enc_act if row.polarity == "n" else R.nimp_enc_act + if imp is not None: rects.add(imp, xl - tap_w / 2 - ienc, y0s - ienc, xr + tap_w / 2 + ienc, y1s + ienc) + # when the implant of an end strip and the implant of the gate-side strip are closer than the implant + # spacing rule (happens when a row's cells have no bottom strap band, e.g. all gate straps on top), the two + # same-net implants are merged by a bridge over the end strip; layouts with a legal gap are unchanged. + if imp is not None: + for t in taps_here: + lo_gap = (y0s - ienc) - (t["y1"] + ienc); hi_gap = (t["y0"] - ienc) - (y1s + ienc) + for gap, yb0 in ((lo_gap, t["y1"] + ienc), (hi_gap, y1s + ienc)): + if 1e-9 < gap < R.imp_sep - 1e-9: + rects.add(imp, t["x"] - tap_w / 2 - ienc, snap(yb0), t["x"] + tap_w / 2 + ienc, snap(yb0 + gap)) + implant_bridges.append({"row": ri, "x": t["x"], "gap_um": round(gap, 4)}) + nc = max(1, int(math.floor((xr - xl - R.cont_w) / (R.cont_w + R.cont_sep) + 1e-9)) + 1) + cx0 = snap((xl + xr - (nc * R.cont_w + (nc - 1) * R.cont_sep)) / 2) + for k in range(nc): + xx = snap(cx0 + k * (R.cont_w + R.cont_sep)) + rects.add(lay["cont"], xx, gy - R.cont_w / 2, xx + R.cont_w, gy + R.cont_w / 2) + m1w = R.m1_bar_w() + rects.add(lay["met1"], xl - m1w / 2, gy - m1w / 2, xr + m1w / 2, gy + m1w / 2) + # extend the vertical strips' metal-1 to the horizontal strip + for t in taps_here: + ylo, yhi = (min(t["y0"], gy), max(t["y1"], gy)) + rects.add(lay["met1"], t["x"] - m1w / 2, ylo, t["x"] + m1w / 2, yhi) + t["y_strip"] = gy + tap_records.append({"row": ri, "side": "H", "x0": xl, "x1": xr, "y": gy, "net": row.body_net, "contacts": nc}) + # row blankets: well and implant over the whole row (including taps) + for ri, row in enumerate(rows): + if row.polarity not in ("n", "p"): continue + width, ymin, ymax = row_dims[ri] + acts = [c.active_bbox or c.bbox for c, _ in placed[ri]] + ay0 = min(a[1] for a in acts); ay1 = max(a[3] for a in acts) + if not row.flip: + gy0 = snap(row_y[ri] + (ay0 - ymin)); gy1 = snap(row_y[ri] + (ay1 - ymin)) + else: + gy0 = snap(row_y[ri] + (ymax - ay1)); gy1 = snap(row_y[ri] + (ymax - ay0)) + ax0_act = snap(row_x_shift[ri] + min((c.active_bbox or c.bbox)[0] + xo for c, xo in placed[ri])) + ax1_act = snap(row_x_shift[ri] + max((c.active_bbox or c.bbox)[2] + xo for c, xo in placed[ri])) + taps_here = [t for t in tap_records if t["row"] == ri and t["side"] != "H"] + hstrips = [t for t in tap_records if t["row"] == ri and t["side"] == "H"] + if row.polarity == "p": + wenc = R.nwell_enc_pact; tenc = R.nwell_enc_ntap + x0 = min([ax0_act - wenc] + [t["x"] - tap_w / 2 - tenc for t in taps_here]); x1 = max([ax1_act + wenc] + [t["x"] + tap_w / 2 + tenc for t in taps_here]) + y0 = min([gy0 - wenc] + [t["y0"] - tenc for t in taps_here] + [t["y"] - tap_w / 2 - tenc for t in hstrips]); y1 = max([gy1 + wenc] + [t["y1"] + tenc for t in taps_here] + [t["y"] + tap_w / 2 + tenc for t in hstrips]) + rects.add(R.nwell_layer, snap(x0), snap(y0), snap(x1), snap(y1)) + penc = max(R.pimp_enc_act, R.pimp_enc_gate) + rects.add(R.pimp_layer, snap(ax0_act - penc), snap(gy0 - penc), snap(ax1_act + penc), snap(gy1 + penc)) + else: + if R.nimp_layer is not None: + nenc = R.nimp_enc_act + rects.add(R.nimp_layer, snap(ax0_act - nenc), snap(gy0 - nenc), snap(ax1_act + nenc), snap(gy1 + nenc)) + + # risers for nets present in several channels + net_channels = {}; net_ents = {} + for ch in range(nrows + 1): + for key, pl in chan_nets[ch].items(): + if pl: + net_channels.setdefault(ORIG(key), []).append(ch); net_ents.setdefault(ORIG(key), []).append((ch, key)) + multi = sorted([n for n, ents in net_ents.items() if len(ents) > 1], key=lambda n: (order_hint.get(n, 10 ** 6), n)) + x_all_max = max([pp.x + pp.width / 2 for pp in pins_g] + [snap(row_x_shift[ri] + row_dims[ri][0] + tap_extent[ri]) for ri in range(nrows)]) + riser_pitch = snap_up(max(stub_w, via2_m2_pad) + R.m2_sep) + riser_x = {} + for k, net in enumerate(multi): + riser_x[net] = snap(x_all_max + ch_margin + via2_m2_pad / 2 + k * riser_pitch) + trunks = []; wire_len = 0.0; n_via2 = 0 + for ch in range(nrows + 1): + for key, pl in chan_nets[ch].items(): + if not pl: continue + net = ORIG(key) + ty = trunk_y(ch, key) + xs = [pp.x for pp in pl] + x0 = min(xs) - trunk_w / 2; x1 = max(xs) + trunk_w / 2 + if net in riser_x: + x1 = max(x1, riser_x[net] + via2_m2_pad / 2) + if x1 - x0 < trunk_w: x1 = x0 + trunk_w + rects.add(lay["met3"], x0, ty - trunk_w / 2, x1, ty + trunk_w / 2) + trunks.append({"channel": ch, "net": net, "key": key, "y": ty, "x0": snap(x0), "x1": snap(x1)}) + wire_len += (x1 - x0) + # same-net via pads that are closer than the metal spacing are bridged (one merged met2 strip) + xs_sorted = sorted(set(pp.x for pp in pl)) + for xa, xb in zip(xs_sorted, xs_sorted[1:]): + if xb - xa < via2_m2_pad + R.m2_sep + 1e-9: + rects.add(lay["met2"], xa, ty - via2_m2_pad / 2, xb, ty + via2_m2_pad / 2) + for pp in pl: + # stub from pin edge to trunk + y_lo, y_hi = min(pp.y, ty), max(pp.y, ty) + rects.add(lay["met2"], pp.x - stub_w / 2, y_lo, pp.x + stub_w / 2, y_hi) + wire_len += (y_hi - y_lo) + rects.add(lay["met2"], pp.x - via2_m2_pad / 2, ty - via2_m2_pad / 2, pp.x + via2_m2_pad / 2, ty + via2_m2_pad / 2) + rects.add(lay["via2"], pp.x - R.via2_w / 2, ty - R.via2_w / 2, pp.x + R.via2_w / 2, ty + R.via2_w / 2) + n_via2 += 1 + for net, rx in riser_x.items(): + ys = [trunk_y(ch, key) for ch, key in net_ents[net]] + rects.add(lay["met2"], rx - stub_w / 2, min(ys), rx + stub_w / 2, max(ys)) + wire_len += (max(ys) - min(ys)) + for ty in ys: + rects.add(lay["met2"], rx - via2_m2_pad / 2, ty - via2_m2_pad / 2, rx + via2_m2_pad / 2, ty + via2_m2_pad / 2) + rects.add(lay["via2"], rx - R.via2_w / 2, ty - R.via2_w / 2, rx + R.via2_w / 2, ty + R.via2_w / 2) + n_via2 += 1 + + # ---------- 8. labels for external ports ---------- + label_records = [] + missing = [p for p in ports if p not in net_channels] + if missing: + raise AssemblyError(f"port nets without any pin: {missing}") + for net in ports: + ch = net_channels[net][0] + tr = next(t for t in trunks if t["channel"] == ch and t["net"] == net) + lx = snap((tr["x0"] + tr["x1"]) / 2); ly_ = tr["y"] + if lay.get("met3_label") is not None: + comp.add_label(text=net, position=(lx, ly_), layer=lay["met3_label"]) + if lay.get("met3_pin") is not None and lay.get("met3_pin") != lay.get("met3_label"): + rects.add(lay["met3_pin"], lx - trunk_w / 2, ly_ - trunk_w / 2, lx + trunk_w / 2, ly_ + trunk_w / 2) + # drawing-layer text too (magic attaches text to the paint under it) + comp.add_label(text=net, position=(lx, ly_), layer=lay["met3"]) + label_records.append({"net": net, "x": lx, "y": ly_, "layer": "met3"}) + comp.add_port(name=net, center=(lx, ly_), width=trunk_w, orientation=0, layer=lay["met3"]) + + for layer, rl in rects.r.items(): + for (x0, y0, x1, y1) in rl: + comp.add_polygon([(x0, y0), (x1, y0), (x1, y1), (x0, y1)], layer=layer) + bb = comp.bbox + bbox = (snap(bb[0][0]), snap(bb[0][1]), snap(bb[1][0]), snap(bb[1][1])) + stats = {"bbox": bbox, "width": snap(bbox[2] - bbox[0]), "height": snap(bbox[3] - bbox[1]), + "area_um2": round((bbox[2] - bbox[0]) * (bbox[3] - bbox[1]), 4), "wire_length_um": round(wire_len, 3), + "n_via2": n_via2, "n_trunks": len(trunks), "n_risers": len(riser_x), "channels": chan_height, "rows": nrows, + "row_x_shift": row_x_shift, "tap_records": tap_records, "track_pitch": track_pitch, "trunk_w": trunk_w, + "split_trunks": sorted(f"{ch}:{n}" for ch, n in split_set), + "row_dims": [{"kind": rows[ri].polarity, "width": snap(row_dims[ri][0]), "height": snap(row_dims[ri][2] - row_dims[ri][1]), + "tap_extent": tap_extent[ri], "x_shift": row_x_shift[ri], "y": row_y[ri], + "cells": [{"name": c.name, "w": snap(c.bbox[2] - c.bbox[0]), "h": snap(c.bbox[3] - c.bbox[1])} for c, _ in placed[ri]]} for ri in range(nrows)], + "channel_heights": chan_height, "channel_margin": ch_margin, "implant_bridges": implant_bridges, + # bookkeeping for the plan-level cost rule (no effect on geometry): which nets each cell / tap strip brings + # into each channel, under the shared (unsplit) channel strategy + "channel_net_sources": _channel_net_sources(rows)} + # self-check: met2 / met3 spacing between shapes (any net) using klayout regions + try: + import klayout.db as kdb + viol = {} + for lname, sep in (("met2", R.m2_sep), ("met3", R.m3_sep), ("met1", R.m1_sep)): + reg = kdb.Region() + for (x0, y0, x1, y1) in rects.r.get(tuple(lay[lname]), []): + reg.insert(kdb.Box(int(round(x0 * 1000)), int(round(y0 * 1000)), int(round(x1 * 1000)), int(round(y1 * 1000)))) + reg.merge() + ep = reg.space_check(int(round(sep * 1000))) + viol[lname] = [[e.first.p1.x / 1000, e.first.p1.y / 1000, e.second.p1.x / 1000, e.second.p1.y / 1000] for e in ep.each()][:10] + stats["self_check_spacing"] = {k: v for k, v in viol.items() if v} + except Exception as e: + stats["self_check_spacing"] = {"error": str(e)} + comp.info["assembly_stats"] = stats + # flatten: the DUT is delivered as a single flat cell (hierarchy-free GDS for extraction and review) + try: + flat = comp.flatten() + flat.name = name + flat.unlock() if hasattr(flat, 'unlock') else None + for k, v in comp.info.items(): flat.info[k] = v + for pname, port in comp.ports.items(): + if pname not in flat.ports: flat.add_port(name=pname, port=port) + comp = flat + except Exception as e: + stats["flatten_error"] = repr(e) + return {"component": comp, "stats": stats, "trunks": trunks, "labels": label_records, "pins": [pp.__dict__ for pp in pins_g]} diff --git a/benchmarks/textbook_sharing/textbook_sharing/assembly/passives.py b/benchmarks/textbook_sharing/textbook_sharing/assembly/passives.py new file mode 100644 index 00000000..d427f50d --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/assembly/passives.py @@ -0,0 +1,195 @@ +"""Passive pin cells: PDK poly resistors (and later MIM capacitors) as textbook_sharing.assembly PinCells. + +Resistor devices (one per PDK, chosen because each PDK's LVS deck and ngspice models support them): + sky130 sky130_fd_pr__res_high_po_0p35 W fixed 0.35 um, Rs ~ 320 ohm/sq layers poly(66/20)+poly_res(66/13)+rpm(86/20)+psdm(94/20) + gf180 ppolyf_u Rs ~ 315 ohm/sq (p+ unsalicided) layers poly2(30/0)+pplus(31/0)+sab(49/0)+res_mk(110/5) + ihp130 rppd Rs 260 ohm/sq layers gatpoly(5/0)+psd(14/0)+salblock(28/0)+polyres(128/0)+extblock(111/0) +The body is a single straight poly strip of width w and length l (between the two contact heads); the heads carry +contact arrays and a metal-1 pad, lifted with via1 to a met2 pin on the top edge. Series segments (m) are not used. +""" +from __future__ import annotations +import math +from .pincell import PinCell, Pin +from glayout.sharing.rules import snap, snap_up + +RES = { + "sky130": {"model": "sky130_fd_pr__res_high_po_0p35", "w_fixed": 0.35, "rsh": 319.8, "poly": (66, 20), "markers": [(66, 13), (86, 20), (94, 20)], + "marker_enc": {"(66, 13)": 0.0, "(86, 20)": 0.2, "(94, 20)": 0.125}, "head_sep": 0.0, "cont": (66, 44), "cont_w": 0.17, "cont_sp": 0.17, "poly_enc_cont": 0.08, + "met1": (67, 20), "m1_enc_cont": 0.08, "via1": (67, 44), "via1_w": 0.17, "m1_enc_via1": 0.0, "met2": (68, 20), "m2_enc_via1": 0.06, "m2_w": 0.14, "terminals": 3, "min_l": 0.5, "slot_contact": 0.19, "sab_to_cont": 0.0}, + "gf180": {"model": "ppolyf_u", "w_fixed": None, "rsh": 315.0, "poly": (30, 0), "markers": [(31, 0), (49, 0), (110, 5)], + "marker_enc": {"(31, 0)": 0.3, "(49, 0)": 0.28, "(110, 5)": 0.0}, "head_sep": 0.0, "cont": (33, 0), "cont_w": 0.22, "cont_sp": 0.28, "poly_enc_cont": 0.07, + "met1": (34, 0), "m1_enc_cont": 0.12, "via1": (35, 0), "via1_w": 0.26, "m1_enc_via1": 0.12, "met2": (36, 0), "m2_enc_via1": 0.12, "m2_w": 0.28, "terminals": 3, "min_l": 1.0, "sab_to_cont": 0.28}, + "ihp130": {"model": "rppd", "w_fixed": None, "rsh": 260.0, "poly": (5, 0), "markers": [(14, 0), (28, 0), (128, 0), (111, 0)], + "marker_enc": {"(14, 0)": 0.18, "(28, 0)": 0.2, "(128, 0)": 0.0, "(111, 0)": 0.31}, "head_sep": 0.0, "cont": (6, 0), "cont_w": 0.16, "cont_sp": 0.18, "poly_enc_cont": 0.07, + "met1": (8, 0), "m1_enc_cont": 0.05, "via1": (19, 0), "via1_w": 0.19, "m1_enc_via1": 0.05, "met2": (10, 0), "m2_enc_via1": 0.05, "m2_w": 0.2, "terminals": 2, "min_l": 0.5, "sab_to_cont": 0.2}, +} + + +# R(l) = a*l + b fitted from two schematic simulations per PDK at the width given (calibrate_res.py, data/res_calibration.json) +CALIB = {"sky130": {"w": 0.35, "a": 1104.2757, "b": 623.2853}, "gf180": {"w": 1.0, "a": 368.7439, "b": 126.0623}, "ihp130": {"w": 1.0, "a": 257.1089, "b": 74.5953}} + + +def resistor_geometry(pdk_name: str, r_ohm: float, w: float | None = None, max_l: float = 60.0): + """Choose (w, l) for the requested resistance from the calibrated model R = a*l + b (at the calibration width).""" + t = RES[pdk_name]; c = CALIB[pdk_name] + w = t["w_fixed"] or c["w"] + l = snap_up(max(t["min_l"], (r_ohm - c["b"]) / c["a"])) + return w, min(l, max_l) + + +def resistor_pincell(pdk, name: str, net_p: str, net_n: str, r_ohm: float, body_net: str = "VSS", w: float | None = None) -> PinCell: + """Build the resistor as a flat set of rectangles in a Component. Body horizontal along x.""" + from glayout.backend import Component + t = RES[pdk.name]; w, l = resistor_geometry(pdk.name, r_ohm, w) + comp = Component(name) + rects = [] + def add(layer, x0, y0, x1, y1): + rects.append((tuple(layer), snap(x0), snap(y0), snap(x1), snap(y1))) + # body between x=0 and x=l, y in [0,w]; heads beyond + cw, csp = t["cont_w"], t["cont_sp"] + head_len = snap_up(t.get("sab_to_cont", 0.2) + cw + t["poly_enc_cont"]) # salicide-block/marker edge to contact + enclosure + ncont = max(1, int(math.floor((w - 2 * t["poly_enc_cont"] - cw) / (cw + csp) + 1e-9)) + 1) + while ncont > 1 and ncont * cw + (ncont - 1) * csp > w - 2 * t["poly_enc_cont"] + 1e-9: ncont -= 1 + hcol = ncont * cw + (ncont - 1) * csp; y0c = snap((w - hcol) / 2) + add(t["poly"], -head_len, 0, l + head_len, w) + for key in t["markers"]: + enc = t["marker_enc"][str(key)] + if key == (94, 20) or key == (31, 0) or key == (14, 0): # implant: covers heads too + add(key, -head_len - enc, -enc, l + head_len + enc, w + enc) + else: # resistor body markers (res id / salicide block): body only + add(key, 0 - (enc if key in ((86, 20),) else 0), -enc, l + (enc if key in ((86, 20),) else 0), w + enc) + pins = [] + m1w = snap_up(max(cw + 2 * t["m1_enc_cont"], t["via1_w"] + 2 * t["m1_enc_via1"])) + pad = snap_up(max(t["m2_w"], t["via1_w"] + 2 * t["m2_enc_via1"])) + slot = t.get("slot_contact") + for side, net, xc in (("P", net_p, -(t.get("sab_to_cont", 0.2) + (slot or cw) / 2)), ("N", net_n, l + t.get("sab_to_cont", 0.2) + (slot or cw) / 2)): + if slot: # one contact slot spanning the full resistor width (sky130 licon.1b) + add(t["cont"], xc - slot / 2, 0, xc + slot / 2, w) + m1w = snap_up(max(slot + 2 * t["m1_enc_cont"], t["via1_w"] + 2 * t["m1_enc_via1"])) + y0c = 0.0 + else: + for c in range(ncont): + yy = snap(y0c + c * (cw + csp)) + add(t["cont"], xc - cw / 2, yy, xc + cw / 2, yy + cw) + ytop = snap(w + 0.3) + add(t["met1"], xc - m1w / 2, y0c - t["m1_enc_cont"], xc + m1w / 2, ytop + m1w / 2) + add(t["via1"], xc - t["via1_w"] / 2, ytop - t["via1_w"] / 2, xc + t["via1_w"] / 2, ytop + t["via1_w"] / 2) + add(t["met2"], xc - pad / 2, ytop - pad / 2, xc + pad / 2, ytop + pad / 2) + pname = f"r{side}" + comp.add_port(name=pname, center=(snap(xc), snap(ytop + pad / 2)), width=pad, orientation=90, layer=t["met2"]) + pins.append(Pin(pname, net, snap(xc), snap(ytop + pad / 2), "top", pad, t["met2"], [f"{name}:{side}"])) + if pdk.name == "sky130": + # NPC (95/20) must enclose the resistor body (rpm.5, 0.095) and the poly head contacts (0.10); one rectangle over the whole poly + add((95, 20), -head_len - 0.1, -0.1, l + head_len + 0.1, w + 0.1) + for (layer, x0, y0, x1, y1) in rects: + comp.add_polygon([(x0, y0), (x1, y0), (x1, y1), (x0, y1)], layer=layer) + xs0 = min(r[1] for r in rects); ys0 = min(r[2] for r in rects); xs1 = max(r[3] for r in rects); ys1 = max(r[4] for r in rects) + comp.info["pin_meta"] = {p.name: {"side": "top", "x": p.x, "y": p.y, "width": p.width, "net": p.net, "terminals": p.terminals} for p in pins} + return PinCell(name, comp, pins, "passive", (xs0, ys0, xs1, ys1), active_bbox=None, body_net=body_net, info={"device": "resistor", "model": t["model"], "w": w, "l": l, "r_ohm_nominal": r_ohm, "rsh": t["rsh"]}) + + +def resistor_spice_line(pdk_name: str, name: str, p: str, n: str, body: str, w: float, l: float, lvs: bool = False) -> str: + """Simulation form (X-subckt) or LVS form (gf180 deck reads resistors as R elements with the model name).""" + t = RES[pdk_name] + if pdk_name == "sky130": + return f"XR{name} {p} {n} {body} {t['model']} l={l:g} mult=1" + if pdk_name == "gf180": + return (f"R{name} {p} {n} {body} {t['model']} L={l:g}u W={w:g}u" if lvs else f"XR{name} {p} {n} {body} {t['model']} r_width={w:g}u r_length={l:g}u") + return f"XR{name} {p} {n} {t['model']} w={w:g}u l={l:g}u m=1" + + +# ---------------------------------------------------------------------------------------------------------------- +# MIM capacitors. Layer stacks (foundry layer numbers), plates and the via stack down to the generic met2 pin level. +# sky130 cap_mim_m3_1 : bottom met3 (70/20), top capm (89/44), via3 (70/44) on capm to met4 (71/20); generic: met4=met3, met5=met4 +# gf180 cap_mim_2f0fF (option B): bottom metal4 (46/0), top fusetop (75/0), via4 (41/0) to metal5 (81/0); markers cap_mk (117/5), mim_l_mk (117/10) +# ihp130 cap_cmim : bottom metal5 (67/0), mim (36/0), vmim (129/0) to topmetal1 (126/0) +# Capacitance densities (model): sky130 2.0 fF/um^2, gf180 2.0 fF/um^2, ihp 1.5 fF/um^2 (nominal; the model computes the value from w,l). +MIM = { + # bot/top: bottom plate metal and MIM dielectric (top plate) layers; topvia: via on the top plate to topmet; + # colvia: ordinary via from topmet down to the bottom-plate metal level used at the lead columns (IHP needs TopVia1, + # not the MIM via); stack_down: (from, via, to, via_w, enc_from, enc_to) down to the generic met2 pin level. + # lead_h: lead/pad height at the plate metal levels (SKY130 > 3 um so that the deck's "huge metal" spacing rule + # m3.3/m4.5 does not fire on a narrow stub attached to the plate); lead_gap: clearance between the plate and the + # top-plate lead column at the bottom-plate metal level (GF180 MIMTM.1: 1.2 um); pad_min: min pad side (metal area). + "sky130": {"model": "sky130_fd_pr__cap_mim_m3_1", "cdens": 2.0e-15, "bot": (70, 20), "top": (89, 44), "topvia": (70, 44), "topmet": (71, 20), "markers": [], + "bot_enc_top": 0.2, "top_enc_via": 0.14, "topvia_w": 0.2, "topvia_sp": 0.2, "topmet_enc_via": 0.065, "min_side": 1.0, + "colvia": (70, 44), "colvia_w": 0.2, "colvia_enc_top": 0.065, "colvia_enc_bot": 0.09, "lead_h": 3.2, "lead_gap": 0.5, "pad_min": 0.65, + "stack_down": [((70, 20), (69, 44), (69, 20), 0.2, 0.085, 0.085), ((69, 20), (68, 44), (68, 20), 0.15, 0.085, 0.085)], "pin_layer": (68, 20), "pin_w": 0.3}, + # gf180 sim model: legacy 2 fF/um^2 subcircuit cap_mim_2f0fF (the cap_mim_new section fails to parse in ngspice 44: "Syntax error: letter [$]"); lvs_model: KLayout runset class + "gf180": {"model": "cap_mim_2f0fF", "lvs_model": "cap_mim_2f0_m4m5_noshield", "cdens": 2.0e-15, "bot": (46, 0), "top": (75, 0), "topvia": (41, 0), "topmet": (81, 0), "markers": [(117, 5), (117, 10)], + "bot_enc_top": 0.6, "top_enc_via": 0.4, "topvia_w": 0.26, "topvia_sp": 0.5, "topmet_enc_via": 0.12, "min_side": 5.0, + "colvia": (41, 0), "colvia_w": 0.26, "colvia_enc_top": 0.12, "colvia_enc_bot": 0.12, "lead_h": 1.0, "lead_gap": 1.3, "pad_min": 0.5, + "stack_down": [((46, 0), (40, 0), (42, 0), 0.26, 0.12, 0.12), ((42, 0), (38, 0), (36, 0), 0.26, 0.12, 0.12)], "pin_layer": (36, 0), "pin_w": 0.5}, + "ihp130": {"model": "cap_cmim", "cdens": 1.5e-15, "bot": (67, 0), "top": (36, 0), "topvia": (129, 0), "topmet": (126, 0), "markers": [], + "bot_enc_top": 0.6, "top_enc_via": 0.3, "topvia_w": 0.42, "topvia_sp": 0.42, "topmet_enc_via": 0.42, "min_side": 1.14, + "colvia": (125, 0), "colvia_w": 0.42, "colvia_enc_top": 0.42, "colvia_enc_bot": 0.42, "lead_h": 1.7, "lead_gap": 0.5, "pad_min": 0.4, + "stack_down": [((67, 0), (66, 0), (50, 0), 0.19, 0.065, 0.065), ((50, 0), (49, 0), (30, 0), 0.19, 0.065, 0.065), ((30, 0), (29, 0), (10, 0), 0.19, 0.065, 0.065)], "pin_layer": (10, 0), "pin_w": 0.3}, +} + + +def mim_geometry(pdk_name: str, c_farad: float): + t = MIM[pdk_name]; side = snap_up(max(t["min_side"], math.sqrt(c_farad / t["cdens"]))) # cdens is F per um^2 -> side in um + return side, side + + +def mimcap_pincell(pdk, name: str, net_top: str, net_bot: str, c_farad: float) -> PinCell: + """Square MIM capacitor. The top plate is contacted by a sea of top-plate vias to the top metal, which leads to a + column at the LEFT of the plate; the bottom plate leads to a column at the RIGHT. Both columns stack down to the + generic met2 pin level, where a short strip to the cell top makes the two pins (cT = top plate, cB = bottom plate).""" + from glayout.backend import Component + t = MIM[pdk.name]; w, l = mim_geometry(pdk.name, c_farad) + comp = Component(name); rects = [] + def add(layer, x0, y0, x1, y1): rects.append((tuple(layer), snap(x0), snap(y0), snap(x1), snap(y1))) + e = t["bot_enc_top"]; lead_h = t["lead_h"]; yc = snap(l / 2) + add(t["bot"], -e, -e, w + e, l + e) # bottom plate + add(t["top"], 0, 0, w, l) # top plate (dielectric capacitor layer) + for mk in t["markers"]: add(mk, -e, -e, w + e, l + e) + # sea of vias on the top plate -> top metal + vw, vs, ve = t["topvia_w"], t["topvia_sp"], t["top_enc_via"] + n = max(1, int((w - 2 * ve + vs) // (vw + vs))) + pitch = vw + vs; x0 = snap((w - (n * vw + (n - 1) * vs)) / 2) + for i in range(n): + for j in range(n): + add(t["topvia"], x0 + i * pitch, x0 + j * pitch, x0 + i * pitch + vw, x0 + j * pitch + vw) + tm = t["topmet_enc_via"] + add(t["topmet"], x0 - tm, x0 - tm, w - x0 + tm, l - x0 + tm) + # column positions + cw = t["colvia_w"]; pad_bot = max(t["pad_min"], cw + 2 * t["colvia_enc_bot"]); pad_top = max(lead_h, cw + 2 * t["colvia_enc_top"]) + xL = snap(-(e + t["lead_gap"] + max(pad_bot, pad_top) / 2)); xR = snap(w + e + 0.3 + max(pad_bot, pad_top) / 2) + # LEFT column (top plate): top-metal lead from the via sea to the column, pad, column via, bottom-metal pad, stack down + add(t["topmet"], xL - pad_top / 2, yc - lead_h / 2, x0 - tm + 0.1, yc + lead_h / 2) + add(t["topmet"], xL - pad_top / 2, yc - pad_top / 2, xL + pad_top / 2, yc + pad_top / 2) + add(t["colvia"], xL - cw / 2, yc - cw / 2, xL + cw / 2, yc + cw / 2) + add(t["bot"], xL - pad_bot / 2, yc - pad_bot / 2, xL + pad_bot / 2, yc + pad_bot / 2) + # RIGHT column (bottom plate): bottom-metal lead attached to the plate, pad, stack down + add(t["bot"], w + e - 0.1, yc - lead_h / 2, xR + pad_bot / 2, yc + lead_h / 2) + add(t["bot"], xR - pad_bot / 2, yc - max(pad_bot, lead_h) / 2, xR + pad_bot / 2, yc + max(pad_bot, lead_h) / 2) + def stack(xc): + for (frm, via, to, vw2, ef, et) in t["stack_down"]: + pf = max(t["pad_min"], vw2 + 2 * ef); pt = max(t["pad_min"], vw2 + 2 * et) + add(frm, xc - pf / 2, yc - pf / 2, xc + pf / 2, yc + pf / 2) + add(via, xc - vw2 / 2, yc - vw2 / 2, xc + vw2 / 2, yc + vw2 / 2) + add(to, xc - pt / 2, yc - pt / 2, xc + pt / 2, yc + pt / 2) + stack(xL); stack(xR) + pins = [] + pw = t["pin_w"]; ytop = snap(l + e + 0.6) + for pname, xc, net in (("cT", xL, net_top), ("cB", xR, net_bot)): + add(t["pin_layer"], xc - pw / 2, yc, xc + pw / 2, ytop) + comp.add_port(name=pname, center=(snap(xc), ytop), width=pw, orientation=90, layer=t["pin_layer"]) + pins.append(Pin(pname, net, snap(xc), ytop, "top", pw, t["pin_layer"], [f"{name}:{pname}"])) + for (layer, x0_, y0_, x1_, y1_) in rects: + comp.add_polygon([(x0_, y0_), (x1_, y0_), (x1_, y1_), (x0_, y1_)], layer=layer) + xs0 = min(r[1] for r in rects); ys0 = min(r[2] for r in rects); xs1 = max(r[3] for r in rects); ys1 = max(r[4] for r in rects) + comp.info["pin_meta"] = {p.name: {"side": "top", "x": p.x, "y": p.y, "width": p.width, "net": p.net, "terminals": p.terminals} for p in pins} + return PinCell(name, comp, pins, "passive", (xs0, ys0, xs1, ys1), active_bbox=None, body_net=None, info={"device": "mimcap", "model": t["model"], "w": w, "l": l, "c_nominal": c_farad}) + + +def mimcap_spice_line(pdk_name: str, name: str, top: str, bot: str, w: float, l: float, lvs: bool = False) -> str: + t = MIM[pdk_name] + if pdk_name == "sky130": + return f"XC{name} {top} {bot} {t['model']} w={w:g} l={l:g}" + if pdk_name == "gf180": + # KLayout's gf180 runset extracts MIM caps as device class cap_mim_2f0_m4m5_noshield compared on A and P, which its + # schematic reader (SubcircuitModelsReader in custom_classes.lvs) derives from W and L of a 'C' element + return (f"C{name} {top} {bot} {t['lvs_model']} W={w:g}u L={l:g}u" if lvs else f"XC{name} {top} {bot} {t['model']} c_width={w:g}u c_length={l:g}u") + return f"XC{name} {top} {bot} {t['model']} w={w:g}u l={l:g}u" diff --git a/benchmarks/textbook_sharing/textbook_sharing/assembly/pincell.py b/benchmarks/textbook_sharing/textbook_sharing/assembly/pincell.py new file mode 100644 index 00000000..0e08f086 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/assembly/pincell.py @@ -0,0 +1,32 @@ +from __future__ import annotations +from dataclasses import dataclass, field +from typing import Literal + + +@dataclass +class Pin: + name: str + net: str + x: float # local coordinates of the cell + y: float # edge position (top edge y for side 'top', bottom edge y for 'bottom') + side: Literal["top", "bottom"] + width: float + layer: tuple # met2 layer tuple + terminals: list = field(default_factory=list) + + +@dataclass +class PinCell: + name: str + component: object # Component in local coordinates + pins: list # list[Pin] + polarity: Literal["n", "p", "passive"] + bbox: tuple # (x0,y0,x1,y1) in local coordinates + active_bbox: tuple | None = None # extent of diffusion (for tap spacing) + well_bbox: tuple | None = None # extent of the cell's own nwell (p cells) + implant_bbox: tuple | None = None + body_net: str | None = None + info: dict = field(default_factory=dict) + + def pins_on(self, side): + return [p for p in self.pins if p.side == side] diff --git a/benchmarks/textbook_sharing/textbook_sharing/build_cases.py b/benchmarks/textbook_sharing/textbook_sharing/build_cases.py new file mode 100644 index 00000000..d965cbb4 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/build_cases.py @@ -0,0 +1,125 @@ +"""Build the requested case set (18 topologies x 3 PDKs x 12 size points = 648 requests). + +For every request: derive sizes (grid.derive_sizing) -> parameter-illegal? -> duplicate signature? -> schematic +pre-simulation (mirrors: pass 1 finds the compliance voltage, the test point is frozen, pass 2 measures at it) -> +qualification + frozen spec (qualify.py) -> case directory data/cases////. +The nominal design point of every topology and PDK is read from data/nominal//.json. Every request (including +illegal ones) is recorded in /case_build.json, which the count ledger reads. +No layout is built here. usage: python -m textbook_sharing.build_cases [--circuits C01,..] [--pdks ..] [--jobs 12] +""" +from __future__ import annotations +import json, copy, time, argparse, hashlib +from pathlib import Path +from multiprocessing import Pool + +from textbook_sharing.circuits import CIRCUITS, ORDER +from textbook_sharing.cases import CaseSpec, PDK_POINT +from textbook_sharing.nominal import nominal +from textbook_sharing.presim import presim +from textbook_sharing.testbench import CATEGORY, make_testbench +from textbook_sharing.netlist import emit_subckt +from textbook_sharing.grid import GRID, size_tag, derive_sizing, signature +TB_RULE = hashlib.sha256(open(Path(__file__).with_name("testbench.py"), "rb").read()).hexdigest()[:16] # identity of the testbench generator +from textbook_sharing.qualify import floors_for, qualify_and_freeze, mirror_test_point +from textbook_sharing import overrides +from textbook_sharing import paths + +OUT = paths.CASES +PDKS = ["sky130", "gf180", "ihp130"] + + +def nominal_point(cid, pdk): + """Nominal design point (sizing, supply, bias, load, notes) of a topology and PDK.""" + return json.load(open(paths.NOMINAL / cid / f"{pdk}.json")) + + +def target_of(category, case, vdd): + if category in ("single",): return None # servo sets V_in = V_out; no separate target + if category in ("ota", "twostage"): return case.load.get("vout_target", vdd / 2) + if category == "buffer_ab": return case.load.get("vout_target", vdd / 2) + return None + + +def build_one(job): + cid, pdk = job + circ = CIRCUITS[cid]; cat = CATEGORY[cid]; vdd = PDK_POINT[pdk]["vdd"] + c0 = nominal_point(cid, pdk); nom = nominal(cid, pdk) + base_sizing, base_bias, base_load, ov_notes = overrides.apply(cid, pdk, c0["sizing"], c0["bias"], c0["load"]) + floors = floors_for(cid, nom.specs, vdd) + results = []; seen = {} + for sw, sl in GRID: + tag = size_tag(sw, sl) + rec = {"case_id": f"{cid}_{pdk}_{tag}", "circuit_id": cid, "pdk": pdk, "size": tag, "sW": sw, "sL": sl, "category": cat} + sizing, drec = derive_sizing(base_sizing, pdk, sw, sl) + rec["derivation"] = drec + if sizing is None: + rec["stage"] = "parameter_illegal"; results.append(rec); continue + sig = signature(circ, pdk, sizing); rec["signature"] = sig + if sig in seen: + rec["stage"] = "duplicate"; rec["duplicate_of"] = seen[sig]; results.append(rec); continue + seen[sig] = rec["case_id"] + d = OUT / cid / pdk / tag + if (d / "qualification.json").exists() and (d / "manifest.json").exists(): + old = json.load(open(d / "qualification.json")) # resume: this request was completed earlier + if old.get("signature") == sig and old.get("testbench_rule") == TB_RULE: + results.append(old); continue + case = CaseSpec(rec["case_id"], cid, pdk, tag, sizing, dict(c0["supply"]), copy.deepcopy(base_bias), copy.deepcopy(base_load), {}, list(c0.get("notes", [])) + ov_notes) + d = OUT / cid / pdk / tag; d.mkdir(parents=True, exist_ok=True) + t0 = time.time() + if cat == "mirror": + case.load["vout_test"] = case.load.get("vout_nom", vdd / 2) + p1 = presim(pdk, circ, case, d / "presim_pass1", dut_name=rec["case_id"]) + vt = mirror_test_point(p1["measures"].get("vmin"), vdd) + rec["mirror_pass1"] = {"vmin": p1["measures"].get("vmin"), "status": p1["sim"]["status"], "vout_test": vt} + if vt is None: + q = {"qualified": False, "reasons": [f"compliance voltage not found in the schematic sweep (vmin={p1['measures'].get('vmin')})"], "spec": {}} + pre = p1 + else: + case.load["vout_test"] = vt + pre = presim(pdk, circ, case, d / "presim", dut_name=rec["case_id"]) + q = qualify_and_freeze(cat, floors, pre["measures"], pre["sim"]["status"], vdd) + else: + pre = presim(pdk, circ, case, d / "presim", dut_name=rec["case_id"]) + q = qualify_and_freeze(cat, floors, pre["measures"], pre["sim"]["status"], vdd, target_of(cat, case, vdd)) + case.specs = q["spec"] + rec.update({"stage": "qualified" if q["qualified"] else "schematic_not_qualified", "qualification": q, "presim_status": pre["sim"]["status"], + "presim_errors": pre["sim"].get("errors", [])[:3], "schematic_measures": pre["measures"], "presim_s": round(time.time() - t0, 1)}) + # case files (evaluator side) + name = rec["case_id"] + cj = {"case_id": name, "circuit_id": cid, "pdk": pdk, "size": tag, "sW": sw, "sL": sl, "dut_name": name, "ports": circ.ports, + "sizing": sizing, "supply": case.supply, "bias": case.bias, "load": case.load, "category": cat, "notes": case.notes, + "derivation": drec, "signature": sig, "testbench_rule": TB_RULE, + "test_auxiliaries": overrides.test_auxiliaries(cid, case), "core_devices": [x.name for x in circ.devices]} + json.dump(cj, open(d / "case.json", "w"), indent=1) + json.dump(case.specs, open(d / "specs.json", "w"), indent=1) + json.dump({k: v for k, v in rec.items() if k not in ("schematic_measures",)} | {"schematic_measures": pre["measures"]}, open(d / "qualification.json", "w"), indent=1, default=str) + (d / "target.spice").write_text(emit_subckt(pdk, circ, sizing, name, per_finger=False)) + (d / "target_lvs.spice").write_text(emit_subckt(pdk, circ, sizing, name, per_finger=True, lvs=True)) + (d / "testbench.spice").write_text(make_testbench(circ, name, "DUT_INCLUDE_PATH", case, pdk)) + manifest = {f.name: hashlib.sha256(f.read_bytes()).hexdigest() for f in sorted(d.iterdir()) if f.is_file() and f.name != "manifest.json"} + json.dump(manifest, open(d / "manifest.json", "w"), indent=1) + results.append(rec) + return results + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--circuits", default=",".join(ORDER)); ap.add_argument("--pdks", default=",".join(PDKS)) + ap.add_argument("--jobs", type=int, default=12) + a = ap.parse_args() + jobs = [(c, p) for c in a.circuits.split(",") for p in a.pdks.split(",")] + with Pool(a.jobs) as pool: + allres = [r for rs in pool.map(build_one, jobs) for r in rs] + OUT.mkdir(parents=True, exist_ok=True) + out = paths.RESULTS / "case_build.json"; out.parent.mkdir(parents=True, exist_ok=True) + merged = {r["case_id"]: r for r in (json.load(open(out)) if out.exists() else [])} + merged.update({r["case_id"]: r for r in allres}) # a partial rebuild replaces only its own requests + json.dump(sorted(merged.values(), key=lambda r: r["case_id"]), open(out, "w"), indent=1, default=str) + import collections + c = collections.Counter(r["stage"] for r in allres) + print("requests", len(allres), dict(c)) + for r in allres: + if r["stage"] == "schematic_not_qualified": print(" NQ", r["case_id"], r["qualification"]["reasons"][:3]) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/calibrate_res.py b/benchmarks/textbook_sharing/textbook_sharing/calibrate_res.py new file mode 100644 index 00000000..3ca1150f --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/calibrate_res.py @@ -0,0 +1,29 @@ +"""Fit R(l) = a*l + b for each PDK resistor model from two schematic simulations: the documented calibration of the +length formula used by assembly.passives.resistor_geometry (its CALIB table). Writes data/res_calibration.json. +usage: python -m textbook_sharing.calibrate_res""" +import json +from pathlib import Path +from textbook_sharing import paths +from textbook_sharing.assembly.passives import RES, resistor_spice_line +from textbook_sharing.verify.pex_sim import simulate, read_measures + + +def main(): + out = {} + for pdk in ("sky130", "gf180", "ihp130"): + t = RES[pdk]; w = t["w_fixed"] or 1.0; pts = [] + for l in (5.0, 20.0): + tb = (f".subckt rtest A B VSS\n{resistor_spice_line(pdk, '1', 'A', 'B', 'VSS', w, l)}\n.ends rtest\nX1 A B VSS rtest\n" + "VA A 0 1\nVB B 0 0\nVS VSS 0 0\n.control\nop\nlet r = 1/(-i(VA))\nprint r\nquit\n.endc\n.end\n") + s = simulate(pdk, tb, paths.RUNS / "calib_res" / pdk, name=f"r_{l:g}") + m = read_measures(open(s["out"]).read()) if Path(s["out"]).exists() else {} + pts.append((l, m.get("r"))) + (l1, r1), (l2, r2) = pts + a = (r2 - r1) / (l2 - l1); b = r1 - a * l1 + out[pdk] = {"w": w, "points": pts, "a_ohm_per_um": a, "b_ohm": b, "rsh_nominal_table": t["rsh"]} + print(pdk, out[pdk]) + json.dump(out, open(paths.DATA / "res_calibration.json", "w"), indent=1) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/cases.py b/benchmarks/textbook_sharing/textbook_sharing/cases.py new file mode 100644 index 00000000..b794f1d1 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/cases.py @@ -0,0 +1,42 @@ +"""Case data model: circuit x PDK x size point -> sizing, supply, bias, loads, specs. + +Sizing convention: per MOS device we store the total width w (um), the length l (um) and the finger count nf; the unit +width w/nf must be at least the contactable minimum of the PDK (checked when the case is derived and again by the +builder). The SPICE multiplier m is always 1 (parallel devices are expressed by nf). +PDK operating points: sky130 1.8 V, gf180 3.3 V, ihp130 1.2 V (low-voltage devices). +""" +from __future__ import annotations +import json, hashlib, copy +from dataclasses import dataclass, field, asdict + +PDK_POINT = { + "sky130": {"vdd": 1.8, "lmin": 0.15, "uw_min": 0.29, "ibias": 20e-6, "model_note": "sky130_fd_pr__nfet_01v8 / pfet_01v8, tt"}, + "gf180": {"vdd": 3.3, "lmin": 0.28, "uw_min": 0.36, "ibias": 20e-6, "model_note": "nfet_03v3 / pfet_03v3, typical"}, + "ihp130": {"vdd": 1.2, "lmin": 0.13, "uw_min": 0.30, "ibias": 20e-6, "model_note": "sg13_lv_nmos / pmos, mos_tt (PSP103 via OSDI)"}, +} + + +@dataclass +class CaseSpec: + case_id: str + circuit_id: str + pdk: str + size: str # size-point tag, e.g. sW1_sL1 (or 'nominal') + sizing: dict # device -> {w,l,nf} or {r}/{c} + supply: dict # {"VDD": v, "VSS": 0} + bias: dict # port -> value (V for VBx, A for IBx/IINx/IREFx) + load: dict # testbench loads + specs: dict # metric -> {"min":..,"max":..,"unit":..} + notes: list = field(default_factory=list) + + def sha(self): + return hashlib.sha256(json.dumps(asdict(self), sort_keys=True).encode()).hexdigest() + + +def scale_sizing(sizing, wscale=1.0, lscale=1.0, nf_fn=None): + out = copy.deepcopy(sizing) + for k, v in out.items(): + if "w" in v and "l" in v: + v["w"] = round(v["w"] * wscale, 3); v["l"] = round(v["l"] * lscale, 3) + if nf_fn: v["nf"] = nf_fn(k, v) + return out diff --git a/benchmarks/textbook_sharing/textbook_sharing/circuits.py b/benchmarks/textbook_sharing/textbook_sharing/circuits.py new file mode 100644 index 00000000..19678c28 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/circuits.py @@ -0,0 +1,138 @@ +"""The 18 textbook topologies: normalised device lists, ports and source provenance. + +Device lines follow the AnalogGenie convention (D G S B for MOS, P N for R/C) with +the original net names kept wherever they are meaningful. Device names are +normalised to M1.. / R1.. / C1.. in order of appearance; the mapping to the +source names is recorded in ``source["device_name_map"]``. Every modification +of the source netlist is listed in ``source["modifications"]``. +""" +from __future__ import annotations +from .netlist import Circuit, Device + +AG = "https://github.com/xz-group/AnalogGenie" +AG_SHA = "efc25358939c6bedd247f28d3df61066964f3a90" +BOOKS = { + "razavi": "B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed., McGraw-Hill, 2017", + "johns": "T. C. Carusone, D. A. Johns, K. W. Martin, Analog Integrated Circuit Design, 2nd ed., Wiley, 2012", + "gray": "P. R. Gray, P. J. Hurst, S. H. Lewis, R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley, 2009", + "allen": "P. E. Allen, D. R. Holberg, CMOS Analog Circuit Design, 3rd ed., Oxford University Press, 2012", + "camenzind": "H. Camenzind, Designing Analog Chips, Virtualbookworm, 2005", +} + + +IMAGE_OBS = {726: 'Johns p.305 scan: Q1 diode-connected NMOS, Q2 output NMOS gate tied through a long wire (bias-distribution figure); basic 1:1 mirror', 672: 'Johns p.129 scan: Q1/Q2 bottom pair, Q3/Q4 cascode pair, Q3 and Q1 diode-connected, Iin source on top; cascode mirror', 840: 'Gray p.272 scan: bipolar Wilson mirror Q3 (input), Q1 (diode), Q2 (output, emitter on Q1 collector); MOS form authored with identical graph', 709: 'Johns p.261 scan: Q5 bias diode (W/L)/(n+1)^2, Q4/Q1 cascodes (W/L)/n^2, Q3/Q2 bottom devices W/L; wide-swing cascode mirror with Ibias and Iin sources', 934: 'Allen p.135 scan: M4 1/4-size diode, M5/M2 cascodes, M3/M1 bottom; corroborates the C13 graph', 936: 'Allen p.147 scan: M4 diode (II), M2 mirror, M1 regulating device biased by IREG, M3 output cascode; regulated cascode', 9: 'Razavi p.58 scan: M1 NMOS input, M2 PMOS current-source load biased by Vb', 20: 'Razavi p.72 scan: M1 follower, M2 NMOS current source (Vb), RL load resistor drawn as an external load to ground', 38: 'Razavi p.88 scan: M1/M2 NMOS cascode, M3/M4 PMOS cascode current source (Vb1..Vb3)', 195: 'Razavi p.268 scan: M1 NMOS and M2 PMOS with common gate input and common drain output (inverter amplifier)', 235: 'Razavi p.283 scan (partial): only M1 with an output current Iout is visible in the crop; the resistor R0 (VDD-VOUT1) of the dataset netlist is not visible. Treated as CS stage with resistive load per Razavi Sec. 3.2.1', 192: 'Razavi p.260 scan: M1/M2 pair with ideal tail current source symbol, M3/M4 PMOS current sources (Vb)', 157: 'Razavi p.171 scan: M1/M2 pair, M3 diode / M4 mirror PMOS load, M5 tail (Vb)', 71: 'Razavi p.107 scan: M1/M2 pair, RD1/RD2 loads, ideal tail source ISS', 220: 'Razavi p.272 scan: M1/M2 pair with RS/RS degeneration joined at the tail node, M3 tail (Vb), R1/R1 loads', 296: 'Razavi p.360 scan: M1/M2 pair, M3/M4 cascodes (Vb), M5/M6 PMOS cascodes and M7/M8 PMOS current sources with M5 and M7 diode-connected (X node), ideal tail ISS', 294: 'Razavi p.357 scan: M1/M2 PMOS pair (ISS tail), M5/M6 NMOS current sources (Vb4), M3/M4 NMOS cascodes (Vb1), M7/M8 PMOS cascodes (Vb2), M9/M10 PMOS sources (Vb3), differential Vout', 705: 'Johns p.243 scan: Q8 diode (3) with 20 uA source, Q5 (30) tail, Q1/Q2 (36) PMOS pair, Q3/Q4 (6) NMOS mirror, Q6 (45) PMOS load, Q7 (18) NMOS second stage, RC and CC compensation; W/L ratios annotated', 877: 'Gray p.380 scan: M3 PMOS current source (BIAS), M4 NMOS diode and M5 PMOS diode stack, M1 NMOS and M2 PMOS source followers driving RL, M6 NMOS input device'} + + +def src(ag_id, book, page, names, level, mods=None, extra=None): + d = {"dataset": "AnalogGenie", "dataset_url": AG, "dataset_sha": AG_SHA, "dataset_license": "MIT (code and dataset repository)", + "analoggenie_id": ag_id, "files": [f"Dataset/{ag_id}/{ag_id}.cir", f"Dataset/{ag_id}/Port{ag_id}.txt", f"Dataset/{ag_id}/Pagenumber{ag_id}.txt", f"Dataset/{ag_id}/Book{ag_id}.png", f"Dataset/{ag_id}/Cadence{ag_id}.png"] if ag_id else [], + "book": BOOKS[book], "book_key": book, "page_ref": page, "device_name_map": names, + "source_verification_level": level, "image_review": {"file": f"Dataset/{ag_id}/Book{ag_id}.png", "observation": IMAGE_OBS.get(ag_id)}, "modifications": mods or [], + "textbook_image_note": "Book.png (textbook scan) and Cadence.png (schematic capture) ship inside the public AnalogGenie repository; for entries marked 'image_checked' the scan was compared with the netlist when the benchmark was built. The scans are not redistributed here."} + if extra: d.update(extra) + return d + + +CIRCUITS = {} + + +def _add(c: Circuit): + CIRCUITS[c.circuit_id] = c + + +# ---- current mirrors ------------------------------------------------------- +_add(Circuit("C01", "basic_current_mirror", ["VSS", "IB1", "IOUT1"], + [Device("M1", "nfet", ["IB1", "IB1", "VSS", "VSS"]), Device("M2", "nfet", ["IOUT1", "IB1", "VSS", "VSS"])], + src(726, "johns", "305", {"M1": "M3", "M2": "M5"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C02", "cascode_current_mirror", ["VSS", "IIN1", "IOUT1"], + [Device("M1", "nfet", ["IIN1", "IIN1", "net6", "VSS"]), Device("M2", "nfet", ["net6", "net6", "VSS", "VSS"]), + Device("M3", "nfet", ["IOUT1", "IIN1", "net12", "VSS"]), Device("M4", "nfet", ["net12", "net6", "VSS", "VSS"])], + src(672, "johns", "129", {"M1": "M3", "M2": "M2", "M3": "M1", "M4": "M0"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C03", "wilson_current_mirror", ["VSS", "IIN1", "IOUT1"], + [Device("M1", "nfet", ["IIN1", "Y", "VSS", "VSS"]), Device("M2", "nfet", ["Y", "Y", "VSS", "VSS"]), Device("M3", "nfet", ["IOUT1", "IIN1", "Y", "VSS"])], + src(840, "gray", "272 (bipolar Wilson mirror; MOS form from Gray et al. Sec. 4.2.5 'Wilson current mirror', MOS subsection)", + {"M1": "Q0 (npn)", "M2": "Q1 (npn)", "M3": "Q2 (npn)"}, + "topology_from_textbook_section;netlist_authored (AnalogGenie has no MOS Wilson entry: isomorphism search over 3350 netlists found only bipolar versions #606 and #840)", + ["bipolar devices replaced by NMOS with the same connection graph (C->D, B->G, E->S, bulk to VSS)"]))) +_add(Circuit("C13", "wide_swing_cascode_current_mirror", ["VSS", "IIN1", "IOUT1", "IB1"], + [Device("M1", "nfet", ["IB1", "IB1", "VSS", "VSS"]), Device("M2", "nfet", ["IIN1", "IB1", "net15", "VSS"]), Device("M3", "nfet", ["net15", "IIN1", "VSS", "VSS"]), + Device("M4", "nfet", ["IOUT1", "IB1", "net14", "VSS"]), Device("M5", "nfet", ["net14", "IIN1", "VSS", "VSS"])], + src(709, "johns", "261", {"M1": "M4", "M2": "M1", "M3": "M0", "M4": "M3", "M5": "M2"}, "netlist_matched_isomorphic+image_checked", + extra={"corroborating_entry": {"analoggenie_id": 934, "book": BOOKS["allen"], "page_ref": "135", "note": "same connection graph (IREF1<->IB1, IREF2<->IIN1)"}}))) +_add(Circuit("C14", "regulated_cascode_current_mirror", ["VSS", "IIN1", "IOUT1", "IREF1"], + [Device("M1", "nfet", ["IIN1", "IIN1", "VSS", "VSS"]), Device("M2", "nfet", ["net11", "IIN1", "VSS", "VSS"]), + Device("M3", "nfet", ["IREF1", "net11", "VSS", "VSS"]), Device("M4", "nfet", ["IOUT1", "IREF1", "net11", "VSS"])], + src(936, "allen", "147", {"M1": "M3", "M2": "M1", "M3": "M2", "M4": "M0"}, "netlist_matched_isomorphic+image_checked"))) +# ---- single-stage amplifiers ------------------------------------------------ +_add(Circuit("C04", "cs_amplifier_current_source_load", ["VDD", "VSS", "VIN1", "VOUT1", "VB1"], + [Device("M1", "pfet", ["VOUT1", "VB1", "VDD", "VDD"]), Device("M2", "nfet", ["VOUT1", "VIN1", "VSS", "VSS"])], + src(9, "razavi", "58", {"M1": "M0", "M2": "M1"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C05", "source_follower_mos_current_source", ["VDD", "VSS", "VIN1", "VOUT1", "VB1"], + [Device("M1", "nfet", ["VOUT1", "VB1", "VSS", "VSS"]), Device("M2", "nfet", ["VDD", "VIN1", "VOUT1", "VSS"])], + src(20, "razavi", "72", {"M1": "M0", "M2": "M1"}, "netlist_matched_isomorphic+image_checked", + ["source resistor R0 (VOUT1-VSS) is interpreted as the external load R_L and lives in the testbench, not in the DUT"]))) +_add(Circuit("C06", "cascode_amplifier_cascode_load", ["VDD", "VSS", "VIN1", "VOUT1", "VB1", "VB2", "VB3"], + [Device("M1", "pfet", ["VOUT1", "VB2", "net10", "VDD"]), Device("M2", "pfet", ["net10", "VB3", "VDD", "VDD"]), + Device("M3", "nfet", ["net9", "VIN1", "VSS", "VSS"]), Device("M4", "nfet", ["VOUT1", "VB1", "net9", "VSS"])], + src(38, "razavi", "88", {"M1": "M1", "M2": "M0", "M3": "M3", "M4": "M2"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C12", "cmos_inverter_amplifier", ["VDD", "VSS", "VIN1", "VOUT1"], + [Device("M1", "nfet", ["VOUT1", "VIN1", "VSS", "VSS"]), Device("M2", "pfet", ["VOUT1", "VIN1", "VDD", "VDD"])], + src(195, "razavi", "268", {"M1": "M0", "M2": "M1"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C15", "cs_amplifier_resistor_load", ["VDD", "VSS", "VIN1", "VOUT1"], + [Device("M1", "nfet", ["VOUT1", "VIN1", "VSS", "VSS"]), Device("R1", "res", ["VDD", "VOUT1"])], + src(235, "razavi", "283", {"M1": "M1", "R1": "R0"}, "netlist_matched_isomorphic+image_partial (resistor not visible in crop)"))) +# ---- differential ---------------------------------------------------------- +_add(Circuit("C07", "diff_pair_current_source_loads", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VOUT2", "VB1", "IB1"], + [Device("M1", "nfet", ["VOUT1", "VIN1", "IB1", "VSS"]), Device("M2", "nfet", ["VOUT2", "VIN2", "IB1", "VSS"]), + Device("M3", "pfet", ["VOUT1", "VB1", "VDD", "VDD"]), Device("M4", "pfet", ["VOUT2", "VB1", "VDD", "VDD"])], + src(192, "razavi", "260", {"M1": "M0", "M2": "M1", "M3": "M2", "M4": "M3"}, "netlist_matched_isomorphic+image_checked", + ["tail node IB1 is a port: the tail current source is an ideal (disclosed) testbench source"]))) +_add(Circuit("C08", "five_transistor_ota", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VB1"], + [Device("M1", "nfet", ["net22", "VIN1", "net23", "VSS"]), Device("M2", "nfet", ["VOUT1", "VIN2", "net23", "VSS"]), Device("M3", "nfet", ["net23", "VB1", "VSS", "VSS"]), + Device("M4", "pfet", ["net22", "net22", "VDD", "VDD"]), Device("M5", "pfet", ["VOUT1", "net22", "VDD", "VDD"])], + src(157, "razavi", "171", {"M1": "M2", "M2": "M3", "M3": "M4", "M4": "M0", "M5": "M1"}, "netlist_matched_isomorphic+image_checked"))) +_add(Circuit("C16", "diff_pair_resistor_loads", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VOUT2", "IB1"], + [Device("M1", "nfet", ["VOUT1", "VIN1", "IB1", "VSS"]), Device("M2", "nfet", ["VOUT2", "VIN2", "IB1", "VSS"]), + Device("R1", "res", ["VDD", "VOUT1"]), Device("R2", "res", ["VDD", "VOUT2"])], + src(71, "razavi", "107", {"M1": "M0", "M2": "M1", "R1": "R0", "R2": "R1"}, "netlist_matched_isomorphic+image_checked", + ["tail node IB1 is a port: ideal (disclosed) testbench current source"]))) +_add(Circuit("C17", "degenerated_diff_pair", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VOUT2", "VB1"], + [Device("M1", "nfet", ["VOUT1", "VIN1", "net07", "VSS"]), Device("M2", "nfet", ["VOUT2", "VIN2", "net09", "VSS"]), Device("M3", "nfet", ["net06", "VB1", "VSS", "VSS"]), + Device("R1", "res", ["VDD", "VOUT1"]), Device("R2", "res", ["VDD", "VOUT2"]), Device("R3", "res", ["net07", "net06"]), Device("R4", "res", ["net09", "net06"])], + src(220, "razavi", "272", {"M1": "M0", "M2": "M2", "M3": "M1", "R1": "R0", "R2": "R1", "R3": "R2", "R4": "R3"}, "netlist_matched_isomorphic+image_checked"))) +# ---- op amps --------------------------------------------------------------- +_add(Circuit("C09", "telescopic_ota_single_ended", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VB1", "IB1"], + [Device("M1", "nfet", ["net018", "VIN1", "IB1", "VSS"]), Device("M2", "nfet", ["net016", "VIN2", "IB1", "VSS"]), + Device("M3", "nfet", ["net04", "VB1", "net018", "VSS"]), Device("M4", "nfet", ["VOUT1", "VB1", "net016", "VSS"]), + Device("M5", "pfet", ["net04", "net04", "net019", "VDD"]), Device("M6", "pfet", ["VOUT1", "net04", "net017", "VDD"]), + Device("M7", "pfet", ["net019", "net019", "VDD", "VDD"]), Device("M8", "pfet", ["net017", "net019", "VDD", "VDD"])], + src(296, "razavi", "360", {"M1": "M1", "M2": "M3", "M3": "M4", "M4": "M5", "M5": "M6", "M6": "M7", "M7": "M8", "M8": "M9"}, "netlist_matched_isomorphic+image_checked", + ["tail node IB1 is a port: ideal (disclosed) testbench current source"]))) +_add(Circuit("C10", "folded_cascode_ota_fully_differential", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "VOUT2", "VB1", "VB2", "VB3", "VB4", "IB1"], + [Device("M1", "pfet", ["net022", "VIN1", "IB1", "VDD"]), Device("M2", "pfet", ["net018", "VIN2", "IB1", "VDD"]), + Device("M3", "nfet", ["net022", "VB4", "VSS", "VSS"]), Device("M4", "nfet", ["net018", "VB4", "VSS", "VSS"]), + Device("M5", "nfet", ["VOUT1", "VB1", "net022", "VSS"]), Device("M6", "nfet", ["VOUT2", "VB1", "net018", "VSS"]), + Device("M7", "pfet", ["VOUT1", "VB2", "net023", "VDD"]), Device("M8", "pfet", ["VOUT2", "VB2", "net021", "VDD"]), + Device("M9", "pfet", ["net023", "VB3", "VDD", "VDD"]), Device("M10", "pfet", ["net021", "VB3", "VDD", "VDD"])], + src(294, "razavi", "357", {"M1": "M0", "M2": "M2", "M3": "M1", "M4": "M3", "M5": "M4", "M6": "M5", "M7": "M6", "M8": "M7", "M9": "M8", "M10": "M9"}, "netlist_matched_isomorphic+image_checked", + ["tail node IB1 is a port: ideal (disclosed) testbench current source", "output common mode is set by a disclosed ideal common-mode feedback in the testbench acting on VB4"]))) +_add(Circuit("C11", "two_stage_miller_opamp", ["VDD", "VSS", "VIN1", "VIN2", "VOUT1", "IB1"], + [Device("M1", "pfet", ["IB1", "IB1", "VDD", "VDD"]), Device("M2", "pfet", ["net97", "IB1", "VDD", "VDD"]), + Device("M3", "pfet", ["net014", "VIN1", "net97", "VDD"]), Device("M4", "pfet", ["net016", "VIN2", "net97", "VDD"]), + Device("M5", "nfet", ["net014", "net014", "VSS", "VSS"]), Device("M6", "nfet", ["net016", "net014", "VSS", "VSS"]), + Device("M7", "pfet", ["VOUT1", "IB1", "VDD", "VDD"]), Device("M8", "nfet", ["VOUT1", "net016", "VSS", "VSS"]), + Device("R1", "res", ["net016", "net022"]), Device("C1", "cap", ["net022", "VOUT1"])], + src(705, "johns", "243", {"M1": "M10", "M2": "M12", "M3": "M14", "M4": "M13", "M5": "M15", "M6": "M16", "M7": "M17", "M8": "M18", "R1": "R0", "C1": "C0"}, "netlist_matched_isomorphic+image_checked", + ["input-pair bodies (source net023, floating in the dataset) tied to VDD", "compensation resistor R1 and capacitor C1 are DUT elements realised with PDK devices"]))) +_add(Circuit("C18", "class_ab_output_buffer", ["VDD", "VSS", "VIN1", "VOUT1", "VB1"], + [Device("M1", "nfet", ["net13", "VIN1", "VSS", "VSS"]), Device("M2", "pfet", ["net9", "VB1", "VDD", "VDD"]), + Device("M3", "nfet", ["net9", "net9", "net22", "VSS"]), Device("M4", "pfet", ["net13", "net13", "net22", "VDD"]), + Device("M5", "nfet", ["VDD", "net9", "VOUT1", "VSS"]), Device("M6", "pfet", ["VSS", "net13", "VOUT1", "VDD"])], + src(877, "gray", "380", {"M1": "M5", "M2": "M4", "M3": "M0", "M4": "M2", "M5": "M1", "M6": "M3"}, "netlist_matched_isomorphic+image_checked", + ["load resistor R0 (VOUT1-VSS) is the external load R_L in the testbench", "bias network (M2 current source, M3/M4 diode stack) is part of the DUT"]))) + +ORDER = sorted(CIRCUITS) +DEV_SPLIT = ["C01", "C04", "C05", "C07", "C13", "C15"] # development topologies (6) +TEST_SPLIT = [c for c in ORDER if c not in DEV_SPLIT] # 12 test topologies +E3_CIRCUITS = ["C02", "C08", "C09", "C11", "C16", "C18"] # E3 selection: mirrors, differential structures, amplifiers +E4_CIRCUITS = ["C02", "C08", "C11", "C17"] # E4 hold-out circuits diff --git a/benchmarks/textbook_sharing/textbook_sharing/freeze.py b/benchmarks/textbook_sharing/textbook_sharing/freeze.py new file mode 100644 index 00000000..0bd04d82 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/freeze.py @@ -0,0 +1,41 @@ +"""Record a freeze checkpoint: the sha256 of every rule-bearing source file and of every case manifest, with a note. + +Rules are frozen in stages before the measurements they govern (size grid and qualification rule before any layout; +cost rule and fixed mode order on the two development sizes before the held-out sizes; testbench fixes before +requalification). A checkpoint is never overwritten, so it documents which rules were in force at that time. +usage: python -m textbook_sharing.freeze ["note"] -> /freeze/.json""" +import sys, json, hashlib, glob, time, subprocess +from pathlib import Path +from textbook_sharing import paths + +PKG = Path(__file__).resolve().parent +FILES = ["grid.py", "qualify.py", "overrides.py", "build_cases.py", "testbench.py", "run_case.py", "matching.py", "layout.py", + "run_grid.py", "assembly/engine.py", "assembly/passives.py", "verify/pipeline.py", "verify/drc.py", "verify/lvs.py", + "verify/pex_sim.py", "selection/catalogue.py", "selection/cost.py", "selection/strategies.py", "selection/run_selection.py", + "selection/fixed_order.py", "llm/plan_parser.py", "llm/evaluate.py", "llm/tasks.py", "llm/interface_sharing.md"] +SHARING = ["enumerate.py", "group.py", "rules.py", "spec.py", "evidence.py"] + + +def sha(p): + return hashlib.sha256(open(p, "rb").read()).hexdigest() + + +def main(): + name = sys.argv[1]; out = paths.RESULTS / "freeze"; out.mkdir(parents=True, exist_ok=True) + f = out / f"{name}.json" + if f.exists(): + sys.exit(f"{f} exists; freeze checkpoints are never overwritten") + files = {f"textbook_sharing/{x}": sha(PKG / x) for x in FILES if (PKG / x).exists()} + files.update({f"glayout/sharing/{x}": sha(paths.REPO / "src/glayout/sharing" / x) for x in SHARING}) + frozen = {str(Path(p).relative_to(paths.ROOT)): sha(p) for p in sorted(glob.glob(str(paths.FROZEN / "*.json")))} + cases = {str(Path(m).parent.relative_to(paths.ROOT)): sha(m) for m in sorted(glob.glob(str(paths.CASES / "*/*/*/manifest.json")))} + lock = {"name": name, "utc": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), "files": files, "frozen_data": frozen, + "case_manifests": cases, "n_cases": len(cases), + "git_head": subprocess.run(["git", "-C", str(paths.REPO), "rev-parse", "HEAD"], capture_output=True, text=True).stdout.strip(), + "note": sys.argv[2] if len(sys.argv) > 2 else ""} + json.dump(lock, open(f, "w"), indent=1) + print(f, len(files), "files", len(cases), "cases") + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/grid.py b/benchmarks/textbook_sharing/textbook_sharing/grid.py new file mode 100644 index 00000000..7819d772 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/grid.py @@ -0,0 +1,77 @@ +"""Size grid and size-derivation rule (fixed before any layout was built). + +Grid: total-width multiplier sW in {0.5, 1.0, 1.5, 2.0} x gate-length multiplier sL in {1.0, 1.5, 2.0} +-> 12 size points per (topology, PDK); 18 x 3 x 12 = 648 requested cases. + +Nominal point (sW = sL = 1) = the nominal design point of the topology and PDK (data/nominal//.json); +the changes in overrides.py are applied on top and recorded in every case. + +Derivation rule (identical for every device of a case, so every width ratio inside the circuit is preserved exactly): + L' = L0 * sL, snapped to the 5 nm grid; + W' = W0 * sW for every MOS device; + nf' = nf0 * sW when that is an integer for ALL MOS devices of the case (unit finger width unchanged); + otherwise nf' = nf0 and the unit finger width becomes uw0 * sW for all devices; + the request is REJECTED (parameter-illegal) when the resulting unit finger width is below the PDK minimum + (contactable / model-valid width, PDK_POINT[pdk]['uw_min']) or is not on the 5 nm grid. +nf is therefore derived, never an independent sweep axis. Passive R/C values, supply, bias currents and loads are +part of the circuit definition and are not scaled. Two requests whose derived target netlists are identical +(same signature) are counted once (duplicates).""" +from __future__ import annotations +import copy, hashlib, json + +SW = (0.5, 1.0, 1.5, 2.0) +SL = (1.0, 1.5, 2.0) +GRID = [(sw, sl) for sw in SW for sl in SL] +SELECTION_SIZES = [(1.0, 1.0), (2.0, 1.0), (1.0, 2.0), (2.0, 2.0)] +LLM_SIZES = [(2.0, 1.0), (2.0, 2.0)] +INTERFACE_SIZES = [(2.0, 1.0)] +SELECTION_TOPOLOGIES = ["C02", "C08", "C09", "C11", "C16", "C18"] +UW_MIN = {"sky130": 0.29, "gf180": 0.36, "ihp130": 0.30} # = cases.PDK_POINT[pdk]['uw_min'] +GRID_NM = 5 + + +def size_tag(sw, sl): + return f"sW{sw:g}_sL{sl:g}" + + +def _on_grid(x): + return abs(round(x * 1000 / GRID_NM) * GRID_NM - x * 1000) < 1e-6 + + +def snap5(x): + return round(round(x * 1000 / GRID_NM) * GRID_NM / 1000, 4) + + +def derive_sizing(sizing0: dict, pdk: str, sw: float, sl: float): + """Returns (sizing, derivation_record) or (None, rejection_record).""" + mos = {k: v for k, v in sizing0.items() if "nf" in v} + rec = {"sW": sw, "sL": sl, "rule": "grid.derive_sizing v1"} + nf_scaled = {k: v["nf"] * sw for k, v in mos.items()} + integer_nf = all(abs(x - round(x)) < 1e-9 and round(x) >= 1 for x in nf_scaled.values()) + out = copy.deepcopy(sizing0); per = {} + for k, v in mos.items(): + uw0 = v["w"] / v["nf"] + if integer_nf: + nf = int(round(nf_scaled[k])); uw = uw0 + else: + nf = v["nf"]; uw = uw0 * sw + l = snap5(v["l"] * sl) + if uw + 1e-9 < UW_MIN[pdk]: + return None, {**rec, "status": "parameter_illegal", "reason": f"unit finger width {uw:.4g} um of {k} below the {pdk} minimum {UW_MIN[pdk]} um"} + if not _on_grid(uw): + return None, {**rec, "status": "parameter_illegal", "reason": f"unit finger width {uw:.6g} um of {k} not on the 5 nm grid"} + w = round(uw * nf, 4) + out[k] = {**v, "w": w, "l": l, "nf": nf} + per[k] = {"w0": v["w"], "l0": v["l"], "nf0": v["nf"], "uw0": round(uw0, 4), "w": w, "l": l, "nf": nf, "uw": round(uw, 4), + "w_ratio": round(w / v["w"], 6), "l_ratio_exact": round(l / v["l"], 6)} + rec.update({"status": "derived", "finger_rule": "nf scaled (unit width kept)" if integer_nf else "unit width scaled (nf kept)", "devices": per}) + return out, rec + + +def signature(circuit, pdk, sizing): + """Identity of a derived target netlist: topology + PDK + every device's model-relevant size.""" + devs = [] + for d in circuit.devices: + s = sizing[d.name] + devs.append([d.name, d.kind, list(d.nets), {k: s.get(k) for k in ("w", "l", "nf", "r", "c") if k in s}]) + return hashlib.sha256(json.dumps([circuit.circuit_id, pdk, devs], sort_keys=True).encode()).hexdigest()[:16] diff --git a/benchmarks/textbook_sharing/textbook_sharing/layout.py b/benchmarks/textbook_sharing/textbook_sharing/layout.py new file mode 100644 index 00000000..c1ba2076 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/layout.py @@ -0,0 +1,100 @@ +"""Layout of a whole benchmark circuit from per-group sharing plans. + +Grouping rule (identical for every circuit and plan): + * devices are split by polarity (rows) and body net; + * within a row, devices form *sharing groups*: the connected components of the graph whose edges join two devices + that (a) have the same length and unit finger width and (b) share a source/drain net or a gate net; + * each group is drawn by glayout.sharing.build_mos_group from its plan; + * rows: NMOS (bottom), PMOS (top, mirrored), passives (top row, if any); assembly.assemble adds body ties, routing + channels with metal-3 trunks, risers and port labels. +A plan changes only what is inside a group cell; placement order, routing policy, taps and labels are the same for every +plan, so area differences between two layouts of one circuit come from their plans. +""" +from __future__ import annotations +from glayout.sharing import DeviceSpec, build_mos_group +from textbook_sharing.assembly import RowSpec, assemble +from textbook_sharing.assembly.adapters import from_group_result +from textbook_sharing.assembly.passives import resistor_pincell, mimcap_pincell +from textbook_sharing.netlist import Circuit + +MODES = ("independent", "diffusion_only", "gate_only", "combined") + + +def device_specs(circuit: Circuit, sizing: dict) -> list[DeviceSpec]: + out = [] + for d in circuit.devices: + if d.kind in ("nfet", "pfet"): + sz = sizing[d.name] + out.append(DeviceSpec(d.name, d.kind, d.nets[0], d.nets[1], d.nets[2], d.nets[3], float(sz["w"]), float(sz["l"]), int(sz.get("nf", 1)))) + return out + + +def sharing_groups(devs: list[DeviceSpec]) -> list[list[DeviceSpec]]: + """Connected components over (same polarity, body, L, unit width) devices that share an S/D or gate net.""" + n = len(devs); parent = list(range(n)) + def find(i): + while parent[i] != i: parent[i] = parent[parent[i]]; i = parent[i] + return i + def union(i, j): parent[find(i)] = find(j) + for i in range(n): + for j in range(i + 1, n): + a, b = devs[i], devs[j] + if a.model_role != b.model_role or a.b != b.b: continue + if abs(a.length - b.length) > 1e-6 or abs(a.unit_width - b.unit_width) > 1e-6: continue + if ({a.s, a.d} & {b.s, b.d}) or a.g == b.g: + union(i, j) + comps = {} + for i in range(n): comps.setdefault(find(i), []).append(devs[i]) + # keep netlist order inside and across groups + return sorted(comps.values(), key=lambda g: min(devs.index(d) for d in g)) + + +def applicability(pdk, circuit: Circuit, sizing: dict) -> dict: + """A named mode applies to a circuit when at least one sharing group has a named plan for it (named_plans: a legal + plan in the fixed axis order that really shares that kind).""" + from glayout.sharing import group_candidates, named_plans + devs = device_specs(circuit, sizing); groups = sharing_groups(devs) + per = [] + for g in groups: + cand = group_candidates(pdk, g); nm = named_plans(pdk, g, cand) + per.append({"devices": [d.logical_id for d in g], "counts": cand["counts"], "named": {k: (v.plan_id() if v else None) for k, v in nm.items()}}) + modes = {m: any(pg["named"].get(m) for pg in per) for m in MODES}; modes["independent"] = True + return {"modes": modes, "groups": per} + + + +def build(pdk, circuit: Circuit, sizing: dict, mode: str = "independent", name: str | None = None, plans: dict | None = None): + """Build a whole circuit. plans: {group_index(str): SharingPlan json} (an explicit candidate); otherwise every group + uses its named plan for `mode`, or its independent plan when the mode does not apply to that group. Every plan gets + the same rows, assembly rule (assembly.assemble with the two-strategy channel rule), taps and labels.""" + from glayout.sharing import SharingPlan, group_candidates, named_plans + devs = device_specs(circuit, sizing); groups = sharing_groups(devs) + rows = {"n": [], "p": [], "passive": []} + for d in circuit.devices: + if d.kind == "res": + sz = sizing[d.name] + rows["passive"].append(resistor_pincell(pdk, d.name, d.nets[0], d.nets[1], float(sz["r"]), body_net=sz.get("body", "VSS"))) + elif d.kind == "cap": + sz = sizing[d.name] + rows["passive"].append(mimcap_pincell(pdk, d.name, d.nets[0], d.nets[1], float(sz["c"]))) + applied = []; evidence = []; nf_total = 0 + for gi, g in enumerate(groups): + pol = "n" if g[0].model_role == "nfet" else "p" + if plans and str(gi) in plans: + plan = SharingPlan.from_json(plans[str(gi)]); src = "explicit" + else: + nm = named_plans(pdk, g) + plan = nm.get(mode) or nm["independent"]; src = "named" if nm.get(mode) else "named_fallback_independent" + res = build_mos_group(pdk, g, plan=plan, name=f"grp{gi}") + rows[pol].append(from_group_result(res, f"grp{gi}", pol, g[0].b)) + applied.append({"group": gi, "devices": [d.logical_id for d in g], "plan": res.applied_plan, "mode_requested": mode, "plan_source": src, + "plan_mode_label": plan.mode_label}) + evidence.append(res.physical_sharing_evidence); nf_total += sum(d.nf for d in g) + row_specs = [] + if rows["n"]: row_specs.append(RowSpec(rows["n"], "n", False, rows["n"][0].body_net)) + if rows["p"]: row_specs.append(RowSpec(rows["p"], "p", True, rows["p"][0].body_net)) + if rows["passive"]: row_specs.append(RowSpec(rows["passive"], "passive", True, None, taps=False)) + top = name or f"{circuit.circuit_id}_{pdk.name}_{mode}" + asm = assemble(pdk, row_specs, circuit.ports, name=top) + return {"component": asm["component"], "name": top, "groups": [[d.logical_id for d in g] for g in groups], "applied_plans": applied, "evidence": evidence, + "assembly_stats": asm["stats"], "expected_fingers": nf_total, "trunks": asm["trunks"]} diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/llm/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/agent_sessions.py b/benchmarks/textbook_sharing/textbook_sharing/llm/agent_sessions.py new file mode 100644 index 00000000..9df5781c --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/agent_sessions.py @@ -0,0 +1,141 @@ +"""Model sessions run through an agent interface (used for the Anthropic model). + +Each session is a folder that holds only README.md (the session rules), interface.md, examples.md, task.md and +submit.sh. The agent writes p_answer.md and runs `bash submit.sh `, which hands the answer to the evaluator +(llm/evaluate.py, the same evaluator as for the Codex sessions) and prints the tool report. The agent is started with +LAUNCH_TEXT (folder filled in); nothing else is given to it. Afterwards every tool call in the agent transcripts is +audited: allowed are Read/Write/Edit of a file inside the session folder and `bash submit.sh ` run inside it. + + prepare + config keys: model_tag, workspace (folder for the agent-side session folders), reps, max_proposals (default 8), + interface ("sharing" | "base"), examples (path to examples.md), only (optional task ids), model (optional), + evaluator_cmd (optional; '{session}' and '{k}' are filled in, default runs the evaluator in this Python). + Creates ///r/ and the evaluator-side /models///r/ + session.json, and writes //sessions.json (the list of agent-side folders). + launch + prints the text to start the agent with. + audit + map.json: agent id -> session folder; transcripts are JSONL files agent-.jsonl in which every assistant + message lists its tool calls as content items {"type": "tool_use", "name", "input"}. + Classes of a flagged call: in_folder_edit (text processing of the session's own files: a protocol deviation that + gives the agent no outside information) and isolation_breach (anything else: outside paths, listing or search, + network). Flagged sessions are then reviewed by hand.""" +import json, re, shlex, sys +from pathlib import Path +from textbook_sharing import paths + +RULES = """# Session rules +You are the model under test in a controlled experiment. Work ONLY with the files in this folder: +read README.md, interface.md, examples.md and task.md; write your proposals as p1_answer.md, p2_answer.md, ... +(each containing exactly one ```python block with `plans = {{...}}`, as interface.md describes); after writing +p_answer.md run exactly `bash submit.sh ` (k = proposal number) and read the tool report it prints. +You have at most {max_proposals} proposals; rejected and repeated proposals also count. You may stop early. +Do not open, list or search any other file or directory, and do not run any other command. +When you stop, reply with one line: the number of the proposal you consider best. +""" + +LAUNCH_TEXT = """You are the model under test in a controlled analog-layout experiment. Your session folder is: +{folder} + +Read README.md in that folder first and follow it exactly. Use only the files in that folder (README.md, interface.md, examples.md, task.md). Write each proposal with the Write tool as p_answer.md in that folder, then run exactly this Bash command (with k replaced by the proposal number) to submit it and read the tool report: +cd {folder} && bash submit.sh k +Do not open, list or search any other file or directory, and do not run any other command. Run the submit command in the foreground and wait for its report. You have at most {max_proposals} proposals. When you stop, reply with one line: the number of the proposal you consider best.""" + +SUBMIT = """#!/bin/bash +# sends p$1_answer.md to the evaluator and prints the tool report (the only command the model may run) +set -e +k=$1; [ -f "p${{k}}_answer.md" ] || {{ echo "missing p${{k}}_answer.md"; exit 1; }} +cp "p${{k}}_answer.md" {session}/"p${{k}}_answer.md" +(cd {root} && {evaluator}) >/dev/null 2>&1 || true +cat {session}/"p${{k}}_feedback.txt" +""" + + +def prepare(cfg): + tag = cfg["model_tag"]; ws = Path(cfg["workspace"]).resolve(); nmax = cfg.get("max_proposals", 8) + interface = Path(__file__).with_name("interface_base.md" if cfg.get("interface") == "base" else "interface_sharing.md").read_text() + examples = Path(cfg["examples"]).read_text() + tasks = json.load(open(paths.MODEL_TASKS / "tasks.json"))["tasks"] + if cfg.get("only"): + tasks = [t for t in tasks if t["task_id"] in cfg["only"]] + made = [] + for rep in range(1, cfg["reps"] + 1): + for t in tasks: + sd = ws / tag / t["task_id"] / f"r{rep}"; sd.mkdir(parents=True, exist_ok=True) + ev = (paths.MODEL_RUNS / tag / t["task_id"] / f"r{rep}").resolve(); ev.mkdir(parents=True, exist_ok=True) + (sd / "README.md").write_text(RULES.format(max_proposals=nmax)) + (sd / "interface.md").write_text(interface); (sd / "examples.md").write_text(examples) + (sd / "task.md").write_text((paths.MODEL_TASKS / t["task_id"] / "task.md").read_text()) + tmpl = cfg.get("evaluator_cmd") or f"{shlex.quote(sys.executable)} -m textbook_sharing.llm.evaluate {{session}} {{k}}" + (sd / "submit.sh").write_text(SUBMIT.format(session=shlex.quote(str(ev)), root=shlex.quote(str(paths.ROOT)), + evaluator=tmpl.format(session=shlex.quote(str(ev)), k='"$k"'))) + sess = {"task_id": t["task_id"], "case_dir": t["case_dir"], "model_tag": tag, "rep": rep, + "entry": "agent session, file-scoped workspace, every tool call audited", "max_proposals": nmax, + "interface": cfg.get("interface", "sharing")} + if cfg.get("model"): + sess["model"] = cfg["model"] + json.dump(sess, open(ev / "session.json", "w"), indent=1) + made.append(str(sd)) + json.dump(made, open(ws / tag / "sessions.json", "w"), indent=1) + print(len(made), "sessions prepared under", ws / tag) + + +def classify(cmd, folder): + """Class of a Bash command that is not exactly `bash submit.sh `.""" + roots = r"(?:Users|private|home|tmp|etc|var|opt|Applications|System|Library|usr|bin|dev|proc)" + outside = [x for x in re.findall(rf"(?:^|(?<=[\s'\"=]))(/{roots}\b[^\s'\"<>|;&]*)", cmd) if not x.startswith(folder) and x != "/dev/null"] + risky = re.search(r"\.\./|\bls\b|\bfind\b|\bgrep\s+-\w*[rR]|\bcat\s+/|\bcurl\b|\bwget\b|\bssh\b|\bscp\b|~/|\$HOME", cmd) + return "isolation_breach" if (outside or risky) else "in_folder_edit" + + +def audit(amap, tdir): + out = {} + for aid, folder in amap.items(): + folder = folder.rstrip("/"); f = Path(tdir) / f"agent-{aid}.jsonl" + if not f.exists(): + out[aid] = {"folder": folder, "error": "transcript not found"}; continue + calls = []; flags = [] + for line in open(f): + try: + e = json.loads(line) + except ValueError: + continue + content = (e.get("message") or {}).get("content") + for c in content if isinstance(content, list) else []: + if c.get("type") != "tool_use": + continue + name = c.get("name"); inp = c.get("input") or {} + call = {"tool": name, "input": {k: str(v)[:200] for k, v in inp.items()}}; calls.append(call) + if name in ("Read", "Write", "Edit"): + ok = str(inp.get("file_path", "")).startswith(folder + "/") + elif name == "Bash": + cmd = str(inp.get("command", "")).strip() + ok = bool(re.fullmatch(rf"(cd {re.escape(folder)} && )?bash submit\.sh \d+", cmd)) + if not ok: + call["class"] = classify(cmd, folder) + else: + ok = False + if not ok: + call.setdefault("class", "isolation_breach"); flags.append(call) + out[aid] = {"folder": folder, "n_tool_calls": len(calls), "flagged": flags, "clean": not flags, + "tools": sorted({c["tool"] for c in calls}), "breach": any(x["class"] == "isolation_breach" for x in flags), + "in_folder_edits": sum(1 for x in flags if x["class"] == "in_folder_edit")} + return out + + +def main(): + cmd = sys.argv[1] + if cmd == "prepare": + prepare(json.load(open(sys.argv[2]))) + elif cmd == "launch": + print(LAUNCH_TEXT.format(folder=Path(sys.argv[2]).resolve(), max_proposals=int(sys.argv[3]) if len(sys.argv) > 3 else 8)) + elif cmd == "audit": + res = audit(json.load(open(sys.argv[2])), sys.argv[3]); json.dump(res, open(sys.argv[4], "w"), indent=1) + print(sum(1 for v in res.values() if v.get("clean")), "clean of", len(res), "| flagged as breach", + sum(1 for v in res.values() if v.get("breach")), "| sessions with in-folder edits", sum(1 for v in res.values() if v.get("in_folder_edits"))) + else: + raise SystemExit(__doc__) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/evaluate.py b/benchmarks/textbook_sharing/textbook_sharing/llm/evaluate.py new file mode 100644 index 00000000..e6393bdd --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/evaluate.py @@ -0,0 +1,104 @@ +"""Evaluate one model proposal for one task (evaluator side; the model never sees this folder). +usage: python -m textbook_sharing.llm.evaluate +Reads /session.json (task_id, case_dir, model, rep) and /p_answer.md; writes +/p_report.json (full, evaluator-side) and /p_feedback.txt (what the model sees). +Every proposal consumes one unit of the proposal budget; a full EDA verification is run only for a legal plan that +was not proposed before in the same session (duplicates return the earlier feedback, flagged).""" +from __future__ import annotations +import sys, json, time, hashlib +from pathlib import Path +from textbook_sharing.llm.plan_parser import extract_code, parse_program, to_sharing_plan, ParseError + + +def feedback_text(rep): + if rep["status"] == "rejected_program": + lines = [f"Proposal {rep['k']}: REJECTED before building (no geometry was generated)."] + for e in rep["errors"]: lines.append(f" - [{e.get('code')}] {e.get('message')}" + (f" (line {e['line']})" if e.get("line") else "") + (f" group {e['group']}" if "group" in e else "")) + return "\n".join(lines) + r = rep["run"] + lines = [f"Proposal {rep['k']}: built and verified" + (" (DUPLICATE of an earlier proposal; same result)" if rep.get("duplicate_of") else "") + f". Overall status: {r['primary_status']}."] + v = r.get("verify", {}) + lines.append(" stages: " + ", ".join(f"{k}={v.get(k)}" for k in ("drc", "lvs", "constraints", "pex", "physical") if k in v) + f", post-layout simulation/spec={(r.get('postsim') or {}).get('status')}") + if r.get("area_um2") is not None: + st = r.get("assembly_stats", {}) + lines.append(f" full-DUT bounding box: {st.get('width')} x {st.get('height')} um = {r['area_um2']} um^2") + for row in st.get("row_dims", []): + lines.append(f" row {row['kind']}: width {row['width']} um (+ taps {2 * row['tap_extent']:.2f}), height {row['height']} um; cells " + ", ".join(f"{c['name']} {c['w']}x{c['h']}" for c in row["cells"])) + lines.append(f" routing channels: heights {[round(x, 3) for x in st.get('channel_heights', [])]} um; channel strategy {st.get('channel_strategy')}") + for gi, ev in enumerate(r.get("evidence") or []): + lines.append(f" group {gi}: active islands {ev.get('active_islands')}, cross-device shared diffusion nodes {ev.get('n_cross_device_shared_nodes')}, cross-device shared gate conductors {ev.get('n_cross_device_gate_conductors')}") + det = r.get("detail", {}) + for k in ("drc_categories", "lvs_final", "sizing", "spec_failures", "error"): + if det.get(k): lines.append(f" {k}: {det[k]}") + return "\n".join(lines) + + +def main(): + sd = Path(sys.argv[1]).resolve(); k = int(sys.argv[2]) + sess = json.load(open(sd / "session.json")) + from textbook_sharing.run_case import load_case_dir, pdk_obj, run + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import device_specs, sharing_groups + from glayout.sharing import validate_plan, rules_for + case, cj = load_case_dir(sess["case_dir"]); circ = CIRCUITS[case.circuit_id]; pdk = pdk_obj(case.pdk) + groups = sharing_groups(device_specs(circ, case.sizing)) + ans = (sd / f"p{k}_answer.md").read_text() + rep = {"k": k, "t": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), "answer_chars": len(ans)} + t0 = time.time(); errors = []; plans = {} + try: + code = extract_code(ans); rep["program_chars"] = len(code) + calls = parse_program(code, sess.get("interface", "sharing")) + missing = [gi for gi in range(len(groups)) if gi not in calls]; extra = [gi for gi in calls if gi >= len(groups)] + if missing: errors.append({"code": "missing_group", "message": f"no plan for group(s) {missing}"}) + if extra: errors.append({"code": "unknown_group", "message": f"group index(es) {extra} do not exist (groups 0..{len(groups) - 1})"}) + R = rules_for(pdk) + for gi, call in calls.items(): + if gi >= len(groups): continue + try: + plan = to_sharing_plan(call, groups[gi], pdk) + except ParseError as e: + errors.append({**e.to_json(), "group": gi}); continue + vr = validate_plan(R, groups[gi], plan) + if not vr.ok: + for e in vr.errors: errors.append({"code": e["code"], "message": e["message"], "group": gi}) + continue + plans[str(gi)] = plan.to_json() + except ParseError as e: + errors.append(e.to_json()) + rep["parse_check_s"] = round(time.time() - t0, 3) + if errors: + rep.update({"status": "rejected_program", "errors": errors}) + else: + gid = hashlib.sha256(json.dumps([plans[str(i)]["plan_id"] for i in range(len(groups))]).encode()).hexdigest()[:16] + rep["global_plan_id"] = gid + seen = json.load(open(sd / "seen.json")) if (sd / "seen.json").exists() else {} + if gid in seen: + old = json.load(open(sd / f"p{seen[gid]}_report.json")) + rep.update({"status": "evaluated", "duplicate_of": seen[gid], "run": old["run"]}) + else: + od = sd / f"p{k}_run" + r = run(sess["case_dir"], od, plans=plans, label=f"{sess['model_tag']}_r{sess['rep']}_p{k}", context={"experiment": "llm", "task": sess["task_id"], "model": sess["model_tag"]}, + nominal_sizing=sess.get("nominal_sizing")) + det = {} + vr = json.load(open(od / "verify" / "result.json")) if (od / "verify" / "result.json").exists() else {} + stg = vr.get("stages", {}) + if stg.get("drc", {}).get("categories"): det["drc_categories"] = stg["drc"]["categories"] + lv = stg.get("lvs", {}) + if lv.get("status") not in (None, "passed"): det["lvs_final"] = (lv.get("parsed") or {}).get("final") or lv.get("reason") + if stg.get("constraints", {}).get("status") not in (None, "passed"): det["sizing"] = {k2: v2 for k2, v2 in stg["constraints"].items() if k2 in ("status", "mismatches", "error")} + sp = (r.get("postsim") or {}).get("spec") or {} + fails = {m: {"value": d.get("value"), "limit": d.get("spec")} for m, d in sp.items() if not d.get("ok")} + if fails: det["spec_failures"] = fails + if r.get("error"): det["error"] = r["error"][:300] + r["detail"] = det + rep.update({"status": "evaluated", "run": {k2: r.get(k2) for k2 in ("primary_status", "verify", "area_um2", "assembly_stats", "evidence", "postsim", "detail", "timing_s", "gds_sha256", "applied_plans", "matching")}}) + seen[gid] = k; json.dump(seen, open(sd / "seen.json", "w")) + rep["evaluator_s"] = round(time.time() - t0, 2) + json.dump(rep, open(sd / f"p{k}_report.json", "w"), indent=1, default=str) + fb = feedback_text(rep) + (sd / f"p{k}_feedback.txt").write_text(fb) + print(fb) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/interface_base.md b/benchmarks/textbook_sharing/textbook_sharing/llm/interface_base.md new file mode 100644 index 00000000..9815f23a --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/interface_base.md @@ -0,0 +1,45 @@ +# Device-placement interface (what you can control) + +You are choosing the physical organisation of the transistors of an analog circuit. The circuit (devices, nets, +total widths W, lengths L, finger counts nf, body connections), the process, the row skeleton and the grouping of +transistors are FIXED by the task; you cannot change them. A deterministic generator (gLayout) builds the layout from your plan, and independent tools (official DRC deck, LVS against the target netlist, +an extracted-width check, parasitic extraction and post-layout simulation against frozen specifications) judge it. + +## Fixed skeleton +* Every MOS transistor is split into nf unit fingers of width W/nf (finger k of device "M3" is ("M3", k)). +* Transistors are pre-assigned to sharing groups (same polarity, body net, length and finger width). Each group + becomes one row cell; NMOS groups go in the bottom row, PMOS groups in the row above, resistors/capacitors in a top + row. Routing channels between rows, body ties, wells, metal-3 trunks and pin labels are generated automatically and + identically for every plan. +* Objective: the smallest full bounding-box area among plans that pass every check. A plan that fails a check has no area value. + +## What you choose for one group +This interface offers the device-level options of base gLayout: multi-finger transistors (neighbouring fingers of the +SAME transistor share a source/drain diffusion region) and the interdigitated / common-centroid placement of the +transistors of a group in one row. Different transistors never share a diffusion region or a gate conductor here: +every transistor has its own gate strap below the row, and fingers of different transistors are separated by an +active-island gap. + +For every group write `fet_row(arrangement=..., orientation=..., contact_end=...)`: +* arrangement: "block" = transistors one after another; "interleave" = round-robin finger by finger (interdigitated); + "abba" = A B B A ... (two transistors with an even finger count, common centroid); "mirror" = first halves in + order, then second halves in reverse order (even finger counts). +* orientation: "alt_SD" or "alt_DS" = the fingers alternate source/drain along the row starting with source-left or + drain-left (this is what lets neighbouring fingers of one transistor share their diffusion). +* contact_end: "left" or "right" = end of each transistor's gate strap where its contact pad sits. + +## How to write it +Answer with ONE ```python block containing exactly one statement, `plans = {group_index: fet_row(...), ...}`, with an +entry for every group, e.g. + +```python +plans = {0: fet_row(arrangement="interleave", orientation="alt_SD", contact_end="left"), + 1: fet_row(arrangement="block", orientation="alt_DS", contact_end="right")} +``` +Only this call with keyword arguments is accepted; anything else is rejected with a reason and still counts as a proposal. + +## Feedback you will get +After each proposal: either the list of reasons it was rejected before building, or the tool report (status of every +check, bounding box, row and cell sizes, how many diffusion nodes / gate conductors are shared across devices, and +failure details). Each proposal (including rejected and repeated ones) uses one unit of your proposal budget. +You may stop early by answering with the single word FINAL (your best passing proposal is kept). diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/interface_sharing.md b/benchmarks/textbook_sharing/textbook_sharing/llm/interface_sharing.md new file mode 100644 index 00000000..3a989d2e --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/interface_sharing.md @@ -0,0 +1,71 @@ +# Sharing-plan interface (what you can control) + +You are choosing the physical organisation of the transistors of an analog circuit. The circuit (devices, nets, +total widths W, lengths L, finger counts nf, body connections), the process, the row skeleton and the grouping of +transistors are FIXED by the task; you cannot change them. A deterministic generator (gLayout with a shared-construction +extension) builds the layout from your plan, and independent tools (official DRC deck, LVS against the target netlist, +an extracted-width check, parasitic extraction and post-layout simulation against frozen specifications) judge it. + +## Fixed skeleton +* Every MOS transistor is split into nf unit fingers of width W/nf (finger k of device "M3" is ("M3", k)). +* Transistors are pre-assigned to sharing groups (same polarity, body net, length and finger width). Each group + becomes one row cell; NMOS groups go in the bottom row, PMOS groups in the row above, resistors/capacitors in a top + row. Routing channels between rows, body ties, wells, metal-3 trunks and pin labels are generated automatically and + identically for every plan. +* Objective: the smallest full bounding-box area among plans that pass every check. A plan that fails a check has no area value. + +## What a plan of one group fixes +A plan lists the group's fingers left to right and decides, for each finger, which side is its source: +* `finger_order`: every unit finger of every device of the group exactly once, e.g. [("M1",0),("M2",0),("M1",1)]. +* `orientations`: one entry per position, "SD" (source on the left, drain on the right) or "DS". +* `diffusion_joins`: n-1 booleans; True between positions i and i+1 means the two fingers share ONE diffusion region and + contact column. This is legal only if the right terminal net of finger i equals the left terminal net of finger i+1 + (same device or different devices). Unjoined neighbours become separate active islands with a spacing gap. +* `gate_groups`: a partition of the positions into poly straps, `GateGroup(fingers=(positions...), side="bottom"|"top", + pad_end="left"|"right")`. All gates of one strap must carry the same gate net. A bottom strap runs below the + active over the span of its fingers with its contact pad at the left or right end of that span. A top strap runs above + the active and reaches from its fingers to the left or right end of the group, where its pad sits. Two straps on the + same side must not overlap in span (top straps: in reach); at most two top straps (one reaching left, one right). +* Each extra active island costs width (island gap); each top strap costs height (an extra strap band); straps on both + sides of one span need an extra spacing offset; more bottom straps need a second pad level (height). + +## How to write it +Answer with ONE ```python block containing exactly one statement, `plans = {group_index: plan, ...}`, with an +entry for every group. A plan is either + +```python +SharingPlan(finger_order=[("M1", 0), ("M2", 0), ("M2", 1), ("M1", 1)], + orientations=["SD", "DS", "SD", "DS"], + diffusion_joins=[True, True, True], + gate_groups=[GateGroup(fingers=(0, 3), side="bottom", pad_end="left"), + GateGroup(fingers=(1, 2), side="top", pad_end="right")]) +``` + +or the axis shorthand (expands deterministically into a SharingPlan): + +```python +axis_plan(arrangement="block"|"interleave"|"abba"|"mirror", + orientation="alt_SD"|"alt_DS"|"seek_SD"|"seek_DS", + diffusion="none"|"all_legal", gate="per_device"|"per_net", + strap_start="bottom"|"top", contact_end="left"|"right") +``` +* arrangement: block = devices one after another; interleave = round-robin finger by finger; abba = A B B A ... (two + devices, even nf); mirror = first halves in order, then second halves in reverse order (even nf). +* orientation: alt_* alternate SD/DS along the row starting with SD or DS; seek_* start with SD/DS and then give each + finger the orientation whose left net equals the previous finger's right net (otherwise alternate). +* diffusion: none = join only neighbouring fingers of the same device; all_legal = join every neighbouring pair whose + facing nets are equal (this is where different devices share a diffusion node). +* gate: per_device = one strap per device; per_net = one strap per gate net (different devices with the same gate net + share one poly conductor). +* strap_start: side of the first strap (by first finger); later straps take that side unless they overlap a strap + already there, then the other side. contact_end: pad end of the straps. + +Only literals, lists/tuples/dicts, list concatenation `+` and repetition `*` by an integer, `range(...)`, `list(...)`, +`tuple(...)` and calls of `SharingPlan`, `GateGroup`, `axis_plan` with keyword arguments are accepted; this is a +restricted program format, not general Python. Anything else is rejected with a reason and still counts as a proposal. + +## Feedback you will get +After each proposal: either the list of reasons it was rejected before building, or the tool report (status of every +check, bounding box, row and cell sizes, how many diffusion nodes / gate conductors are shared across devices, and +failure details). Each proposal (including rejected and repeated ones) uses one unit of your proposal budget. +You may stop early by answering with the single word FINAL (your best passing proposal is kept). diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/make_examples.py b/benchmarks/textbook_sharing/textbook_sharing/llm/make_examples.py new file mode 100644 index 00000000..8f0ce255 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/make_examples.py @@ -0,0 +1,67 @@ +"""Build examples.md for the model sessions from REAL evaluator runs on two development topologies (C01 basic mirror, +C07 differential pair with current-source loads; SKY130, nominal size). Neither topology is a task topology. +For each: program A in the axis shorthand, program B as an explicit SharingPlan (text rendered from a legal named plan of +that development case), and for C07 also one deliberately illegal program, so the rejection format is shown. Every +report shown is the evaluator's own feedback text for that program. +usage: python -m textbook_sharing.llm.make_examples [--interface base] -> /model_tasks/examples.md (+ /model_examples// sessions)""" +from __future__ import annotations +import sys, json, subprocess +from textbook_sharing import paths +CASES = [("C01", "sky130", "sW1_sL1"), ("C07", "sky130", "sW1_sL1")] + + +def plan_python(pj): + fo = ", ".join(f'("{d}", {k})' for d, k in pj["finger_order"]) + gg = ", ".join(f'GateGroup(fingers=({", ".join(str(x) for x in f)}{"," if len(f) == 1 else ""}), side="{s}", pad_end="{e}")' for f, s, e in pj["gate_groups"]) + return (f"SharingPlan(finger_order=[{fo}],\n" + f" orientations={json.dumps(pj['orientations'])},\n" + f" diffusion_joins={str(pj['diffusion_joins'])},\n" + f" gate_groups=[{gg}])") + + +def main(): + import argparse + ap = argparse.ArgumentParser(); ap.add_argument("--interface", default="sharing"); a = ap.parse_args(); base = a.interface == "base" + from textbook_sharing.run_case import load_case_dir, pdk_obj + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import device_specs, sharing_groups + from glayout.sharing import named_plans + from textbook_sharing.llm.tasks import task_text + parts = ["Each example shows a development circuit (NOT your task circuit), programs that were submitted for it, and the tool " + "report each program received. Areas of development circuits say nothing about your task's areas."] + for cid, pdk, size in CASES: + cdir = paths.CASES / cid / pdk / size + case, cj = load_case_dir(str(cdir)); groups = sharing_groups(device_specs(CIRCUITS[cid], case.sizing)); pk = pdk_obj(pdk) + sd = paths.MODEL_EXAMPLES / (f"{cid}_{pdk}_{size}" + ("_base" if base else "")); sd.mkdir(parents=True, exist_ok=True) + json.dump({"task_id": f"example_{cid}", "case_dir": paths.rel(cdir), "model_tag": "examples", "rep": 0, "interface": a.interface}, open(sd / "session.json", "w")) + axis = ", ".join(f'{gi}: axis_plan(arrangement="block", orientation="alt_SD", diffusion="none", gate="per_device", strap_start="bottom", contact_end="left")' for gi in range(len(groups))) + progs = [f"plans = {{{axis}}}"] + expl = [] + for gi, g in enumerate(groups): + nm = named_plans(pk, g); pl = nm.get("combined") or nm.get("diffusion_only") or nm["independent"] + expl.append(f"{gi}: {plan_python(pl.to_json())}") + progs.append("plans = {" + ",\n ".join(expl) + "}") + if cid == "C07": + g0 = groups[0]; d0 = g0[0].logical_id + bad = (f'plans = {{0: SharingPlan(finger_order=[("{d0}", 0), ("{d0}", 1)], orientations=["SD", "SD"], diffusion_joins=[True], ' + f'gate_groups=[GateGroup(fingers=(0, 1), side="bottom", pad_end="left")])' + "".join(f", {gi}: axis_plan(arrangement=\"block\", orientation=\"alt_SD\", diffusion=\"none\", gate=\"per_device\", strap_start=\"bottom\", contact_end=\"left\")" for gi in range(1, len(groups))) + "}") + progs.append(bad) + if base: + fr = lambda arr, ori, ce: f'fet_row(arrangement="{arr}", orientation="{ori}", contact_end="{ce}")' + progs = ["plans = {" + ", ".join(f"{gi}: " + fr("block", "alt_SD", "left") for gi in range(len(groups))) + "}", + "plans = {" + ", ".join(f"{gi}: " + fr("interleave", "alt_DS", "right") for gi in range(len(groups))) + "}"] + if cid == "C07": + progs.append("plans = {" + ", ".join(f'{gi}: fet_row(arrangement="block", orientation="alt_SD", contact_end="left", diffusion="all_legal")' for gi in range(len(groups))) + "}") + parts.append(f"\n## Example: {cid} ({pdk}, development size)\n" + task_text(str(cdir)).replace("# Task", "Case")) + for k, prog in enumerate(progs, start=1): + (sd / f"p{k}_answer.md").write_text(f"```python\n{prog}\n```\n") + r = subprocess.run([sys.executable, "-m", "textbook_sharing.llm.evaluate", str(sd), str(k)], capture_output=True, text=True, cwd=str(paths.ROOT)) + fb = (sd / f"p{k}_feedback.txt").read_text() if (sd / f"p{k}_feedback.txt").exists() else ("EVALUATOR ERROR\n" + r.stderr[-800:]) + parts.append(f"\n### Program {k}\n```python\n{prog}\n```\n### Tool report for program {k}\n```\n{fb}\n```") + out = paths.MODEL_TASKS / ("examples_base.md" if base else "examples.md"); out.parent.mkdir(parents=True, exist_ok=True) + out.write_text("\n".join(parts) + "\n") + print("written", out, len(out.read_text()), "chars") + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/plan_parser.py b/benchmarks/textbook_sharing/textbook_sharing/llm/plan_parser.py new file mode 100644 index 00000000..13be9650 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/plan_parser.py @@ -0,0 +1,163 @@ +"""Restricted-Python front end for model-written sharing programs. + +A model answer must contain one ```python block whose only statement is + + plans = { : , ... } # one entry per sharing group of the task + + is either + SharingPlan(finger_order=[("M1", 0), ...], orientations=["SD", ...], diffusion_joins=[True, ...], + gate_groups=[GateGroup(fingers=(0, 2), side="bottom", pad_end="left"), ...]) +or axis_plan(arrangement=..., orientation=..., diffusion=..., gate=..., strap_start=..., contact_end=...) + +This is NOT a Python interpreter: the AST is walked by `_ev`, which accepts only literals, list/tuple/dict displays, +unary minus, list/tuple concatenation and repetition by an integer literal, `range(...)`, `list(...)`, `tuple(...)`, +and calls of the three names above with keyword arguments. Anything else is rejected with a structured error +(code, message, line). The parsed plans are then checked by glayout.sharing.validate_plan (the same legality check +the builders use) and built by textbook_sharing.layout.build.""" +from __future__ import annotations +import ast, re + +ALLOWED_CALLS = {"SharingPlan", "GateGroup", "axis_plan", "fet_row", "range", "list", "tuple"} +# interface variants: "sharing" (the sharing interface) and "base" (capability of base gLayout multi-finger devices and +# interdigitated / common-centroid placement helpers: per-device finger arrangement, orientation and contact end, +# fingers of one device share diffusion, NO cross-device diffusion node and NO shared gate conductor) +INTERFACE_CALLS = {"sharing": ("SharingPlan", "axis_plan"), "base": ("fet_row",)} +BASE_FIXED = {"diffusion": "none", "gate": "per_device", "strap_start": "bottom"} +BASE_AXES = {"arrangement": ("block", "interleave", "abba", "mirror"), "orientation": ("alt_SD", "alt_DS"), "contact_end": ("left", "right")} + + +class ParseError(Exception): + def __init__(self, code, message, line=None): + super().__init__(message); self.code = code; self.message = message; self.line = line + + def to_json(self): + return {"code": self.code, "message": self.message, "line": self.line} + + +def extract_code(answer: str) -> str: + m = re.findall(r"```(?:python|py)?\s*\n(.*?)```", answer, re.S) + if not m: + raise ParseError("no_code_block", "the answer must contain exactly one ```python code block") + if len(m) > 1: + raise ParseError("multiple_code_blocks", f"found {len(m)} code blocks; give exactly one") + return m[0] + + +def _ev(node): + if isinstance(node, ast.Constant): + if isinstance(node.value, (int, float, str, bool)) or node.value is None: return node.value + raise ParseError("literal_type", f"literal of type {type(node.value).__name__} not allowed", node.lineno) + if isinstance(node, ast.UnaryOp) and isinstance(node.op, ast.USub): + v = _ev(node.operand) + if isinstance(v, (int, float)): return -v + raise ParseError("operator", "unary minus only on numbers", node.lineno) + if isinstance(node, (ast.List, ast.Tuple)): + vals = [_ev(e) for e in node.elts] + return vals if isinstance(node, ast.List) else tuple(vals) + if isinstance(node, ast.Dict): + return {_ev(k): _ev(v) for k, v in zip(node.keys, node.values)} + if isinstance(node, ast.BinOp) and isinstance(node.op, (ast.Add, ast.Mult)): + a, b = _ev(node.left), _ev(node.right) + if isinstance(node.op, ast.Add) and isinstance(a, (list, tuple)) and type(a) == type(b): return a + b + if isinstance(node.op, ast.Mult) and isinstance(a, (list, tuple)) and isinstance(b, int) and 0 <= b <= 512: return a * b + if isinstance(node.op, ast.Mult) and isinstance(b, (list, tuple)) and isinstance(a, int) and 0 <= a <= 512: return b * a + raise ParseError("operator", "only list/tuple concatenation and repetition by a small integer are allowed", node.lineno) + if isinstance(node, ast.Call): + if not isinstance(node.func, ast.Name) or node.func.id not in ALLOWED_CALLS: + raise ParseError("call_not_allowed", f"only {sorted(ALLOWED_CALLS)} may be called", node.lineno) + name = node.func.id + args = [_ev(a) for a in node.args]; kw = {k.arg: _ev(k.value) for k in node.keywords if k.arg} + if any(k.arg is None for k in node.keywords): + raise ParseError("syntax", "**kwargs not allowed", node.lineno) + if name == "range": + if kw or not (1 <= len(args) <= 3) or not all(isinstance(a, int) for a in args): + raise ParseError("range", "range takes 1-3 integer arguments", node.lineno) + r = list(range(*args)) + if len(r) > 4096: raise ParseError("range", "range too long", node.lineno) + return r + if name in ("list", "tuple"): + if kw or len(args) != 1 or not isinstance(args[0], (list, tuple)): + raise ParseError("call_args", f"{name}() takes one list/tuple/range", node.lineno) + return list(args[0]) if name == "list" else tuple(args[0]) + if args: + raise ParseError("call_args", f"{name}() takes keyword arguments only", node.lineno) + return {"__call__": name, **kw, "__line__": node.lineno} + raise ParseError("syntax", f"construct {type(node).__name__} is not allowed in a plan program", getattr(node, "lineno", None)) + + +def parse_program(code: str, interface: str = "sharing") -> dict: + """Returns {group_index: call-dict}. Raises ParseError.""" + try: + tree = ast.parse(code) + except SyntaxError as e: + raise ParseError("python_syntax", f"Python syntax error: {e.msg}", e.lineno) + stmts = [s for s in tree.body if not (isinstance(s, ast.Expr) and isinstance(s.value, ast.Constant) and isinstance(s.value.value, str))] + if len(stmts) != 1 or not isinstance(stmts[0], ast.Assign) or len(stmts[0].targets) != 1 or not isinstance(stmts[0].targets[0], ast.Name) or stmts[0].targets[0].id != "plans": + raise ParseError("program_shape", "the program must consist of exactly one statement: plans = {...}") + val = _ev(stmts[0].value) + if not isinstance(val, dict): + raise ParseError("program_shape", "plans must be a dict {group_index: plan}") + out = {} + for k, v in val.items(): + if not isinstance(k, int): raise ParseError("group_key", f"group keys must be integers, got {k!r}") + allowed = INTERFACE_CALLS[interface] + if not (isinstance(v, dict) and v.get("__call__") in allowed): + raise ParseError("plan_value", f"group {k}: value must be one of {' / '.join(a + '(...)' for a in allowed)} in this interface") + out[k] = v + return out + + +def to_sharing_plan(call: dict, devices, pdk): + """Turn a parsed call into a glayout.sharing.SharingPlan (or raise ParseError with a structured reason).""" + from glayout.sharing import SharingPlan, GateGroup, FingerRef + from glayout.sharing import enumeration as E + line = call.get("__line__") + if call["__call__"] == "fet_row": + keys = set(k for k in call if not k.startswith("__")) + if keys != set(BASE_AXES): + raise ParseError("fet_row_args", f"fet_row needs exactly {sorted(BASE_AXES)}; got {sorted(keys)}", line) + for k, vals in BASE_AXES.items(): + if call[k] not in vals: raise ParseError("axis_value", f"{k}={call[k]!r} not in {list(vals)}", line) + call = {**{k: v for k, v in call.items()}, **BASE_FIXED, "__call__": "axis_plan"} + pl = to_sharing_plan(call, devices, pdk); pl.mode_label = "llm:fet_row"; return pl + if call["__call__"] == "axis_plan": + keys = set(k for k in call if not k.startswith("__")) + need = set(E.AXES) + if keys != need: + raise ParseError("axis_plan_args", f"axis_plan needs exactly {sorted(need)}; got {sorted(keys)}", line) + for k in need: + if call[k] not in E.AXES[k]: + raise ParseError("axis_value", f"{k}={call[k]!r} not in {list(E.AXES[k])}", line) + dev = {d.logical_id: d for d in devices} + order, why = E._order(devices, call["arrangement"]) + if order is None: raise ParseError("axis_illegal", why, line) + orient = E._orientations(order, dev, call["orientation"]) + joins = E._joins(order, orient, dev, call["diffusion"]) + gg, why = E._gate_groups(order, dev, call["gate"], call["strap_start"], call["contact_end"]) + if gg is None: raise ParseError("axis_illegal", why, line) + return SharingPlan(order, orient, joins, gg, mode_label="llm:axis_plan") + req = {"finger_order", "orientations", "diffusion_joins", "gate_groups"} + keys = set(k for k in call if not k.startswith("__")) + if not req <= keys or keys - req: + raise ParseError("sharingplan_args", f"SharingPlan needs exactly {sorted(req)}; got {sorted(keys)}", line) + try: + fo = [FingerRef(str(a), int(b)) for a, b in call["finger_order"]] + except Exception: + raise ParseError("finger_order", "finger_order must be a list of (device_name, finger_index) pairs", line) + gg = [] + for g in call["gate_groups"]: + if not (isinstance(g, dict) and g.get("__call__") == "GateGroup"): + raise ParseError("gate_groups", "gate_groups must be a list of GateGroup(...)", line) + gk = set(k for k in g if not k.startswith("__")) + if gk != {"fingers", "side", "pad_end"}: + raise ParseError("gategroup_args", f"GateGroup needs fingers, side, pad_end; got {sorted(gk)}", g.get("__line__")) + try: + gg.append(GateGroup(tuple(int(x) for x in g["fingers"]), str(g["side"]), str(g["pad_end"]))) + except Exception: + raise ParseError("gategroup_args", "GateGroup fingers must be integer positions", g.get("__line__")) + ori = call["orientations"]; joins = call["diffusion_joins"] + if not (isinstance(ori, list) and all(isinstance(o, str) for o in ori)): + raise ParseError("orientations", "orientations must be a list of 'SD'/'DS' strings", line) + if not (isinstance(joins, list) and all(isinstance(j, bool) for j in joins)): + raise ParseError("diffusion_joins", "diffusion_joins must be a list of True/False", line) + return SharingPlan(fo, list(ori), list(joins), gg, mode_label="llm:SharingPlan") diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/run_codex.py b/benchmarks/textbook_sharing/textbook_sharing/llm/run_codex.py new file mode 100644 index 00000000..650613a4 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/run_codex.py @@ -0,0 +1,117 @@ +"""Run model sessions with an OpenAI model through the official Codex CLI (`codex exec`, non-interactive). + +Isolation: every call runs in an empty temporary directory with the shell tool and every other tool family disabled, +web search disabled, user configuration and rules ignored, and no session files kept (ephemeral). The model therefore +sees only the prompt text. The JSONL event log of every call is stored and checked: any item other than a message or +reasoning (for example a command execution) marks the call as an isolation breach and the session is flagged. +The CLI must already be logged in; this script never reads or writes credentials. +Conversation: each proposal is a fresh, stateless call whose prompt contains the interface, the worked examples, the +task and every earlier proposal with its tool report. Budget per session: max_proposals (rejected and repeated +proposals count). After each proposal the evaluator (llm/evaluate.py) builds and verifies the plan and writes the +report that goes into the next prompt. + +usage: python -m textbook_sharing.llm.run_codex +config keys: model, model_tag, effort, max_proposals, reps, parallel (default 3), interface ("sharing" | "base"), + examples (path to examples.md), only (optional list of task ids), reps_only (optional list of repetition numbers), + codex (optional path of the CLI, default "codex" on PATH), + evaluator_cmd (optional; default runs the evaluator in this Python; use e.g. + "scripts/run_in_container.sh 'python -m textbook_sharing.llm.evaluate {session} {k}'" when the EDA tools live in the + container).""" +import json, shlex, subprocess, sys, tempfile, time, threading +from concurrent.futures import ThreadPoolExecutor +from pathlib import Path +from textbook_sharing import paths + +DISABLE = ["shell_tool", "apps", "plugins", "browser_use", "browser_use_external", "computer_use", "in_app_browser", "image_generation", "skill_search", "sleep_tool"] +lock = threading.Lock() + + +def call_codex(codex, prompt, model, effort, logdir, tag): + with tempfile.TemporaryDirectory(prefix="codex_iso_") as tmp: + cmd = [codex, "exec", "--ephemeral", "--ignore-user-config", "--ignore-rules", "--skip-git-repo-check", "-s", "read-only", "-C", tmp, + "-m", model, "-c", f'model_reasoning_effort="{effort}"', "-c", 'web_search="disabled"', "--json"] + for f in DISABLE: + cmd += ["--disable", f] + cmd += ["-"] + t0 = time.time() + r = subprocess.run(cmd, input=prompt, capture_output=True, text=True, timeout=1800, cwd=tmp) + dt = time.time() - t0 + (logdir / f"{tag}_events.jsonl").write_text(r.stdout); (logdir / f"{tag}_stderr.txt").write_text(r.stderr[-20000:]) + msg = ""; usage = None; kinds = {}; breach = False + for line in r.stdout.splitlines(): + try: + e = json.loads(line) + except Exception: + continue + it = e.get("item") or {} + if it.get("type"): + kinds[it["type"]] = kinds.get(it["type"], 0) + 1 + if it.get("type") == "agent_message": + msg = it.get("text", "") + elif it.get("type") and it.get("type") not in ("agent_message", "reasoning"): + breach = True + if e.get("type") == "turn.completed": + usage = e.get("usage") + return {"answer": msg, "usage": usage, "item_kinds": kinds, "isolation_breach": breach, "rc": r.returncode, "seconds": round(dt, 1)} + + +def evaluate(cfg, sd, k): + tmpl = cfg.get("evaluator_cmd") + if tmpl: + cmd = tmpl.format(session=shlex.quote(str(sd)), k=k) + r = subprocess.run(cmd, shell=True, capture_output=True, text=True, cwd=str(paths.ROOT)) + else: + r = subprocess.run([sys.executable, "-m", "textbook_sharing.llm.evaluate", str(sd), str(k)], capture_output=True, text=True, cwd=str(paths.ROOT)) + fb = sd / f"p{k}_feedback.txt" + return fb.read_text() if fb.exists() and fb.read_text().strip() else f"(evaluator error: {r.stderr[-400:]})" + + +def run_session(cfg, task, rep): + model, tag = cfg["model"], cfg["model_tag"] + sd = paths.MODEL_RUNS / tag / task["task_id"] / f"r{rep}"; sd.mkdir(parents=True, exist_ok=True) + if (sd / "session_done.json").exists(): + return json.load(open(sd / "session_done.json")) + tdir = paths.MODEL_TASKS / task["task_id"] + interface = Path(__file__).with_name("interface_base.md" if cfg.get("interface") == "base" else "interface_sharing.md").read_text() + taskmd = (tdir / "task.md").read_text(); examples = Path(cfg["examples"]).read_text() + sess = {"task_id": task["task_id"], "case_dir": task["case_dir"], "model_tag": tag, "model": model, "rep": rep, "entry": "codex-cli exec (OpenAI)", + "reasoning_effort": cfg["effort"], "max_proposals": cfg["max_proposals"], "interface": cfg.get("interface", "sharing"), + "started": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime())} + json.dump(sess, open(sd / "session.json", "w"), indent=1) + history = []; calls = [] + for k in range(1, cfg["max_proposals"] + 1): + hist = "".join(f"\n## Your proposal {h['k']}\n{h['answer']}\n\n## Tool report for proposal {h['k']}\n{h['feedback']}\n" for h in history) + prompt = (f"{interface}\n\n# Worked examples (development circuits, not the task circuit)\n{examples}\n\n{taskmd}\n{hist}\n" + f"Now give proposal {k} of at most {cfg['max_proposals']} (remaining after this one: {cfg['max_proposals'] - k}). " + "Reply with exactly one ```python block containing `plans = {...}`, or with the single word FINAL to stop.") + (sd / f"p{k}_prompt.md").write_text(prompt) + c = call_codex(cfg.get("codex", "codex"), prompt, model, cfg["effort"], sd, f"p{k}") + calls.append({"k": k, **{x: c[x] for x in ("usage", "item_kinds", "isolation_breach", "rc", "seconds")}, "prompt_chars": len(prompt), "answer_chars": len(c["answer"])}) + (sd / f"p{k}_answer.md").write_text(c["answer"]) + if c["answer"].strip().upper().startswith("FINAL") and "```" not in c["answer"]: + break + fb = evaluate(cfg, sd, k) + history.append({"k": k, "answer": c["answer"], "feedback": fb}) + with lock: + print(tag, task["task_id"], f"r{rep}", f"p{k}", fb.splitlines()[0][:150] if fb else "", c["seconds"], "s", flush=True) + done = {"task_id": task["task_id"], "rep": rep, "model_tag": tag, "n_proposals": len(history), "calls": calls, + "isolation_breach_any": any(x["isolation_breach"] for x in calls), "finished": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime())} + json.dump(done, open(sd / "session_done.json", "w"), indent=1) + return done + + +def main(): + cfg = json.load(open(sys.argv[1])) + tasks = json.load(open(paths.MODEL_TASKS / "tasks.json"))["tasks"] + if cfg.get("only"): + tasks = [t for t in tasks if t["task_id"] in cfg["only"]] + jobs = [(t, rep) for rep in range(1, cfg["reps"] + 1) for t in tasks] + if cfg.get("reps_only"): + jobs = [(t, rep) for t, rep in jobs if rep in cfg["reps_only"]] + with ThreadPoolExecutor(cfg.get("parallel", 3)) as ex: + for d in ex.map(lambda tr: run_session(cfg, *tr), jobs): + print("DONE", d["task_id"], d["rep"], d["n_proposals"], "breach" if d["isolation_breach_any"] else "", flush=True) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/llm/tasks.py b/benchmarks/textbook_sharing/textbook_sharing/llm/tasks.py new file mode 100644 index 00000000..ad7beb28 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/llm/tasks.py @@ -0,0 +1,82 @@ +"""Build the model-visible task packages. Evaluator-side; writes only allowed content into +/model_tasks// (task.md, interface.md, examples.md). Nothing from the selection catalogue, no measured +area of any other plan, no reference program of the test topology, and no hidden case data is written there. +Main LLM tasks: topologies C02 C08 C09 C11 C16 C18 x 3 PDKs x sizes (2,1),(2,2) -> 36 requested; a task is eligible +only when its case is qualified and its reference implementation (independent mode in the main grid) passes every +automatic stage. Examples: two development topologies (C01 basic mirror, C07 differential pair) at the nominal size in +SKY130, each with two programs and the tool reports they received (from the main-grid runs of those dev cases). +usage: python -m textbook_sharing.llm.tasks""" +from __future__ import annotations +import json +from pathlib import Path +from textbook_sharing.grid import LLM_SIZES, SELECTION_TOPOLOGIES, size_tag +from textbook_sharing import paths + +OUT = paths.MODEL_TASKS +TOPO_NAMES = {"C01": "basic current mirror", "C02": "cascode current mirror", "C07": "differential pair with current-source loads", + "C08": "five-transistor OTA", "C09": "telescopic OTA (single-ended)", "C11": "two-stage Miller op amp with RC compensation", + "C16": "differential pair with resistor loads", "C18": "class-AB source-follower output stage"} +PDK_NAMES = {"sky130": "SkyWater SKY130 (1.8 V devices)", "gf180": "GlobalFoundries GF180MCU (3.3 V devices)", "ihp130": "IHP SG13G2 (1.2 V low-voltage devices)"} + + +def groups_text(case_dir): + from textbook_sharing.run_case import load_case_dir + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import device_specs, sharing_groups + case, cj = load_case_dir(case_dir); circ = CIRCUITS[case.circuit_id] + groups = sharing_groups(device_specs(circ, case.sizing)) + lines = [] + for gi, g in enumerate(groups): + row = "bottom (NMOS) row" if g[0].model_role == "nfet" else "middle (PMOS) row" + lines.append(f"group {gi} ({row}, body {g[0].b}, unit finger width {g[0].unit_width:g} um, L {g[0].length:g} um):") + for d in g: + lines.append(f" {d.logical_id}: {d.model_role} D={d.d} G={d.g} S={d.s} B={d.b}, nf={d.nf}, total W={d.width_total:g} um") + passives = [d for d in circ.devices if d.kind in ("res", "cap")] + if passives: + lines.append("passive row (fixed, not part of any plan): " + ", ".join(f"{d.name} ({d.kind} {d.nets[0]}-{d.nets[1]})" for d in passives)) + return "\n".join(lines), len(groups) + + +def task_text(case_dir): + cj = json.load(open(Path(case_dir) / "case.json")) + gt, ng = groups_text(case_dir) + netlist = (Path(case_dir) / "target.spice").read_text() + return f"""# Task {cj['case_id']} +Circuit: {TOPO_NAMES.get(cj['circuit_id'], cj['circuit_id'])} (textbook topology {cj['circuit_id']}). +Process: {PDK_NAMES[cj['pdk']]}. +Target netlist (fixed; sizes in um): +```spice +{netlist.strip()} +``` +Fixed sharing groups and rows ({ng} groups; you must give a plan for every group index): +{gt} +Goal: propose plans so that the generated layout passes every check with the smallest full bounding-box area. +""" + + +def main(): + OUT.mkdir(parents=True, exist_ok=True) + tasks = []; excluded = [] + for cid in SELECTION_TOPOLOGIES: + for pdk in ("sky130", "gf180", "ihp130"): + for sw, sl in LLM_SIZES: + tag = size_tag(sw, sl); tid = f"{cid}_{pdk}_{tag}" + cdir = paths.CASES / cid / pdk / tag + q = cdir / "qualification.json" + if not q.exists(): excluded.append({"task_id": tid, "reason": "no case (parameter-illegal or duplicate request)"}); continue + if json.load(open(q))["stage"] != "qualified": + excluded.append({"task_id": tid, "reason": "schematic not qualified: " + "; ".join(json.load(open(q))["qualification"]["reasons"][:2])}); continue + ref = paths.GRID_RUNS / cid / pdk / tag / "independent" / "result.json" + if not ref.exists() or json.load(open(ref)).get("primary_status") != "auto_passed": + excluded.append({"task_id": tid, "reason": "no passing reference implementation" if ref.exists() else "reference not run"}); continue + td = OUT / tid; td.mkdir(parents=True, exist_ok=True) + (td / "task.md").write_text(task_text(cdir)) + (td / "interface.md").write_text(Path(__file__).with_name("interface_sharing.md").read_text()) + tasks.append({"task_id": tid, "case_dir": paths.rel(cdir)}) + json.dump({"tasks": tasks, "excluded": excluded}, open(OUT / "tasks.json", "w"), indent=1) + print("eligible", len(tasks), "excluded", len(excluded)) + for e in excluded: print(" ", e) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/matching.py b/benchmarks/textbook_sharing/textbook_sharing/matching.py new file mode 100644 index 00000000..2a6f4156 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/matching.py @@ -0,0 +1,58 @@ +"""Declared matching constraints of the 18 topologies and their geometric check. + +Only what a case declares is checked. Declared per matched set: + ratio (hard): the total-width ratio of the devices equals the nominal ratio of the case definition (the sizing check + of the extracted netlist verifies absolute widths; here the plan's finger counts x unit width are compared); + orientation_balance (reported): per device, |#SD - #DS| fingers (0 = current flows both ways equally); + centroid_offset (reported): distance in finger pitches between the finger-position centroids of the devices when they + sit in the same group/row ('n/a: different groups' otherwise). +No case declares common-centroid as a requirement, so centroid and orientation are reported, never pass/fail. +These are geometry checks of the drawn plan; they are not silicon mismatch measurements.""" +from __future__ import annotations + +MATCHED = { + "C01": [("M1", "M2")], + "C02": [("M2", "M4"), ("M1", "M3")], + "C03": [("M1", "M2")], + "C13": [("M3", "M5"), ("M2", "M4")], + "C14": [("M1", "M2")], + "C07": [("M1", "M2"), ("M3", "M4")], + "C08": [("M1", "M2"), ("M4", "M5")], + "C09": [("M1", "M2"), ("M3", "M4"), ("M5", "M6"), ("M7", "M8")], + "C10": [("M1", "M2"), ("M3", "M4"), ("M5", "M6"), ("M7", "M8"), ("M9", "M10")], + "C11": [("M3", "M4"), ("M5", "M6"), ("M1", "M2")], + "C16": [("M1", "M2"), ("R1", "R2")], + "C17": [("M1", "M2"), ("R1", "R2"), ("R3", "R4")], + "C18": [("M3", "M5"), ("M4", "M6")], +} + + +def check(cid, sizing_nominal, sizing_case, applied_plans): + """applied_plans: list of {'devices': [...], 'plan': canonical plan json} from the builder.""" + out = []; hard_ok = True + where = {} + for gi, ap in enumerate(applied_plans): + pl = ap["plan"] + for pos, (dev, k) in enumerate(pl["finger_order"]): + where.setdefault(dev, {"group": gi, "pos": [], "orient": []}) + where[dev]["pos"].append(pos); where[dev]["orient"].append(pl["orientations"][pos]) + for a, b in MATCHED.get(cid, []): + rec = {"pair": [a, b]} + sa, sb = sizing_case.get(a, {}), sizing_case.get(b, {}); na, nb = sizing_nominal.get(a, {}), sizing_nominal.get(b, {}) + if "w" in sa and "w" in sb and "w" in na and "w" in nb and "nf" in sa: + r_case = sa["w"] / sb["w"]; r_nom = na["w"] / nb["w"] + rec["ratio"] = {"case": round(r_case, 6), "nominal": round(r_nom, 6), "ok": abs(r_case / r_nom - 1) < 1e-6} + hard_ok = hard_ok and rec["ratio"]["ok"] + elif "r" in sa: + rec["ratio"] = {"case": round(sa["r"] / sb["r"], 6), "nominal": round(na["r"] / nb["r"], 6), "ok": abs((sa["r"] / sb["r"]) / (na["r"] / nb["r"]) - 1) < 1e-6} + hard_ok = hard_ok and rec["ratio"]["ok"] + if a in where and b in where: + wa, wb = where[a], where[b] + rec["orientation_balance"] = {a: abs(wa["orient"].count("SD") - wa["orient"].count("DS")), b: abs(wb["orient"].count("SD") - wb["orient"].count("DS"))} + if wa["group"] == wb["group"]: + ca = sum(wa["pos"]) / len(wa["pos"]); cb = sum(wb["pos"]) / len(wb["pos"]) + rec["centroid_offset_pitches"] = round(abs(ca - cb), 3) + else: + rec["centroid_offset_pitches"] = "n/a: different groups" + out.append(rec) + return {"status": "passed" if hard_ok else "constraints_failed", "declared_pairs": out, "rule": "textbook_sharing.matching v1"} diff --git a/benchmarks/textbook_sharing/textbook_sharing/netlist.py b/benchmarks/textbook_sharing/textbook_sharing/netlist.py new file mode 100644 index 00000000..6565627a --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/netlist.py @@ -0,0 +1,89 @@ +"""Circuit data model and SPICE emitters (schematic target netlists per PDK).""" +from __future__ import annotations +from dataclasses import dataclass, field, asdict +import json, hashlib + +PDK_MODELS = { + "sky130": {"nfet": "sky130_fd_pr__nfet_01v8", "pfet": "sky130_fd_pr__pfet_01v8", "res": "sky130_fd_pr__res_high_po_0p35", "cap": "sky130_fd_pr__cap_mim_m3_1", "rsh": 319.8, + "prefix": "X", "unit": "", "vdd": 1.8}, + "gf180": {"nfet": "nfet_03v3", "pfet": "pfet_03v3", "res": "ppolyf_u", "cap": "cap_mim_2f0fF", "rsh": 315.0, "prefix": "M", "unit": "u", "vdd": 3.3}, + "ihp130": {"nfet": "sg13_lv_nmos", "pfet": "sg13_lv_pmos", "res": "rppd", "cap": "cap_cmim", "rsh": 260.0, "prefix": "X", "unit": "u", "vdd": 1.2}, +} + + +@dataclass +class Device: + name: str + kind: str # nfet | pfet | res | cap + nets: list # MOS: [d,g,s,b]; res/cap: [p,n] + params: dict = field(default_factory=dict) # MOS: w (total, um), l (um), nf; res: r (ohm) or w/l; cap: c (F) or w/l + + def to_json(self): + return asdict(self) + + +@dataclass +class Circuit: + circuit_id: str + name: str + ports: list + devices: list # list[Device] + source: dict = field(default_factory=dict) + notes: list = field(default_factory=list) + + def nets(self): + s = set() + for d in self.devices: s.update(d.nets) + return sorted(s) + + def to_json(self): + return {"circuit_id": self.circuit_id, "name": self.name, "ports": self.ports, "devices": [d.to_json() for d in self.devices], "source": self.source, "notes": self.notes} + + @staticmethod + def from_json(d): + return Circuit(d["circuit_id"], d["name"], list(d["ports"]), [Device(x["name"], x["kind"], list(x["nets"]), dict(x.get("params", {}))) for x in d["devices"]], d.get("source", {}), d.get("notes", [])) + + def sha(self): + return hashlib.sha256(json.dumps(self.to_json(), sort_keys=True).encode()).hexdigest() + + +def mos_line(pdk: str, dev: Device, w: float, l: float, nf: int = 1, name=None, per_finger=False) -> list[str]: + m = PDK_MODELS[pdk]; u = m["unit"]; nm = name or dev.name + model = m[dev.kind] + d, g, s, b = dev.nets + if per_finger: + wf = w / nf + return [f"{m['prefix']}{nm}_f{k} {d} {g} {s} {b} {model} w={wf:g}{u} l={l:g}{u}" for k in range(nf)] + if pdk == "ihp130": + return [f"{m['prefix']}{nm} {d} {g} {s} {b} {model} w={w:g}{u} l={l:g}{u} ng={nf} m=1"] + if pdk == "gf180": + return [f"{m['prefix']}{nm} {d} {g} {s} {b} {model} w={w:g}{u} l={l:g}{u} nf={nf} m=1"] + return [f"{m['prefix']}{nm} {d} {g} {s} {b} {model} w={w:g} l={l:g} nf={nf}"] + + +def emit_subckt(pdk: str, circuit: Circuit, sizing: dict, name: str, per_finger: bool = False, passives: str = "pdk", lvs: bool = False) -> str: + """sizing: device name -> {"w":..,"l":..,"nf":..} for MOS; {"r":..,"w":..,"l":..} for res; {"c":..,"w":..,"l":..} for cap.""" + lines = [f".subckt {name} {' '.join(circuit.ports)}"] + m = PDK_MODELS[pdk] + for dev in circuit.devices: + sz = sizing[dev.name] + if dev.kind in ("nfet", "pfet"): + lines += mos_line(pdk, dev, float(sz["w"]), float(sz["l"]), int(sz.get("nf", 1)), per_finger=per_finger) + elif dev.kind == "res": + p, n = dev.nets + if passives == "ideal" or "w" not in sz: + lines.append(f"R{dev.name} {p} {n} {sz['r']:g}") + else: + body = sz.get("body", "VSS") + if pdk == "sky130": lines.append(f"XR{dev.name} {p} {n} {body} {m['res']} l={sz['l']:g} mult=1") + elif pdk == "gf180": lines.append(f"R{dev.name} {p} {n} {body} {m['res']} L={sz['l']:g}u W={sz['w']:g}u" if lvs else f"XR{dev.name} {p} {n} {body} {m['res']} r_width={sz['w']:g}u r_length={sz['l']:g}u") + else: lines.append(f"XR{dev.name} {p} {n} {m['res']} w={sz['w']:g}u l={sz['l']:g}u m=1") + elif dev.kind == "cap": + p, n = dev.nets + if passives == "ideal" or "w" not in sz: + lines.append(f"C{dev.name} {p} {n} {sz['c']:g}") + else: + from textbook_sharing.assembly.passives import mimcap_spice_line # MIM capacitor (geometry from the sizing: w, l in um) + lines.append(mimcap_spice_line(pdk, dev.name, p, n, sz["w"], sz["l"], lvs=lvs)) + lines.append(f".ends {name}") + return "\n".join(lines) + "\n" diff --git a/benchmarks/textbook_sharing/textbook_sharing/nominal.py b/benchmarks/textbook_sharing/textbook_sharing/nominal.py new file mode 100644 index 00000000..6bfda379 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/nominal.py @@ -0,0 +1,118 @@ +"""First-pass design points and specification floors of every topology and PDK. + +The floors (specs) returned here are the category floors that every schematic must meet before its specification is +frozen (see qualify.py). The sizing, bias and load values were the starting points of a schematic pre-simulation loop; +the tuned nominal design points that the size grid is derived from are stored as data in data/nominal//.json. + +Units: w, l in um; currents in A; voltages in V. 'uw' = unit finger width helper per PDK. +Design intent per PDK: VDD sky130 1.8 V (lv 1.8 V devices), gf180 3.3 V, ihp 1.2 V; bias 20 uA branches; +L = 2*Lmin for analog devices (mirrors use 4*Lmin for output resistance), input pairs wider. +""" +from __future__ import annotations +from .cases import CaseSpec, PDK_POINT +from textbook_sharing.assembly.passives import resistor_geometry, mim_geometry, MIM + +LMIN = {"sky130": 0.15, "gf180": 0.28, "ihp130": 0.13} +UW = {"sky130": 0.5, "gf180": 0.5, "ihp130": 0.5} # unit finger width of the first-pass points (above the contactable minimum) + + +def M(pdk, nf, lmult=2): + return {"w": round(UW[pdk] * nf, 3), "l": round(LMIN[pdk] * lmult, 3), "nf": nf} + + +def nominal(cid, pdk): + vdd = PDK_POINT[pdk]["vdd"]; ib = 20e-6 + vcm = {"sky130": 0.9, "gf180": 1.5, "ihp130": 0.6}[pdk] + S = {}; bias = {}; load = {}; specs = {} + lmir = 8 if pdk == "ihp130" else 4 + if cid == "C01": + S = {"M1": M(pdk, 4, lmir), "M2": M(pdk, 4, lmir)}; bias = {"IB1": {"i": ib, "from": "VDD"}}; load = {"vout_nom": vdd / 2, "tol": 0.05}; bias["IREF"] = ib + specs = {"err": {"abs_max": 0.05}, "vmin": {"max": 0.35 * vdd}} + elif cid == "C02": + S = {k: M(pdk, 4, lmir // 2) for k in ("M1", "M2", "M3", "M4")}; bias = {"IIN1": {"i": ib, "from": "VDD"}, "IREF": ib}; load = {"vout_nom": 0.65 * vdd, "tol": 0.03} + specs = {"err": {"abs_max": 0.03}, "vmin": {"max": 0.6 * vdd}} + elif cid == "C03": + S = {k: M(pdk, 8, 16 if pdk == "ihp130" else 8) for k in ("M1", "M2", "M3")}; bias = {"IIN1": {"i": ib, "from": "VDD"}, "IREF": ib}; load = {"vout_nom": 0.65 * vdd, "tol": 0.10} + specs = {"err": {"abs_max": 0.10}, "vmin": {"max": 0.65 * vdd}} + elif cid == "C13": + S = {"M1": M(pdk, 1, lmir // 2), "M2": M(pdk, 4, lmir // 2), "M3": M(pdk, 4, lmir // 2), "M4": M(pdk, 4, lmir // 2), "M5": M(pdk, 4, lmir // 2)} + bias = {"IB1": {"i": ib, "from": "VDD"}, "IIN1": {"i": ib, "from": "VDD"}, "IREF": ib}; load = {"vout_nom": vdd / 2, "tol": 0.03} + specs = {"err": {"abs_max": 0.03}, "vmin": {"max": 0.4 * vdd}} + elif cid == "C14": + S = {"M1": M(pdk, 4, lmir), "M2": M(pdk, 4, lmir), "M3": M(pdk, 2, lmir), "M4": M(pdk, 4, lmir)} + bias = {"IIN1": {"i": ib, "from": "VDD"}, "IREF1": {"i": ib / 4, "from": "VDD"}, "IREF": ib}; load = {"vout_nom": 0.65 * vdd, "tol": 0.03} + specs = {"err": {"abs_max": 0.03}, "vmin": {"max": 0.6 * vdd}} + elif cid == "C04": + S = {"M1": M(pdk, 8, 2), "M2": M(pdk, 4, 2)}; bias = {"VB1": {"replica": "M1", "current": ib}}; load = {"CL": 100e-15} + specs = {"gain_lf": {"min": 20.0}, "f3db": {"min": 1e6}} + elif cid == "C05": + S = {"M1": M(pdk, 4, 2), "M2": M(pdk, 8, 2)}; bias = {"VB1": {"replica": "M1", "current": ib}}; load = {"vin_nom": 0.65 * vdd, "RL": 20e3, "CL": 1e-12} + specs = {"gain_at_nom": {"min": 0.6}, "f3db": {"min": 10e6}} + elif cid == "C06": + S = {"M1": M(pdk, 8, 2), "M2": M(pdk, 8, 2), "M3": M(pdk, 4, 2), "M4": M(pdk, 4, 2)} + bias = {"VB1": {"replica": "M4", "current": ib, "kind": "cascode"}, "VB2": {"replica": "M1", "current": ib, "kind": "cascode"}, "VB3": {"replica": "M2", "current": ib}}; load = {"CL": 100e-15} + specs = {"gain_lf": {"min": 30.0}, "f3db": {"min": 1e5}} + elif cid == "C12": + S = {"M1": M(pdk, 4, 2), "M2": M(pdk, 8, 2)}; bias = {}; load = {"CL": 100e-15} + specs = {"gain_lf": {"min": 15.0}, "f3db": {"min": 1e6}} + elif cid == "C07": + S = {"M1": M(pdk, 8, 2), "M2": M(pdk, 8, 2), "M3": M(pdk, 8, 2), "M4": M(pdk, 8, 2)} + bias = {"VB1": {"replica": "M3", "current": ib}, "IB1": {"i": 2 * ib, "from": "VSS"}}; load = {"vcm": vcm, "CL": 100e-15, "vocm": vdd / 2} + specs = {"gain_lf": {"min": 20.0}, "f3db": {"min": 1e5}} + elif cid == "C08": + lm = 3 if pdk == "ihp130" else 2 + S = {"M1": M(pdk, 8, lm), "M2": M(pdk, 8, lm), "M3": M(pdk, 8, lm), "M4": M(pdk, 4, lm), "M5": M(pdk, 4, lm)} + bias = {"VB1": {"replica": "M3", "current": 2 * ib}}; load = {"vcm": vcm, "CL": 1e-12, "inv_input": "VIN2"} + specs = {"gain_lf": {"min": 25.0}, "ugf": {"min": 5e6}} + elif cid == "C09": + lm = 2 + nfp = 32 if pdk in ("sky130", "ihp130") else 8 + S = {k: M(pdk, 16 if pdk != "gf180" else 8, lm) for k in ("M1", "M2", "M3", "M4")} + S.update({k: M(pdk, nfp, lm) for k in ("M5", "M6", "M7", "M8")}) + ib = 10e-6 if pdk in ("sky130", "ihp130") else ib + # cascode gate = V_T + 2 V_ov (W/4-equivalent replica); input CM keeps the pair in saturation (found by a grid search on the schematic) + bias = {"VB1": {"replica": "M3", "current": ib, "kind": "cascode"}, "IB1": {"i": 2 * ib, "from": "VSS"}} + load = {"vcm": {"expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", "currents": {"M3": ib, "M1": ib}}, "CL": 1e-12, "inv_input": "VIN2", "vout_target": 0.45 * vdd} + specs = {"gain_lf": {"min": 35.0}, "ugf": {"min": 2e6}} + elif cid == "C10": + lm = 4 if pdk in ("sky130", "ihp130") else 2 + S = {k: M(pdk, 8, lm) for k in ("M1", "M2", "M3", "M4", "M5", "M6", "M7", "M8", "M9", "M10")} + bias = {"VB1": {"replica": "M5", "current": ib, "kind": "cascode3"}, "VB2": {"replica": "M7", "current": ib, "kind": "cascode3"}, "VB3": {"replica": "M9", "current": ib}, "VB4": {"replica": "M3", "current": 2 * ib}, "IB1": {"i": 2 * ib, "from": "VDD"}}; load = {"vcm": vcm, "CL": 500e-15, "cmfb_gain": 20.0, "vocm": vdd / 2} + specs = {"gain_lf": {"min": 35.0}, "ugf": {"min": 5e6}} + elif cid == "C18": + # wide output followers and a 1:1 diode stack keep V_gs,n + V_sg,p below VDD at low V_ov (textbook stage needs headroom) + S = {"M1": M(pdk, 4, 2), "M2": M(pdk, 8, 2), "M3": M(pdk, 16, 2), "M4": M(pdk, 32, 2), "M5": M(pdk, 32, 2), "M6": M(pdk, 64, 2)} + bias = {"VB1": {"replica": "M2", "current": ib}} + load = {"RL": 20e3, "CL": 5e-12, "vamp": 0.02, "vout_target": 0.5 * vdd, "vin_center": 0.3 * vdd, "servo_slope": 200.0, "options": ".option method=gear reltol=1e-3"} + specs = {"thd_pct": {"max": 3.0}, "iq": {"max": 300e-6}, "f3db": {"min": 5e6}} + elif cid == "C15": + rl = {"sky130": 20e3, "gf180": 40e3, "ihp130": 12e3}[pdk] + S = {"M1": M(pdk, 4, 2), "R1": {"r": rl, "body": "VSS"}}; bias = {}; load = {"CL": 100e-15} + specs = {"gain_lf": {"min": 8.0}, "f3db": {"min": 1e6}} + elif cid == "C16": + rl = {"sky130": 20e3, "gf180": 40e3, "ihp130": 12e3}[pdk] + S = {"M1": M(pdk, 8, 2), "M2": M(pdk, 8, 2), "R1": {"r": rl, "body": "VSS"}, "R2": {"r": rl, "body": "VSS"}} + bias = {"IB1": {"i": 2 * ib, "from": "VSS"}}; load = {"vcm": vcm, "CL": 100e-15} + specs = {"gain_lf": {"min": 8.0}, "f3db": {"min": 1e6}} + elif cid == "C17": + rl = {"sky130": 20e3, "gf180": 40e3, "ihp130": 15e3}[pdk]; rs = 2e3 if pdk != "ihp130" else 1e3 + S = {"M1": M(pdk, 8, 2), "M2": M(pdk, 8, 2), "M3": M(pdk, 8, 2), "R1": {"r": rl, "body": "VSS"}, "R2": {"r": rl, "body": "VSS"}, "R3": {"r": rs, "body": "VSS"}, "R4": {"r": rs, "body": "VSS"}} + bias = {"VB1": {"replica": "M3", "current": 2 * ib}}; load = {"vcm": vcm, "CL": 100e-15} + specs = {"gain_lf": {"min": 6.0}, "f3db": {"min": 1e6}} + elif cid == "C11": + # two-stage Miller OTA (PMOS input pair, NMOS mirror load, NMOS CS second stage with PMOS current source, + # RC Miller compensation). IB1 is a current sink into the diode M1; M2/M7 mirror it (2x). VIN1 is the inverting input. + lm = 2 + S = {"M1": M(pdk, 4, lm), "M2": M(pdk, 8, lm), "M3": M(pdk, 8, lm), "M4": M(pdk, 8, lm), "M5": M(pdk, 4, lm), "M6": M(pdk, 4, lm), + "M7": M(pdk, 8, lm), "M8": M(pdk, 8, lm), "R1": {"r": 3000.0, "body": "VSS"}, "C1": {"c": 1e-12}} + bias = {"IB1": {"i": ib, "from": "VSS"}} + load = {"vcm": 0.4 * vdd, "CL": 1e-12, "inv_input": "VIN1", "vout_target": 0.5 * vdd} + specs = {"gain_lf": {"min": 40.0}, "ugf": {"min": 2e6}, "pm": {"min": 45.0}} + else: + raise KeyError(cid) + for k, v in S.items(): + if "r" in v and "w" not in v: + w, l = resistor_geometry(pdk, v["r"]); v["w"] = w; v["l"] = l + if "c" in v and "w" not in v: + w, l = mim_geometry(pdk, v["c"]); v["w"] = w; v["l"] = l; v["model"] = MIM[pdk]["model"] + return CaseSpec(f"{cid}_{pdk}_nominal", cid, pdk, "nominal", S, {"VDD": vdd, "VSS": 0.0}, bias, load, specs, notes=["first-pass sizing"]) diff --git a/benchmarks/textbook_sharing/textbook_sharing/overrides.py b/benchmarks/textbook_sharing/textbook_sharing/overrides.py new file mode 100644 index 00000000..17e2c3c0 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/overrides.py @@ -0,0 +1,50 @@ +"""Changes to the nominal design points, each with its reason, and the explicit list of test +auxiliaries of every case (they live in the testbench, never in the DUT layout, and never count towards core area). +Edited only before qualification; every change is recorded in the case notes.""" +from __future__ import annotations +import copy + +# sizing / bias / load changes applied to the nominal point before the grid derivation: cid -> pdk -> dict +CHANGES = { + # class-AB output stage: the test returns RL/CL to mid-supply (see testbench.tb_buffer_ab) + "C18": {"*": {"load": {"RL": 20e3, "CL": 5e-12, "vout_amp": 0.1}, "note": "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added"}}, +} + + +def apply(cid, pdk, sizing, bias, load): + s, b, l = copy.deepcopy(sizing), copy.deepcopy(bias), copy.deepcopy(load); notes = [] + for key in ("*", pdk): + ch = CHANGES.get(cid, {}).get(key) + if not ch: continue + for dev, v in ch.get("sizing", {}).items(): s[dev] = {**s.get(dev, {}), **v} + b.update(ch.get("bias", {})); l.update(ch.get("load", {})) + if ch.get("note"): notes.append(ch["note"]) + return s, b, l, notes + + +def test_auxiliaries(cid, case): + """Everything the testbench adds around the DUT (disclosed; not part of the core layout or its area).""" + aux = [] + for port, v in case.bias.items(): + if isinstance(v, dict) and "replica" in v: + aux.append({"kind": "replica_bias", "port": port, "replica_of": v["replica"], "current_A": v["current"], "variant": v.get("kind", "diode")}) + elif isinstance(v, dict) and "expr" in v: + aux.append({"kind": "behavioural_bias", "port": port, "expr": v["expr"]}) + elif isinstance(v, dict) and "i" in v: + aux.append({"kind": "ideal_current_source", "port": port, "current_A": v["i"], "from": v.get("from", "VDD")}) + elif port == "IREF": + aux.append({"kind": "reference_current_value", "value_A": v}) + cat_aux = { + "single": ["DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc", "load capacitor"], + "ota": ["bounded tanh DC servo setting V_out,dc", "ideal input common-mode source", "load capacitor"], + "twostage": ["bounded tanh DC servo setting V_out,dc", "ideal input common-mode source", "load capacitor"], + "ota_fd": ["ideal common-mode feedback on VB4", "ideal input common-mode source", "load capacitors"], + "diff_cs": ["ideal common-mode feedback on VB1", "ideal input common-mode source", "load capacitors"], + "diff_r": ["ideal input common-mode source", "load capacitors"], + "follower": ["ideal input source", "load resistor and capacitor"], + "buffer_ab": ["bounded tanh DC servo (freezable)", "mid-supply load return", "load resistor and capacitor"], + "mirror": ["ideal reference current source(s)", "ideal output voltage source (swept)"], + } + from textbook_sharing.testbench import CATEGORY + aux += [{"kind": "testbench_element", "what": w} for w in cat_aux[CATEGORY[cid]]] + return aux diff --git a/benchmarks/textbook_sharing/textbook_sharing/paths.py b/benchmarks/textbook_sharing/textbook_sharing/paths.py new file mode 100644 index 00000000..3e61fe95 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/paths.py @@ -0,0 +1,62 @@ +"""Where the benchmark reads and writes. + +Everything lives under the benchmark folder (``benchmarks/textbook_sharing``) unless an environment variable points +elsewhere: + + TSB_RUNS run outputs: GDS, verification logs and one ``result.json`` per layout (default: /runs) + TSB_RESULTS analysis outputs: the JSON tables behind every reported number (default: /results) + +Inputs that are part of the repository (frozen case definitions, nominal design points, frozen rules) are always read +from ``/data``. +""" +from __future__ import annotations +import os, sys +from pathlib import Path + +ROOT = Path(__file__).resolve().parents[1] # benchmarks/textbook_sharing +REPO = ROOT.parents[1] # repository root (provides src/glayout) +DATA = ROOT / "data" +CASES = DATA / "cases" # one folder per request: /// +NOMINAL = DATA / "nominal" # nominal design point of every topology and PDK +FROZEN = DATA / "frozen" # rules and orders frozen before the measurements they govern +RUNS = Path(os.environ.get("TSB_RUNS", ROOT / "runs")) +RESULTS = Path(os.environ.get("TSB_RESULTS", ROOT / "results")) +GRID_RUNS = RUNS / "grid" # main grid: //// +SELECTION_RUNS = RUNS / "selection" # plan selection: // +MODEL_RUNS = RUNS / "models" # model sessions: //r/ +MODEL_TASKS = RUNS / "model_tasks" # task folders handed to the models +MODEL_EXAMPLES = RUNS / "model_examples" # worked examples shown to the models +PVT_RUNS = RUNS / "pvt" +REVIEW_BATCHES = RUNS / "review" # visual-review batches (rendered images and verdicts) +ANALYSIS = RESULTS / "analysis" +LEDGER = RESULTS / "count_ledger.json" + + +def setup_imports(): + """Make ``glayout`` (from this repository) and ``textbook_sharing`` importable when running from a checkout.""" + for p in (str(REPO / "src"), str(ROOT)): + if p not in sys.path: + sys.path.insert(0, p) + os.environ.setdefault("GLAYOUT_BACKEND", "gdsfactory") + + +def rel(path) -> str: + """Path relative to the run or benchmark root, for records that must not contain machine-specific prefixes.""" + p = Path(path).resolve() + for base, tag in ((RUNS.resolve(), "runs"), (ROOT.resolve(), "")): + try: + r = p.relative_to(base) + return str(Path(tag) / r) if tag else str(r) + except ValueError: + continue + return str(p) + + +def resolve(path) -> Path: + """Inverse of rel(): a recorded path ('runs/...', 'data/...' or absolute) back to a file on this machine.""" + p = Path(path) + if p.is_absolute(): + return p + if p.parts and p.parts[0] == "runs": + return RUNS.joinpath(*p.parts[1:]) + return ROOT / p diff --git a/benchmarks/textbook_sharing/textbook_sharing/pdk.py b/benchmarks/textbook_sharing/textbook_sharing/pdk.py new file mode 100644 index 00000000..7162f991 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/pdk.py @@ -0,0 +1,20 @@ +"""The three open PDKs, as mapped by gLayout.""" +from __future__ import annotations +import importlib + +PDKS = {"sky130": "glayout.pdk.sky130_mapped:sky130_mapped_pdk", + "gf180": "glayout.pdk.gf180_mapped:gf180_mapped_pdk", + "ihp130": "glayout.pdk.ihp130_mapped:ihp130_mapped_pdk"} +_CACHE = {} + + +def load_pdk(name: str): + mod, attr = PDKS[name].split(":") + return getattr(importlib.import_module(mod), attr) + + +def pdk_obj(name: str): + """Cached MappedPDK object for 'sky130', 'gf180' or 'ihp130'.""" + if name not in _CACHE: + _CACHE[name] = load_pdk(name) + return _CACHE[name] diff --git a/benchmarks/textbook_sharing/textbook_sharing/presim.py b/benchmarks/textbook_sharing/textbook_sharing/presim.py new file mode 100644 index 00000000..8101c54a --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/presim.py @@ -0,0 +1,26 @@ +"""Schematic-level pre-simulation of a case (PDK models, ideal passives) to validate sizing/bias/specs +before any layout exists. Also used post-layout with the PEX netlist by passing include_override.""" +from __future__ import annotations +import json +from pathlib import Path +from .netlist import emit_subckt +from .testbench import make_testbench, check_specs, derived +from .verify.pex_sim import simulate, read_measures + + +def presim(pdk, circuit, case, out_dir, include_override=None, dut_name=None, corner="tt", passives="pdk"): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + name = dut_name or f"{circuit.circuit_id}_{pdk}_{case.size}" + if include_override is None: + inc = out_dir / f"{name}_schematic.spice" + inc.write_text(emit_subckt(pdk, circuit, case.sizing, name, per_finger=True, passives=passives)) + else: + inc = Path(include_override) + tb = make_testbench(circuit, name, str(inc), case, pdk) + s = simulate(pdk, tb, out_dir, name=f"tb_{name}", corner=corner) + meas = derived(read_measures(Path(s["out"]).read_text(errors="replace"))) if Path(s["out"]).exists() else {} + sp = check_specs(meas, case.specs) if case.specs else {"ok": None, "status": "no_specs", "details": {}} + res = {"sim": {k: v for k, v in s.items() if k != "errors"} | {"errors": s["errors"]}, "measures": meas, "spec": sp, "include": str(inc), "dut": name, + "status": s["status"] if s["status"] != "passed" else sp["status"]} + json.dump(res, open(out_dir / f"presim_{name}.json", "w"), indent=1, default=str) + return res diff --git a/benchmarks/textbook_sharing/textbook_sharing/qualify.py b/benchmarks/textbook_sharing/textbook_sharing/qualify.py new file mode 100644 index 00000000..e1e73342 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/qualify.py @@ -0,0 +1,89 @@ +"""Schematic qualification and specification-freezing rule (fixed before any layout was built). + +Input: the schematic pre-simulation of a derived case (PDK device models, PDK resistor/MIM models, disclosed test +auxiliaries). Output: qualified / not qualified with reasons, and the frozen specification used for EVERY layout of +that case (all modes, all candidates, all methods). No layout result is ever used here. + +Category floors (absolute, per topology) are the floors in nominal.nominal() plus the class-AB floors in +FLOOR_OVERRIDES. A schematic that misses a floor is NOT qualified (the specification is never +relaxed to the schematic value). + +Frozen spec per metric (sim = schematic value): + gain_lf (dB, min) ........ spec_min = max(floor, sim - 3 dB) + ugf, f3db (Hz, min) ...... spec_min = max(floor, 0.6 * sim) + gain_at_nom (V/V, min) ... spec_min = max(floor, sim - 0.05) + out_swing (V, min) ....... spec_min = max(floor, 0.8 * sim) + pm (deg, min) ............ spec_min = floor + thd_pct, iq (max) ........ spec_max = floor + vmin (V, max) ............ spec_max = min(floor, sim + 0.1 V) + err (abs_max) ............ spec_abs_max = floor +Universal operating-point checks (qualification only): + * simulator status passed, every floor metric present; + * servo-based tests (single, ota, twostage, buffer_ab): |vout0 - target| <= 0.02 VDD (servo converged); + * mirrors: compliance vmin found and test point vout_test = round((vmin + VDD)/2, 2 decimals) inside (vmin, VDD). +""" +from __future__ import annotations +import math + +FLOOR_OVERRIDES = { + # class-AB output stage (see testbench.tb_buffer_ab): linear output range and quiescent current + # are the defining figures of an output stage; distortion is kept at a fixed output amplitude. + # out_swing floor: the follower pair limits the linear output range to about VDD - |V_GS5| - |V_SG6| - V_dsat1 - V_dsat2 + # with body-effect-raised thresholds (bodies tied to the rails as in the source netlist); 0.25 VDD is the floor + # (0.4 VDD would exceed that headroom bound at every supply; the floor was set before any layout existed). + "C18": {"thd_pct": {"max": 3.0}, "iq": {"max": 300e-6}, "f3db": {"min": 5e6}, "out_swing": {"min_frac_vdd": 0.25}}, +} +SERVO_CATEGORIES = ("single", "ota", "twostage", "buffer_ab") + + +def floors_for(cid, nominal_specs, vdd): + fl = {} + for m, sp in nominal_specs.items(): + if m.startswith("_") or not isinstance(sp, dict): continue + fl[m] = dict(sp) + for m, sp in FLOOR_OVERRIDES.get(cid, {}).items(): + sp = dict(sp) + if "min_frac_vdd" in sp: sp = {"min": round(sp.pop("min_frac_vdd") * vdd, 4)} + fl[m] = sp + return fl + + +def _bad(v): + return v is None or (isinstance(v, float) and (math.isnan(v) or math.isinf(v))) + + +def qualify_and_freeze(category, floors, meas, sim_status, vdd, target=None): + reasons = []; spec = {} + if sim_status != "passed": + reasons.append(f"schematic simulation status {sim_status}") + if category in SERVO_CATEGORIES and target is not None: + v0 = meas.get("vout0") + if _bad(v0) or abs(v0 - target) > 0.02 * vdd: + reasons.append(f"servo did not reach the output target: vout0={v0} target={target:g} (tol {0.02 * vdd:.3g} V)") + for m, fl in floors.items(): + sim = meas.get(m) + if _bad(sim): + reasons.append(f"{m}: not measurable in the schematic"); continue + if "min" in fl: + if sim < fl["min"]: reasons.append(f"{m}={sim:.4g} below floor {fl['min']:g}") + if m == "gain_lf": smin = max(fl["min"], sim - 3.0) + elif m in ("ugf", "f3db"): smin = max(fl["min"], 0.6 * sim) + elif m == "gain_at_nom": smin = max(fl["min"], sim - 0.05) + elif m == "out_swing": smin = max(fl["min"], 0.8 * sim) + else: smin = fl["min"] + spec[m] = {"min": float(f"{smin:.4g}")} + if "max" in fl: + if sim > fl["max"]: reasons.append(f"{m}={sim:.4g} above floor {fl['max']:g}") + smax = min(fl["max"], sim + 0.1) if m == "vmin" else fl["max"] + spec[m] = {"max": float(f"{smax:.4g}")} + if "abs_max" in fl: + if abs(sim) > fl["abs_max"]: reasons.append(f"|{m}|={abs(sim):.4g} above floor {fl['abs_max']:g}") + spec[m] = {"abs_max": fl["abs_max"]} + spec["_frozen_from"] = {"schematic": {m: meas.get(m) for m in floors}, "floors": floors, "rule": "textbook_sharing.qualify v1"} + return {"qualified": not reasons, "reasons": reasons, "spec": spec} + + +def mirror_test_point(vmin, vdd): + if _bad(vmin) or vmin >= vdd - 0.02: + return None + return round((vmin + vdd) / 2, 2) diff --git a/benchmarks/textbook_sharing/textbook_sharing/redesign_search.py b/benchmarks/textbook_sharing/textbook_sharing/redesign_search.py new file mode 100644 index 00000000..22a57fe5 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/redesign_search.py @@ -0,0 +1,57 @@ +"""Bounded redesign search for the class-AB output stage (C18) at the nominal size point, schematic only. +Topology and body connections are those of the source netlist (fixed). Searched: bias current of the replica-biased +current source M2 (ib), width multiplier of the diode stack M3/M4 (wd) and of the followers M5/M6 (wf), common length +multiplier (lm). Every attempt and its schematic metrics are recorded; the first configuration (in the fixed search +order below, smallest current first) that meets every floor becomes the nominal point, otherwise the topology/PDK goes +to the diagnostic set. Output: /redesign_search/attempts_.json. +usage: python -m textbook_sharing.redesign_search --pdks gf180,sky130,ihp130""" +import json, copy, argparse, itertools +from multiprocessing import Pool +from textbook_sharing.circuits import CIRCUITS +from textbook_sharing.cases import CaseSpec, PDK_POINT +from textbook_sharing.nominal import nominal +from textbook_sharing.presim import presim +from textbook_sharing.qualify import floors_for, qualify_and_freeze +from textbook_sharing import overrides +from textbook_sharing import paths + +IB = (5e-6, 10e-6, 20e-6); WD = (1, 2, 4); WF = (1, 2); LM = (1.0, 2.0) + + +def attempt(job): + pdk, ib, wd, wf, lm = job + c0 = json.load(open(paths.NOMINAL / "C18" / f"{pdk}.json")) + s, b, l, notes = overrides.apply("C18", pdk, c0["sizing"], c0["bias"], c0["load"]) + s = copy.deepcopy(s) + for d, mult in (("M3", wd), ("M4", wd), ("M5", wf), ("M6", wf)): + uw = s[d]["w"] / s[d]["nf"]; s[d]["nf"] = s[d]["nf"] * mult; s[d]["w"] = round(uw * s[d]["nf"], 4) + for d in s: + if "nf" in s[d]: s[d]["l"] = round(round(s[d]["l"] * lm * 200) / 200, 4) + b = copy.deepcopy(b); b["VB1"] = {**b["VB1"], "current": ib} + vdd = PDK_POINT[pdk]["vdd"] + tag = f"ib{ib*1e6:g}u_wd{wd}_wf{wf}_lm{lm:g}" + case = CaseSpec(f"C18_{pdk}_{tag}", "C18", pdk, tag, s, dict(c0["supply"]), b, l, {}, notes) + pre = presim(pdk, CIRCUITS["C18"], case, paths.RESULTS / "redesign_search" / pdk / tag, dut_name=f"C18s_{pdk}_{tag}") + floors = floors_for("C18", nominal("C18", pdk).specs, vdd) + q = qualify_and_freeze("buffer_ab", floors, pre["measures"], pre["sim"]["status"], vdd, l.get("vout_target", vdd / 2)) + return {"pdk": pdk, "ib": ib, "wd": wd, "wf": wf, "lm": lm, "tag": tag, "qualified": q["qualified"], "reasons": q["reasons"], + "measures": {k: pre["measures"].get(k) for k in ("vout0", "vin0", "iq", "gain_lf", "f3db", "out_swing", "thd_pct")}, "sizing": s, "bias": b} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--pdks", default="gf180,sky130,ihp130"); ap.add_argument("--jobs", type=int, default=16) + a = ap.parse_args() + jobs = [(p, ib, wd, wf, lm) for p in a.pdks.split(",") for ib, wd, wf, lm in itertools.product(IB, WD, WF, LM)] + with Pool(a.jobs) as pool: + res = pool.map(attempt, jobs) + out = paths.RESULTS / "redesign_search" / f"attempts_{a.pdks.replace(',', '_')}.json"; out.parent.mkdir(parents=True, exist_ok=True) # one file per PDK set + json.dump(res, open(out, "w"), indent=1) + for p in a.pdks.split(","): + ok = [r for r in res if r["pdk"] == p and r["qualified"]] + print(p, "attempts", sum(1 for r in res if r["pdk"] == p), "qualified", len(ok), ("first: " + ok[0]["tag"] + " " + json.dumps(ok[0]["measures"])) if ok else "") + best = sorted([r for r in res if r["pdk"] == p], key=lambda r: len(r["reasons"]))[:3] + for r in best: print(" ", r["tag"], {k: (round(v, 4) if isinstance(v, float) else v) for k, v in r["measures"].items()}, r["reasons"][:2]) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/resim.py b/benchmarks/textbook_sharing/textbook_sharing/resim.py new file mode 100644 index 00000000..8476baf5 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/resim.py @@ -0,0 +1,81 @@ +"""Re-run ONLY the post-layout simulation of existing runs after a testbench change (geometry, DRC, LVS, sizing check +and PEX are unchanged and not repeated). For every result.json under the given roots whose case uses a testbench whose +text changed, the old postsim block is kept in res["postsim_history"], the post-layout simulation is repeated on the same +extracted netlist with the current testbench (against the case's CURRENT frozen specs), and fail_reasons/primary_status +are recomputed. Runs whose regenerated deck is identical to the one they used are skipped. +usage: python -m textbook_sharing.resim --roots grid,selection --jobs 20 --tag (roots are relative to the run folder)""" +from __future__ import annotations +import json, glob, time, argparse, shutil, re, collections +from pathlib import Path +from multiprocessing import Pool +from textbook_sharing import paths +ORDER = None + + +def strip_header(deck): + # the stored deck = header (title, model includes, optional osdi block) + testbench text; compare from the DUT instance on + i = deck.find("\nX1 ") + return deck[i:] if i >= 0 else deck + + +def job(args): + rp, tag = args + from textbook_sharing.run_case import load_case_dir, ORDER as ORD + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.testbench import make_testbench + from textbook_sharing.presim import presim + rp = Path(rp); res = json.load(open(rp)) + if res.get("primary_status") in ("NA", "rejected_plan", "build_failed") or not res.get("postsim") or res["postsim"].get("status") == "NOT_RUN": + return "skipped_no_postsim" + od = rp.parent; ps = od / "postsim" + old_decks = sorted(ps.glob("tb_*.spice")) + if not old_decks: return "skipped_no_deck" + pexsp = next((od / "verify" / "pex").glob("*_pex.spice"), None) + if pexsp is None: return "skipped_no_pex" + case, cj = load_case_dir(res["case_dir"]); circ = CIRCUITS[case.circuit_id] + top = re.search(r"^\.subckt\s+(\S+)", pexsp.read_text(), re.M | re.I).group(1) + new_tb = make_testbench(circ, top, str(pexsp), case, case.pdk) + if strip_header(old_decks[0].read_text()).strip() == ("\n" + new_tb).strip() or strip_header(old_decks[0].read_text()).strip() == new_tb.strip(): + return "unchanged_deck" + keep = od / f"postsim_superseded_{tag}" + if not keep.exists(): shutil.move(str(ps), str(keep)) + else: shutil.rmtree(ps, ignore_errors=True) + ts = time.time() + s = presim(case.pdk, circ, case, ps, include_override=str(pexsp), dut_name=top) + hist = res.get("postsim_history", []) + hist.append({"tag": tag, "old_postsim": res["postsim"], "old_primary_status": res["primary_status"], "old_fail_reasons": res.get("fail_reasons"), + "old_post_layout_simulation_s": (res.get("timing_s") or {}).get("post_layout_simulation"), "moved_to": keep.name}) + res["postsim_history"] = hist + res["postsim"] = {"status": s["status"], "measures": s["measures"], "spec": s["spec"].get("details") if s.get("spec") else None, "errors": s["sim"]["errors"][:3]} + fr = [f for f in (res.get("fail_reasons") or []) if f not in ("spec_failed", "simulation_failed")] + if s["status"] != "passed": fr.append("simulation_failed" if s["status"].startswith("simulation") else "spec_failed") + res["fail_reasons"] = fr + prim = next((o for o in ORD if o in fr), None); res["primary_status"] = prim or "auto_passed" + res.setdefault("timing_s", {})["post_layout_simulation"] = round(time.time() - ts, 2) + json.dump(res, open(rp, "w"), indent=1, default=str) + return f"{hist[-1]['old_primary_status']}->{res['primary_status']}" + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--roots", required=True); ap.add_argument("--jobs", type=int, default=16); ap.add_argument("--tag", required=True) + ap.add_argument("--circuits", default=None); a = ap.parse_args() + files = [] + for root in a.roots.split(","): + files += sorted(glob.glob(str(paths.RUNS / root / "**" / "result.json"), recursive=True)) + files = [f for f in files if "/verify/" not in f and "postsim" not in f] + if a.circuits: + cs = set(a.circuits.split(",")) + files = [f for f in files if any(f"/{c}/" in f or f"/{c}_" in f for c in cs)] + print("result files", len(files), flush=True) + c = collections.Counter(); changes = [] + with Pool(a.jobs, maxtasksperchild=8) as pool: + for f, st in zip(files, pool.imap(job, [(f, a.tag) for f in files], chunksize=1)): + c[st] += 1 + if "->" in st and st.split("->")[0] != st.split("->")[1]: changes.append((f, st)); print("CHANGED", f, st, flush=True) + out = paths.ANALYSIS / f"resim_{a.tag}.json"; out.parent.mkdir(parents=True, exist_ok=True) + json.dump({"counts": dict(c), "status_changes": changes}, open(out, "w"), indent=1) + print(dict(c)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/review/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/check_connectivity.py b/benchmarks/textbook_sharing/textbook_sharing/review/check_connectivity.py new file mode 100644 index 00000000..c607cf93 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/check_connectivity.py @@ -0,0 +1,83 @@ +"""Objective connectivity checks used to resolve visual-review flags (independent of DRC/LVS, which are also reported). +For one GDS: + * conductor components: merged shapes of active, tap, poly, met1, met2, met3 joined through cont (active/tap/poly <-> + met1), via1 (met1 <-> met2) and via2 (met2 <-> met3); a component that carries no met3 pin/label shape is FLOATING; + * gate pads: contacts on poly (not on active/tap) whose met1 component has no via1; + * met2 pieces without a via2 (stubs that never reach a trunk). +Passive bodies (resistor poly, MIM plates) are part of the poly / metal layers or of PDK-specific layers that are not +traced; a resistor's two heads are joined through its poly body. +usage: python -m textbook_sharing.review.check_connectivity ... --out """ +import json, glob, argparse +from pathlib import Path +from textbook_sharing import paths + + +DROP = () + + +def analyse(gds, pdkname): + import klayout.db as kdb + from textbook_sharing.run_case import pdk_obj + from glayout.sharing import rules_for + L = rules_for(pdk_obj(pdkname)).layers + ly = kdb.Layout(); ly.read(gds); top = ly.top_cell(); dbu = ly.dbu + def reg(name): + spec = L.get(name) + if spec is None: return kdb.Region() + li = ly.find_layer(*spec) + return kdb.Region(top.begin_shapes_rec(li)).merged() if li is not None else kdb.Region() + R = {n: reg(n) for n in ("active", "tap", "poly", "cont", "met1", "via1", "met2", "via2", "met3", "met3_pin", "met3_label")} + R["active"] = (R["active"] - R["poly"]).merged() # source/drain regions only (channels cut by the gates) + for n in DROP: R[n] = kdb.Region() # negative control + # nodes: every merged polygon of a conductor layer + nodes = [] + for lay in ("active", "tap", "poly", "met1", "met2", "met3"): + for p in R[lay].each(): nodes.append((lay, kdb.Region(p))) + parent = list(range(len(nodes))) + def find(i): + while parent[i] != i: parent[i] = parent[parent[i]]; i = parent[i] + return i + def union(i, j): parent[find(i)] = find(j) + idx = {lay: [i for i, (l, _) in enumerate(nodes) if l == lay] for lay in ("active", "tap", "poly", "met1", "met2", "met3")} + def join(cut, lower_layers, upper): + for c in R[cut].each(): + cr = kdb.Region(c) + lows = [i for lay in lower_layers for i in idx[lay] if not nodes[i][1].interacting(cr).is_empty()] + ups = [i for i in idx[upper] if not nodes[i][1].interacting(cr).is_empty()] + for a in lows + ups[1:]: + if ups: union(a, ups[0]) + join("cont", ("active", "tap", "poly"), "met1"); join("via1", ("met1",), "met2"); join("via2", ("met2",), "met3") + pins = R["met3_pin"] + R["met3_label"] + comps = {} + for i in range(len(nodes)): comps.setdefault(find(i), []).append(i) + floating = [] + for root, members in comps.items(): + has_pin = any(nodes[i][0] == "met3" and not nodes[i][1].interacting(pins).is_empty() for i in members) if not pins.is_empty() else any(nodes[i][0] == "met3" for i in members) + if not has_pin: + bb = kdb.Region(); [bb.insert(nodes[i][1]) for i in members]; b = bb.bbox() + floating.append({"layers": sorted({nodes[i][0] for i in members}), "bbox_um": [round(b.left * dbu, 3), round(b.bottom * dbu, 3), round(b.right * dbu, 3), round(b.top * dbu, 3)]}) + gc = R["cont"].interacting(R["poly"]).not_interacting(R["active"]).not_interacting(R["tap"]) + unwired = [c for c in gc.each() if R["via1"].interacting(R["met1"].interacting(kdb.Region(c))).is_empty()] + m2_no_v2 = [p.bbox() for p in R["met2"].each() if R["via2"].interacting(kdb.Region(p)).is_empty()] + return {"components": len(comps), "floating_components": floating, "gate_pads": gc.count(), "gate_pads_without_via1": len(unwired), + "met2_without_via2": [[round(b.left * dbu, 2), round(b.bottom * dbu, 2), round(b.right * dbu, 2), round(b.top * dbu, 2)] for b in m2_no_v2]} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("ids", nargs="+"); ap.add_argument("--out", required=True); ap.add_argument("--drop", default=""); a = ap.parse_args() + global DROP; DROP = tuple(x for x in a.drop.split(",") if x) + want = set(a.ids); out = {} + for rp in glob.glob(str(paths.RUNS / "**" / "review_record.json"), recursive=True): + r = json.load(open(rp)) + if r["review_id"] not in want: continue + res = json.load(open(Path(rp).parent.parent.parent / "result.json")) + c = analyse(str(paths.resolve(r["gds"])), r["pdk"]); c.update({"run": paths.rel(Path(rp).parent.parent.parent), "drc": res["verify"].get("drc"), "lvs": res["verify"].get("lvs"), + "primary_status": res.get("primary_status")}) + out[r["review_id"]] = c + print(r["review_id"], c["run"], "components", c["components"], "floating", c["floating_components"][:3], "pads w/o via1", c["gate_pads_without_via1"], + "met2 w/o via2", c["met2_without_via2"][:3], c["drc"], c["lvs"], flush=True) + json.dump(out, open(a.out, "w"), indent=1) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/check_gate_pads.py b/benchmarks/textbook_sharing/textbook_sharing/review/check_gate_pads.py new file mode 100644 index 00000000..a7b7e522 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/check_gate_pads.py @@ -0,0 +1,44 @@ +"""Objective check for the visual-review flag "gate contact pad without via": in a GDS, every contact that sits on poly +(and not on active) must belong to a first-metal component that also touches a via1 (i.e. the pad is wired up the +stack). Layer names come from glayout.sharing.rules (cont, poly, active, met1, via1 of the PDK mapping). +usage: python -m textbook_sharing.review.check_gate_pads ... --out (looks the records up under the run folder)""" +import json, glob, argparse +from pathlib import Path +from textbook_sharing import paths + + +def check(gds, pdkname): + import klayout.db as kdb + from textbook_sharing.run_case import pdk_obj + from glayout.sharing import rules_for + L = rules_for(pdk_obj(pdkname)).layers + ly = kdb.Layout(); ly.read(gds); top = ly.top_cell() + def reg(name): + li = ly.find_layer(*L[name]) if L.get(name) is not None else None + return kdb.Region(top.begin_shapes_rec(li)).merged() if li is not None else kdb.Region() + poly, act, cont, m1, v1 = reg("poly"), reg("active"), reg("cont"), reg("met1"), reg("via1") + tap = reg("tap") if L.get("tap") else kdb.Region() + gc = cont.interacting(poly).not_interacting(act).not_interacting(tap) + bad = []; n = 0 + for c in gc.each(): + n += 1 + comp = m1.interacting(kdb.Region(c)) + if comp.is_empty() or v1.interacting(comp).is_empty(): + b = c.bbox(); bad.append({"x": round(b.center().x * ly.dbu, 3), "y": round(b.center().y * ly.dbu, 3), "met1": not comp.is_empty()}) + return {"gate_contacts": n, "wired_to_via1": n - len(bad), "unwired": bad} + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("ids", nargs="+"); ap.add_argument("--out", required=True); a = ap.parse_args() + want = set(a.ids); out = {} + for rp in glob.glob(str(paths.RUNS / "**" / "review_record.json"), recursive=True): + r = json.load(open(rp)) + if r["review_id"] in want: + res = json.load(open(Path(rp).parent.parent.parent / "result.json")) + c = check(str(paths.resolve(r["gds"])), r["pdk"]); c.update({"run": paths.rel(Path(rp).parent.parent.parent), "drc": res["verify"].get("drc"), "lvs": res["verify"].get("lvs")}) + out[r["review_id"]] = c; print(r["review_id"], c["gate_contacts"], c["wired_to_via1"], c["unwired"][:3], c["drc"], c["lvs"]) + json.dump(out, open(a.out, "w"), indent=1) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/composite.py b/benchmarks/textbook_sharing/textbook_sharing/review/composite.py new file mode 100644 index 00000000..e4a5a5f4 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/composite.py @@ -0,0 +1,114 @@ +"""Compose the rendered views of a review record for the visual reviewer. +Output: composite.png = the three views (all layers / front end / back end) stacked vertically at full width with +panel titles, 1 um and 10 um scale bars and x/y coordinate ticks (um, DUT coordinates); for DUTs wider than +TILE_UM the all-layers view is additionally re-rendered as tile_.png windows of <= TILE_UM width (coordinate ticks +every 5 um) so that fingers and contacts remain resolvable. Paths and sha256 of all images are stored in the record.""" +import json, sys, hashlib, math, subprocess +from pathlib import Path +from PIL import Image, ImageDraw +from textbook_sharing import paths + +TILE_UM = 30.0 +VERSION = 3 + + +def sha(p): + return hashlib.sha256(open(p, "rb").read()).hexdigest() + + +def _mapping(view): + """px -> um mapping for a rendered view: x_um = cx + (px - W/2) * fit, y_um = cy - (py - H/2) * fit.""" + w, h = view.get("size_px", [1400, 1000]); x0, y0, x1, y1 = view["window_um"] + fit = max((x1 - x0) / w, (y1 - y0) / h) + return (x0 + x1) / 2, (y0 + y1) / 2, fit, w, h + + +def _ticks(d, im_w, im_h, top, cx, cy, fit, step, scale): + """draw coordinate ticks (um) along the bottom and left edges of a panel placed at vertical offset 'top'.""" + def x_px(xu): return int(round((im_w / 2 + (xu - cx) / fit) * scale)) + def y_px(yu): return int(round(top + (im_h / 2 - (yu - cy) / fit) * scale)) + xa = cx - (im_w / 2) * fit; xb = cx + (im_w / 2) * fit; ya = cy - (im_h / 2) * fit; yb = cy + (im_h / 2) * fit + for xu in range(int(math.floor(xa / step)) * step, int(math.ceil(xb / step)) * step + 1, step): + px = x_px(xu) + if 0 <= px < im_w * scale: + d.line([px, y_px(ya) - 8, px, y_px(ya)], fill=(255, 255, 0)); d.text((px + 2, y_px(ya) - 20), f"{xu}", fill=(255, 255, 0)) + for yu in range(int(math.floor(ya / step)) * step, int(math.ceil(yb / step)) * step + 1, step): + py = y_px(yu) + if top <= py < top + im_h * scale: + d.line([0, py, 8, py], fill=(255, 255, 0)); d.text((10, py - 6), f"{yu}", fill=(255, 255, 0)) + + +def composite(record_path, out_path=None, width=1500, tile_um=TILE_UM): + rec = json.load(open(record_path)); views = {k: str(paths.resolve(v)) for k, v in rec["view_paths"].items()} + rj = Path(views["full"]).with_name(Path(views["full"]).name.replace("_full.png", "_render.json")) + info = json.load(open(rj)) if rj.exists() else {} + panels = []; vinfo = {} + bb = info.get("bbox_um") + for key in ("full", "fe", "be"): + pth = views.get(key) + if not (pth and Path(pth).exists()): continue + im = Image.open(pth).convert("RGB"); v = dict(info.get("views", {}).get(key) or {}) + if v.get("window_um") and bb: + # crop the rendered view to the DUT bounding box (+ margin) so that wide/flat DUTs do not waste panel height + cx, cy, fit, w, h = _mapping(v); m = 0.05 * max(bb[2] - bb[0], bb[3] - bb[1]) + 0.4 + X0 = max(0, int((w / 2 + (bb[0] - m - cx) / fit))); X1 = min(w, int((w / 2 + (bb[2] + m - cx) / fit)) + 1) + Y0 = max(0, int((h / 2 - (bb[3] + m - cy) / fit))); Y1 = min(h, int((h / 2 - (bb[1] - m - cy) / fit)) + 1) + if X1 - X0 > 50 and Y1 - Y0 > 50: + im = im.crop((X0, Y0, X1, Y1)) + ncx = cx + ((X0 + X1) / 2 - w / 2) * fit; ncy = cy - ((Y0 + Y1) / 2 - h / 2) * fit + v["window_um"] = [ncx - (X1 - X0) / 2 * fit, ncy - (Y1 - Y0) / 2 * fit, ncx + (X1 - X0) / 2 * fit, ncy + (Y1 - Y0) / 2 * fit] + v["size_px"] = [X1 - X0, Y1 - Y0] + panels.append((key, im)); vinfo[key] = v + if not panels: return None + titles = {"full": "all layers", "fe": "front end: active / poly / contact / implant / well", "be": "back end: metals / vias / pin labels"} + hdr = 24; ph = [] + for key, im in panels: + ph.append(int(round(width * im.height / im.width))) + out = Image.new("RGB", (width, sum(ph) + hdr * len(panels) + 30), (20, 20, 20)); d = ImageDraw.Draw(out) + y = 0 + for (key, im), h in zip(panels, ph): + d.text((6, y + 5), f"{titles[key]} (DUT bbox {info.get('width_um')} x {info.get('height_um')} um; ticks in um)", fill=(230, 230, 230)) + y += hdr; out.paste(im.resize((width, h)), (0, y)) + v = vinfo.get(key) + if v and "window_um" in v: + cx, cy, fit, w, hh = _mapping(v); scale = width / w + step = 5 if (v["window_um"][2] - v["window_um"][0]) > 20 else (2 if (v["window_um"][2] - v["window_um"][0]) > 8 else 1) + _ticks(d, w, hh, y, cx, cy, fit, step, scale) + if key == "full": + px1 = int(1.0 / fit * scale); px10 = int(10.0 / fit * scale) + d.rectangle([width - 20 - px10, y + 8, width - 20, y + 14], fill=(255, 255, 0)); d.text((width - 20 - px10, y + 16), "10 um", fill=(255, 255, 0)) + d.rectangle([width - 20 - px1, y + 30, width - 20, y + 36], fill=(0, 255, 255)); d.text((width - 20 - px1 - 40, y + 28), "1 um", fill=(0, 255, 255)) + y += h + d.text((6, y + 8), f"review {rec['review_id']} pdk {rec.get('pdk')} composite v{VERSION}", fill=(200, 200, 200)) + out_path = out_path or Path(record_path).with_name("composite.png"); out.save(out_path) + comp = {"version": VERSION, "path": paths.rel(out_path), "sha256": sha(out_path), "tiles": [], "tile_windows": []} + # tiles for wide DUTs + bb = info.get("bbox_um"); wum = info.get("width_um") or 0 + if bb and wum > tile_um * 1.15: + n = int(math.ceil(wum / tile_um)); tw = wum / n; m = 0.3 + wins = [[round(bb[0] + i * tw - m, 3), round(bb[1] - m, 3), round(bb[0] + (i + 1) * tw + m, 3), round(bb[3] + m, 3)] for i in range(n)] + prefix = Path(out_path).with_name("tile") + r = subprocess.run([sys.executable, str(Path(__file__).with_name("render_gds.py")), str(paths.resolve(rec["gds"])), str(prefix), rec["pdk"], "--tiles=" + ";".join(",".join(str(c) for c in w_) for w_ in wins), "--width=1500"], + capture_output=True, text=True) + tj = Path(str(prefix) + "_tiles.json") + if r.returncode == 0 and tj.exists(): + tinfo = json.load(open(tj)) + for i, win in enumerate(wins): + v = tinfo["views"].get(f"tile{i}") + if not v: continue + im = Image.open(v["path"]).convert("RGB"); ann = Image.new("RGB", (im.width, im.height + 26), (20, 20, 20)); ann.paste(im, (0, 26)); dd = ImageDraw.Draw(ann) + dd.text((6, 6), f"tile {i + 1}/{n}: x {win[0]:.1f} .. {win[2]:.1f} um (all layers; ticks in um) review {rec['review_id']}", fill=(230, 230, 230)) + cx, cy, fit, w, hh = _mapping(v); _ticks(dd, w, hh, 26, cx, cy, fit, 5, 1.0) + px1 = int(1.0 / fit); dd.rectangle([im.width - 20 - px1, 32, im.width - 20, 38], fill=(0, 255, 255)); dd.text((im.width - 20 - px1 - 40, 30), "1 um", fill=(0, 255, 255)) + tp = Path(out_path).with_name(f"tile_{i}.png"); ann.save(tp) + comp["tiles"].append(paths.rel(tp)); comp["tile_windows"].append(win) + else: + comp["tile_error"] = (r.stderr or "")[-400:] + rec["composite"] = comp + json.dump(rec, open(record_path, "w"), indent=1) + return str(out_path) + + +if __name__ == "__main__": + for p in sys.argv[1:]: + print(composite(p)) diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/render_gds.py b/benchmarks/textbook_sharing/textbook_sharing/review/render_gds.py new file mode 100644 index 00000000..1246e5de --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/render_gds.py @@ -0,0 +1,98 @@ +"""Render a GDS to PNG views with the PDK layer properties (headless, klayout.lay). +usage: python render_gds.py [--zoom x0,y0,x1,y1] [--cell NAME] [--tiles x0,y0,x1,y1;...] +Produces _full.png, _fe.png (active/poly/contact/implant/well), _be.png (metals/vias/pins), [_zoom.png] +Also writes _render.json with image sha256, layer legend and scale bar info.""" +import os, json, hashlib, argparse +import klayout.lay as lay +import klayout.db as db + +LYP = {"sky130": "/foss/pdks/sky130A/libs.tech/klayout/tech/sky130A.lyp", + "gf180": "/foss/pdks/gf180mcuD/libs.tech/klayout/tech/gf180mcu.lyp", + "ihp130": "/foss/pdks/ihp-sg13g2/libs.tech/klayout/tech/sg13g2.lyp"} +FE = {"sky130": [(65, 20), (66, 20), (66, 44), (93, 44), (94, 20), (64, 20), (64, 44), (64, 18)], + "gf180": [(22, 0), (30, 0), (33, 0), (32, 0), (31, 0), (21, 0), (204, 0), (12, 0)], + "ihp130": [(1, 0), (5, 0), (6, 0), (14, 0), (7, 0), (31, 0), (46, 0)]} +BE = {"sky130": [(67, 20), (67, 44), (68, 20), (68, 44), (69, 20), (69, 44), (70, 20), (70, 44), (67, 16), (68, 16), (69, 16), (70, 16), (67, 5), (68, 5), (69, 5), (70, 5)], + "gf180": [(34, 0), (35, 0), (36, 0), (38, 0), (42, 0), (40, 0), (46, 0), (34, 10), (36, 10), (42, 10), (46, 10)], + "ihp130": [(8, 0), (19, 0), (10, 0), (29, 0), (30, 0), (49, 0), (50, 0), (8, 2), (10, 2), (30, 2), (50, 2), (8, 25), (10, 25), (30, 25), (50, 25)]} + + +def sha(p): + return hashlib.sha256(open(p, "rb").read()).hexdigest() + + +def render(gds, prefix, pdk, zoom=None, cell=None, width=1400, height=1000, tiles=None): + os.makedirs(os.path.dirname(os.path.abspath(str(prefix))) or '.', exist_ok=True) + ly = db.Layout(); ly.read(gds) + top = ly.cell(cell) if cell else ly.top_cell() + lv = lay.LayoutView() + lv.load_layout(gds, True) + if os.path.exists(LYP.get(pdk, "")): + lv.load_layer_props(LYP[pdk]) + lv.max_hier() + lv.set_config("background-color", "#000000") + lv.set_config("grid-visible", "false") + bb = top.dbbox() + out = {"gds": gds, "gds_sha256": sha(gds), "cell": top.name, "bbox_um": [bb.left, bb.bottom, bb.right, bb.top], + "width_um": round(bb.width(), 4), "height_um": round(bb.height(), 4), "pdk": pdk, "lyp": LYP.get(pdk), "views": {}} + margin = max(bb.width(), bb.height()) * 0.08 + 0.3 + full = db.DBox(bb.left - margin, bb.bottom - margin, bb.right + margin, bb.top + margin) + + def shoot(name, box, layers=None, size=None): + w_px, h_px = size or (width, height) + if layers is not None: + it = lv.begin_layers() + while not it.at_end(): + lp = it.current() + info = (lp.source_layer, lp.source_datatype) + vis = info in layers + nlp = lp.dup(); nlp.visible = vis + lv.set_layer_properties(it, nlp) + it.next() + else: + it = lv.begin_layers() + while not it.at_end(): + nlp = it.current().dup(); nlp.visible = True + lv.set_layer_properties(it, nlp); it.next() + lv.zoom_box(box) + path = f"{prefix}_{name}.png" + lv.save_image(path, w_px, h_px) + fit = max(box.width() / w_px, box.height() / h_px) # KLayout fits the box into the viewport keeping the aspect ratio + out["views"][name] = {"path": path, "sha256": sha(path), "window_um": [box.left, box.bottom, box.right, box.top], + "um_per_px": round(fit, 5), "size_px": [w_px, h_px], "center_um": [box.center().x, box.center().y]} + if tiles: + # tiles mode: only the requested windows, all layers, image height follows the window aspect (width fits exactly) + for i, (x0, y0, x1, y1) in enumerate(tiles): + box = db.DBox(x0, y0, x1, y1) + h_px = max(200, min(1400, int(round(width * box.height() / box.width())))) + shoot(f"tile{i}", box, None, (width, h_px)) + json.dump(out, open(f"{prefix}_tiles.json", "w"), indent=1) + return out + shoot("full", full) + shoot("fe", full, set(FE.get(pdk, []))) + shoot("be", full, set(BE.get(pdk, []))) + if zoom: + x0, y0, x1, y1 = zoom + shoot("zoom", db.DBox(x0, y0, x1, y1)) + # legend: visible layers with names from the lyp + legend = [] + it = lv.begin_layers() + while not it.at_end(): + lp = it.current() + if lp.source_layer >= 0: + legend.append({"layer": [lp.source_layer, lp.source_datatype], "name": lp.name, "fill": lp.fill_color, "frame": lp.frame_color}) + it.next() + out["legend"] = legend + json.dump(out, open(f"{prefix}_render.json", "w"), indent=1) + return out + + +if __name__ == "__main__": + ap = argparse.ArgumentParser(); ap.add_argument("gds"); ap.add_argument("prefix"); ap.add_argument("pdk") + ap.add_argument("--zoom"); ap.add_argument("--cell"); ap.add_argument("--width", type=int, default=1400); ap.add_argument("--height", type=int, default=1000) + ap.add_argument("--tiles", help="semicolon-separated windows x0,y0,x1,y1 (um); renders only these, all layers") + a = ap.parse_args() + z = [float(v) for v in a.zoom.split(",")] if a.zoom else None + t = [[float(v) for v in win.split(",")] for win in a.tiles.split(";")] if a.tiles else None + r = render(a.gds, a.prefix, a.pdk, z, a.cell, a.width, a.height, t) + print(json.dumps({k: v for k, v in r.items() if k != "legend"}, indent=1)) diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/resolve_auto.py b/benchmarks/textbook_sharing/textbook_sharing/review/resolve_auto.py new file mode 100644 index 00000000..fa9caa03 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/resolve_auto.py @@ -0,0 +1,36 @@ +"""Resolve open visual-review flags (verdict suspicious/fail without a resolution) by objective checks. A flag is marked +resolved_ok only when ALL hold: official DRC passed, LVS passed, extraction reports no floating conductor, every gate +pad (contact on poly) reaches a via1, every met2 piece reaches a via2. Anything else stays open and is listed for manual +inspection (zoomed render). usage: python -m textbook_sharing.review.resolve_auto --out /analysis/resolve_auto_.json [--by NAME]""" +import json, glob, argparse +from pathlib import Path +from textbook_sharing import paths + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); ap.add_argument("--by", default="maintainer"); a = ap.parse_args() + from textbook_sharing.review.check_connectivity import analyse + from textbook_sharing.review.visual_review import resolve + done = {}; open_ = {} + for rp in glob.glob(str(paths.RUNS / "**" / "review_record.json"), recursive=True): + r = json.load(open(rp)); v = r["visual"] + if v["verdict"] not in ("suspicious", "fail") or v.get("reused_from") or r.get("visual_resolution"): continue + run = Path(rp).parent.parent.parent; res = json.load(open(run / "result.json")) + c = analyse(str(paths.resolve(r["gds"])), r["pdk"]) + ok = (res["verify"].get("drc") == "passed" and res["verify"].get("lvs") == "passed" and not (res.get("pex_counts") or {}).get("floating_nodes") + and c["gate_pads_without_via1"] == 0 and not c["met2_without_via2"]) + rec = {"run": paths.rel(run), "verdict": v["verdict"], "issues": v.get("issue_locations"), "drc": res["verify"].get("drc"), "lvs": res["verify"].get("lvs"), + "pex_floating": (res.get("pex_counts") or {}).get("floating_nodes"), "gate_pads_without_via1": c["gate_pads_without_via1"], "met2_without_via2": c["met2_without_via2"]} + if ok and v["verdict"] == "suspicious": + resolve(r["review_id"], "resolved_ok", "Objective checks: official DRC and LVS passed; extraction reports no floating conductor; every contact on poly reaches a via1 through its first-metal component; every met2 piece reaches a via2 (no dangling stub). The flagged structure is connected.", + "textbook_sharing.review.resolve_auto (check_connectivity gate-pad / met2-via2 checks, pex floating-node list, verify/drc, verify/lvs)", by=a.by) + done[r["review_id"]] = rec + else: + open_[r["review_id"]] = rec + json.dump({"resolved": done, "open": open_}, open(a.out, "w"), indent=1) + print("resolved", len(done), "open", len(open_)) + for k, v in open_.items(): print(" OPEN", k, v["run"], v["verdict"], v["issues"][:1] if v["issues"] else None) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/reviewer_guide.md b/benchmarks/textbook_sharing/textbook_sharing/review/reviewer_guide.md new file mode 100644 index 00000000..fb60f2ea --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/reviewer_guide.md @@ -0,0 +1,59 @@ +# Visual review protocol + +The reviewer (a person or a vision model) examines rendered layouts one item at a time, without knowing which plan, +mode or method produced them and without seeing DRC, LVS or simulation results. Each unique geometry is reviewed once; +the verdict is reused for every record with the same cell-name-independent geometry hash. + +## What the reviewer receives +- `.png`: three panels stacked vertically: (1) all layers, (2) front end (active / poly / contact / implant / + well), (3) back end (metals / vias / pin labels). Yellow ticks are layout coordinates in micrometres (x along the + bottom edge, y along the left edge of each panel); a 10 um (yellow) and a 1 um (cyan) scale bar are drawn in panel 1. +- optionally `_t.png`: magnified windows of the all-layers view for wide layouts; the header states the + x-range. +- `items.jsonl`: one line per item with its review id and image files. Images are 128-colour palette PNGs (layer + colours preserved). + +## What a correct layout looks like +One or more horizontal device rows (NMOS rows, PMOS rows inside an n-well, passive rows with poly resistors or MIM +capacitors). Each MOS row is a set of active islands crossed by vertical poly gates, with source/drain contacts in the +islands and gate contacts on poly pads below or above the islands; vertical tap strips at both row ends plus a +horizontal tap strip along the gate side of the row (U-shaped tie), all in the row's well and implant; metal-2 vertical +stubs from the pins up or down to horizontal metal-3 trunks in the routing channels between rows; pin text labels on the +metal-3 trunks; the whole layout is one flat cell. + +Normal structures that are easy to misread: +- a gate contact pad (poly + contact + local metal) has no via on the pad itself; a metal-1 riser runs from the pad to + the cell's pin row, where the via and the metal-2 stub to the trunk sit; +- the PMOS row is mirrored vertically: a gate strap drawn at the bottom of a PMOS cell faces up and its net is routed in + a channel above the PMOS row, a strap drawn at the top of the cell faces the channel below the row; +- passive rows (resistors, MIM capacitors) can be much taller than MOS rows; a small resistor at the far edge of a tall + passive row connected by long metal-2 stubs is legal. +Flag such structures only if a connection is actually missing. + +## Record per item (JSON) +``` +{"review_id": "...", "reviewer_type": "human" | "vision_model", "reviewer_id": "", + "images_viewed": ["file names actually looked at"], + "observed_findings": [">= 3 concrete observations with coordinates in um read from the ticks"], + "issue_locations": [{"x": .., "y": .., "description": ".."}], + "verdict": "pass" | "suspicious" | "fail"} +``` + +## Verdict rules +- "fail": clearly broken geometry (e.g. a gate without any island, a metal trunk ending in empty space with nothing + attached at either end, overlapping shapes of two different pin labels, a label placed on an empty area); +- "suspicious": something that may be wrong and must be checked against the raw DRC / LVS / extraction (e.g. an + isolated small shape far from the body, a contact that seems to sit outside active, uneven finger counts between + apparently matched devices); +- "pass": none of the above. +Do not grade aesthetics or area. Name the panel, the layer colour group and the coordinates. Never give "pass" for an +item whose images could not be seen; use "suspicious" with the issue "image not viewable" instead. + +## Blinding +Only the batch's `items.jsonl` and the image files it lists are given to the reviewer; file names carry only the review +id. Plans, modes, methods, areas and tool results are never shown. + +## Resolution of flags +A "suspicious" or "fail" verdict is never overwritten. It is resolved by objective checks (official DRC, LVS, +floating conductors in the extracted netlist, connectivity of gate pads to via1 and of metal-2 to via2), and the method +and evidence are stored in the record's `visual_resolution` field with the outcome "resolved_ok" or "confirmed_issue". diff --git a/benchmarks/textbook_sharing/textbook_sharing/review/visual_review.py b/benchmarks/textbook_sharing/textbook_sharing/review/visual_review.py new file mode 100644 index 00000000..7f996aaa --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/review/visual_review.py @@ -0,0 +1,173 @@ +"""Visual review driver: one blinded review per UNIQUE layout, the verdict reused for every record of that layout. + + prepare --limit N [--roots grid,selection,models] [--width 1100] [--include ] + groups every review_record.json under the roots by (geometry_hash of the run, pdk); a group is pending when none of its records + has a verdict; for N pending groups (deterministic order by a hash of the key, so batches mix circuits, sizes and + methods) builds the composite of one representative record and copies composite + tiles into + /review//transfer/ named .png / _t.png (no path, mode or method in + any name); items.jsonl lists only review ids and file names. manifest.json (not shown to the reviewer) maps ids to + records. The reviewer follows reviewer_guide.md and returns outputs.json. + apply + writes each verdict into the representative record and copies it into every record of the same (geometry_hash, pdk) + with reused_from = representative review id; checks >= 3 observations and a known verdict, else rejects the item. + resolve [--by NAME] + records how a 'suspicious' / 'fail' verdict was settled by objective checks (the verdict itself is kept). + status + counts records / unique layouts by verdict (reviewed directly, reused, pending).""" +from __future__ import annotations +import json, glob, shutil, hashlib, argparse, time, collections +from pathlib import Path +from textbook_sharing import paths +OUT = paths.REVIEW_BATCHES +ROOTS = ["grid", "selection", "models"] # relative to the run folder +VERDICTS = ("pass", "suspicious", "fail") +TILE_W = 1200 +MAX_TILES = 99 + + +def _small(src, dst, max_w=None, colors=128): + """Transfer copy for the reviewer: 128-colour palette PNG (layer colours stay distinct), optional downscale.""" + from PIL import Image + im = Image.open(src).convert("RGB") + if max_w and im.width > max_w: im = im.resize((max_w, round(im.height * max_w / im.width)), Image.LANCZOS) + im.quantize(colors=colors, method=Image.Quantize.MEDIANCUT).save(dst, format="PNG", optimize=True) + return hashlib.sha256(open(dst, "rb").read()).hexdigest() + + +def groups(roots): + g = collections.defaultdict(list) + for root in roots: + for rp in sorted(glob.glob(str(paths.RUNS / root / "**" / "review_record.json"), recursive=True)): + try: rec = json.load(open(rp)) + except Exception: continue + # key: cell-name-independent geometry hash of the run (identical geometry under another cell name, e.g. a + # selection named mode equal to a main-grid mode, is the same layout); GDS sha256 when no hash is recorded + res_p = Path(rp).parent.parent.parent / "result.json" + gh = None + if res_p.exists(): + try: gh = json.load(open(res_p)).get("geometry_hash") + except Exception: gh = None + g[(gh or rec["gds_sha256"], rec["pdk"])].append((rp, rec)) + return g + + +def propagate(): + """Copy an existing direct verdict to the other records of the same layout key (after a key change).""" + g = groups(ROOTS); n = 0 + for key, recs in g.items(): + direct = [r for _, r in recs if r["visual"]["verdict"] != "review_pending" and not r["visual"].get("reused_from")] + if not direct: continue + src = direct[0] + for rp, r in recs: + if r["visual"]["verdict"] == "review_pending": + v = dict(src["visual"]); v["reused_from"] = src["review_id"]; v["reuse_key"] = "geometry_hash+pdk" + r["visual"] = v; r["verdict"] = v["verdict"]; json.dump(r, open(rp, "w"), indent=1); n += 1 + print("propagated to", n, "records") + + +def taken_ids(): + t = set() + for m in OUT.glob("*/manifest.json"): + d = json.load(open(m)) + if not d.get("applied"): t |= {k for k in d["items"]} + return t + + +def prepare(batch, limit, roots, width, include=None): + from textbook_sharing.review.composite import composite + bd = OUT / batch; tr = bd / "transfer" + if bd.exists(): raise SystemExit(f"{bd} exists") + tr.mkdir(parents=True) + g = groups(roots); taken = taken_ids(); items = {} + pend = [k for k, recs in g.items() if all(r["visual"]["verdict"] == "review_pending" for _, r in recs)] + if include is not None: # only layouts whose run directory is listed (for example every layout that is reported) + inc = {str(paths.resolve(x).resolve()) for x in include} + pend = [k for k in pend if any(str(Path(rp).parent.parent.parent.resolve()) in inc for rp, _ in g[k])] + pend.sort(key=lambda k: hashlib.sha256((k[0] + k[1]).encode()).hexdigest()) + for key in pend: + if len(items) >= limit: break + rp, rec = sorted(g[key])[0] + if rec["review_id"] in taken: continue + cp = composite(rp, width=width) + if not cp: continue + rec = json.load(open(rp)); comp = rec["composite"] + tsha = {} + tsha[f"{rec['review_id']}.png"] = _small(cp, tr / f"{rec['review_id']}.png") + tiles = [] + for i, t in enumerate(comp.get("tiles", [])[:MAX_TILES]): + tsha[f"{rec['review_id']}_t{i}.png"] = _small(t, tr / f"{rec['review_id']}_t{i}.png", max_w=TILE_W); tiles.append(f"{rec['review_id']}_t{i}.png") + items[rec["review_id"]] = {"record": paths.rel(rp), "layout_key": key[0], "pdk": key[1], "n_records_same_layout": len(g[key]), + "composite": f"{rec['review_id']}.png", "tiles": tiles, "composite_sha256": comp["sha256"], "transfer_sha256": tsha, + "n_tiles_total": len(comp.get("tiles", [])), "n_tiles_sent": len(tiles)} + with open(tr / "items.jsonl", "w") as f: + for rid, it in items.items(): f.write(json.dumps({"review_id": rid, "composite": it["composite"], "tiles": it["tiles"]}) + "\n") + json.dump({"batch": batch, "created_utc": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), "width": width, "items": items, "applied": False}, + open(bd / "manifest.json", "w"), indent=1) + print(batch, len(items), "items", sum(len(v["tiles"]) for v in items.values()), "tiles", "pending groups", len(pend)) + + +def apply(batch, outputs): + bd = OUT / batch; man = json.load(open(bd / "manifest.json")); outs = json.load(open(outputs)) + g = groups(ROOTS); ok = 0; rejected = []; reused = 0 + rec_key = {str(Path(rp).resolve()): k for k, recs in g.items() for rp, _ in recs} + for o in outs: + it = man["items"].get(o.get("review_id")) + if not it: rejected.append({"review_id": o.get("review_id"), "why": "unknown id"}); continue + if o.get("verdict") not in VERDICTS or len(o.get("observed_findings") or []) < 3: + rejected.append({"review_id": o["review_id"], "why": "verdict unknown or fewer than 3 observations"}); continue + vis = {"reviewer_type": o.get("reviewer_type", "vision_model"), "reviewer_id": o["reviewer_id"], "observed_findings": o["observed_findings"], + "issue_locations": o.get("issue_locations", []), "verdict": o["verdict"], "reviewed_utc": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), + "image_sha256": it["composite_sha256"], "batch": batch, "protocol": "blinded, one review per unique layout", + "coverage": ("full" if it.get("n_tiles_sent", 0) >= it.get("n_tiles_total", 0) else f"partial: composite + {it.get('n_tiles_sent')} of {it.get('n_tiles_total')} zoom tiles")} + rep_path = str(paths.resolve(it["record"]).resolve()); key = rec_key.get(rep_path) + if key is None: rejected.append({"review_id": o["review_id"], "why": "representative record not found"}); continue + for rp, rec in g[key]: + v = dict(vis) + if str(Path(rp).resolve()) != rep_path: v["reused_from"] = o["review_id"]; v["reuse_key"] = "geometry_hash+pdk"; reused += 1 + rec["visual"] = v; rec["verdict"] = o["verdict"]; json.dump(rec, open(rp, "w"), indent=1) + ok += 1 + man["applied"] = True; man["applied_utc"] = time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()); man["rejected"] = rejected + missing = sorted(set(man["items"]) - {o.get("review_id") for o in outs}) + man["missing"] = missing + json.dump(man, open(bd / "manifest.json", "w"), indent=1) + shutil.copy(outputs, bd / "outputs.json") + print("applied", ok, "reused into", reused, "records; rejected", len(rejected), "missing", len(missing)) + + +def resolve(rid, outcome, note, evidence, by="maintainer"): + """Record how a 'suspicious' / 'fail' visual verdict was resolved (outcome: resolved_ok | confirmed_issue), on the + reviewed record and every record that reuses it. The reviewer's verdict itself is never overwritten.""" + assert outcome in ("resolved_ok", "confirmed_issue") + n = 0 + for k, recs in groups(ROOTS).items(): + for rp, rec in recs: + if rec["review_id"] == rid or rec["visual"].get("reused_from") == rid: + rec["visual_resolution"] = {"outcome": outcome, "note": note, "evidence": evidence, "by": by, + "utc": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime())} + json.dump(rec, open(rp, "w"), indent=1); n += 1 + print(rid, outcome, "records", n) + + +def status(): + g = groups(ROOTS); c = collections.Counter(); cr = collections.Counter() + for k, recs in g.items(): + vs = {r["visual"]["verdict"] for _, r in recs}; c[sorted(vs)[0] if len(vs) == 1 else "mixed"] += 1 + for _, r in recs: cr[(r["visual"]["verdict"], "reused" if r["visual"].get("reused_from") else "direct")] += 1 + print(json.dumps({"unique_layouts": dict(c), "records": {f"{a}/{b}": n for (a, b), n in cr.items()}}, indent=1)) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("cmd"); ap.add_argument("args", nargs="*"); ap.add_argument("--limit", type=int, default=40) + ap.add_argument("--roots", default=",".join(ROOTS)); ap.add_argument("--width", type=int, default=1000); ap.add_argument("--tile-width", type=int, default=1200); ap.add_argument("--max-tiles", type=int, default=99); ap.add_argument("--include", default=None); ap.add_argument("--by", default="maintainer"); a = ap.parse_args() + global MAX_TILES; MAX_TILES = a.max_tiles + global TILE_W; TILE_W = a.tile_width + if a.cmd == "prepare": prepare(a.args[0], a.limit, a.roots.split(","), a.width, + include=[l.strip() for l in open(a.include) if l.strip()] if a.include else None) + elif a.cmd == "apply": apply(a.args[0], a.args[1]) + elif a.cmd == "status": status() + elif a.cmd == "propagate": propagate() + elif a.cmd == "resolve": resolve(*a.args[:4], by=a.by) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/run_case.py b/benchmarks/textbook_sharing/textbook_sharing/run_case.py new file mode 100644 index 00000000..435692bd --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/run_case.py @@ -0,0 +1,111 @@ +"""One run: one qualified case x (one named mode | one explicit candidate) -> GDS -> verification -> matching check +-> post-layout simulation against the case's frozen specification -> result.json (with per-stage timings). +Statuses (first failure wins): NA (mode not applicable), rejected_plan, build_failed, drc_failed, lvs_failed, +constraints_failed (sizing or declared matching ratio), pex_failed, simulation_failed, spec_failed, +physical_review_failed; otherwise auto_passed (visual review pending).""" +from __future__ import annotations +import json, time, traceback, re, hashlib +from pathlib import Path +from textbook_sharing.layout import build, applicability +from textbook_sharing.circuits import CIRCUITS +from textbook_sharing.cases import CaseSpec +from textbook_sharing.presim import presim +from textbook_sharing.verify.pipeline import verify_layout +from textbook_sharing.pdk import pdk_obj +from textbook_sharing import paths +from textbook_sharing import matching +from glayout.sharing import SharingPlanRejected +from textbook_sharing.assembly import AssemblyError + +ORDER = ["rejected_plan", "build_failed", "drc_failed", "lvs_failed", "constraints_failed", "pex_failed", "simulation_failed", "spec_failed", "physical_review_failed"] + + +def load_case_dir(cdir): + cdir = paths.resolve(cdir); cj = json.load(open(cdir / "case.json")); specs = json.load(open(cdir / "specs.json")) + return CaseSpec(cj["case_id"], cj["circuit_id"], cj["pdk"], cj["size"], cj["sizing"], cj["supply"], cj["bias"], cj["load"], specs, cj.get("notes", [])), cj + + +def lvs_target(cdir, top, out_dir): + src = (Path(cdir) / "target_lvs.spice").read_text() + orig = re.search(r"^\.subckt\s+(\S+)", src, re.M).group(1) + txt = re.sub(rf"^(\.subckt\s+){re.escape(orig)}\b", rf"\g<1>{top}", src, flags=re.M) + txt = re.sub(rf"^(\.ends\s+){re.escape(orig)}\b", rf"\g<1>{top}", txt, flags=re.M) + out_dir.mkdir(parents=True, exist_ok=True); p = out_dir / f"{top}_target_lvs.spice"; p.write_text(txt) + return p, hashlib.sha256(src.encode()).hexdigest() + + +def run(cdir, out_dir, mode=None, plans=None, label=None, context=None, nominal_sizing=None): + cdir = paths.resolve(cdir).resolve() + case, cj = load_case_dir(cdir); circ = CIRCUITS[case.circuit_id]; pdkname = case.pdk; pdk = pdk_obj(pdkname) + out_dir = Path(out_dir).resolve(); out_dir.mkdir(parents=True, exist_ok=True) + label = label or mode or "candidate" + res = {"case_id": case.case_id, "case_dir": paths.rel(cdir), "label": label, "mode": mode, "t_start": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), "timing_s": {}} + t0 = time.time() + try: + if plans is None: + appl = applicability(pdk, circ, case.sizing); res["applicability"] = appl["modes"] + if not appl["modes"].get(mode, False): + res["primary_status"] = "NA"; json.dump(res, open(out_dir / "result.json", "w"), indent=1, default=str); return res + top = re.sub(r"[^A-Za-z0-9_]", "_", f"{case.case_id}_{label}".replace(".", "p"))[:90] # gdsfactory-safe cell name + tb = time.time() + r = build(pdk, circ, case.sizing, mode=mode or "independent", name=top, plans=plans) + gds = out_dir / f"{top}.gds"; r["component"].write_gds(str(gds)) + res["timing_s"]["geometry_generation"] = round(time.time() - tb, 2) + from textbook_sharing.analysis.ledger import geometry_hash + res["geometry_hash"] = geometry_hash(str(gds)) # cell-name independent: identical geometries share it + res.update({"gds": paths.rel(gds), "gds_sha256": hashlib.sha256(gds.read_bytes()).hexdigest(), "groups": r["groups"], "applied_plans": r["applied_plans"], + "evidence": r["evidence"], "assembly_stats": r["assembly_stats"], "area_um2_assembly": r["assembly_stats"]["area_um2"]}) + tdevs = [{"name": d.name, "model": d.kind, "d": d.nets[0], "g": d.nets[1], "s": d.nets[2], "b": d.nets[3], "w": case.sizing[d.name]["w"], "l": case.sizing[d.name]["l"], + "nf": case.sizing[d.name]["nf"]} for d in circ.devices if d.kind in ("nfet", "pfet")] + body_n = next((d.nets[3] for d in circ.devices if d.kind == "nfet"), "VSS") + tl, tsha = lvs_target(cdir, top, out_dir); res["target_lvs_sha256"] = tsha + v = verify_layout(pdkname, str(gds), top, str(tl), tdevs, circ.ports, out_dir / "verify", expected_fingers=r["expected_fingers"], + context=(context or {}) | {"case": case.case_id, "label": label}, sub_net=body_n) + res["verify"] = {k: (val.get("status") if isinstance(val, dict) else val) for k, val in v["stages"].items()} + res["timing_s"].update(v.get("timing_s", {})) + res["area_um2"] = v["area_um2"]; res["fail_reasons"] = list(v["fail_reasons"]); res["review_id"] = v["review_id"] + res["pex_policy"] = (v["stages"].get("pex") or {}).get("policy"); res["pex_counts"] = {k: (v["stages"].get("pex") or {}).get(k) for k in ("n_res", "n_cap", "n_devices", "floating_nodes")} + m = matching.check(case.circuit_id, nominal_sizing or case.sizing, case.sizing, r["applied_plans"]); res["matching"] = m + if m["status"] != "passed" and "constraints_failed" not in res["fail_reasons"]: res["fail_reasons"].append("constraints_failed") + pexsp = v["stages"].get("pex", {}).get("spice") + if pexsp: + ts = time.time() + s = presim(pdkname, circ, case, out_dir / "postsim", include_override=pexsp, dut_name=top) + res["timing_s"]["post_layout_simulation"] = round(time.time() - ts, 2) + res["postsim"] = {"status": s["status"], "measures": s["measures"], "spec": s["spec"].get("details") if s.get("spec") else None, "errors": s["sim"]["errors"][:3]} + if s["status"] != "passed": res["fail_reasons"].append("simulation_failed" if s["status"].startswith("simulation") else "spec_failed") + else: + res["postsim"] = {"status": "NOT_RUN", "reason": "no PEX netlist"} + if "pex_failed" not in res["fail_reasons"]: res["fail_reasons"].append("pex_failed") + prim = next((o for o in ORDER if o in res["fail_reasons"]), None) + res["primary_status"] = prim or "auto_passed" + except SharingPlanRejected as e: + res.update({"primary_status": "rejected_plan", "report": e.report.to_json()}) + except AssemblyError as e: + res.update({"primary_status": "build_failed", "error": f"AssemblyError: {e}"}) + except Exception as e: + res.update({"primary_status": "build_failed", "error": repr(e), "trace": traceback.format_exc()[-2500:]}) + res["timing_s"]["end_to_end"] = round(time.time() - t0, 2) + json.dump(res, open(out_dir / "result.json", "w"), indent=1, default=str) + return res + + +def main(): + import argparse + ap = argparse.ArgumentParser(description="Build and verify one layout of one case, e.g. " + "python -m textbook_sharing.run_case data/cases/C08/sky130/sW1_sL1 /tmp/out --mode combined") + ap.add_argument("case_dir"); ap.add_argument("out_dir") + how = ap.add_mutually_exclusive_group(required=True) + how.add_argument("--mode", choices=("independent", "diffusion_only", "gate_only", "combined"), help="a named mode") + how.add_argument("--plans", help="JSON file {group index: SharingPlan json}") + how.add_argument("--from-record", help="result.json of an earlier run: rebuild with the plans it recorded") + a = ap.parse_args() + plans = json.load(open(a.plans)) if a.plans else None + if a.from_record: + plans = {str(p["group"]): p["plan"] for p in json.load(open(a.from_record))["applied_plans"]} + r = run(a.case_dir, a.out_dir, mode=a.mode, plans=plans, label=a.mode or "plans") + print(json.dumps({k: r.get(k) for k in ("primary_status", "area_um2", "geometry_hash", "verify")}, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/run_grid.py b/benchmarks/textbook_sharing/textbook_sharing/run_grid.py new file mode 100644 index 00000000..8f6f2484 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/run_grid.py @@ -0,0 +1,55 @@ +"""Main grid: every qualified case x the four named modes (independent, diffusion_only, gate_only, combined). +usage: python -m textbook_sharing.run_grid [--out /grid] [--sizes sW1_sL1,sW1_sL1.5] [--circuits ..] [--pdks ..] [--jobs 12] +Resumable: a run whose result.json exists is skipped. The development size points (used to freeze the cost rule and +the fixed mode order before anything else was measured) are sW1_sL1 and sW1_sL1.5; the other ten are held out.""" +from __future__ import annotations +import json, argparse, glob +from pathlib import Path +from multiprocessing import Pool +from textbook_sharing import paths +MODES = ("independent", "diffusion_only", "gate_only", "combined") +DEV_SIZES = ("sW1_sL1", "sW1_sL1.5") + + +def qualified_cases(circuits=None, pdks=None, sizes=None): + out = [] + for q in sorted(glob.glob(str(paths.CASES / "*/*/*/qualification.json"))): + r = json.load(open(q)) + if r.get("stage") != "qualified": continue + if circuits and r["circuit_id"] not in circuits: continue + if pdks and r["pdk"] not in pdks: continue + if sizes and r["size"] not in sizes: continue + out.append(Path(q).parent) + return out + + +def job(args): + cdir, mode, out_root = args + from textbook_sharing.run_case import run + cj = json.load(open(Path(cdir) / "case.json")) + od = Path(out_root) / cj["circuit_id"] / cj["pdk"] / cj["size"] / mode + if (od / "result.json").exists(): + return json.load(open(od / "result.json")).get("primary_status") + nom = json.load(open(paths.CASES / cj["circuit_id"] / cj["pdk"] / "sW1_sL1" / "case.json"))["sizing"] \ + if (paths.CASES / cj["circuit_id"] / cj["pdk"] / "sW1_sL1" / "case.json").exists() else cj["sizing"] + r = run(cdir, od, mode=mode, label=mode, context={"experiment": "main_grid", "size": cj["size"], "mode": mode}, nominal_sizing=nom) + print(cj["case_id"], mode, r.get("primary_status"), r.get("area_um2"), r.get("timing_s", {}).get("end_to_end"), flush=True) + return r.get("primary_status") + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", default=str(paths.GRID_RUNS)); ap.add_argument("--sizes", default=None) + ap.add_argument("--circuits", default=None); ap.add_argument("--pdks", default=None); ap.add_argument("--jobs", type=int, default=12) + ap.add_argument("--modes", default=",".join(MODES)) + a = ap.parse_args() + cases = qualified_cases(a.circuits.split(",") if a.circuits else None, a.pdks.split(",") if a.pdks else None, a.sizes.split(",") if a.sizes else None) + jobs = [(str(c), m, a.out) for c in cases for m in a.modes.split(",")] + print("cases", len(cases), "jobs", len(jobs), flush=True) + with Pool(a.jobs, maxtasksperchild=4) as pool: + st = pool.map(job, jobs, chunksize=1) + import collections + print(dict(collections.Counter(st))) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/selection/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/catalogue.py b/benchmarks/textbook_sharing/textbook_sharing/selection/catalogue.py new file mode 100644 index 00000000..d343ca21 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/catalogue.py @@ -0,0 +1,68 @@ +"""Selection catalogue of one task (= one qualified case of the selection subset); fixed before any evaluation. + +Per sharing group g: all 256 raw axis tuples (glayout.sharing.enumeration) -> static legality -> equivalence +de-duplication -> p_g unique candidates. Global combination space = prod(p_g) (an upper bound on globally legal +combinations: assembly can still reject a combination; such rejections are counted when evaluated). +Sampling (no area, no verification result, no method output is used): + 1. the four named modes (per group: the named plan of the mode, else the group's independent plan); + identical global combinations are kept once; + 2. if prod(p_g) <= LIMIT: every combination (exhaustive); else strata = the vector of per-group (diffusion, gate) + axis values; strata are visited round-robin in sorted order and inside a stratum a combination is drawn uniformly + with random.Random(SEED + task hash); duplicates are skipped; stop at LIMIT candidates or when every stratum is + exhausted (300 consecutive misses). +Candidate ids are content hashes of the per-group plan ids (no ordering information).""" +from __future__ import annotations +import hashlib, random, itertools +from math import prod + +LIMIT = 64 +SEED = 20261011 + + +def cand_id(plan_ids): + return "c" + hashlib.sha256("|".join(plan_ids).encode()).hexdigest()[:11] + + +def build_catalogue(pdk, groups, task_id): + from glayout.sharing import group_candidates, named_plans, independent_plan + tables = [] + for g in groups: + c = group_candidates(pdk, g); nm = named_plans(pdk, g, c) + uniq = [(row["plan_id"], row["tuple"]) for row in c["rows"] if row["status"] == "unique"] + ind = independent_plan(g) + tables.append({"devices": [d.logical_id for d in g], "counts": c["counts"], "unique": uniq, + "plans": {pid: c["unique"][pid][1].to_json() for pid, _ in uniq} | {ind.plan_id(): ind.to_json()}, + "named": {k: (v.plan_id() if v else None) for k, v in nm.items()}, "independent": ind.plan_id(), "rows": c["rows"]}) + product = prod(len(t["unique"]) for t in tables) + entries = {}; order = [] + def add(pids, label): + cid = cand_id(pids) + if cid in entries: entries[cid]["labels"].append(label); return False + entries[cid] = {"plan_ids": list(pids), "labels": [label]}; order.append(cid); return True + for mode in ("independent", "diffusion_only", "gate_only", "combined"): + pids = [t["named"].get(mode) or t["independent"] for t in tables] + add(pids, f"named:{mode}") + if product <= LIMIT: + for combo in itertools.product(*[[pid for pid, _ in t["unique"]] for t in tables]): + add(combo, "exhaustive") + sampling = "exhaustive (prod(p_g) <= limit)" + else: + rng = random.Random(SEED + int(hashlib.sha256(task_id.encode()).hexdigest()[:8], 16)) + bykey = [] + for t in tables: + m = {} + for pid, tup in t["unique"]: m.setdefault((tup["diffusion"], tup["gate"]), []).append(pid) + bykey.append(m) + strata = sorted(itertools.product(*[sorted(m.keys()) for m in bykey])) + misses = 0; k = 0 + while len(entries) < LIMIT and misses < 300: + st = strata[k % len(strata)]; k += 1 + combo = [rng.choice(bykey[gi][key]) for gi, key in enumerate(st)] + if add(combo, "stratified_sample"): misses = 0 + else: misses += 1 + sampling = f"stratified seeded sample over {len(strata)} strata (seed {SEED}+task hash)" + ledger = {"per_group": [{"devices": t["devices"], **t["counts"]} for t in tables], "raw_per_group": 256, + "global_product_of_unique": product, "named_distinct": sum(1 for c in order if any(l.startswith("named:") for l in entries[c]["labels"])), + "selected_for_evaluation": len(order), "sampling": sampling, "limit": LIMIT} + return {"task_id": task_id, "tables": [{k: v for k, v in t.items() if k != "rows"} for t in tables], "group_rows": [t["rows"] for t in tables], + "entries": entries, "ledger": ledger} diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/cost.py b/benchmarks/textbook_sharing/textbook_sharing/selection/cost.py new file mode 100644 index 00000000..9d037727 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/cost.py @@ -0,0 +1,130 @@ +"""Plan-level physical cost estimate (rule frozen before any measurement at the held-out sizes). + +Inputs: the candidate's SharingPlans, the PDK rule table, and ONE baseline assembly per task (the independent plan, +built once; its geometry cost is charged to the method as one geometry generation). No candidate geometry is +generated, no measured area or verification label of any candidate is read. + +Group level (same formulas as glayout.sharing.group.build_mos_group, evaluated without drawing): + W_g = sum_islands [2*end_ext + k*L + (k-1)*inner_node] + (n_islands-1)*island_gap + top-strap end-pad overhang + H_g = W_unit + bottom part (endcap [+poly_sep if a top strap crosses a bottom strap span] + strap + pad levels*pad_pitch) + + top part (endcap [+poly_sep] + strap, only with top straps) + S/D pin rows +Task level: rowspan_r(c) = rowspan_r(base) + sum_{g in r} (W_g(c) - W_g(base)); H_r(c) = H_r(base) + max_g H_g(c) - max_g H_g(base) + W(c) = max_r rowspan_r(c) + (W_total(base) - max_r rowspan_r(base)); H(c) = H_total(base) + sum_r (H_r(c) - H_r(base)) + Channels (added after the development-size validation, before any other size was measured): every diffusion node of a + group cell has a pin on the cell's top edge and every gate group has a pad on its strap side, so the set of nets a + candidate brings into each routing channel follows from the plan alone. With N_ch the nets of channel ch (other cells + and tap strips taken from the baseline assembly), H(c) += track_pitch * sum_ch (|N_ch(c)| - |N_ch(base)|) + (+/- 2*channel_margin when a channel appears / disappears). Track packing changes, cross-row stub shifts and the + split-channel alternative are not modelled. + A_hat(c) = W(c) * H(c). The decomposition terms (shared-node width saving, strap/pad height cost, row dominance, + passive-row dominance) are returned with the estimate.""" +from __future__ import annotations +from glayout.sharing.rules import snap, snap_up + + +def group_dims(R, devices, plan): + W = snap(devices[0].unit_width); L = snap(devices[0].length); n = plan.n() + inner_node = snap_up(max(2 * R.cont_gate_sep + R.cont_w, R.m1_sep + R.m1_bar_w() - L)) + outer_m1_half = max(R.m1_bar_w(), R.via1_m1_w()) / 2 + active_end_half = R.cont_w / 2 + R.act_enc_cont + island_gap = snap_up(max(R.act_sep, R.m1_sep + 2 * max(0.0, outer_m1_half - active_end_half))) + end_off = max(snap_up(R.cont_gate_sep + R.cont_w / 2), snap_up(inner_node / 2)) + end_ext = max(snap_up(end_off + R.cont_w / 2 + R.act_enc_cont), snap_up(R.act_sd_ext_min)) + isl = plan.islands() + w_act = sum(2 * end_ext + (b - a + 1) * L + (b - a) * inner_node for a, b in isl) + (len(isl) - 1) * island_gap + gpad = snap_up(max(R.cont_w + 2 * R.poly_enc_cont, R.poly_w_min, R.sq_from_area(R.poly_area_min), + R.cont_w + 2 * R.m1_enc_cont, R.m1_w, R.sq_from_area(R.m1_area_min), R.via1_m1_w())) + d_pad = snap_up(max(R.contpoly_act_sep, R.m1_sep + 2 * R.m1_enc_cont - R.act_enc_cont, R.poly_act_sep + R.poly_enc_cont)) + pad_out = d_pad + R.cont_w / 2 + R.poly_enc_cont + (gpad - R.cont_w - 2 * R.poly_enc_cont) / 2 + gpad / 2 + side_of = {} + for gi, g in enumerate(plan.gate_groups): + for p in g.fingers: side_of[p] = g.side + tops = [g for g in plan.gate_groups if g.side == "top"]; bottoms = [g for g in plan.gate_groups if g.side == "bottom"] + over_l = max([pad_out for g in tops if g.pad_end == "left"] + [0.0]); over_r = max([pad_out for g in tops if g.pad_end == "right"] + [0.0]) + w = w_act + over_l + over_r + def iv(g): + lo, hi = min(g.fingers), max(g.fingers) + if g.side == "top": lo, hi = (0, hi) if g.pad_end == "left" else (lo, n - 1) + return lo, hi + off_b = any(side_of[p] == "top" for g in bottoms for p in range(iv(g)[0], iv(g)[1] + 1)) + off_t = any(side_of[p] == "bottom" for g in tops for p in range(iv(g)[0], iv(g)[1] + 1)) + strap_w = snap_up(R.poly_w_min); pad_pitch = snap_up(gpad + max(R.poly_sep, R.m1_sep, R.m2_sep)) + levels = min(2, len(bottoms)) + h_bottom = R.endcap + (R.poly_sep if off_b else 0.0) + strap_w + levels * pad_pitch if bottoms else R.endcap + h_top = (R.endcap + (R.poly_sep if off_t else 0.0) + strap_w) if tops else R.endcap + pin = max(R.m1_sep, R.poly_act_sep, 0.1) + snap_up(R.via1_pad_w() + R.m2_sep) + R.via1_pad_w() + h = W + h_bottom + h_top + pin + s = plan.summary() + return {"w": round(w, 4), "h": round(h, 4), "islands": len(isl), "cross_joins": s["cross_device_diffusion_joins"], + "shared_gate_groups": s["cross_device_gate_groups"], "top_band": bool(tops), "pad_levels": levels, + "top_pad_overhang": round(over_l + over_r, 4), "active_w": round(w_act, 4)} + + +def group_side_nets(devices, plan): + """Nets a group cell exposes on its own top and bottom edges (cell-local, before any row flip).""" + by_id = {d.logical_id: d for d in devices} + top = set(); bot = set() + for d in devices: top |= {d.s, d.d} + for g in plan.gate_groups: + net = by_id[plan.finger_order[g.fingers[0]].device].g + (top if g.side == "top" else bot).add(net) + return top, bot + + +def channel_nets(base_stats, groups, plans, group_names): + """Per-channel net sets when the groups use `plans`; other cells and tap strips as in the baseline assembly.""" + src = base_stats["channel_net_sources"]; flip = src["row_flip"]; nch = len(flip) + 1 + N = [set() for _ in range(nch)] + for ch, nets in src["taps"].items(): N[int(ch)] |= set(nets) + gset = set(group_names) + for cname, d in src["cells"].items(): + if cname in gset: continue + for ch, nets in d.items(): N[int(ch)] |= set(nets) + for g, p, cname in zip(groups, plans, group_names): + ri = src["row_of_cell"][cname]; top, bot = group_side_nets(g, p) + up, down = (bot, top) if flip[ri] else (top, bot) + N[ri + 1] |= up; N[ri] |= down + return N + + +CHANNEL_RULE = "nets" # chosen on the development sizes ("nets" or "density") and frozen before the held-out sizes + + +def estimate(R, groups, plans, base_dims, base_stats, group_row, base_plans=None, group_names=None, channel_rule=None): + """groups: list of device lists; plans: list of SharingPlan (candidate); base_dims: list of group_dims of the + baseline plans; base_stats: textbook_sharing.assembly stats of the baseline assembly (row_dims, width, height); group_row: list of the + row index (in base_stats['row_dims']) holding each group.""" + dims = [group_dims(R, g, p) for g, p in zip(groups, plans)] + rows = base_stats["row_dims"] + span0 = [r["width"] + 2 * r["tap_extent"] for r in rows] + span = list(span0); hrow = [r["height"] for r in rows] + for gi, (d, d0) in enumerate(zip(dims, base_dims)): + span[group_row[gi]] += d["w"] - d0["w"] + for ri in range(len(rows)): + gs = [gi for gi in range(len(groups)) if group_row[gi] == ri] + if gs: + hrow[ri] = rows[ri]["height"] + max(dims[gi]["h"] for gi in gs) - max(base_dims[gi]["h"] for gi in gs) + Wt = max(span) + (base_stats["width"] - max(span0)) + Ht = base_stats["height"] + sum(hrow[ri] - rows[ri]["height"] for ri in range(len(rows))) + dch = None + if base_plans is not None and "channel_net_sources" in base_stats and (channel_rule or CHANNEL_RULE) != "none": + names = group_names or [f"grp{gi}" for gi in range(len(groups))] + Nb = channel_nets(base_stats, groups, base_plans, names); Nc = channel_nets(base_stats, groups, plans, names) + pitch = base_stats["track_pitch"]; marg = base_stats["channel_margin"]; dch = [] + rule = channel_rule or CHANNEL_RULE + for ch, (b, c) in enumerate(zip(Nb, Nc)): + if rule == "density" and b: + hb = base_stats["channel_heights"][ch] + tb = round((hb - 2 * marg) / pitch) if hb > 0 else 0 + dt = round((len(c) - len(b)) * tb / len(b)) + else: + dt = len(c) - len(b) + dh = dt * pitch + if b and not c: dh -= 2 * marg + if c and not b: dh += 2 * marg + dch.append(round(dh, 4)) + Ht += sum(dch) + widest = max(range(len(rows)), key=lambda ri: span[ri]) + return {"area_hat": round(Wt * Ht, 4), "w_hat": round(Wt, 4), "h_hat": round(Ht, 4), "groups": dims, + "row_spans": [round(x, 4) for x in span], "widest_row_kind": rows[widest]["kind"], + "passive_dominated": rows[widest]["kind"] == "passive", "channel_dh": dch} diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/fixed_order.py b/benchmarks/textbook_sharing/textbook_sharing/selection/fixed_order.py new file mode 100644 index 00000000..a2ff71b9 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/fixed_order.py @@ -0,0 +1,38 @@ +"""Freeze the fixed-mode order for the 'fixed_mode' strategy from DEVELOPMENT-size main-grid results only. +Declared rule (written before reading the results): for each sharing mode m, over the development cases where both m and +independent passed every automatic stage, take the mean of (A_m / A_independent - 1); order the modes by that mean +ascending (ties: higher pass rate first); 'independent' is always last. Output: data/frozen/fixed_order.json +(never overwritten). usage: python -m textbook_sharing.selection.fixed_order --sizes sW1_sL1,sW1_sL1.5""" +import json, glob, argparse, statistics +from pathlib import Path +from textbook_sharing import paths +MODES = ("diffusion_only", "gate_only", "combined") + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--sizes", required=True); a = ap.parse_args() + sizes = a.sizes.split(","); out = paths.FROZEN / "fixed_order.json" + if out.exists(): raise SystemExit(f"{out} exists; never overwritten") + stat = {m: {"applicable": 0, "passed": 0, "rel": []} for m in MODES} + for ind in sorted(glob.glob(str(paths.GRID_RUNS / "*/*/*/independent/result.json"))): + if Path(ind).parts[-3] not in sizes: continue + b = json.load(open(ind)) + for m in MODES: + f = Path(ind).parent.parent / m / "result.json" + if not f.exists(): continue + r = json.load(open(f)) + if r.get("primary_status") == "NA": continue + stat[m]["applicable"] += 1 + if r.get("primary_status") == "auto_passed": stat[m]["passed"] += 1 + if r.get("primary_status") == "auto_passed" and b.get("primary_status") == "auto_passed": + stat[m]["rel"].append(r["area_um2"] / b["area_um2"] - 1) + rows = {m: {"applicable": s["applicable"], "passed": s["passed"], "pass_rate": s["passed"] / s["applicable"] if s["applicable"] else 0, + "n_paired": len(s["rel"]), "mean_rel_area": statistics.mean(s["rel"]) if s["rel"] else 0.0} for m, s in stat.items()} + order = sorted(MODES, key=lambda m: (rows[m]["mean_rel_area"], -rows[m]["pass_rate"])) + ["independent"] + rule = __doc__.split(" Output:")[0].strip() + json.dump({"order": order, "per_mode": rows, "sizes": sizes, "rule": rule}, open(out, "w"), indent=1) + print(json.dumps({"order": order, "per_mode": rows}, indent=1)) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/run_selection.py b/benchmarks/textbook_sharing/textbook_sharing/selection/run_selection.py new file mode 100644 index 00000000..80ce0a58 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/run_selection.py @@ -0,0 +1,110 @@ +"""Plan-selection study: catalogue construction and full evaluation of every catalogue candidate. +Tasks: SELECTION_TOPOLOGIES x 3 PDKs x SELECTION_SIZES (72 requested); a task exists only if its case is qualified. +Per task directory /selection//: + catalogue.json (per-group candidate tables, ledger, entries = candidate id -> per-group plan ids, plans) + estimates.json (cost.py estimate of every entry; uses one baseline assembly of the independent plan) + /result.json (run_case.run with explicit plans) +usage: python -m textbook_sharing.selection.run_selection [--stage catalogue|evaluate|all] [--jobs 12] [--sizes ..] [--pdks ..] [--topologies ..]""" +from __future__ import annotations +import json, argparse, time +from pathlib import Path +from multiprocessing import Pool +from textbook_sharing.grid import SELECTION_TOPOLOGIES, SELECTION_SIZES, size_tag +from textbook_sharing import paths + +OUT = paths.SELECTION_RUNS + + +def task_dirs(topologies=None, pdks=None, sizes=None): + tasks = []; excluded = [] + for cid in (topologies or SELECTION_TOPOLOGIES): + for pdk in (pdks or ["sky130", "gf180", "ihp130"]): + for sw, sl in SELECTION_SIZES: + tag = size_tag(sw, sl) + if sizes and tag not in sizes: continue + q = paths.CASES / cid / pdk / tag / "qualification.json" + rec = {"task_id": f"{cid}_{pdk}_{tag}", "case_dir": paths.rel(q.parent)} + if not q.exists(): + # parameter-illegal or duplicate requests have no case directory: read the build record + rec["excluded"] = "no case directory (parameter-illegal or duplicate request)"; excluded.append(rec); continue + r = json.load(open(q)) + if r["stage"] != "qualified": + rec["excluded"] = "schematic_not_qualified: " + "; ".join(r["qualification"]["reasons"][:3]); excluded.append(rec); continue + tasks.append(rec) + return tasks, excluded + + +def make_catalogue(task): + from textbook_sharing.run_case import load_case_dir, pdk_obj + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import device_specs, sharing_groups, build + from textbook_sharing.selection.catalogue import build_catalogue + from textbook_sharing.selection import cost + from glayout.sharing import SharingPlan, rules_for + td = OUT / task["task_id"]; td.mkdir(parents=True, exist_ok=True) + if (td / "catalogue.json").exists() and (td / "estimates.json").exists(): + return task["task_id"], "kept" + case, cj = load_case_dir(task["case_dir"]); circ = CIRCUITS[case.circuit_id]; pdk = pdk_obj(case.pdk) + groups = sharing_groups(device_specs(circ, case.sizing)) + t0 = time.time(); cat = build_catalogue(pdk, groups, task["task_id"]); t_enum = time.time() - t0 + json.dump({**cat, "timing_s": {"enumeration_and_static_checks": round(t_enum, 3)}}, open(td / "catalogue.json", "w"), indent=1, default=str) + # cost estimates: one baseline assembly (independent plan) + plan-only group formulas + R = rules_for(pdk) + t1 = time.time() + base = build(pdk, circ, case.sizing, mode="independent", name=f"{case.case_id}_costbase".replace(".", "p")) + t_base = time.time() - t1 + base_plans = [SharingPlan.from_json(ap["plan"]) for ap in base["applied_plans"]] + base_dims = [cost.group_dims(R, g, p) for g, p in zip(groups, base_plans)] + kinds = [r["kind"] for r in base["assembly_stats"]["row_dims"]] + group_row = [kinds.index("n" if g[0].model_role == "nfet" else "p") for g in groups] + est = {}; t2 = time.time() + tables = cat["tables"] + for cid_, e in cat["entries"].items(): + plans = [SharingPlan.from_json(tables[gi]["plans"][pid]) for gi, pid in enumerate(e["plan_ids"])] + est[cid_] = cost.estimate(R, groups, plans, base_dims, base["assembly_stats"], group_row, base_plans=base_plans) + t_est = time.time() - t2 + json.dump({"estimates": est, "baseline_area_um2": base["assembly_stats"]["area_um2"], "timing_s": {"baseline_geometry": round(t_base, 3), "estimates_total": round(t_est, 4)}, + "rule": "textbook_sharing.selection.cost v2 (group dims + channel nets)"}, open(td / "estimates.json", "w"), indent=1, default=str) + return task["task_id"], "built" + + +def eval_job(args): + task_id, case_dir, cand_id = args + from textbook_sharing.run_case import run + td = OUT / task_id; od = td / cand_id + if (od / "result.json").exists(): + return json.load(open(od / "result.json")).get("primary_status") + cat = json.load(open(td / "catalogue.json")); e = cat["entries"][cand_id] + plans = {str(gi): cat["tables"][gi]["plans"][pid] for gi, pid in enumerate(e["plan_ids"])} + cj = json.load(open(Path(case_dir) / "case.json")) + nomp = paths.CASES / cj["circuit_id"] / cj["pdk"] / "sW1_sL1" / "case.json" + nom = json.load(open(nomp))["sizing"] if nomp.exists() else None + r = run(case_dir, od, plans=plans, label=cand_id, context={"experiment": "selection", "task": task_id, "candidate": cand_id}, nominal_sizing=nom) + print(task_id, cand_id, r.get("primary_status"), r.get("area_um2"), flush=True) + return r.get("primary_status") + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--stage", default="all"); ap.add_argument("--jobs", type=int, default=12) + ap.add_argument("--sizes", default=None); ap.add_argument("--pdks", default=None); ap.add_argument("--topologies", default=None) + a = ap.parse_args() + tasks, excluded = task_dirs(a.topologies.split(",") if a.topologies else None, a.pdks.split(",") if a.pdks else None, a.sizes.split(",") if a.sizes else None) + OUT.mkdir(parents=True, exist_ok=True) + json.dump({"tasks": tasks, "excluded": excluded}, open(OUT / f"tasks_{int(time.time())}.json", "w"), indent=1) + print("tasks", len(tasks), "excluded", len(excluded), flush=True) + if a.stage in ("catalogue", "all"): + with Pool(min(a.jobs, 8)) as pool: + for tid, st in pool.imap_unordered(make_catalogue, tasks): print("catalogue", tid, st, flush=True) + if a.stage in ("evaluate", "all"): + jobs = [] + for t in tasks: + cat = json.load(open(OUT / t["task_id"] / "catalogue.json")) + jobs += [(t["task_id"], t["case_dir"], c) for c in cat["entries"]] + print("candidate evaluations", len(jobs), flush=True) + with Pool(a.jobs, maxtasksperchild=4) as pool: + st = pool.map(eval_job, jobs, chunksize=1) + import collections; print(dict(collections.Counter(st))) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/strategies.py b/benchmarks/textbook_sharing/textbook_sharing/selection/strategies.py new file mode 100644 index 00000000..e23ac8e7 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/strategies.py @@ -0,0 +1,157 @@ +"""Plan-selection methods evaluated on the fully verified catalogue of each task (offline replay; every method +sees only what it is entitled to see and pays for it). Budget = number of full verifications (1, 2, 4, 8, 16). +Methods + fixed_mode : the named modes in a frozen order (FIXED_ORDER, set from development-size results before test + sizes were measured), then the remaining candidates by share score. + share_most : candidates ranked by (cross-device diffusion joins + shared gate conductors), more first. + random : uniform random order, 10 fixed seeds. + neighbourhood : structural beam search (width 4) over the axis vectors (neighbours differ in one axis value + of one group), starting from the independent plan, ranking unqueried neighbours by share score. + cost_rank : ascending cost.py estimate (one baseline assembly + plan formulas; no candidate geometry). + geometry_first : build EVERY candidate's geometry (charged), rank by its bounding-box area, verify in that order. + baseline_independent: verify only the independent (unshared) plan. + best_evaluated : offline upper bound = best feasible candidate among all evaluated (not an online method). +A query returns the candidate's full result (feasible = primary_status auto_passed). Result after n queries = smallest +feasible area among the queried candidates (None if none). Time = method precomputation + sum of the per-candidate +verification wall time of the queried candidates (geometry, DRC, LVS, sizing, PEX, checks, render, post-layout sim).""" +from __future__ import annotations +import json, random +from pathlib import Path +from textbook_sharing import paths + +PREFIXES = (1, 2, 4, 8, 16) + + +def _frozen_order(): + f = paths.FROZEN / "fixed_order.json" + return json.load(open(f))["order"] if f.exists() else None + + +FIXED_ORDER = _frozen_order() # frozen by selection.fixed_order from development sizes (data/frozen/fixed_order.json) +SEEDS = list(range(10)) + + +TIMING = None + + +def _timing(): + """Controlled timings (textbook_sharing.selection.timing) when available: geometry times measured one at a time, and the + per-task median end-to-end verification time charged for every full verification (same for every method).""" + global TIMING + if TIMING is None: + f = paths.ANALYSIS / "timing_controlled.json" + TIMING = json.load(open(f))["tasks"] if f.exists() else {} + return TIMING + + +def load_task(td): + td = Path(td); cat = json.load(open(td / "catalogue.json")); est = json.load(open(td / "estimates.json")) + res = {} + for cid in cat["entries"]: + rp = td / cid / "result.json" + if rp.exists(): res[cid] = json.load(open(rp)) + T = _timing().get(td.name) + if T: + for cid, r in res.items(): + r = dict(r); t = dict(r.get("timing_s") or {}) + t["geometry_generation"] = T["geometry_s"].get(cid, t.get("geometry_generation", 0.0)) + t["end_to_end"] = T["verification_median_s"]; r["timing_s"] = t; res[cid] = r + est = dict(est); est["timing_s"] = {"baseline_geometry": T["baseline_geometry_s"], "estimates_total": T["cost_estimates_total_s"]} + return cat, est, res + + +def share_score(cat, cid): + s = 0 + for gi, pid in enumerate(cat["entries"][cid]["plan_ids"]): + pl = cat["tables"][gi]["plans"][pid] + fo = pl["finger_order"] + s += sum(1 for i, j in enumerate(pl["diffusion_joins"]) if j and fo[i][0] != fo[i + 1][0]) + s += sum(1 for g in pl["gate_groups"] if len({fo[p][0] for p in g[0]}) > 1) + return s + + +def axis_vec(cat, cid): + v = [] + for gi, pid in enumerate(cat["entries"][cid]["plan_ids"]): + tup = next((t for p, t in cat["tables"][gi]["unique"] if p == pid), None) + v += [tup[k] for k in ("arrangement", "orientation", "diffusion", "gate", "strap_start", "contact_end")] if tup else ["independent"] * 6 + return tuple(v) + + +def named(cat, mode): + return next((c for c, e in cat["entries"].items() if f"named:{mode}" in e["labels"]), None) + + +def order_for(method, cat, est, res, seed=None, fixed_order=None): + ids = sorted(cat["entries"]) + if method == "share_most": + return sorted(ids, key=lambda c: (-share_score(cat, c), c)), 0.0 + if method == "random": + r = random.Random(seed); o = list(ids); r.shuffle(o); return o, 0.0 + if method == "cost_rank": + pre = est["timing_s"]["baseline_geometry"] + est["timing_s"]["estimates_total"] + return sorted(ids, key=lambda c: (est["estimates"][c]["area_hat"], c)), pre + if method == "geometry_first": + pre = sum((res.get(c, {}).get("timing_s") or {}).get("geometry_generation", 0.0) for c in ids) + return sorted(ids, key=lambda c: ((res.get(c, {}).get("area_um2_assembly") or 1e18), c)), pre + if method == "fixed_mode": + first = [named(cat, m) for m in (fixed_order or FIXED_ORDER or ["combined", "gate_only", "diffusion_only", "independent"])] + first = [c for i, c in enumerate(first) if c and c not in first[:i]] + rest = sorted([c for c in ids if c not in first], key=lambda c: (-share_score(cat, c), c)) + return first + rest, 0.0 + raise ValueError(method) + + +def neighbourhood_order(cat, width=4, budget=16): + ids = sorted(cat["entries"]); vec = {c: axis_vec(cat, c) for c in ids} + start = named(cat, "independent") or ids[0] + traj = [start]; seen = {start}; beam = [start] + while len(traj) < min(budget, len(ids)): + cand = set() + for b in beam: + for c in ids: + if c in seen: continue + if sum(1 for x, y in zip(vec[b], vec[c]) if x != y) == 1: cand.add(c) + cand = sorted(cand, key=lambda c: (-share_score(cat, c), c)) + if not cand: + cand = sorted([c for c in ids if c not in seen], key=lambda c: (-share_score(cat, c), c)) + if not cand: break + for c in cand[:width]: + if len(traj) >= budget: break + traj.append(c); seen.add(c) + beam = traj[-width:] + return traj + + +def replay(order, res, pre_s): + out = {}; best = None; t = pre_s; found_at = None + for n, c in enumerate(order[:max(PREFIXES)], start=1): + r = res.get(c, {}) + t += (r.get("timing_s") or {}).get("end_to_end", 0.0) + if r.get("primary_status") == "auto_passed" and r.get("area_um2"): + if best is None or r["area_um2"] < best: best = r["area_um2"] + found_at = found_at or n + if n in PREFIXES: out[n] = {"best_area": best, "time_s": round(t, 1)} + for n in PREFIXES: + if n not in out: out[n] = dict(out[max(k for k in out)]) if out else {"best_area": None, "time_s": round(t, 1)} + return out, found_at + + +def evaluate_task(td, fixed_order=None): + cat, est, res = load_task(td) + feas = {c: r["area_um2"] for c, r in res.items() if r.get("primary_status") == "auto_passed" and r.get("area_um2")} + best = min(feas.values()) if feas else None + rows = [] + def add(method, order, pre, seed=None): + rp, found = replay(order, res, pre) + rows.append({"task": Path(td).name, "method": method, "seed": seed, "first_feasible_query": found, "precompute_s": round(pre, 2), + "prefix": {str(n): {**v, "gap": (v["best_area"] / best - 1) if (v["best_area"] and best) else None} for n, v in rp.items()}, + "best_evaluated": best, "n_evaluated": len(res), "n_feasible": len(feas)}) + for m in ("fixed_mode", "share_most", "cost_rank", "geometry_first"): + o, pre = order_for(m, cat, est, res, fixed_order=fixed_order); add(m, o, pre) + for s in SEEDS: + o, pre = order_for("random", cat, est, res, seed=s); add("random", o, pre, seed=s) + add("neighbourhood", neighbourhood_order(cat), 0.0) + ind = named(cat, "independent") + add("baseline_independent", [ind] if ind else [], 0.0) # the unshared reference only (one verification) + return rows diff --git a/benchmarks/textbook_sharing/textbook_sharing/selection/timing.py b/benchmarks/textbook_sharing/textbook_sharing/selection/timing.py new file mode 100644 index 00000000..6a6cd4e5 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/selection/timing.py @@ -0,0 +1,59 @@ +"""Controlled timing pass for the selection comparison. The per-candidate wall times recorded during the evaluation were +measured on a shared, heavily loaded machine (median geometry generation 0.18 s, but 53 of 3404 records > 100 s caused by +stalls). Here every candidate's geometry (and each task's cost-rule baseline) is rebuilt ONE AT A TIME in a single +process and timed; the load average is recorded. The replay charges these geometry times, and for full verifications +the per-task median of the recorded end-to-end times (the same charge for every method). +usage: python -m textbook_sharing.selection.timing --out /analysis/timing_controlled.json""" +import os, json, time, glob, argparse, statistics, tempfile +from multiprocessing import Pool +from pathlib import Path +from textbook_sharing import paths + + +def one_task(td): + from textbook_sharing.run_case import load_case_dir, pdk_obj + from textbook_sharing.circuits import CIRCUITS + from textbook_sharing.layout import build, device_specs, sharing_groups + from glayout.sharing import SharingPlan, rules_for + from textbook_sharing.selection import cost + td = Path(td); outf = paths.ANALYSIS / "timing_controlled_parts" / f"{td.name}.json" + if outf.exists(): return td.name, "kept" + cat = json.load(open(td / "catalogue.json")) + anyres = next(td.glob("*/result.json")); case_dir = json.load(open(anyres))["case_dir"] + case, cj = load_case_dir(case_dir); circ = CIRCUITS[case.circuit_id]; pdk = pdk_obj(case.pdk); R = rules_for(pdk) + groups = sharing_groups(device_specs(circ, case.sizing)); tmp = Path(tempfile.mkdtemp()) + rec = {"geometry_s": {}, "load_start": os.getloadavg()} + t0 = time.perf_counter(); base = build(pdk, circ, case.sizing, mode="independent", name=f"tb_{td.name}".replace(".", "p")); base["component"].write_gds(str(tmp / "b.gds")) + rec["baseline_geometry_s"] = round(time.perf_counter() - t0, 4) + bp = [SharingPlan.from_json(x["plan"]) for x in base["applied_plans"]]; bd = [cost.group_dims(R, g, p) for g, p in zip(groups, bp)] + kinds = [r["kind"] for r in base["assembly_stats"]["row_dims"]]; grow = [kinds.index("n" if g[0].model_role == "nfet" else "p") for g in groups] + t1 = time.perf_counter() + for cid, e in cat["entries"].items(): + plans = [SharingPlan.from_json(cat["tables"][gi]["plans"][pid]) for gi, pid in enumerate(e["plan_ids"])] + cost.estimate(R, groups, plans, bd, base["assembly_stats"], grow, base_plans=bp) + rec["cost_estimates_total_s"] = round(time.perf_counter() - t1, 4) + for n, (cid, e) in enumerate(cat["entries"].items()): + plans = {str(gi): cat["tables"][gi]["plans"][pid] for gi, pid in enumerate(e["plan_ids"])} + t2 = time.perf_counter() + r = build(pdk, circ, case.sizing, name=f"t{n}_{cid}", plans=plans); r["component"].write_gds(str(tmp / "c.gds")) + rec["geometry_s"][cid] = round(time.perf_counter() - t2, 4) + e2e = [json.load(open(p)).get("timing_s", {}).get("end_to_end") for p in td.glob("*/result.json")] + e2e = [x for x in e2e if x] + rec["verification_median_s"] = statistics.median(e2e) if e2e else None + rec["load_end"] = os.getloadavg() + outf.parent.mkdir(parents=True, exist_ok=True); json.dump(rec, open(outf, "w"), indent=1) + return td.name, round(sum(rec["geometry_s"].values()), 2) + + +def main(): + ap = argparse.ArgumentParser(); ap.add_argument("--out", required=True); ap.add_argument("--jobs", type=int, default=10); a = ap.parse_args() + tds = [str(Path(t).parent) for t in sorted(glob.glob(str(paths.SELECTION_RUNS / "*/catalogue.json")))] + with Pool(a.jobs, maxtasksperchild=1) as pool: + for name, st in pool.imap_unordered(one_task, tds): print(name, st, flush=True) + parts = {Path(f).stem: json.load(open(f)) for f in glob.glob(str(paths.ANALYSIS / "timing_controlled_parts/*.json"))} + json.dump({"note": "each task in its own process, candidates built one at a time; up to --jobs tasks in parallel", "jobs": a.jobs, "tasks": parts}, + open(a.out, "w"), indent=1) + + +if __name__ == "__main__": + main() diff --git a/benchmarks/textbook_sharing/textbook_sharing/testbench.py b/benchmarks/textbook_sharing/textbook_sharing/testbench.py new file mode 100644 index 00000000..df5b708a --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/testbench.py @@ -0,0 +1,508 @@ +"""Testbench generators and measurement/spec definitions per circuit category. + +Design principles (fixed before any layout was measured): + * every testbench is generated from the case (sizing, supply, bias, load) so that bias voltages come from + disclosed ideal replica bias generators built with the DUT's own device model and sizes (no hand-tuned + voltages): a current-source gate bias is the gate of a diode-connected replica of that device carrying + the branch current; a cascode gate bias uses the W/4 replica (V_T + 2 V_ov); + * amplifiers without a defined output DC point (single-stage with active load, OTAs) use a disclosed DC servo + (1e6 H inductor / 1e6 F capacitor) that fixes the DC operating point at V_out = V_in,dc while leaving AC + behaviour untouched; differential pairs with current-source loads and the fully differential OTA use a + disclosed ideal common-mode feedback on the NMOS current-source bias; + * measurements are printed as 'name = value'; a missing crossing yields no value and fails the spec check. +Categories: mirror (C01,C02,C03,C13,C14), follower (C05), buffer_ab (C18), single (C04,C06,C12,C15), +diff_r (C16,C17), diff_cs (C07), ota (C08,C09), ota_fd (C10), twostage (C11). +""" +from __future__ import annotations +import math +from .netlist import PDK_MODELS + +CATEGORY = {"C01": "mirror", "C02": "mirror", "C03": "mirror", "C13": "mirror", "C14": "mirror", "C05": "follower", "C18": "buffer_ab", + "C04": "single", "C06": "single", "C12": "single", "C15": "single", "C07": "diff_cs", "C16": "diff_r", "C17": "diff_r", + "C08": "ota", "C09": "ota", "C10": "ota_fd", "C11": "twostage"} + + +def _inst(circuit, name): + return "X1 " + " ".join(circuit.ports) + f" {name}" + + +def _mos(pdk, inst, d, g, s, b, kind, w, l): + m = PDK_MODELS[pdk]; u = m["unit"] + return f"{m['prefix']}{inst} {d} {g} {s} {b} {m[kind]} w={w:g}{u} l={l:g}{u}" + + +def _dev(circuit, name): + return next(d for d in circuit.devices if d.name == name) + + +WDIV = {"diode": 1.0, "cascode": 4.0, "cascode3": 9.0, "cascode4": 16.0} + + +def _replica(pdk, circuit, sizing, node, devname, I, kind="diode"): + """Diode-connected replica of device devname carrying current I; node is its gate/drain. Returns lines.""" + # V_T + n*V_ov is generated with the SAME device size and n^2 times the current (keeps every replica inside the + # model's valid W range; sky130 has no bins below W=0.42 um) + dev = _dev(circuit, devname); sz = sizing[dev.name]; w = sz["w"]; I = I * WDIV[kind] + if dev.kind == "nfet": + return [_mos(pdk, f"B_{node}", node, node, "VSS", "VSS", "nfet", w, sz["l"]), f"IB_{node} VDDB {node} {I:g}"] + return [_mos(pdk, f"B_{node}", node, node, "VDDB", "VDDB", "pfet", w, sz["l"]), f"IB_{node} {node} VSS {I:g}"] + + +def bias_block(pdk, circuit, sizing, bias, extra_nodes=None): + """Replica bias generators. bias[port] forms: + {'replica': dev, 'current': I, 'kind': 'diode'|'cascode'|'cascode3'} -> port = gate of a replica diode (W, W/4, W/9) + {'expr': 'v(VB1) - gs(M3) + gs(M1) - 0.1', 'currents': {'M3': I, 'M1': I}} -> B-source; gs(X) is replaced by the + gate voltage of a diode replica of X at the given current, measured relative to its own source rail + (for an NMOS: v(GS_X); for a PMOS: v(VDD)-v(GS_X)).""" + lines = []; made = set() + items = list(bias.items()) + list((extra_nodes or {}).items()) + for port, spec in items: + if not isinstance(spec, dict): continue + if "replica" in spec: + lines += _replica(pdk, circuit, sizing, port, spec["replica"], spec["current"], spec.get("kind", "diode")) + elif "expr" in spec: + expr = spec["expr"] + for devname, I in spec.get("currents", {}).items(): + node = f"GS_{devname}" + if node not in made: + lines += _replica(pdk, circuit, sizing, node, devname, I, "diode"); made.add(node) + dev = _dev(circuit, devname) + rep = f"v({node})" if dev.kind == "nfet" else f"(v(VDDB)-v({node}))" + expr = expr.replace(f"gs({devname})", rep) + lines.append(f"B_{port} {port} 0 V = {expr}") + return "\n".join(lines) + + +def _sources(circuit, supply, bias, exclude=()): + ports = circuit.ports + lines = [f"VDD VDD 0 {supply['VDD']}" if "VDD" in ports else "", "VSS VSS 0 0" if "VSS" in ports else "", f"VDDB VDDB 0 {supply['VDD']}"]; nodesets = [] + for p in ports: + if p in ("VDD", "VSS") or p in exclude: continue + v = bias.get(p) + if v is None: continue + if isinstance(v, dict) and "replica" in v: continue # generated by bias_block + if p.startswith("VB") or p.startswith("VREF") or p.startswith("VCM"): + lines.append(f"V{p} {p} 0 {v}") + elif p.startswith(("IB", "IIN", "IREF", "IIN")): + src = v.get("from", "VDD") if isinstance(v, dict) else "VDD"; val = v["i"] if isinstance(v, dict) else v + # circuits without a VDD port (NMOS mirrors) source their currents from the defined supply VDDB; an + # undefined VDD node would float (held only by gmin, an ill-conditioned DC problem) + top = "VDD" if "VDD" in ports else "VDDB" + lines.append(f"I{p} {top} {p} {val:g}" if src == "VDD" else f"I{p} {p} VSS {val:g}") + # initial guess (not a constraint) for every current-fed node. An ideal current source has no + # compliance limit, and on some extracted netlists gmin stepping accepted a non-physical DC point with the + # input node at ~6 kV (current carried by junction leakage). .nodeset only seeds the Newton iteration. + nodesets.append(f"v({p})={round((0.3 if src == 'VDD' else 0.7) * supply['VDD'], 3)}") + if nodesets: lines.append(".nodeset " + " ".join(nodesets)) + return "\n".join(l for l in lines if l) + + +# ---------------------------------------------------------------- mirrors +def tb_mirror(circuit, name, include, case, pdk): + """Mirror test. The output is swept DOWN from VDD (continuation from the saturated, unique-solution end), so every + quantity comes from one well-defined solution branch (a stand-alone .op at a fixed output voltage can land on either + of the two DC solutions of the regulated cascode). Measured: compliance voltage vmin (lowest V_out + with |I_out/I_ref - 1| <= tol; the LAST crossing of the descending sweep, because a basic mirror can already exceed the + tolerance near VDD through channel-length modulation), error and output resistance at the frozen test point vout_test (case.load, set by the + qualification rule to the middle of [vmin_schematic, VDD]), deviation near VDD.""" + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; iref = bias["IREF"]; tol = load.get("tol", 0.05) + vt = load.get("vout_test", load.get("vout_nom", vdd / 2)) + out = [p for p in circuit.ports if p.startswith("IOUT")][0] + src = _sources(circuit, supply, bias, exclude=(out,)) + step = vdd / 400 + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +VOUT {out} 0 {vdd} +.control +dc VOUT {vdd} 0 -{step:g} +let iout = -i(VOUT) +let dev = abs(iout - {iref:g})/{iref:g} +meas dc iout_t find iout at={vt:g} +let err = (iout_t - {iref:g})/{iref:g} +print err +meas dc vmin find v({out}) when dev={tol} cross=last +meas dc dev_at_vdd find dev at={vdd*0.995:g} +let gout = deriv(iout) +meas dc gout_t find gout at={vt:g} +let rout_v = 1/gout +meas dc rout_t find rout_v at={vt:g} +print vt_used +quit +.endc +.end +""".replace("print vt_used", f"echo vout_test = {vt:g}") + + +# ---------------------------------------------------------------- followers / buffers +def tb_follower(circuit, name, include, case, pdk): + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; rl = load.get("RL", 10e3); cl = load.get("CL", 1e-12); vin = load["vin_nom"] + src = _sources(circuit, supply, bias, exclude=("VIN1", "VOUT1")) + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +VIN1 VIN1 0 dc {vin:g} ac 1 +RL VOUT1 0 {rl:g} +CL VOUT1 0 {cl:g} +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 {vdd} {vdd/400:g} +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at={vin:g} +meas dc vout_at_nom find v(VOUT1) at={vin:g} +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end +""" + + +def tb_buffer_ab(circuit, name, include, case, pdk): + """Class-AB output stage test (inverting CS driver + complementary followers). + Load: RL and CL returned to an ideal mid-supply source (AC-coupled-load convention; returning RL to VSS would force + a DC load current through one follower). A disclosed bounded DC servo sets V_out,dc = target; the servo can be + frozen (KSW=1) at the input level it found, which gives an open-loop DC transfer around the operating point. + Measured: vout0/vin0 (servo convergence), iq (DUT supply current at the operating point, load current ~0), + gain_lf and f3db (open-loop small signal), out_swing (width of the V_out range over which the incremental gain stays + >= 50 % of its value at the operating point, open loop with the servo frozen), thd_pct at a fixed output amplitude.""" + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; rl = load.get("RL", 20e3); cl = load.get("CL", 5e-12); vt = load.get("vout_target", vdd / 2) + vcen = load.get("vin_center", vdd / 3); slope = load.get("servo_slope", 200.0); vout_amp = load.get("vout_amp", 0.1) + src = _sources(circuit, supply, bias, exclude=("VIN1", "VOUT1")) + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 {vt:g} +VMID VMID 0 {vdd / 2:g} +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*({vcen:g} + 0.5*tanh({slope:g}*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID {rl:g} +CL VOUT1 VMID {cl:g} +{load.get('options', '')} +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of {vout_amp:g} V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = {vout_amp:g}/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end +""" + + +# ---------------------------------------------------------------- single-ended amplifiers with DC servo +def tb_single(circuit, name, include, case, pdk): + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; cl = load.get("CL", 100e-15) + src = _sources(circuit, supply, bias, exclude=("VIN1", "VOUT1")) + servo = load.get("servo", True) + if servo: + inp = f"""* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1""" + else: + inp = f"VIN1 VIN1 0 dc {load['vin_nom']:g} ac 1" + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +{inp} +CL VOUT1 0 {cl:g} +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end +""" + + +# ---------------------------------------------------------------- differential +def tb_diff_r(circuit, name, include, case, pdk): + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; cl = load.get("CL", 100e-15); vcm = load["vcm"] + src = _sources(circuit, supply, bias, exclude=("VIN1", "VIN2", "VOUT1", "VOUT2")) + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +VCM VCM 0 {vcm:g} +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 {cl:g} +CL2 VOUT2 0 {cl:g} +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end +""" + + +def tb_diff_cs(circuit, name, include, case, pdk): + """Diff pair with PMOS current-source loads: output CM set by a disclosed ideal CMFB on VB1 (PMOS gate bias).""" + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; cl = load.get("CL", 100e-15); vcm = load["vcm"]; vocm = load.get("vocm", vdd / 2); gcm = load.get("cmfb_gain", 20.0) + src = _sources(circuit, supply, bias, exclude=("VIN1", "VIN2", "VOUT1", "VOUT2", "VB1")) + # replica for VB1 provides the nominal; the CMFB adds a correction + b2 = dict(bias); b2["VB1n"] = b2.pop("VB1") + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, b2)} +VCM VCM 0 {vcm:g} +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 {cl:g} +CL2 VOUT2 0 {cl:g} +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + {gcm:g}*((v(VOUT1)+v(VOUT2))/2 - {vocm:g}) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end +""" + + +# ---------------------------------------------------------------- OTAs (single-ended output) with DC servo +def _vcm_lines(pdk, circuit, case): + vcm = case.load["vcm"] + if isinstance(vcm, dict): + return bias_block(pdk, circuit, case.sizing, {}, extra_nodes={"VCM": vcm}) + return f"VCM VCM 0 {vcm:g}" + + +def tb_ota(circuit, name, include, case, pdk): + """Single-ended-output OTA: non-inverting input at VCM (+AC drive), inverting input DC level set by a disclosed + high-gain servo so that V_out,dc = vout_target (VDD/2 by default); AC gain, UGF, phase margin, bandwidth.""" + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; cl = load.get("CL", 1e-12); vt = load.get("vout_target", vdd / 2) + inv = load.get("inv_input", "VIN2"); noninv = "VIN1" if inv == "VIN2" else "VIN2" + src = _sources(circuit, supply, bias, exclude=("VIN1", "VIN2", "VOUT1")) + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, bias)} +{_vcm_lines(pdk, circuit, case)} +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 {vt:g} +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV {inv} VCM VINT 0 1 +EIN {noninv} VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 {cl:g} +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v({inv}) - v({noninv}) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end +""" + + +def tb_twostage(circuit, name, include, case, pdk): + return tb_ota(circuit, name, include, case, pdk) + + +def tb_ota_fd(circuit, name, include, case, pdk): + supply, bias, load = case.supply, case.bias, case.load + vdd = supply["VDD"]; cl = load.get("CL", 500e-15); vocm = load.get("vocm", vdd / 2); gcm = load.get("cmfb_gain", 20.0) + src = _sources(circuit, supply, bias, exclude=("VIN1", "VIN2", "VOUT1", "VOUT2", "VB4")) + b2 = dict(bias); b2["VB4n"] = b2.pop("VB4") + return f"""{_inst(circuit, name)} +.include {include} +{src} +{bias_block(pdk, circuit, case.sizing, b2)} +{_vcm_lines(pdk, circuit, case)} +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 {cl:g} +CL2 VOUT2 0 {cl:g} +BCMFB VB4 0 V = v(VB4n) + {gcm:g}*((v(VOUT1)+v(VOUT2))/2 - {vocm:g}) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end +""" + + +GEN = {"mirror": tb_mirror, "follower": tb_follower, "buffer_ab": tb_buffer_ab, "single": tb_single, "diff_r": tb_diff_r, "diff_cs": tb_diff_cs, + "ota": tb_ota, "ota_fd": tb_ota_fd, "twostage": tb_twostage} + + +def make_testbench(circuit, dut_name, include_path, case, pdk): + return GEN[CATEGORY[circuit.circuit_id]](circuit, dut_name, include_path, case, pdk) + + +def derived(meas: dict) -> dict: + """Derived metrics: phase margin from ph_lf/ph_ugf (inverting path has 180 deg at DC).""" + out = dict(meas) + if "vout_test" in meas and "rout_t" in meas: + out["rout_nom"] = meas["rout_t"] + if "ph_ugf" in meas and "ph_lf" in meas: + out["pm"] = 180.0 - abs(meas["ph_lf"] - meas["ph_ugf"]) + if "dev_at_vdd" in meas: + out["ok_at_vdd"] = 1.0 if meas["dev_at_vdd"] <= 0.05 else 0.0 + return out + + +def check_specs(meas: dict, specs: dict) -> dict: + details = {}; ok = True + for m, sp in specs.items(): + if m.startswith("_") or not isinstance(sp, dict): continue + v = meas.get(m.lower()) + d = {"value": v, "spec": sp} + if v is None or (isinstance(v, float) and (math.isnan(v) or math.isinf(v))): + d["ok"] = False; d["why"] = "missing or NaN" + else: + good = True + if sp.get("min") is not None and v < sp["min"]: good = False + if sp.get("max") is not None and v > sp["max"]: good = False + if sp.get("abs_max") is not None and abs(v) > sp["abs_max"]: good = False + d["ok"] = good + ok = ok and d["ok"]; details[m] = d + return {"ok": ok, "details": details, "status": "passed" if ok else "spec_failed"} diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/__init__.py b/benchmarks/textbook_sharing/textbook_sharing/verify/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/drc.py b/benchmarks/textbook_sharing/textbook_sharing/verify/drc.py new file mode 100644 index 00000000..3a040b9a --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/drc.py @@ -0,0 +1,81 @@ +"""DRC with the PDK-shipped official KLayout decks (primary) and magic (secondary). + +Waivers (identical for every track and mode, declared here): + ihp130: chip-level density / filler rules of the maximal deck (AFil.*, GFil.*, M[1-5]Fil.*, M[1-5].j/k, TM[12].c/d) + are not meaningful for a DUT of a few hundred um^2 and are reported but not counted. + gf180: none. sky130: none. +""" +from __future__ import annotations +import os, re, xml.etree.ElementTree as ET +from pathlib import Path +from .lvs import run, sha, MAGICRC + +PDK_ROOT = os.environ.get("PDK_ROOT", "/foss/pdks") +DECK = {"sky130": f"{PDK_ROOT}/sky130A/libs.tech/klayout/drc/sky130A.lydrc", + "gf180": f"{PDK_ROOT}/gf180mcuD/libs.tech/klayout/tech/drc/run_drc.py", + "ihp130": f"{PDK_ROOT}/ihp-sg13g2/libs.tech/klayout/tech/drc/sg13g2_maximal.lydrc"} +WAIVED = {"ihp130": re.compile(r"^'?(AFil\.|GFil\.|M[1-5]Fil\.|M[1-5]\.j/k|TM[12]\.c/d)"), "sky130": None, "gf180": None} +DRC_VERSION = "drc-v1 (official decks; ihp density waivers)" + + +def parse_lyrdb(path): + cats = {}; items = [] + try: + root = ET.parse(path).getroot() + except Exception as e: + return {"error": repr(e), "categories": {}, "items": []} + for it in root.iter("item"): + c = it.find("category").text.strip("'") + vals = [v.text for v in it.iter("value")] + cats[c] = cats.get(c, 0) + 1 + if len(items) < 200: items.append({"category": c, "value": vals[0] if vals else None}) + return {"categories": cats, "items": items} + + +def drc_klayout(pdk, gds, out_dir, top=None): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + gds = str(Path(gds).resolve()); rpt = out_dir / "klayout_drc.lyrdb"; log = out_dir / "klayout_drc.log" + if pdk == "sky130": + rc = run(f"klayout -b -r {DECK[pdk]} -rd input={gds} -rd report={rpt}", str(out_dir), log) + elif pdk == "ihp130": + rc = run(f"klayout -b -r {DECK[pdk]} -rd in_gds={gds} -rd report_file={rpt}" + (f" -rd cell={top}" if top else ""), str(out_dir), log) + else: + rd = out_dir / "gf180_run" + rc = run(f"python {DECK[pdk]} --path={gds} --variant=D --run_dir={rd} --thr=4" + (f" --topcell={top}" if top else ""), str(out_dir), log) + src = next(rd.glob("*.lyrdb"), None) if rd.exists() else None + if src: rpt.write_bytes(src.read_bytes()) + parsed = parse_lyrdb(rpt) if rpt.exists() else {"error": "no report", "categories": {}, "items": []} + waived = {}; counted = {} + for c, n in parsed["categories"].items(): + if WAIVED[pdk] and WAIVED[pdk].match(c): waived[c] = n + else: counted[c] = n + total = sum(counted.values()) + return {"tool": "klayout", "deck": DECK[pdk], "deck_sha256": sha(DECK[pdk]), "version": DRC_VERSION, "rc": rc, "report": str(rpt) if rpt.exists() else None, + "log": str(log), "violations": total, "categories": counted, "waived_categories": waived, "items": parsed["items"][:50], + "status": "passed" if (rpt.exists() and total == 0 and "error" not in parsed) else "drc_failed"} + + +def drc_magic(pdk, gds, top, out_dir): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + tcl = out_dir / "magic_drc.tcl"; rpt = out_dir / "magic_drc.rpt" + tcl.write_text(f"""gds flatglob *\\$\\$* +gds read {gds} +load {top} +select top cell +drc euclidean on +drc style drc(full) +drc check +set fo [open {rpt} w] +foreach {{why coords}} [drc listall why] {{ puts $fo "$why"; foreach c $coords {{ puts $fo " $c" }} }} +close $fo +quit -noprompt +""") + rc = run(f"magic -rcfile {MAGICRC[pdk]} -noconsole -dnull {tcl}", str(out_dir), out_dir / "magic_drc.log") + txt = rpt.read_text() if rpt.exists() else "" + rules = {} + cur = None + for l in txt.splitlines(): + if l.startswith(" "): rules[cur] = rules.get(cur, 0) + 1 + elif l.strip(): cur = l.strip() + return {"tool": "magic", "rc": rc, "report": str(rpt) if rpt.exists() else None, "violations": sum(rules.values()), "rules": rules, + "status": "passed" if rpt.exists() and not rules else ("drc_failed" if rpt.exists() else "not_run")} diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/lvs.py b/benchmarks/textbook_sharing/textbook_sharing/verify/lvs.py new file mode 100644 index 00000000..9811b456 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/lvs.py @@ -0,0 +1,149 @@ +"""Independent LVS runners (inside the container). + - sky130, ihp130: magic extraction (ext2spice lvs) + netgen with the PDK setup file + - gf180: official gf180mcu KLayout LVS deck (upstream notes magic/netgen mis-extracts the gf180 substrate) +Each runner returns a dict with status, counts and report paths; nothing is swallowed.""" +from __future__ import annotations +import os, re, subprocess, hashlib +from pathlib import Path + +PDK_ROOT = os.environ.get("PDK_ROOT", "/foss/pdks") +MAGICRC = {"sky130": f"{PDK_ROOT}/sky130A/libs.tech/magic/sky130A.magicrc", "gf180": f"{PDK_ROOT}/gf180mcuD/libs.tech/magic/gf180mcuD.magicrc", + "ihp130": f"{PDK_ROOT}/ihp-sg13g2/libs.tech/magic/ihp-sg13g2.magicrc"} +NETGEN_SETUP = {"sky130": f"{PDK_ROOT}/sky130A/libs.tech/netgen/sky130A_setup.tcl", "gf180": f"{PDK_ROOT}/gf180mcuD/libs.tech/netgen/gf180mcuD_setup.tcl", + "ihp130": f"{PDK_ROOT}/ihp-sg13g2/libs.tech/netgen/ihp-sg13g2_setup.tcl"} + + +def sha(p): + return hashlib.sha256(Path(p).read_bytes()).hexdigest() + + +def run(cmd, cwd, log, timeout=1800, env=None): + with open(log, "w") as f: + f.write("$ " + (cmd if isinstance(cmd, str) else " ".join(cmd)) + "\n") + f.flush() + try: + r = subprocess.run(cmd, shell=isinstance(cmd, str), cwd=cwd, stdout=f, stderr=subprocess.STDOUT, timeout=timeout, env=env, stdin=subprocess.DEVNULL) + return r.returncode + except subprocess.TimeoutExpired: + f.write("\nTIMEOUT\n"); return -999 + + +def magic_extract(pdk, gds, top, out_dir, mode="lvs", timeout=None, extresist_tolerance=10, with_resist=True): + """mode 'lvs': device netlist only. mode 'pex': parasitic C (and R via extresist).""" + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + for stale in set(list(out_dir.glob('*.ext')) + list(out_dir.glob('*.spice')) + list(out_dir.glob('*.sim')) + list(out_dir.glob('*.nodes'))): + stale.unlink(missing_ok=True) + spice = out_dir / f"{top}_{mode}.spice" + extra = "" + if mode == "pex": + if with_resist: + extra = f"extract do local\nextract all\next2sim labels on\next2sim\nextresist tolerance {extresist_tolerance}\nextresist\next2spice lvs\next2spice cthresh 0\next2spice rthresh 0\next2spice extresist on\n" + else: + extra = "extract do local\nextract all\next2spice lvs\next2spice cthresh 0\next2spice rthresh 0\n" + else: + extra = "extract all\next2spice lvs\n" + # on gf180mcuD, 'port makeall' followed by extresist never terminates; top-level pins are taken from the labels + # there instead (checked: identical pin list) + portcmd = "" if (pdk == "gf180" and mode == "pex" and with_resist) else "port makeall" + tcl = f"""drc off +gds flatglob *\\$\\$* +gds read {gds} +load {top} +select top cell +{portcmd} +{extra}ext2spice subcircuit top on +ext2spice -o {spice} +quit -noprompt +""" + (out_dir / f"magic_{mode}.tcl").write_text(tcl) + to = timeout or (900 if mode == "pex" else 300) + rc = run(f"magic -rcfile {MAGICRC[pdk]} -noconsole -dnull {out_dir}/magic_{mode}.tcl", str(out_dir), out_dir / f"magic_{mode}.log", timeout=to) + ok = rc == 0 and spice.exists() and spice.stat().st_size > 0 + return {"tool": "magic", "rc": rc, "ok": ok, "timeout": rc == -999, "spice": str(spice) if ok else None, "log": str(out_dir / f"magic_{mode}.log"), "with_resist": with_resist if mode == "pex" else None, "extresist_tolerance": extresist_tolerance if (mode == "pex" and with_resist) else None} + + +def parse_netgen(report_text: str) -> dict: + out = {"match": False, "unmatched_nets": 0, "unmatched_instances": 0, "pin_mismatch": False, "property_errors": 0} + if "Circuits match uniquely" in report_text or "Netlists match uniquely" in report_text: + out["match"] = True + if "Netlists do not match" in report_text or "do not match" in report_text: + out["match"] = False + out["unmatched_nets"] = len(re.findall(r"\(no matching net\)", report_text)) + out["unmatched_instances"] = len(re.findall(r"\(no matching instance\)", report_text)) + out["pin_mismatch"] = "failed pin matching" in report_text + out["property_errors"] = len(re.findall(r"property .* mismatch|Property errors were found", report_text, re.I)) + m = re.search(r"Final result: (.*)", report_text) + out["final"] = m.group(1).strip() if m else None + if out["final"] and "match" in out["final"].lower() and "not" not in out["final"].lower() and "fail" not in out["final"].lower(): + out["match"] = out["match"] or ("uniquely" in out["final"].lower() or "match" in out["final"].lower()) + if out["pin_mismatch"] or out["unmatched_nets"] or out["unmatched_instances"]: + out["match"] = False + return out + + +def lvs_magic_netgen(pdk, gds, top, schematic, out_dir): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + ex = magic_extract(pdk, gds, top, out_dir, "lvs") + res = {"method": "magic+netgen", "pdk": pdk, "gds_sha256": sha(gds), "schematic_sha256": sha(schematic), "extract": ex} + if not ex["ok"]: + res.update({"status": "lvs_failed", "reason": "extraction failed"}); return res + rpt = out_dir / "netgen_lvs.rpt" + rc = run(f'netgen -batch lvs "{ex["spice"]} {top}" "{schematic} {top}" {NETGEN_SETUP[pdk]} {rpt}', str(out_dir), out_dir / "netgen.log") + txt = rpt.read_text() if rpt.exists() else "" + p = parse_netgen(txt) + res.update({"netgen_rc": rc, "report": str(rpt), "parsed": p, "status": "passed" if (rc == 0 and p["match"]) else "lvs_failed"}) + return res + + +def lvs_klayout_gf180(gds, top, schematic, out_dir, sub_net="VSS"): + # no --combine: KLayout's device combining merges series resistors through a net that has no other device, + # which deletes a port net such as VDD on a resistor-load pair (observed on C16/C17 gf180); fingers are per-finger on both sides. + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + deck = f"{PDK_ROOT}/gf180mcuD/libs.tech/klayout/tech/lvs/run_lvs.py" + run_dir = out_dir / "klayout_lvs" + rc = run(f"python {deck} --layout={gds} --netlist={schematic} --variant=D --run_dir={run_dir} --thr=4 --topcell={top} --schematic_simplify --lvs_sub={sub_net}", str(out_dir), out_dir / "klayout_lvs.log") + log = (out_dir / "klayout_lvs.log").read_text(errors="replace") + logs = list(run_dir.glob("lvs_run_*.log")) if run_dir.exists() else [] + ltxt = logs[-1].read_text(errors="replace") if logs else "" + match = ("Congratulations! Netlists matched" in log + ltxt) or ("Netlists matched" in log + ltxt) or ("Netlists match" in log + ltxt) + nomatch = "Netlists don't match" in log + ltxt or "do not match" in log + ltxt + # authoritative verdict: the cross-reference stored in the LVS database (requires every circuit pair to be 'Match') + lvsdb = next(run_dir.glob("*.lvsdb"), None) if run_dir.exists() else None + xref = lvsdb_verdict(str(lvsdb)) if lvsdb else {"ok": False, "error": "no lvsdb"} + match = bool(xref.get("ok")); nomatch = not match + res = {"method": "klayout_gf180mcu_lvs", "pdk": "gf180", "gds_sha256": sha(gds), "schematic_sha256": sha(schematic), "rc": rc, "log": str(out_dir / "klayout_lvs.log"), + "deck_log": str(logs[-1]) if logs else None, "lvsdb": str(next(run_dir.glob("*.lvsdb"), "")) if run_dir.exists() else None, + "status": "passed" if (rc == 0 and match and not nomatch) else "lvs_failed", "matched": match, "xref": xref} + return res + + +def lvs(pdk, gds, top, schematic, out_dir, sub_net="VSS"): + if pdk == "gf180": + return lvs_klayout_gf180(gds, top, schematic, out_dir, sub_net) + return lvs_magic_netgen(pdk, gds, top, schematic, out_dir) + + +def lvsdb_verdict(path: str) -> dict: + """Read a KLayout LVS database and return {ok, pairs:[{layout, ref, status}], mismatched_nets, mismatched_devices}.""" + try: + import klayout.db as kdb + l = kdb.LayoutVsSchematic(); l.read(path) + x = l.xref() + if x is None: + return {"ok": False, "error": "no xref in lvsdb"} + pairs = []; bad_nets = []; bad_devs = []; ok = True + for cp in x.each_circuit_pair(): + st = str(cp.status()); a = cp.first(); b = cp.second() + pairs.append({"layout": a.name if a else None, "ref": b.name if b else None, "status": st}) + if st != "Match": ok = False + for np_ in x.each_net_pair(cp): + if str(np_.status()) not in ("Match",): + f, g = np_.first(), np_.second() + bad_nets.append({"layout": f.expanded_name() if f else None, "ref": g.expanded_name() if g else None, "status": str(np_.status())}); ok = False + for dp in x.each_device_pair(cp): + if str(dp.status()) not in ("Match",): + f, g = dp.first(), dp.second() + bad_devs.append({"layout": f.expanded_name() if f else None, "ref": g.expanded_name() if g else None, "status": str(dp.status())}); ok = False + return {"ok": ok, "pairs": pairs, "mismatched_nets": bad_nets[:50], "mismatched_devices": bad_devs[:50]} + except Exception as e: + return {"ok": False, "error": repr(e)} diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/pex_sim.py b/benchmarks/textbook_sharing/textbook_sharing/verify/pex_sim.py new file mode 100644 index 00000000..fc467289 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/pex_sim.py @@ -0,0 +1,100 @@ +"""PEX (magic) and ngspice simulation runners. + +PEX: magic 'extract' with parasitic capacitance (cthresh 0) and resistance via extresist (rthresh 0), + writes _pex.spice (subckt with the DUT ports as pins, port names from the layout labels). +SIM: a testbench template is rendered with the DUT include file and run with ngspice -b; measurements are + written by the testbench with wrdata/print into files that the measurement parser reads. +""" +from __future__ import annotations +import os, re +from pathlib import Path +from .lvs import magic_extract, run, sha + +PDK_ROOT = os.environ.get("PDK_ROOT", "/foss/pdks") +MODEL_INCLUDE = { + "sky130": ".lib {root}/sky130A/libs.tech/ngspice/sky130.lib.spice {corner}", + "gf180": ".include {root}/gf180mcuD/libs.tech/ngspice/design.ngspice\n.lib {root}/gf180mcuD/libs.tech/ngspice/sm141064.ngspice {corner}\n.lib {root}/gf180mcuD/libs.tech/ngspice/sm141064.ngspice res_typical\n.lib {root}/gf180mcuD/libs.tech/ngspice/sm141064.ngspice mimcap_typical\n.lib {root}/gf180mcuD/libs.tech/ngspice/sm141064.ngspice cap_mim", # mimcap_typical only sets corner params and includes sm141064_mim.ngspice by a cwd-relative path (which also fails to parse in ngspice 44); the legacy cap_mim section defines cap_mim_2f0fF + "ihp130": ".lib {root}/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib {corner}\n.lib {root}/ihp-sg13g2/libs.tech/ngspice/models/cornerRES.lib res_typ\n.lib {root}/ihp-sg13g2/libs.tech/ngspice/models/cornerCAP.lib cap_typ", +} +CORNER = {"sky130": {"tt": "tt", "ss": "ss", "ff": "ff"}, "gf180": {"tt": "typical", "ss": "ss", "ff": "ff"}, "ihp130": {"tt": "mos_tt", "ss": "mos_ss", "ff": "mos_ff"}} +OSDI = {"ihp130": f"{PDK_ROOT}/ihp-sg13g2/libs.tech/ngspice/osdi/psp103_nqs.osdi"} + + +def model_header(pdk: str, corner: str = "tt") -> str: + c = CORNER[pdk][corner] + return MODEL_INCLUDE[pdk].format(root=PDK_ROOT, corner=c) + "\n" + + +PEX_POLICY = { + "sky130": {"with_resist": True, "extresist_tolerance": 10, "note": "magic extract + extresist (R and C)"}, + "ihp130": {"with_resist": True, "extresist_tolerance": 10, "note": "magic extract + extresist (R and C)"}, + "gf180": {"with_resist": True, "extresist_tolerance": 10, "note": "magic extract + extresist (R and C); top-level pins from labels, without 'port makeall' (with it, extresist does not terminate on gf180mcuD)"}, +} + + +def pex(pdk, gds, top, out_dir): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + pol = PEX_POLICY[pdk] + ex = magic_extract(pdk, gds, top, out_dir, "pex", with_resist=pol["with_resist"], extresist_tolerance=pol["extresist_tolerance"] or 10) + res = {"method": "magic_extresist" if pol["with_resist"] else "magic_cap_only", "policy": pol, "pdk": pdk, "gds_sha256": sha(gds), "extract": ex} + if not ex["ok"]: + res["status"] = "pex_failed"; return res + txt = Path(ex["spice"]).read_text() + m = re.search(r"^\.subckt\s+(\S+)\s+(.*)$", txt, re.M | re.I) + ports = m.group(2).split() if m else [] + # Floating conductors (magic marks their capacitors with '**FLOATING'; e.g. the poly body of an IHP rppd resistor + # that magic's tech file extracts as a separate 'pres' node) have no DC path and make the ngspice matrix singular. + # They are kept (their parasitic capacitances stay in the netlist) and tied to the DUT ground port by a 1 TOhm + # shunt, so the simulation remains solvable without hiding the extraction. The nodes are recorded. + floating = [] + for line in txt.splitlines(): + if "**FLOATING" in line and line[:1].upper() == "C": + toks = line.split() + for n in toks[1:3]: + if n not in ports and n not in floating: floating.append(n) + if floating: + gnd = "VSS" if "VSS" in ports else (ports[-1] if ports else "0") + shunts = "".join(f"Rflt{i} {n} {gnd} 1e12 $ floating-conductor shunt\n" for i, n in enumerate(floating)) + txt = re.sub(r"^\.ends", shunts + ".ends", txt, count=1, flags=re.M | re.I) + Path(ex["spice"]).write_text(txt) + nR = len(re.findall(r"^R\S+\s", txt, re.M)); nC = len(re.findall(r"^C\S+\s", txt, re.M)); nM = len(re.findall(r"^[XM]\S+\s", txt, re.M)) + res.update({"status": "passed", "spice": ex["spice"], "spice_sha256": sha(ex["spice"]), "n_res": nR, "n_cap": nC, "n_devices": nM, "ports": ports, + "floating_nodes": floating, "floating_shunt_ohm": 1e12 if floating else None}) + return res + + +def simulate(pdk, testbench_text, out_dir, name="tb", corner="tt", timeout=900, extra_env=None): + """testbench_text must be a complete ngspice deck except the model header (prepended here) and may use .control.""" + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + deck = out_dir / f"{name}.spice" + hdr = f"* {name} ({pdk}, corner {corner})\n" + model_header(pdk, corner) + if pdk in OSDI: + hdr += f".control\npre_osdi {OSDI[pdk]}\n.endc\n" + deck.write_text(hdr + testbench_text) + log = out_dir / f"{name}.log" + rc = run(f"ngspice -b {deck} -o {out_dir}/{name}.out", str(out_dir), log, timeout=timeout) + outtxt = (out_dir / f"{name}.out").read_text(errors="replace") if (out_dir / f"{name}.out").exists() else "" + logtxt = log.read_text(errors="replace") + errors = [l for l in (outtxt + logtxt).splitlines() if re.search(r"^Error|error:|singular matrix|timestep too small|no convergence|doAnalyses: ", l, re.I) + and not re.search(r"^Error: measure\s", l)] # a .meas that finds no crossing yields a missing measure -> spec check, not a simulator failure + measure_errors = [l for l in (outtxt + logtxt).splitlines() if re.search(r"^Error: measure\s", l)] + return {"rc": rc, "deck": str(deck), "deck_sha256": sha(deck), "out": str(out_dir / f"{name}.out"), "log": str(log), "errors": errors[:20], "measure_errors": measure_errors[:20], + "status": "passed" if (rc == 0 and not errors) else ("simulation_failed" if rc != -999 else "simulation_timeout")} + + +def read_wrdata(path): + """Parse an ngspice wrdata file: columns alternate x,y per vector -> dict of lists (first x kept).""" + rows = [l.split() for l in Path(path).read_text().splitlines() if l.strip() and not l.startswith("*")] + cols = list(zip(*[[float(v) for v in r] for r in rows])) if rows else [] + return cols + + +def read_measures(out_text: str) -> dict: + """Collect 'name = value' lines printed by .meas / print in ngspice batch output.""" + res = {} + for m in re.finditer(r"^\s*([a-zA-Z_][\w]*)\s*=\s*([-+]?[\d.]+(?:e[-+]?\d+)?)", out_text, re.M): + try: res[m.group(1).lower()] = float(m.group(2)) + except ValueError: pass + m = re.search(r"THD:\s*([-+]?[\d.]+(?:e[-+]?\d+)?)\s*%", out_text) + if m: res["thd_pct"] = float(m.group(1)) + return res diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/physical.py b/benchmarks/textbook_sharing/textbook_sharing/verify/physical.py new file mode 100644 index 00000000..d2b84182 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/physical.py @@ -0,0 +1,69 @@ +"""First-tier automated geometry/semantic checks on a written GDS (independent of the builder).""" +from __future__ import annotations +import hashlib +from pathlib import Path +import klayout.db as kdb + +LAYERS = { + "sky130": {"active": (65, 20), "poly": (66, 20), "cont": (66, 44), "met1": (67, 20), "via1": (67, 44), "met2": (68, 20), "via2": (68, 44), "met3": (69, 20), "nwell": (64, 20), "nimp": (93, 44), "pimp": (94, 20), "label": (69, 5), "pin": (69, 16)}, + "gf180": {"active": (22, 0), "poly": (30, 0), "cont": (33, 0), "met1": (34, 0), "via1": (35, 0), "met2": (36, 0), "via2": (38, 0), "met3": (42, 0), "nwell": (21, 0), "nimp": (32, 0), "pimp": (31, 0), "label": (42, 10), "pin": None}, + "ihp130": {"active": (1, 0), "poly": (5, 0), "cont": (6, 0), "met1": (8, 0), "via1": (19, 0), "met2": (10, 0), "via2": (29, 0), "met3": (30, 0), "nwell": (31, 0), "nimp": (7, 0), "pimp": (14, 0), "label": (30, 25), "pin": (30, 2)}, +} +EXPECTED_DBU = {"sky130": 0.005, "gf180": 0.005, "ihp130": 0.001} + + +def physical_checks(pdk, gds, top, expected_ports, expected_fingers=None, expected_devices=None): + ly = kdb.Layout(); ly.read(str(gds)) + cell = ly.cell(top) if ly.cell(top) else ly.top_cell() + dbu = ly.dbu; L = LAYERS[pdk] + def reg(key): + if L.get(key) is None: return kdb.Region() + return kdb.Region(cell.begin_shapes_rec(ly.layer(kdb.LayerInfo(*L[key])))).merged() + out = {"gds_sha256": hashlib.sha256(Path(gds).read_bytes()).hexdigest(), "top": cell.name, "dbu": dbu, "checks": {}, "findings": []} + bb = cell.dbbox() + out["bbox_um"] = [bb.left, bb.bottom, bb.right, bb.top]; out["area_um2"] = round(bb.area(), 4) + out["checks"]["top_nonempty"] = not bb.empty() + out["checks"]["dbu_ok"] = abs(dbu - 0.001) < 1e-9 or abs(dbu - 0.005) < 1e-9 + layers_present = sorted({(ly.get_info(li).layer, ly.get_info(li).datatype) for li in ly.layer_indexes() if not cell.bbox_per_layer(li).empty()}) + out["layers_present"] = layers_present + active, poly, cont, met1, met2, met3 = reg("active"), reg("poly"), reg("cont"), reg("met1"), reg("met2"), reg("met3") + chan = (poly & active).merged() + out["channel_regions"] = chan.count(); out["active_islands"] = active.count(); out["poly_components"] = poly.count() + if expected_fingers is not None: + out["checks"]["finger_count"] = (chan.count() == expected_fingers) + if chan.count() != expected_fingers: + out["findings"].append(f"channel regions {chan.count()} != expected fingers {expected_fingers} (extra or missing MOS)") + # labels: every expected port must have a text on the label layer sitting on met3 (or met2) metal + texts = {} + for li in ly.layer_indexes(): + info = ly.get_info(li) + for sh in cell.begin_shapes_rec(li): + if sh.shape().is_text(): + t = sh.shape().dtext.transformed(sh.dtrans()) + texts.setdefault(t.string, []).append(((info.layer, info.datatype), t.x, t.y)) + missing = []; off_metal = [] + for p in expected_ports: + if p not in texts: + missing.append(p); continue + on = False + for (lay, x, y) in texts[p]: + for r in (met3, met2, met1): + if any(pg.inside(kdb.Point(int(round(x / dbu)), int(round(y / dbu)))) for pg in r.each()): on = True + if not on: off_metal.append(p) + out["checks"]["ports_labelled"] = not missing; out["checks"]["labels_on_metal"] = not off_metal + if missing: out["findings"].append(f"ports without label: {missing}") + if off_metal: out["findings"].append(f"labels not on metal: {off_metal}") + # stray geometry: any shape farther than 2x the bbox diagonal from the centre? (should be none in a flat DUT) + out["checks"]["no_remote_instances"] = True + # floating poly: poly components with no contact and no channel + floating = 0 + for pg in poly.each(): + r = kdb.Region(pg) + if (r & cont).is_empty() and (r & active).is_empty(): floating += 1 + out["floating_poly_components"] = floating + out["checks"]["no_floating_poly"] = floating == 0 + out["metal_area_um2"] = {"met1": round(met1.area() * dbu * dbu, 4), "met2": round(met2.area() * dbu * dbu, 4), "met3": round(met3.area() * dbu * dbu, 4)} + out["contacts"] = {"on_active": (cont & active).count(), "on_poly": (cont & poly).count(), "total": cont.count()} + out["active_area_um2"] = round(active.area() * dbu * dbu, 4); out["active_perimeter_um"] = round(active.perimeter() * dbu, 4) + out["status"] = "passed" if all(out["checks"].values()) else "physical_review_failed" + return out diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/pipeline.py b/benchmarks/textbook_sharing/textbook_sharing/verify/pipeline.py new file mode 100644 index 00000000..fa473f3c --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/pipeline.py @@ -0,0 +1,82 @@ +"""Verification pipeline for one layout: DRC -> LVS -> sizing -> PEX -> physical -> render -> review record. + +verify_layout(pdk, gds, top, target_lvs_spice, target_devices, ports, out_dir, ...) returns a result dict with + stages: {drc, drc_magic, lvs, sizing, pex, physical, render} + primary_status: first failing stage in the fixed order, or 'review_pending' / 'passed' + fail_reasons: all failing stages +Simulation/spec stages are added by the case runner (they need the testbench). +""" +from __future__ import annotations +import json, time +from pathlib import Path +from .drc import drc_klayout, drc_magic +from .lvs import lvs, sha +from .sizing import sizing_check +from .pex_sim import pex +from .physical import physical_checks +from .record import render_views, make_record +from ..netlist import PDK_MODELS +from .. import paths + +ORDER = ["build", "drc", "lvs", "constraints", "pex", "simulation", "spec", "physical_review"] + + +def verify_layout(pdk, gds, top, target_lvs_spice, target_devices, ports, out_dir, expected_fingers=None, zoom=None, context=None, + run_magic_drc=True, run_pex=True, sub_net="VSS"): + out_dir = Path(out_dir); out_dir.mkdir(parents=True, exist_ok=True) + t0 = time.time() + res = {"pdk": pdk, "gds": paths.rel(gds), "top": top, "gds_sha256": sha(gds), "target_sha256": sha(target_lvs_spice), "stages": {}, "fail_reasons": [], "timestamps": {"start": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime())}} + T = res.setdefault("timing_s", {}); _t = [time.time()] + def lap(k): + now = time.time(); T[k] = round(T.get(k, 0.0) + now - _t[0], 2); _t[0] = now + # DRC + d = drc_klayout(pdk, gds, out_dir / "drc", top=top); res["stages"]["drc"] = d; lap("drc") + if d["status"] != "passed": res["fail_reasons"].append("drc_failed") + if run_magic_drc: + res["stages"]["drc_magic"] = drc_magic(pdk, str(Path(gds).resolve()), top, out_dir / "drc_magic"); lap("drc_magic") + # LVS + l = lvs(pdk, str(Path(gds).resolve()), top, str(Path(target_lvs_spice).resolve()), out_dir / "lvs", sub_net=sub_net); res["stages"]["lvs"] = l; lap("lvs") + if l["status"] != "passed": res["fail_reasons"].append("lvs_failed") + # sizing from the extracted netlist (magic lvs spice or klayout .cir) + ex_text = None + if pdk == "gf180": + cir = next((out_dir / "lvs" / "klayout_lvs").glob("*.cir"), None) if (out_dir / "lvs" / "klayout_lvs").exists() else None + ex_text = cir.read_text() if cir else None + else: + sp = l.get("extract", {}).get("spice") + ex_text = Path(sp).read_text() if sp and Path(sp).exists() else None + if ex_text: + s = sizing_check(target_devices, ex_text, {k: PDK_MODELS[pdk][k] for k in ("nfet", "pfet")}, ports) + else: + s = {"status": "constraints_failed", "error": "no extracted netlist"} + res["stages"]["constraints"] = s; lap("sizing_check") + if s["status"] != "passed": res["fail_reasons"].append("constraints_failed") + # PEX + if run_pex: + p = pex(pdk, str(Path(gds).resolve()), top, out_dir / "pex"); res["stages"]["pex"] = p; lap("pex") + if p["status"] != "passed": res["fail_reasons"].append("pex_failed") + # physical first tier + try: + ph = physical_checks(pdk, gds, top, ports, expected_fingers=expected_fingers) + except Exception as e: + ph = {"status": "physical_review_failed", "error": repr(e), "checks": {}, "findings": [repr(e)]} + res["stages"]["physical"] = ph; lap("geometry_checks") + if ph["status"] != "passed": res["fail_reasons"].append("physical_review_failed") + # render + review record + (out_dir / "review").mkdir(parents=True, exist_ok=True) + rv = render_views(gds, out_dir / "review" / top, pdk, zoom=zoom, cell=top) + res["stages"]["render"] = {k: v for k, v in rv.items() if k != "legend"}; lap("render") + rec = make_record(gds, pdk, res["target_sha256"], ph, {k: v for k, v in res["stages"].items() if k in ("drc", "drc_magic", "lvs", "constraints", "pex")}, rv, context=context) + (out_dir / "review").mkdir(parents=True, exist_ok=True) + json.dump(rec, open(out_dir / "review" / "review_record.json", "w"), indent=1) + res["review_record"] = paths.rel(out_dir / "review" / "review_record.json"); res["review_id"] = rec["review_id"] + # primary status + prim = None + for st in ORDER: + if st + "_failed" in res["fail_reasons"] or (st == "physical_review" and "physical_review_failed" in res["fail_reasons"]): + prim = st + "_failed"; break + res["primary_status"] = prim or "review_pending" + res["area_um2"] = ph.get("area_um2"); res["bbox_um"] = ph.get("bbox_um") + res["timestamps"]["end"] = time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()); res["wall_s"] = round(time.time() - t0, 2) + json.dump(res, open(out_dir / "result.json", "w"), indent=1, default=str) + return res diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/record.py b/benchmarks/textbook_sharing/textbook_sharing/verify/record.py new file mode 100644 index 00000000..46210631 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/record.py @@ -0,0 +1,38 @@ +"""Per-GDS physical review records (first tier automated + second tier visual). + +A review record is created for every generated, parsable GDS. The cache key includes the GDS +sha256, the target/constraint hash, the PDK, the layer map version and the reviewer version. +Visual review requires an actual viewer (human or a vision model with a fixed protocol); until a +viewer has recorded observations the record stays 'review_pending' and the case cannot be 'passed'. +""" +from __future__ import annotations +import json, hashlib, time, subprocess, sys +from pathlib import Path +from textbook_sharing import paths + +REVIEWER_VERSION = "review-v1" +LAYERMAP_VERSION = {"sky130": "sky130A.lyp@volare-0fe599b2", "gf180": "gf180mcu.lyp@ciel-f2e289da", "ihp130": "sg13g2.lyp@iic-2025-06"} + + +def review_key(gds_sha, target_sha, pdk): + return hashlib.sha256(f"{gds_sha}|{target_sha}|{pdk}|{LAYERMAP_VERSION[pdk]}|{REVIEWER_VERSION}".encode()).hexdigest()[:20] + + +def render_views(gds, prefix, pdk, zoom=None, cell=None): + tool = Path(__file__).resolve().parents[1] / "review" / "render_gds.py" + cmd = [sys.executable, str(tool), str(gds), str(prefix), pdk] + if zoom: cmd += ["--zoom", ",".join(f"{v:.3f}" for v in zoom)] + if cell: cmd += ["--cell", cell] + r = subprocess.run(cmd, capture_output=True, text=True, timeout=600) + rj = Path(f"{prefix}_render.json") + return json.load(open(rj)) if rj.exists() else {"error": r.stderr[-500:]} + + +def make_record(gds, pdk, target_sha, physical, raw_checks, render_info, zoom_group=None, context=None): + gds_sha = physical["gds_sha256"] + rec = {"review_id": review_key(gds_sha, target_sha, pdk), "created_utc": time.strftime("%Y-%m-%dT%H:%M:%SZ", time.gmtime()), + "gds": paths.rel(gds), "gds_sha256": gds_sha, "target_sha256": target_sha, "pdk": pdk, "layermap_version": LAYERMAP_VERSION[pdk], "reviewer_version": REVIEWER_VERSION, + "view_paths": {k: paths.rel(v["path"]) for k, v in render_info.get("views", {}).items()}, "image_sha256": {k: v["sha256"] for k, v in render_info.get("views", {}).items()}, + "static_checks": {"physical": physical, "raw": raw_checks}, "visual": {"reviewer_type": None, "reviewer_id": None, "observed_findings": [], "issue_locations": [], "verdict": "review_pending"}, + "linked_raw_checks": {k: (v.get("status") if isinstance(v, dict) else v) for k, v in raw_checks.items()}, "context": context or {}, "verdict": "review_pending"} + return rec diff --git a/benchmarks/textbook_sharing/textbook_sharing/verify/sizing.py b/benchmarks/textbook_sharing/textbook_sharing/verify/sizing.py new file mode 100644 index 00000000..09577d26 --- /dev/null +++ b/benchmarks/textbook_sharing/textbook_sharing/verify/sizing.py @@ -0,0 +1,95 @@ +"""Independent sizing check: compare the extracted layout netlist with the logical target. + +For every logical MOS (name, d, g, s, b, w_total, l, model) the extracted devices with the same +(model, connectivity signature) are collected; their widths are summed and compared with w_total, +their lengths must all equal l. This does not rely on LVS tolerance settings. +Extracted netlists come from magic (X-instances, w/l in um) or the gf180 KLayout deck (M-instances, W/L with U suffix). +Net names in the extracted netlist are the layout labels for ports; internal nets are matched through the +port-connected signature (ports only) plus device counts per internal-net class. +""" +from __future__ import annotations +import re +from collections import defaultdict + + +def _num(v): + v = v.strip().lower() + m = re.match(r"([-+]?[\d.]+(?:e[-+]?\d+)?)([a-z]*)", v) + if not m: return None + x = float(m.group(1)); s = m.group(2) + mult = {"u": 1.0, "": 1.0, "n": 1e-3, "m": 1e3, "p": 1e-6}.get(s, 1.0) + return x * mult + + +def parse_mos(text: str, models: set): + devs = [] + for line in text.splitlines(): + t = line.strip() + if not t or t[0] in "*+.": continue + parts = t.split() + if parts[0][0].upper() not in "XM" or len(parts) < 6: continue + # find model token (first token that is a known model, case-insensitive) + idx = None + for i, p in enumerate(parts[1:], 1): + if p.lower() in models: idx = i; break + if idx is None or idx < 5: continue + d, g, s, b = parts[1:5] + params = {} + for p in parts[idx + 1:]: + if "=" in p: + k, v = p.split("=", 1); params[k.lower()] = _num(v) + devs.append({"name": parts[0], "model": parts[idx].lower(), "d": d, "g": g, "s": s, "b": b, "w": params.get("w"), "l": params.get("l"), "m": params.get("m", 1.0) or 1.0, "nf": params.get("nf") or params.get("ng") or 1}) + return devs + + +def canon_nets(devs, ports): + """Rename internal nets consistently: nets that are ports keep their names; others become int by sorted signature.""" + sig = defaultdict(set) + for d in devs: + for t in ("d", "g", "s", "b"): + sig[d[t]].add((d["model"], "sd" if t in ("d", "s") else t)) + ren = {} + for n in sorted(sig, key=lambda n: (n in ports, n)): + if n in ports: ren[n] = n + else: ren[n] = "int:" + ",".join(sorted(f"{m}.{t}" for m, t in sig[n])) + return ren + + +def sizing_check(target_devices, extracted_text, models_map, ports, tol_rel=0.02, tol_abs_um=0.01): + """target_devices: [{name, model(kind), d,g,s,b, w, l, nf}]; models_map: kind->model name.""" + models = {v.lower() for v in models_map.values()} + ex = parse_mos(extracted_text, models) + ren = canon_nets(ex, set(ports)) + # group extracted by (model, canonical nets (unordered s/d)) + groups = defaultdict(list) + for d in ex: + key = (d["model"], ren[d["g"]], ren[d["b"]], tuple(sorted((ren[d["d"]], ren[d["s"]])))) + groups[key].append(d) + # target canonical signature using the same renaming rule on the target netlist + tsig = defaultdict(set) + for t in target_devices: + for k in ("d", "g", "s", "b"): + tsig[t[k]].add((models_map[t["model"]].lower(), "sd" if k in ("d", "s") else k)) + tren = {n: (n if n in ports else "int:" + ",".join(sorted(f"{m}.{k}" for m, k in s))) for n, s in tsig.items()} + tgroups = defaultdict(list) + for t in target_devices: + key = (models_map[t["model"]].lower(), tren[t["g"]], tren[t["b"]], tuple(sorted((tren[t["d"]], tren[t["s"]])))) + tgroups[key].append(t) + report = {"ok": True, "per_group": [], "extracted_devices": len(ex), "target_devices": len(target_devices)} + for key, tl in tgroups.items(): + w_target = sum(float(t["w"]) for t in tl); l_target = {round(float(t["l"]), 4) for t in tl} + el = groups.get(key, []) + w_ex = sum((d["w"] or 0.0) * (d["m"] or 1.0) for d in el) + # klayout combined devices report W as total; magic per-finger devices report unit W: both sum correctly + l_ex = {round(d["l"], 4) for d in el if d["l"] is not None} + ok_w = abs(w_ex - w_target) <= max(tol_abs_um, tol_rel * w_target) + ok_l = l_ex == l_target + ok_n = len(el) > 0 + report["per_group"].append({"key": [k if isinstance(k, str) else list(k) for k in key], "targets": [t["name"] for t in tl], "w_target": w_target, "w_extracted": round(w_ex, 4), + "l_target": sorted(l_target), "l_extracted": sorted(l_ex), "n_extracted": len(el), "ok": ok_w and ok_l and ok_n}) + if not (ok_w and ok_l and ok_n): report["ok"] = False + extra = [k for k in groups if k not in tgroups] + if extra: + report["ok"] = False; report["extra_extracted_groups"] = [[str(x) for x in k] for k in extra] + report["status"] = "passed" if report["ok"] else "constraints_failed" + return report From 81e71cac5d75de74e6fc5b3b96e06b7c03795576 Mon Sep 17 00:00:00 2001 From: Minxing Chu Date: Mon, 12 Oct 2026 07:35:29 +0000 Subject: [PATCH 3/7] textbook_sharing: case data, result tables and run records data/: 639 case folders (sizing, frozen specification, qualification, target netlists, testbench), nominal design points and the frozen mode order. results/: the count ledger, every analysis table, the geometry check of all recorded layouts, and the run records (JSON and model text; GDS files and tool logs are rebuilt from the code). Co-Authored-By: Claude Opus 5.5 --- .../cases/C01/gf180/sW0.5_sL1.5/case.json | 105 + .../cases/C01/gf180/sW0.5_sL1.5/manifest.json | 8 + .../C01/gf180/sW0.5_sL1.5/qualification.json | 91 + .../cases/C01/gf180/sW0.5_sL1.5/specs.json | 23 + .../cases/C01/gf180/sW0.5_sL1.5/target.spice | 4 + .../C01/gf180/sW0.5_sL1.5/target_lvs.spice | 6 + .../C01/gf180/sW0.5_sL1.5/testbench.spice | 25 + .../data/cases/C01/gf180/sW0.5_sL1/case.json | 105 + .../cases/C01/gf180/sW0.5_sL1/manifest.json | 8 + .../C01/gf180/sW0.5_sL1/qualification.json | 91 + .../data/cases/C01/gf180/sW0.5_sL1/specs.json | 23 + .../cases/C01/gf180/sW0.5_sL1/target.spice | 4 + .../C01/gf180/sW0.5_sL1/target_lvs.spice | 6 + .../cases/C01/gf180/sW0.5_sL1/testbench.spice | 25 + .../data/cases/C01/gf180/sW0.5_sL2/case.json | 105 + .../cases/C01/gf180/sW0.5_sL2/manifest.json | 8 + .../C01/gf180/sW0.5_sL2/qualification.json | 91 + .../data/cases/C01/gf180/sW0.5_sL2/specs.json | 23 + .../cases/C01/gf180/sW0.5_sL2/target.spice | 4 + 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benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/specs.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target_lvs.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/testbench.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/case.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/manifest.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/qualification.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/specs.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target_lvs.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/testbench.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/case.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/manifest.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/qualification.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/specs.json create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target_lvs.spice create mode 100644 benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/testbench.spice create mode 100644 benchmarks/textbook_sharing/data/frozen/fixed_order.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C01/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C01/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C01/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C02/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C02/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C02/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C03/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C03/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C03/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C04/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C04/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C04/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C05/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C05/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C05/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C06/gf180.json create mode 100644 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benchmarks/textbook_sharing/data/nominal/C15/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C15/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C15/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C16/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C16/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C16/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C17/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C17/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C17/sky130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C18/gf180.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C18/ihp130.json create mode 100644 benchmarks/textbook_sharing/data/nominal/C18/sky130.json create mode 100644 benchmarks/textbook_sharing/data/res_calibration.json create mode 100644 benchmarks/textbook_sharing/results/analysis/agent_session_audit.json create mode 100644 benchmarks/textbook_sharing/results/analysis/arrangement_bandwidth_C16.json create mode 100644 benchmarks/textbook_sharing/results/analysis/benchmark_table.json create mode 100644 benchmarks/textbook_sharing/results/analysis/cost_decomposition.json create mode 100644 benchmarks/textbook_sharing/results/analysis/cost_validation_dev.json create mode 100644 benchmarks/textbook_sharing/results/analysis/cost_validation_dev_no_channel.json create mode 100644 benchmarks/textbook_sharing/results/analysis/cost_validation_heldout.json create mode 100644 benchmarks/textbook_sharing/results/analysis/geometry_check.json create mode 100644 benchmarks/textbook_sharing/results/analysis/geometry_check_diagnosis.json create mode 100644 benchmarks/textbook_sharing/results/analysis/llm_interface.json create mode 100644 benchmarks/textbook_sharing/results/analysis/llm_summary.json create mode 100644 benchmarks/textbook_sharing/results/analysis/pex_sensitivity_C10_gf180.json create mode 100644 benchmarks/textbook_sharing/results/analysis/pvt.json create mode 100644 benchmarks/textbook_sharing/results/analysis/resim_after_testbench_fix.json create mode 100644 benchmarks/textbook_sharing/results/analysis/review_connectivity_check.json create mode 100644 benchmarks/textbook_sharing/results/analysis/review_coverage.json create mode 100644 benchmarks/textbook_sharing/results/analysis/review_gate_pad_check.json create mode 100644 benchmarks/textbook_sharing/results/analysis/running_example.json create mode 100644 benchmarks/textbook_sharing/results/analysis/scope_audit.json create mode 100644 benchmarks/textbook_sharing/results/analysis/selection_summary.json create mode 100644 benchmarks/textbook_sharing/results/analysis/testbench_equivalence.json create mode 100644 benchmarks/textbook_sharing/results/analysis/timing_controlled.json create mode 100644 benchmarks/textbook_sharing/results/case_build.json create mode 100644 benchmarks/textbook_sharing/results/count_ledger.json create mode 100644 benchmarks/textbook_sharing/results/count_ledger.md create mode 100644 benchmarks/textbook_sharing/results/redesign_search/attempts_gf180_sky130.json create mode 100644 benchmarks/textbook_sharing/results/redesign_search/attempts_ihp130.json create mode 100644 benchmarks/textbook_sharing/results/run_records.tar.xz diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..2490b99e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C01_gf180_sW0.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.68, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.68, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.93 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cfe3a427088c0740", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..16f11989 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ca9c4fddfa306cb60670a9a24041583900e13eaca5467a42cab7a55f1a1a6925", + "qualification.json": "34422eaabff3460db6d1bace0b49d7e389909bbb1830254812538d3c66be091e", + "specs.json": "c4a2077917f97919d70e4e6da008c501619470409f9f972d71e9ec600ea15f26", + "target.spice": "3f34e5b41174fc0059e8c00e9ef5d8e5ca162d4b6e59f466481f86a5db74820d", + "target_lvs.spice": "fa401686fb09fff6014a003e47b2fd12bd1d16964835e859a935450ea04702bd", + "testbench.spice": "8f778754d339cbfeb668e4cf73a341b1d243af533dfc0761e17bce7a3dc4b427" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..7026360f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cfe3a427088c0740", + "mirror_pass1": { + "vmin": 0.5582265, + "status": "passed", + "vout_test": 1.93 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.6582 + }, + "_frozen_from": { + "schematic": { + "err": 0.004839, + "vmin": 0.5582265 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.009678e-05, + "err": 0.004839, + "vmin": 0.5582265, + "dev_at_vdd": 0.02584804, + "gout_t": 1.752604e-07, + "rout_t": 5705798.0, + "vout_test": 1.93, + "rout_nom": 5705798.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..5769a31a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.6582 + }, + "_frozen_from": { + "schematic": { + "err": 0.004839, + "vmin": 0.5582265 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..827f8a07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW0.5_sL1.5 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +.ends C01_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..120ae284 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_gf180_sW0.5_sL1.5 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +.ends C01_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d0f81c44 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.93 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.93 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.93 +echo vout_test = 1.93 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..b1193e7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C01_gf180_sW0.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.9 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8d80e8fb05c7090c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..a0d6abfb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "67dafb37568a7862f09a7ad26d87e40a2516804495f788af2b9b259ee8341afd", + "qualification.json": "8adcbd1ed347b33079c7d04ddf36c2614b82436b90cb28aea0bb75bcfa9f10c9", + "specs.json": "561b1f9a0ab4bd32e8c05da12fd5b0862b02c812d594280b4f619fae06c5a158", + "target.spice": "1d19a211161120b2311b8d9fd94f0ecac5175c0961b78087bf6a64453b2c0254", + "target_lvs.spice": "5bd60902d5006fda603be8ce1826135fbb78c9922707ad9c437f9d4f884129d3", + "testbench.spice": "9e2c032c78f0bb67583ed07e3f4905cd9a85450a6c4d1d362a0e3d7ef0707c29" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..a74e7505 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8d80e8fb05c7090c", + "mirror_pass1": { + "vmin": 0.4939107, + "status": "passed", + "vout_test": 1.9 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5939 + }, + "_frozen_from": { + "schematic": { + "err": 0.0096, + "vmin": 0.4939107 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.0192e-05, + "err": 0.0096, + "vmin": 0.4939107, + "dev_at_vdd": 0.03076857, + "gout_t": 2.682199e-07, + "rout_t": 3728291.0, + "vout_test": 1.9, + "rout_nom": 3728291.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..9732fca7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5939 + }, + "_frozen_from": { + "schematic": { + "err": 0.0096, + "vmin": 0.4939107 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..df4d7496 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW0.5_sL1 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C01_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..0d0847a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_gf180_sW0.5_sL1 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C01_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..c6b1189e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.9 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.9 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.9 +echo vout_test = 1.9 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..238da186 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C01_gf180_sW0.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 2.24, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 2.24, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.96 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "473392a1b0f6b0ba", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..787e7370 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3fe7e2942468c7c33f3668116b930df5451ebee5369f682062ba7e282a813772", + "qualification.json": "8cd586d17f0ffa9173e5b480601c658b7a4000a610c4ed261804d7286615c9ba", + "specs.json": "e4e2871577d020383eaff5a39a183470c7a9a83739611c2d240f613e79ce8cfd", + "target.spice": "f4187d59e8c4e864eeb3333a694c4efadcb957cc42e34b2f3aa1c034d6551e0e", + "target_lvs.spice": "a9cd5a3409e692f9f0cb892d0430e4c124db267ae34cea83d5c5c99fd9710cad", + "testbench.spice": "6078b4dfee31331ad7537333d4b5c1af4261296a1f7cd3c41f7136a62822550c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..4c3cde85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "473392a1b0f6b0ba", + "mirror_pass1": { + "vmin": 0.6231022, + "status": "passed", + "vout_test": 1.96 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.7231 + }, + "_frozen_from": { + "schematic": { + "err": 0.002796, + "vmin": 0.6231022 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.005592e-05, + "err": 0.002796, + "vmin": 0.6231022, + "dev_at_vdd": 0.01716841, + "gout_t": 1.317882e-07, + "rout_t": 7587959.0, + "vout_test": 1.96, + "rout_nom": 7587959.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..b457b299 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.7231 + }, + "_frozen_from": { + "schematic": { + "err": 0.002796, + "vmin": 0.6231022 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a7624ec7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW0.5_sL2 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +.ends C01_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..00b17a38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_gf180_sW0.5_sL2 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +.ends C01_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..96629dc0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.96 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.96 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.96 +echo vout_test = 1.96 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..197c3d4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C01_gf180_sW1.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.68, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.68, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.82 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04e58f2ea147e188", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..2320c6e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d089167533349443944631e553e5ac34fb638493962dc8b805fb71bb50cbc9c1", + "qualification.json": "8438491b32784ce19ec7cf898cd7878138949d3586c50c5ca8e907c008d03b0e", + "specs.json": "c05fc642e500c276890b5fa075a89c093512263501bdd98a1615bc2632ee8405", + "target.spice": "f22aa74e0ed962aa4e63337d5b2c0701332c940d0e1e131976d2fb26a338e61b", + "target_lvs.spice": "30cf349f17ca3d23edac2c7e8668f51ac6fc2cd18dc606f54ebdf8f54e84f682", + "testbench.spice": "184f8763cd3b46a2edc9f7ba2b077bbd521f6eb3a5cc56dfe65e4446e13bbd2d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..542312bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04e58f2ea147e188", + "mirror_pass1": { + "vmin": 0.3330656, + "status": "passed", + "vout_test": 1.82 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4331 + }, + "_frozen_from": { + "schematic": { + "err": 0.00945, + "vmin": 0.3330656 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.0189e-05, + "err": 0.00945, + "vmin": 0.3330656, + "dev_at_vdd": 0.05038195, + "gout_t": 2.277447e-07, + "rout_t": 4390884.0, + "vout_test": 1.82, + "rout_nom": 4390884.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..4983d89a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4331 + }, + "_frozen_from": { + "schematic": { + "err": 0.00945, + "vmin": 0.3330656 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..20d1cc5e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1.5_sL1.5 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=3u l=1.68u nf=6 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=3u l=1.68u nf=6 m=1 +.ends C01_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..dab3c40f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_gf180_sW1.5_sL1.5 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +.ends C01_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..1fb0ca62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.82 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.82 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.82 +echo vout_test = 1.82 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..3a189f68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C01_gf180_sW1.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a21601cfb88c77f2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..f3ca3462 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b5458d9392dd5a0f026a8298f5aff84b9be5afa768e76ded02ee6e140b499d17", + "qualification.json": "33eeda6c52e450880a8a1d06e3eb24abd2e4c285b3273929beff37b4055c2d12", + "specs.json": "e5e3ee5e72ef18e2ac3ee0d8a6b551bdbabec4495af804f37d6a1898d6d6a73f", + "target.spice": "b53a6cb48482437a16f9f25618d7d15201c2efdae4ff3ce4c8714c83d65517ea", + "target_lvs.spice": "adb90c0ab9a90ba832eb4f72a663e31d77e31f6792d7a3abc2ecdb7567760463", + "testbench.spice": "69173f0fce811a2054078ebb46c8a6bb7f40478c992b3cc14519f65d6eb00373" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..bbc15f51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a21601cfb88c77f2", + "mirror_pass1": { + "vmin": 0.3068542, + "status": "passed", + "vout_test": 1.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4069 + }, + "_frozen_from": { + "schematic": { + "err": 0.0164475, + "vmin": 0.3068542 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.032895e-05, + "err": 0.0164475, + "vmin": 0.3068542, + "dev_at_vdd": 0.0506685, + "gout_t": 3.573105e-07, + "rout_t": 2798687.0, + "vout_test": 1.8, + "rout_nom": 2798687.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..14b3c9bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4069 + }, + "_frozen_from": { + "schematic": { + "err": 0.0164475, + "vmin": 0.3068542 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..d1cee4a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1.5_sL1 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C01_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..5f46287a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_gf180_sW1.5_sL1 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C01_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..c75f16b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.8 +echo vout_test = 1.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..8d46f582 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C01_gf180_sW1.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 2.24, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 2.24, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.83 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5b62d65d2e8506af", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..75d3579e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8ba214d11284f987bafe33b6980fd91e07a815dccefd17892c0205b4b3822d58", + "qualification.json": "5a5650add6e694cd5134cdb89614d52c197d1b798492ace70176057b78e2ecb3", + "specs.json": "cdfd0f292f44ea3d9f780fb70a7321c2870812fadc60bde2fdd9fd677db33122", + "target.spice": "266ea111ce8ce3f91a2bd31b87c245dbf4df0bce55feca4e9a4f93b887ef905e", + "target_lvs.spice": "8a8082df6ae2ef7326228a4dfab54ebbcf05f52ab39eb10546fb9b1fed417c73", + "testbench.spice": "bf8212004cddadc1fb66f85d81a84fada6c8467baf7bf0a2b2f58818f6ee449e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..73d93ab0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5b62d65d2e8506af", + "mirror_pass1": { + "vmin": 0.3645314, + "status": "passed", + "vout_test": 1.83 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4645 + }, + "_frozen_from": { + "schematic": { + "err": 0.0062665, + "vmin": 0.3645314 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.012533e-05, + "err": 0.0062665, + "vmin": 0.3645314, + "dev_at_vdd": 0.03793406, + "gout_t": 1.673393e-07, + "rout_t": 5975886.0, + "vout_test": 1.83, + "rout_nom": 5975886.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..a7f87b5a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4645 + }, + "_frozen_from": { + "schematic": { + "err": 0.0062665, + "vmin": 0.3645314 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..a272a782 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1.5_sL2 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=3u l=2.24u nf=6 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=3u l=2.24u nf=6 m=1 +.ends C01_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..73e564cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_gf180_sW1.5_sL2 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +.ends C01_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..fdc6a66f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.83 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.83 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.83 +echo vout_test = 1.83 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..54ac2547 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C01_gf180_sW1_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.68, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.68, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.85 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fa75150823673e58", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..abd3c977 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4939599ab376f583953e8e0ab18da4a5ebbb9b5a804652a897a3d6e47827f600", + "qualification.json": "e6be6b4f302b7901b26d7ee6e0017723c92bd55766069422f41b0b1f3362bd10", + "specs.json": "4027ea7aafb642bf30da70a11f43b5cf27549c028b5abaf2062a6abce9310cb3", + "target.spice": "8ec94ea4b6b326f7ae302f77fc1ef85506b6d64e9f4046bdea73b7a61238fe1b", + "target_lvs.spice": "57ed47c19161f985c7ce11911ea5fb5b95dbddf53774deb6c349f74b05bf2391", + "testbench.spice": "8940f1d1f891011baa8c09b5c2382ba151520b68849496dd588d570c51840f30" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..2d7665f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fa75150823673e58", + "mirror_pass1": { + "vmin": 0.4007682, + "status": "passed", + "vout_test": 1.85 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5008 + }, + "_frozen_from": { + "schematic": { + "err": 0.0076215, + "vmin": 0.4007682 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.015243e-05, + "err": 0.0076215, + "vmin": 0.4007682, + "dev_at_vdd": 0.04081703, + "gout_t": 2.042242e-07, + "rout_t": 4896584.0, + "vout_test": 1.85, + "rout_nom": 4896584.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..791bf1e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5008 + }, + "_frozen_from": { + "schematic": { + "err": 0.0076215, + "vmin": 0.4007682 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..711535a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1_sL1.5 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +.ends C01_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f565ac26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_gf180_sW1_sL1.5 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +.ends C01_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..b3077c86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.85 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.85 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.85 +echo vout_test = 1.85 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..caa3355a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C01_gf180_sW1_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.83 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b8f486775160b817", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..4004ac3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "995cbcd44abc376dcb2a8dc52e870451817eccf93dd9fe0ff1abd59e135d5b84", + "qualification.json": "1b0ff16006cd39a372ef9667f6c1c3e1c5749f9f50a5e78ef711f2f5b151483e", + "specs.json": "a8d2f87b0fe9a8cc9b9a90e476070f5468bc596d1bc2151a6c048c4892e05747", + "target.spice": "c188c4e720704c8acc8bc84396fc5bd729406692e40f63cff781eaab86d48b81", + "target_lvs.spice": "081c546f10b3e6482fa8479116f76a8355daad0d1c5e6f54e3a70ea7c58830b8", + "testbench.spice": "f12eec61418f1e904f626d533967d578420ef25fae7514f6a17fc5314e7a27d0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..5cebaecf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b8f486775160b817", + "mirror_pass1": { + "vmin": 0.3632665, + "status": "passed", + "vout_test": 1.83 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4633 + }, + "_frozen_from": { + "schematic": { + "err": 0.0137495, + "vmin": 0.3632665 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.027499e-05, + "err": 0.0137495, + "vmin": 0.3632665, + "dev_at_vdd": 0.04274814, + "gout_t": 3.184771e-07, + "rout_t": 3139945.0, + "vout_test": 1.83, + "rout_nom": 3139945.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..a5641074 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4633 + }, + "_frozen_from": { + "schematic": { + "err": 0.0137495, + "vmin": 0.3632665 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..4d606802 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1_sL1 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C01_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..109b6899 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_gf180_sW1_sL1 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C01_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..02d2d8a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.83 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.83 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.83 +echo vout_test = 1.83 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..3b7e8cbc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW1_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C01_gf180_sW1_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.24, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.87 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "fcd39913c768f6cc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..948d6152 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9789babc3b549b5f4981a53266731404e47e94e63d4bc56ba3f7e3fded835331", + "qualification.json": "0d89e803fb4e35894b73f9ba71d617e9510869a2fb98d030032a245f8a99b2a4", + "specs.json": "c17f6220bebe8ab7a00802917f572e511e64e2c38b222a2ba8c748cebcb1e146", + "target.spice": "5fd0af505b75620dda4616507bd33bcafb4928f1f82cb542b36098cd08b2a7ec", + "target_lvs.spice": "b72b1acc27bda14ba3a0b2ce017c40ae9d86ff80e87be598f0ec2e97364549a3", + "testbench.spice": "4ccac8a37bf0be4d9aa4f0fa2c4a869059c0f329ddd2b1558adb41c4adad6664" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..86996f72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW1_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "fcd39913c768f6cc", + "mirror_pass1": { + "vmin": 0.441899, + "status": "passed", + "vout_test": 1.87 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5419 + }, + "_frozen_from": { + "schematic": { + "err": 0.004934, + "vmin": 0.441899 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.009868e-05, + "err": 0.004934, + "vmin": 0.441899, + "dev_at_vdd": 0.02965071, + "gout_t": 1.507288e-07, + "rout_t": 6634442.0, + "vout_test": 1.87, + "rout_nom": 6634442.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..dc7e9e4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5419 + }, + "_frozen_from": { + "schematic": { + "err": 0.004934, + "vmin": 0.441899 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..5d010de4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW1_sL2 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +.ends C01_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..02c387d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_gf180_sW1_sL2 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +.ends C01_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..9e102db7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.87 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.87 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.87 +echo vout_test = 1.87 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..69ad6c6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C01_gf180_sW2_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.68, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.68, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c73195cf17258e63", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..8181cf6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "54524aa67d54a14484686a3bb6b4d46dfbc7d757caedc9aae3c71e1375bf8b5f", + "qualification.json": "9a9af6bf8eb79381f476c9d391062cbfa55b6524da44c2f6e145fd2c140b27dd", + "specs.json": "87ef20709b439912af862ddbacbaaa7371aa13647c55ff6de02805dbeb8ddfb3", + "target.spice": "98d6f1a4148546a68464e2acc6dd2a6d5f3c4435f3d7cae82dc03029be67cec8", + "target_lvs.spice": "b053f3d99af9f11610cc8da714a59a2611d58a290d38839c91bcecbe2d5eeeba", + "testbench.spice": "4720eaec5c21292ed3645d284cf04ef1d1aecf4ab0db358e2dd5d20088f3f4f8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..18156f9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c73195cf17258e63", + "mirror_pass1": { + "vmin": 0.2933166, + "status": "passed", + "vout_test": 1.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3933 + }, + "_frozen_from": { + "schematic": { + "err": 0.010827, + "vmin": 0.2933166 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.021654e-05, + "err": 0.010827, + "vmin": 0.2933166, + "dev_at_vdd": 0.05741479, + "gout_t": 2.478971e-07, + "rout_t": 4033933.0, + "vout_test": 1.8, + "rout_nom": 4033933.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..cd8c1e78 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3933 + }, + "_frozen_from": { + "schematic": { + "err": 0.010827, + "vmin": 0.2933166 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..20d862e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW2_sL1.5 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=4u l=1.68u nf=8 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=4u l=1.68u nf=8 m=1 +.ends C01_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2cf5f386 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_gf180_sW2_sL1.5 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f6 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f7 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f6 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f7 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.68u +.ends C01_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..1147ac26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.8 +echo vout_test = 1.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..20158124 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW2_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C01_gf180_sW2_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.79 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6397d295385c22c7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..412b1c6d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "56a390150b952e164a75b34ac1b9993dc4c0ea42833946876bcbc226b5073aa5", + "qualification.json": "9eafbe0dad36d8f8d395ddd59758c1e1110a85312ca85ca7d44567b2fa3df8f3", + "specs.json": "8c00e836512f8f3547319023ded836a98713d5f681b7253277ed3359dd18bae6", + "target.spice": "6e5a431da0fc24bb93e4bed3db62cf27fae6787c6a54dc2f948407a41b48fd09", + "target_lvs.spice": "5028558ccb779490eaef6de70cf5f5c5a3b90733572de36a063482c38aa1a7af", + "testbench.spice": "d4e22cfa5a933a6c844d17f018ab39c097f0d73382cbed4c3828bb54ad6d3d5b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..281f85e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW2_sL1", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6397d295385c22c7", + "mirror_pass1": { + "vmin": 0.273695, + "status": "passed", + "vout_test": 1.79 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3737 + }, + "_frozen_from": { + "schematic": { + "err": 0.0186885, + "vmin": 0.273695 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.037377e-05, + "err": 0.0186885, + "vmin": 0.273695, + "dev_at_vdd": 0.05676728, + "gout_t": 3.890374e-07, + "rout_t": 2570447.0, + "vout_test": 1.79, + "rout_nom": 2570447.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..b90d22f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3737 + }, + "_frozen_from": { + "schematic": { + "err": 0.0186885, + "vmin": 0.273695 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..0195feca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW2_sL1 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C01_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..25866b8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_gf180_sW2_sL1 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C01_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..be2d9263 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.79 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.79 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.79 +echo vout_test = 1.79 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..1ba79d7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_gf180_sW2_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C01_gf180_sW2_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.24, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05, + "vout_test": 1.81 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dce0b41fe2b0cb39", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..a2d69ff6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "002a797c4695abf3b903380d3934f1d18723cbd98b7226f823b95afcf7e09204", + "qualification.json": "3640f15a9912c28b06bb65a48d33670d78cd79bb70db4c129b05ee2db4d37688", + "specs.json": "b01ec0f4eb374e1f91b100f8dc362b6564501cbabe4492a81f853e758a550307", + "target.spice": "449077d5b31bbe926ec4d23da9fc325573b61d93a5da7b5a22f3b37331eb38d1", + "target_lvs.spice": "226bb1419746b8ca630f50bc8eaa0262df0670cd55422c07c57d0f8ad9dea148", + "testbench.spice": "99858586c33570338c9123c297dadd4b75645b15679b6fffcf674714cc276a42" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..b542c336 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_gf180_sW2_sL2", + "circuit_id": "C01", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dce0b41fe2b0cb39", + "mirror_pass1": { + "vmin": 0.3192599, + "status": "passed", + "vout_test": 1.81 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4193 + }, + "_frozen_from": { + "schematic": { + "err": 0.0073185, + "vmin": 0.3192599 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.014637e-05, + "err": 0.0073185, + "vmin": 0.3192599, + "dev_at_vdd": 0.04407303, + "gout_t": 1.815763e-07, + "rout_t": 5507330.0, + "vout_test": 1.81, + "rout_nom": 5507330.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..78e57820 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4193 + }, + "_frozen_from": { + "schematic": { + "err": 0.0073185, + "vmin": 0.3192599 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 1.1549999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..408e2046 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_gf180_sW2_sL2 VSS IB1 IOUT1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +MM2 IOUT1 IB1 VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +.ends C01_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..eb857bb2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_gf180_sW2_sL2 VSS IB1 IOUT1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f6 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f7 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f6 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f7 IOUT1 IB1 VSS VSS nfet_03v3 w=0.5u l=2.24u +.ends C01_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..a99e3c4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.81 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.81 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.81 +echo vout_test = 1.81 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..4621dcb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C01_ihp130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.56, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.56, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04391e35aef9ecf6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..b6bfbf2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a1e43dadb6ef3a992c956e9a32fc6ce166ccb1b6e1f839272e77265c0e423521", + "qualification.json": "6c7e61a3035e37651a20f22ea3d07cdc3380ce4c16e86844f3b8a7ba6b9531bd", + "specs.json": "60d93a2f979a84a6f93f66e48d3b37197f52f6d5606be14abae57c6cc32e94f9", + "target.spice": "bdd6202aec8b89a105aec3c8982c330337be77e9679a66e1573d60427efff3fb", + "target_lvs.spice": "d1880fc1151fdd6f5017d2d5b0ba58aa7802b4595f1586dcd125b66311ca9ee5", + "testbench.spice": "67c3b19cb2a361aded02664979155b72abe1b26ad706f5445cc15057939d5dc9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..9984fe34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04391e35aef9ecf6", + "mirror_pass1": { + "vmin": 0.3936066, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.015862, + "vmin": 0.3936066 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.031724e-05, + "err": 0.015862, + "vmin": 0.3936066, + "dev_at_vdd": 0.05496639, + "gout_t": 2.345381e-06, + "rout_t": 426370.8, + "vout_test": 0.8, + "rout_nom": 426370.8, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..8eeb132a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.015862, + "vmin": 0.3936066 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..bdc6ffeb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW0.5_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +.ends C01_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..775ee623 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_ihp130_sW0.5_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C01_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..576f97bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..e30aeb82 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C01_ihp130_sW0.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.04, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.79 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9a13ef4413250202", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..924b30fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "45faf47dec2bdf3d87627e420f2e439614165bb1d2dc9f99ca5370816490d9a8", + "qualification.json": "93f08a80ed4206541eb4727c4ebcd2040ed2a927ed729c517809867e2dac0c66", + "specs.json": "bf1005cd55bd4822f27d71b6ae5d23ff281a47ebd837ed6c7297e50014ea609c", + "target.spice": "6a3d100593fec6fa7ec44eb61de68ccda212297add31132bf1d35140397d824b", + "target_lvs.spice": "8003b69e1abd3a7f25f460a56c7bbc39dc6ecc7bafb1495d6fa49e823c630357", + "testbench.spice": "c9c903ba745808f711ca8d35134adc84f1b823c3d3e601b4c3eb1ca38f09ddfa" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..4605d077 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9a13ef4413250202", + "mirror_pass1": { + "vmin": 0.3824582, + "status": "passed", + "vout_test": 0.79 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.0299515, + "vmin": 0.3824582 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.059903e-05, + "err": 0.0299515, + "vmin": 0.3824582, + "dev_at_vdd": 0.08277446, + "gout_t": 3.054209e-06, + "rout_t": 327417.5, + "vout_test": 0.79, + "rout_nom": 327417.5, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..e58be204 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.0299515, + "vmin": 0.3824582 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..119e01e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW0.5_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +.ends C01_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..4f1d3945 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_ihp130_sW0.5_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C01_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..df513521 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.79 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.79 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.79 +echo vout_test = 0.79 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..d0dfd75b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C01_ihp130_sW0.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 2.08, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 2.08, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.81 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "eeb5b806a712205f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..40b99b68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f064026f69b84f8c88ea8fe52e8db6ca4c8b928d43aad235716291961c6f5ed4", + "qualification.json": "e1eeef6c2a57bbf8572fe7dd8ae4c467839a638c8ccb1ef4dbf621aa761da60e", + "specs.json": "7d8ef31810a27cd6ab34bf5c4d1a328ab1840515a98fc84b480fb525d7ab4d05", + "target.spice": "226668ed1d377d2e29f294b4e71a30724439210c2992e621356a5bd50b53333b", + "target_lvs.spice": "5f9b602c3f3207cf51588f77c2ed55816416a9a051dbc810e81ddc04b60063f9", + "testbench.spice": "fa87c11ff218928c2378ec546bba18b6692aad043ecb6caffeed53cc73daa5d9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..6cc8fa7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "eeb5b806a712205f", + "mirror_pass1": { + "vmin": 0.4148405, + "status": "passed", + "vout_test": 0.81 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.008108, + "vmin": 0.4148405 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.016216e-05, + "err": 0.008108, + "vmin": 0.4148405, + "dev_at_vdd": 0.03965959, + "gout_t": 1.958164e-06, + "rout_t": 510682.6, + "vout_test": 0.81, + "rout_nom": 510682.6, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..da7306b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.008108, + "vmin": 0.4148405 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..814b4841 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW0.5_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +.ends C01_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4837f875 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_ihp130_sW0.5_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C01_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..27eb2e40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.81 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.81 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.81 +echo vout_test = 0.81 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..7cab4a41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C01_ihp130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.56, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.56, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.75 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ae219fd8159ea3d6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..75bb1225 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "01da2f13dff37855ca27e37bf3ba44dc19e1b725635ab22418118f1f7df8281b", + "qualification.json": "c14f02ada77a43f9d9ddac7a369d7decc7f04d3a5854d529e3619fc4f01897f1", + "specs.json": "9c53d5327fa5f6f012c87348e8df88fdc8fcf6787f125fbd9d710e9a9e89a8f2", + "target.spice": "e9d6816c44d02c244c5bfdc59bdbe47b1f44f480d485e8b29978fab6304ebc48", + "target_lvs.spice": "05ad610d1c6593da809499c10467b349e8b10ea0fdff2394da00ae2a4ab57c86", + "testbench.spice": "b5bb12042eb517b36cf255bf2a566530cbf927585e409497ce0e22ca23fe565a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..24bdd1c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,93 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ae219fd8159ea3d6", + "mirror_pass1": { + "vmin": 0.2958726, + "status": "passed", + "vout_test": 0.75 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "|err|=0.05134 above floor 0.05" + ], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3959 + }, + "_frozen_from": { + "schematic": { + "err": 0.0513445, + "vmin": 0.2958726 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 2.102689e-05, + "err": 0.0513445, + "vmin": 0.2958726, + "dev_at_vdd": 0.1172686, + "gout_t": 3.47955e-06, + "rout_t": 287393.4, + "vout_test": 0.75, + "rout_nom": 287393.4, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..a7c9f0b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3959 + }, + "_frozen_from": { + "schematic": { + "err": 0.0513445, + "vmin": 0.2958726 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..d7b5f7ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1.5_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=3u l=1.56u ng=6 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=3u l=1.56u ng=6 m=1 +.ends C01_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..09b8cd56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_ihp130_sW1.5_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C01_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..2535ef32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.75 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.75 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.75 +echo vout_test = 0.75 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..fd9b1353 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C01_ihp130_sW1.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.04, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.75 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d5d7a3931da3560e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..c1b2ba0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "055680988e147ee9b27b3d48a2675682319af7421ec41d9ffa71f4727fe565ad", + "qualification.json": "846c03dbef2db15b8dec8aedd374e5b3159ae38c72855c563415202b74392b60", + "specs.json": "88cb4832e3eb0c2db5cb7d06e5fad27af54876a74d541e48bed9f80106db1af3", + "target.spice": "a8240571a7433b9df70647a8df90fd050793238eb0201c1257296d789ac19254", + "target_lvs.spice": "4abd1036e0cf436a533ffdbeae6289d739395e9ba75dac0fdb5e0d346f6b0f08", + "testbench.spice": "a741c1b112b6eaa2d948703f22eb79839fb82d0738bf9346701394412481ad31" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..5b839d36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,93 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d5d7a3931da3560e", + "mirror_pass1": { + "vmin": 0.3035163, + "status": "passed", + "vout_test": 0.75 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "|err|=0.07675 above floor 0.05" + ], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4035 + }, + "_frozen_from": { + "schematic": { + "err": 0.0767505, + "vmin": 0.3035163 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 2.153501e-05, + "err": 0.0767505, + "vmin": 0.3035163, + "dev_at_vdd": 0.1651087, + "gout_t": 4.602516e-06, + "rout_t": 217272.4, + "vout_test": 0.75, + "rout_nom": 217272.4, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..62276d74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4035 + }, + "_frozen_from": { + "schematic": { + "err": 0.0767505, + "vmin": 0.3035163 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..de4f8540 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1.5_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +.ends C01_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..f5d1c6e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_ihp130_sW1.5_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C01_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..2ed0e289 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.75 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.75 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.75 +echo vout_test = 0.75 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..18923543 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C01_ihp130_sW1.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 2.08, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 2.08, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.75 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0acba9963926f8dc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..858b1030 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ce4f7e6e53461a59e5a2637a2d615b38bdf369b12424ca93b104651138291eee", + "qualification.json": "c02447680e1d570aa2fd17b983c639d01d2fbf2e31865266b2e5cada221fcf5d", + "specs.json": "3c49c6525856aa87b11450249611aa71876dc651c05ac45853f4a48958f57622", + "target.spice": "cd7f052a5d0140ac42f3919ae7840228d0bbb9f0ddfb86340d58582fce0dec99", + "target_lvs.spice": "3fc63e6979340a1a69c02adcf49f4e20c5e1763c6b839d002efe8adb5ac0f40c", + "testbench.spice": "c05ee3948685236662908b56f425ecddbab0b8e9ee2e632fdd53706f715d07bc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..b388e6f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0acba9963926f8dc", + "mirror_pass1": { + "vmin": 0.2946816, + "status": "passed", + "vout_test": 0.75 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3947 + }, + "_frozen_from": { + "schematic": { + "err": 0.0369945, + "vmin": 0.2946816 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 2.073989e-05, + "err": 0.0369945, + "vmin": 0.2946816, + "dev_at_vdd": 0.0906925, + "gout_t": 2.862879e-06, + "rout_t": 349298.7, + "vout_test": 0.75, + "rout_nom": 349298.7, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..bc581a45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3947 + }, + "_frozen_from": { + "schematic": { + "err": 0.0369945, + "vmin": 0.2946816 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..8a303a18 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1.5_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=3u l=2.08u ng=6 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=3u l=2.08u ng=6 m=1 +.ends C01_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..f9b3b203 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_ihp130_sW1.5_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C01_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..5fbf61c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.75 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.75 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.75 +echo vout_test = 0.75 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..cf02e0a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C01_ihp130_sW1_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.56, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.76 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5858574cc97f6612", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..38331610 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eba7e9fe30a7acde5a2270b37496339d92cf93d582219211ebf6304464f07f79", + "qualification.json": "2c78f671176b4eef87822a6bcfc1b8dec8ce96d0d7a95ed7e7adcc0d26a25ea4", + "specs.json": "f3217c1d1c6f99b3585374ddc7c29395b454dc610d14d29c3f65a20551d1b66e", + "target.spice": "a5d2728c778967a4da747c5ab8eb155b7105154542fbb6ad24e38823f6274bfd", + "target_lvs.spice": "64286f2df3c8b58acea151d0641c298d3b10532634164ea35910eeb4af8889e5", + "testbench.spice": "07172f9c6ba390660e948abd79394350e363b4587ef01cb66c20ca71a35688c2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..aa9c728d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5858574cc97f6612", + "mirror_pass1": { + "vmin": 0.3235503, + "status": "passed", + "vout_test": 0.76 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.0356015, + "vmin": 0.3235503 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 2.071203e-05, + "err": 0.0356015, + "vmin": 0.3235503, + "dev_at_vdd": 0.09082531, + "gout_t": 2.99952e-06, + "rout_t": 333387.2, + "vout_test": 0.76, + "rout_nom": 333387.2, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..a78e44dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.0356015, + "vmin": 0.3235503 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..ae77c3da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +.ends C01_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d35427d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_ihp130_sW1_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C01_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..f1609c8f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.76 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.76 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.76 +echo vout_test = 0.76 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..84ef1dba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C01_ihp130_sW1_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.76 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9a1b25496b543424", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..5c56f690 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5fa7daa0fa6e25618273b2eb0661d61fdd423800db87babbc8de40ff2df296b3", + "qualification.json": "0af61c1c9dd0957c7391177c9b850102d81ef76250343c31d1929016bd242c23", + "specs.json": "93fab3fdf043cfc9668803685769465d452380646751e79fa1749c02b1a49eac", + "target.spice": "e0e46b9e4b5a76dd84f5a2cbf01f19ad402cc9090a824f428b0c4c544b9d0e1e", + "target_lvs.spice": "bacfb8a65214dbff65d103e51c0e277a7e1b3903b2c43e2873b791189a970bf8", + "testbench.spice": "b90aeb050eded4cf850a24267d703f918f0a1a3de0fd45c5889b56361c4080ec" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..87c6d895 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,93 @@ +{ + "case_id": "C01_ihp130_sW1_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9a1b25496b543424", + "mirror_pass1": { + "vmin": 0.3270033, + "status": "passed", + "vout_test": 0.76 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "|err|=0.05651 above floor 0.05" + ], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.056512, + "vmin": 0.3270033 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 2.113024e-05, + "err": 0.056512, + "vmin": 0.3270033, + "dev_at_vdd": 0.1301068, + "gout_t": 3.940946e-06, + "rout_t": 253746.5, + "vout_test": 0.76, + "rout_nom": 253746.5, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..da0c41c0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.056512, + "vmin": 0.3270033 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..949f3a55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +.ends C01_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..3c7af76c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_ihp130_sW1_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C01_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..abaf8051 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.76 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.76 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.76 +echo vout_test = 0.76 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..b02989e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW1_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C01_ihp130_sW1_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.08, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.76 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f53b5292532a26d3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..64bba0ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "446df06bb8e71003457ce3a8bfc066f51af8b58d286a08d3f5c4991110e82403", + "qualification.json": "54a00fe3820f04f3be47e4cc2b4d4db719f03eb48dff7490906a2a67d6cd59d6", + "specs.json": "80ed1ca72ac1fe44229d708e14a916fe6019f1bb2c9a6311b7e7c573d45cc54f", + "target.spice": "d5887ae976ae827f9c7cfe4a8fe121d5e408b9a65bcc233cee169e08abe1ec79", + "target_lvs.spice": "411caadbfda6df0f85d4507a4bfb7ce5291bfde004793f6e9a2c2ee258ac7c23", + "testbench.spice": "523a47cf6dfd2815239a97db4a11edbd8fd5514df461705442b0bee4b64dea18" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..4b98f279 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW1_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f53b5292532a26d3", + "mirror_pass1": { + "vmin": 0.3285227, + "status": "passed", + "vout_test": 0.76 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.023855, + "vmin": 0.3285227 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 2.04771e-05, + "err": 0.023855, + "vmin": 0.3285227, + "dev_at_vdd": 0.06910039, + "gout_t": 2.48508e-06, + "rout_t": 402402.2, + "vout_test": 0.76, + "rout_nom": 402402.2, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..3d58021f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + }, + "_frozen_from": { + "schematic": { + "err": 0.023855, + "vmin": 0.3285227 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..a31894ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW1_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +.ends C01_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..c9268e0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_ihp130_sW1_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C01_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..d7409ada --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.76 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.76 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.76 +echo vout_test = 0.76 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..ca68cab4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C01_ihp130_sW2_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.56, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.74 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ee72d3c9a1719555", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..fe2cb9cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eb8f6345d913587ae0e6d75f22095a2553278422d874a1b0dbc42810d91a9007", + "qualification.json": "66522bfd1b829e14c5099f74609e5632a455394d093bed46362dcec8c91b9328", + "specs.json": "5afb09e6004cd657d4b295d68ca56fce4ac5cc447cde4cd32317f06a999e1725", + "target.spice": "ea39f920d30fb10d5b8b19527ddecd564b480c2976565b34cc3b57b107dbdc13", + "target_lvs.spice": "6b1694deff88d1284f73d0cb150244554dfcf4846b6a2048732ac9bc7330ae70", + "testbench.spice": "5217fdf967fbf0768e8cd4cf029e8c56c159339063761461210884a008edef3d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..0a06d6ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,93 @@ +{ + "case_id": "C01_ihp130_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ee72d3c9a1719555", + "mirror_pass1": { + "vmin": 0.2801363, + "status": "passed", + "vout_test": 0.74 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "|err|=0.06344 above floor 0.05" + ], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3801 + }, + "_frozen_from": { + "schematic": { + "err": 0.0634415, + "vmin": 0.2801363 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 2.126883e-05, + "err": 0.0634415, + "vmin": 0.2801363, + "dev_at_vdd": 0.139056, + "gout_t": 3.894337e-06, + "rout_t": 256783.5, + "vout_test": 0.74, + "rout_nom": 256783.5, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..bdcedd58 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3801 + }, + "_frozen_from": { + "schematic": { + "err": 0.0634415, + "vmin": 0.2801363 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..74489446 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW2_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=4u l=1.56u ng=8 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=4u l=1.56u ng=8 m=1 +.ends C01_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1c3dcb1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_ihp130_sW2_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f6 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f7 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f6 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f7 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C01_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..4407aac1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.74 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.74 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.74 +echo vout_test = 0.74 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..04b2b887 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW2_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C01_ihp130_sW2_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.04, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.74 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7afc7b8864ddcc1e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..0501d726 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bd0ad5cdb5554761e38917fda36ba12ea39ff5f6778ae8be7e6cffd10ee758c9", + "qualification.json": "35b92aff3d861467aed5629e179ee484e6aad263d72a58647a25db521e167519", + "specs.json": "521609d94f37933751b3850e44d94092ae26a98864a38782949120dbe4ad69fb", + "target.spice": "e3d652b73da4a66c532c2740f6982d357e9d8f6772c089e077312e8839709936", + "target_lvs.spice": "faecd7235e39c1b0ed7dac640175293268e56467597dff8a9995e97b54661081", + "testbench.spice": "19f1fec8a295278483bf69418add01df11bbb3e5817e266892ba0a6e088c85df" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..7cfb7f6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,93 @@ +{ + "case_id": "C01_ihp130_sW2_sL1", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7afc7b8864ddcc1e", + "mirror_pass1": { + "vmin": 0.2894176, + "status": "passed", + "vout_test": 0.74 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "|err|=0.09228 above floor 0.05" + ], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3894 + }, + "_frozen_from": { + "schematic": { + "err": 0.092279, + "vmin": 0.2894176 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 2.184558e-05, + "err": 0.092279, + "vmin": 0.2894176, + "dev_at_vdd": 0.1938621, + "gout_t": 5.165312e-06, + "rout_t": 193599.4, + "vout_test": 0.74, + "rout_nom": 193599.4, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..59eec3cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3894 + }, + "_frozen_from": { + "schematic": { + "err": 0.092279, + "vmin": 0.2894176 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..6aad1241 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW2_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +.ends C01_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..19e41fbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_ihp130_sW2_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f6 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f7 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f6 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f7 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C01_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..a7417416 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.74 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.74 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.74 +echo vout_test = 0.74 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..03509253 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_ihp130_sW2_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C01_ihp130_sW2_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.08, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05, + "vout_test": 0.74 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "46171163d4eb7b45", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..b5a0ed21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1e2376c06b083703ed0312dd8faabd8126618e709e32bd2c774631f9c712911c", + "qualification.json": "a2c199f548e4e234576927d914e611ac9fb9da0078203b19c431972cec51117b", + "specs.json": "c1b8876ace80dcf6114c5c9852a6c8267b4c8320868fd2346527a57627edace8", + "target.spice": "6b9027bc7ca4183df3bb3debaba33b8b8729028fc65bb744928ca352214cb86f", + "target_lvs.spice": "4bb83a37db0480608356da1d2a8f511cbda51268dba73bfd54d9f86b03a82439", + "testbench.spice": "2360883aa3efe513425e87e6838b2d5245de2b13814d2c097db560982f870c91" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..b80dd2db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_ihp130_sW2_sL2", + "circuit_id": "C01", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "46171163d4eb7b45", + "mirror_pass1": { + "vmin": 0.2760895, + "status": "passed", + "vout_test": 0.74 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3761 + }, + "_frozen_from": { + "schematic": { + "err": 0.0470665, + "vmin": 0.2760895 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 2.094133e-05, + "err": 0.0470665, + "vmin": 0.2760895, + "dev_at_vdd": 0.1084847, + "gout_t": 3.19377e-06, + "rout_t": 313110.1, + "vout_test": 0.74, + "rout_nom": 313110.1, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..87ec98e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.3761 + }, + "_frozen_from": { + "schematic": { + "err": 0.0470665, + "vmin": 0.2760895 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.42 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..be4de19c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_ihp130_sW2_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +XM2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +.ends C01_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..2e543e48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_ihp130_sW2_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f6 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f7 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f6 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f7 IOUT1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C01_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..beeb7ddc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.74 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.74 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.74 +echo vout_test = 0.74 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..b6b6d6e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C01_sky130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.9, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.9, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.16 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9d5b53afb44a129f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..222b6330 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c750a08e6b26da4d25946adbaffb050ba4fdb836c8b55835fd7581ec8da23f93", + "qualification.json": "9c11bae8fb6ec4bbc00bac5562121ea0e640574c684db8e6694102241398fc76", + "specs.json": "f4ad6ce9ccf246facc31b48bcd564f59cd6935206f065e42ee67ccf2347746c9", + "target.spice": "e050a3248317b8de49f252188379cdb89c4a53fe60370a0a9f5aefaa71003f30", + "target_lvs.spice": "7a63b36ba404120a304d2315a6c982f9c98338568261057af2ec90f6bbe6e4ed", + "testbench.spice": "d9fd126af0ff3ca7261f329e7caeaeb7bb47846d7f98d95a81d9c98880eadda6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..2b26b6a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW0.5_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9d5b53afb44a129f", + "mirror_pass1": { + "vmin": 0.52631, + "status": "passed", + "vout_test": 1.16 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.6263 + }, + "_frozen_from": { + "schematic": { + "err": 0.010299, + "vmin": 0.52631 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.7, + "schematic_measures": { + "iout_t": 2.020598e-05, + "err": 0.010299, + "vmin": 0.52631, + "dev_at_vdd": 0.04216954, + "gout_t": 1.215248e-06, + "rout_t": 822879.3, + "vout_test": 1.16, + "rout_nom": 822879.3, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..f05ae7c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.6263 + }, + "_frozen_from": { + "schematic": { + "err": 0.010299, + "vmin": 0.52631 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..d1e27656 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW0.5_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +.ends C01_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..04f7e6e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_sky130_sW0.5_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C01_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4107e0bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.16 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.16 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.16 +echo vout_test = 1.16 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..902e928c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C01_sky130_sW0.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.14 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb7052d274d608b9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..214a7d1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d6e81fccbe8373020cb03b6758a2d036e9a512fd7eff03c3f1636f40faa6e996", + "qualification.json": "9229490ae1947a7fc9926dc1ca2ee9dcf92a75916980fb4b407488d4b3c8e764", + "specs.json": "80ce41e125860f783158f22ca69f90c21dc1194d5351f82b87c62ed1dabb26f5", + "target.spice": "aa92dcbf56bc759aa7a4fab67ab8b08d3d1aad9e7df10d8c389bb6f95a6902ad", + "target_lvs.spice": "186152882116d80ec6ecd72263e46b9919eb7549bb0c4e0cee6d1cd0d10c00e6", + "testbench.spice": "7eee14b6b563eb6de4f17b6dd202408f7e012ed1e11387101c357f9d5c959a94" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..d1b43810 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW0.5_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb7052d274d608b9", + "mirror_pass1": { + "vmin": 0.4881766, + "status": "passed", + "vout_test": 1.14 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5882 + }, + "_frozen_from": { + "schematic": { + "err": 0.0134955, + "vmin": 0.4881766 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 14.9, + "schematic_measures": { + "iout_t": 2.026991e-05, + "err": 0.0134955, + "vmin": 0.4881766, + "dev_at_vdd": 0.04744706, + "gout_t": 1.254398e-06, + "rout_t": 797197.0, + "vout_test": 1.14, + "rout_nom": 797197.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..c5df7242 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5882 + }, + "_frozen_from": { + "schematic": { + "err": 0.0134955, + "vmin": 0.4881766 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..fd7aa73c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW0.5_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +.ends C01_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..f7630844 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_sky130_sW0.5_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C01_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..9033e0bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.14 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.14 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.14 +echo vout_test = 1.14 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..45f5bda8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C01_sky130_sW0.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.2, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.2, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.17 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a567139dc78d630e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..672c1e48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c1f959c033e1dec4af1262605c6a8b6ef09d0becb8b570d0d37190e72d35b26b", + "qualification.json": "18bc561c39e7a545922aa435e7823e74ff673f8c20cab5ed5dce535e1fafe41a", + "specs.json": "c6a47d62d8d596ef90a9c6d62b2b36a70b38ab5061245b10841e93975674164f", + "target.spice": "439497f4e05b6ce75731206ecd634315bfe66f1eb987da6e2355b091e3b4e7ab", + "target_lvs.spice": "b2987148ae8efc43b8e5653af3d8ececf2202673c4643d09cc2cf3a8887f32a2", + "testbench.spice": "7c8e91bffc7fa2df862b666ed3f48c47fa041ebc75252ea0837b2cee87593f4b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..99566f5f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW0.5_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a567139dc78d630e", + "mirror_pass1": { + "vmin": 0.5386201, + "status": "passed", + "vout_test": 1.17 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + }, + "_frozen_from": { + "schematic": { + "err": 0.0066305, + "vmin": 0.5386201 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.3, + "schematic_measures": { + "iout_t": 2.013261e-05, + "err": 0.0066305, + "vmin": 0.5386201, + "dev_at_vdd": 0.03586485, + "gout_t": 1.115739e-06, + "rout_t": 896266.8, + "vout_test": 1.17, + "rout_nom": 896266.8, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..c21af70b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + }, + "_frozen_from": { + "schematic": { + "err": 0.0066305, + "vmin": 0.5386201 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..0891f81b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW0.5_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +.ends C01_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..db8128cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,6 @@ +.subckt C01_sky130_sW0.5_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C01_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..7a59f5ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.17 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.17 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.17 +echo vout_test = 1.17 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..cb61cf31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C01_sky130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.9, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.9, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.1 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4f5be3a7c4ef7ccf", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..278c7977 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a713357a544459f12e6213b8368816a368c991c70bc4572e4348baf01355e218", + "qualification.json": "6c4250731a87129d1f1f03f599bd08e9f331b2928d6810037a8b051c397fc722", + "specs.json": "5eb518a6d0f5fbbc61177dde330eb87fa224e9c40ec07223ba0313b2afc622e9", + "target.spice": "57e9f57745a12eb2a283da4f50a13f5d39f580940c7cf33714d984b30066b63a", + "target_lvs.spice": "ce635fc3e530244a7055985cbd6404f87dd206878eedcd227117dbc48e5291a6", + "testbench.spice": "cad709544b43dfa2af6a6256d38b58e3f5c3f793632a40ab08eefcf56c81c850" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..de454e19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1.5_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4f5be3a7c4ef7ccf", + "mirror_pass1": { + "vmin": 0.4069824, + "status": "passed", + "vout_test": 1.1 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.507 + }, + "_frozen_from": { + "schematic": { + "err": 0.0218265, + "vmin": 0.4069824 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 2.043653e-05, + "err": 0.0218265, + "vmin": 0.4069824, + "dev_at_vdd": 0.06462978, + "gout_t": 1.422084e-06, + "rout_t": 703194.4, + "vout_test": 1.1, + "rout_nom": 703194.4, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..2c3e42e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.507 + }, + "_frozen_from": { + "schematic": { + "err": 0.0218265, + "vmin": 0.4069824 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..e14398af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1.5_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.9 nf=6 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.9 nf=6 +.ends C01_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..87f7ddb3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_sky130_sW1.5_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C01_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4587210b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.1 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.1 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.1 +echo vout_test = 1.1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..3c6886bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C01_sky130_sW1.5_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.1 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5cb64fa52ad1fd83", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..e7b89231 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0b779d8e5c45ac573f776ae70cabc48435db6ca464e84d923e93c451b889638a", + "qualification.json": "92dfe66f38c09382e91bf8abb9002a758c2afc7c2e09e3ce9af9842b7af7c79e", + "specs.json": "0941d7bcdaa91c64a4bd92f61c019f26063c4dee7548055035bdddba8bf6898b", + "target.spice": "b6ff30d479553af6649248fa71042277ca46f6d92f264a2c0a3c86022d2ff5df", + "target_lvs.spice": "9c02c455d3f6c5786c983bb4491145f53aae07c5712a23f6d9596a9642b4c295", + "testbench.spice": "19a06865a70b683945d11e6963bf3565dc06c0db3913bfb0d73734eca210a677" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..edab1e5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1.5_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5cb64fa52ad1fd83", + "mirror_pass1": { + "vmin": 0.3938734, + "status": "passed", + "vout_test": 1.1 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4939 + }, + "_frozen_from": { + "schematic": { + "err": 0.024797, + "vmin": 0.3938734 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 2.049594e-05, + "err": 0.024797, + "vmin": 0.3938734, + "dev_at_vdd": 0.06899832, + "gout_t": 1.464635e-06, + "rout_t": 682765.3, + "vout_test": 1.1, + "rout_nom": 682765.3, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..cfce5c8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4939 + }, + "_frozen_from": { + "schematic": { + "err": 0.024797, + "vmin": 0.3938734 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..8aa82e13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1.5_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +.ends C01_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..97a09187 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_sky130_sW1.5_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C01_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..a5e4153a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.1 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.1 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.1 +echo vout_test = 1.1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..d5d0be89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C01_sky130_sW1.5_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.2, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.2, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.1 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b31d3b8581a9d2fc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..8d6792bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f5087d08be2d65e665cea306c8c100d467d31266f57e18c901de578a664c9875", + "qualification.json": "6a11dd9a7d8f90c412eb03012cedeea4441d3250f073e84fbbc664c6f6cdb380", + "specs.json": "29697c3135a7da8ead0ae300e045544dc877ee23ac23af88e94e53e310124a92", + "target.spice": "4440bd303a52a9615b5078d10a96d75f1829270ed8ade82e5bc3b13aec2f7143", + "target_lvs.spice": "d3b5a771caa8a5fdfa8ee973fa064a7f71e96fc361fb51120bf744896afd81f4", + "testbench.spice": "e330ce367b806a3b499bdd948fec2e2337734fc02c2bcd18c3ab8659db9403b1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..8251efa6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1.5_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b31d3b8581a9d2fc", + "mirror_pass1": { + "vmin": 0.4017564, + "status": "passed", + "vout_test": 1.1 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5018 + }, + "_frozen_from": { + "schematic": { + "err": 0.0186775, + "vmin": 0.4017564 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.2, + "schematic_measures": { + "iout_t": 2.037355e-05, + "err": 0.0186775, + "vmin": 0.4017564, + "dev_at_vdd": 0.06052456, + "gout_t": 1.359599e-06, + "rout_t": 735511.9, + "vout_test": 1.1, + "rout_nom": 735511.9, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..99210758 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5018 + }, + "_frozen_from": { + "schematic": { + "err": 0.0186775, + "vmin": 0.4017564 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..655e9835 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1.5_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=1.2 nf=6 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=1.2 nf=6 +.ends C01_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..ff245170 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C01_sky130_sW1.5_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C01_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..9f98e696 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.1 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.1 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.1 +echo vout_test = 1.1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..bacd88e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C01_sky130_sW1_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.9, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.12 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "baeb93405e70889e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..b979c11d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a69e0501d869084dc386d327d5adeab79dbeb138ed10d1f9089fb424dd29ceee", + "qualification.json": "8fc4fd2f3b7327be6f66501fad02f556bc3072a755f13c0ff7275642d0d42314", + "specs.json": "8ee63f73b83691e2bfd3212e6fd0c3dea054c98931ae5b6fb2e523b5074cdba7", + "target.spice": "31a415e6a809109b5902fba02805894ebfd16b574b397d7aee888d0d2f8a3fe2", + "target_lvs.spice": "30b046606b7e24107bed049a1b47e09b67f8d2812c3eb4f2d84c83c523f86509", + "testbench.spice": "b4ad453adf2528426f959dea3bb3ef690170b5de5dc3301737556bc665c0590b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..5c978385 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "baeb93405e70889e", + "mirror_pass1": { + "vmin": 0.4415389, + "status": "passed", + "vout_test": 1.12 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5415 + }, + "_frozen_from": { + "schematic": { + "err": 0.0177605, + "vmin": 0.4415389 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.5, + "schematic_measures": { + "iout_t": 2.035521e-05, + "err": 0.0177605, + "vmin": 0.4415389, + "dev_at_vdd": 0.05590602, + "gout_t": 1.32694e-06, + "rout_t": 753614.1, + "vout_test": 1.12, + "rout_nom": 753614.1, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..d6bd10ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5415 + }, + "_frozen_from": { + "schematic": { + "err": 0.0177605, + "vmin": 0.4415389 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..442055f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +.ends C01_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7722264f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_sky130_sW1_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C01_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..2c9c9d49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.12 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.12 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.12 +echo vout_test = 1.12 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..6526027c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C01_sky130_sW1_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.11 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f45f6e49e69623cf", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..727b3601 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5f057b72ea0c16812db971971b651ac69dc8948f90a1786c08dc9a00635de333", + "qualification.json": "67102f53884546de6a8bf3e6941f5f92f515d452af82093fcaf7a26347f08813", + "specs.json": "635862edb7b71b0d383a9396840d3e9371ff7d060a974db5beb860abcb561ba0", + "target.spice": "53afb656a70d6939eaf5ada213d6aebab517f3da66e4ee954b049629ff69c951", + "target_lvs.spice": "5223a57f4c987d0b778200b35c8b8b546d531ce83175c95cc7d648d797a49902", + "testbench.spice": "688287b7ec21097ebef10a78ea77cc13ffdc02dd2bcb06b0c35a1fb8c6d73390" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..ba3ace32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f45f6e49e69623cf", + "mirror_pass1": { + "vmin": 0.4211187, + "status": "passed", + "vout_test": 1.11 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5211 + }, + "_frozen_from": { + "schematic": { + "err": 0.02052, + "vmin": 0.4211187 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 20.6, + "schematic_measures": { + "iout_t": 2.04104e-05, + "err": 0.02052, + "vmin": 0.4211187, + "dev_at_vdd": 0.06062094, + "gout_t": 1.37352e-06, + "rout_t": 728057.7, + "vout_test": 1.11, + "rout_nom": 728057.7, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..8a6b1255 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5211 + }, + "_frozen_from": { + "schematic": { + "err": 0.02052, + "vmin": 0.4211187 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..3fef5edb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C01_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..13d301f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_sky130_sW1_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C01_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..4774371d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.11 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.11 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.11 +echo vout_test = 1.11 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..cfcba15b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW1_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C01_sky130_sW1_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.2, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.12 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "374164a2e191e2cf", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..e55ce861 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2316959a61c6bb5cb11521f42c05c199bb4394ca5225716571615b86c0fef86c", + "qualification.json": "99d0c6bfbe51ce085444ae8d2d70f074cddfd4e12a3968d0d4ecd2bc968af067", + "specs.json": "f379905ec999c0c5e3f71a261cf52e015b131b8c2e856f88dd5768531bce6b80", + "target.spice": "ea24eab278ed3ff61bea789331f191ee7f02284dcb2008b9955300efe72173ce", + "target_lvs.spice": "5458016c1d11a6e95442f40a36594bd8caff53912a2fa16a3eac18171492ccc4", + "testbench.spice": "567c108a500e8258d936a1636d81fe1e06270901d9406df77665033db19e9963" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..2f2aea9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW1_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "374164a2e191e2cf", + "mirror_pass1": { + "vmin": 0.4409208, + "status": "passed", + "vout_test": 1.12 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5409 + }, + "_frozen_from": { + "schematic": { + "err": 0.0141635, + "vmin": 0.4409208 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 16.4, + "schematic_measures": { + "iout_t": 2.028327e-05, + "err": 0.0141635, + "vmin": 0.4409208, + "dev_at_vdd": 0.05078378, + "gout_t": 1.249339e-06, + "rout_t": 800423.6, + "vout_test": 1.12, + "rout_nom": 800423.6, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..a0c32730 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.5409 + }, + "_frozen_from": { + "schematic": { + "err": 0.0141635, + "vmin": 0.4409208 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..d0f169a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW1_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +.ends C01_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..61adeca0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C01_sky130_sW1_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C01_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..f984e747 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.12 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.12 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.12 +echo vout_test = 1.12 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..db81e1c2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C01_sky130_sW2_sL1.5", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.9, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.09 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0a52817d47e34b34", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..9fc3b019 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "80ec81970d48807501d754bfa3eae06974f553fa8b9fbcd05d805f15b7663a34", + "qualification.json": "9412b1a329f46ea2736370c7d1645e596ec08ba3f557b045942183988367d530", + "specs.json": "023df6bca8042d849080ccd43a02a4cc214cfd0a7c6f72f523fb1d1c0b60eb6e", + "target.spice": "254e83374f0db00d4f20e756e62dfab8d00ad324474272004aefcf39df1125c5", + "target_lvs.spice": "08086c99108c29c7610b63cea411e7836551644e8a14436f801e48284d6c1b6d", + "testbench.spice": "8d966c48dfb69edd8296a269002de6e6ac7fc1dbdbe346c4fccf05027a3ec7fc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..09033b4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW2_sL1.5", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0a52817d47e34b34", + "mirror_pass1": { + "vmin": 0.3879408, + "status": "passed", + "vout_test": 1.09 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4879 + }, + "_frozen_from": { + "schematic": { + "err": 0.024923, + "vmin": 0.3879408 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.0, + "schematic_measures": { + "iout_t": 2.049846e-05, + "err": 0.024923, + "vmin": 0.3879408, + "dev_at_vdd": 0.07130613, + "gout_t": 1.500827e-06, + "rout_t": 666300.1, + "vout_test": 1.09, + "rout_nom": 666300.1, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..8d897214 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4879 + }, + "_frozen_from": { + "schematic": { + "err": 0.024923, + "vmin": 0.3879408 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..de76b88e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW2_sL1.5 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +.ends C01_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7f9560f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_sky130_sW2_sL1.5 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f6 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f7 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f6 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f7 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C01_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..fd04b4c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.09 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.09 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.09 +echo vout_test = 1.09 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..e465d901 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW2_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C01_sky130_sW2_sL1", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.09 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a75813d6ca5b8c0c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..a3362a6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d6c393b768a73237eb4a9d99980dec8ec896d2f623fa45ea297f201fec12d4c8", + "qualification.json": "25f237f174ab5d37d2d685f13eb6e9024139057d900abfd0cc5c76abcfcffa33", + "specs.json": "1741b92c65504ec101cf72f8f5616282f872036bdd14046d5eb39d0c004e9d83", + "target.spice": "b181f22d083c946a2e65b280b01d740c9da177fb46e4faffc35cbbbc0ed24de7", + "target_lvs.spice": "e8b29b2a0b9f026db87e5ab27ccdd825d75110cb014942754b5072d7ffe64f54", + "testbench.spice": "566a016edb3b208ebb58fa204dbfa3553e2708b79a59d9e85f2a1040f4b86005" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..7950ee63 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW2_sL1", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a75813d6ca5b8c0c", + "mirror_pass1": { + "vmin": 0.3786519, + "status": "passed", + "vout_test": 1.09 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4787 + }, + "_frozen_from": { + "schematic": { + "err": 0.0275665, + "vmin": 0.3786519 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.9, + "schematic_measures": { + "iout_t": 2.055133e-05, + "err": 0.0275665, + "vmin": 0.3786519, + "dev_at_vdd": 0.07530348, + "gout_t": 1.542371e-06, + "rout_t": 648352.9, + "vout_test": 1.09, + "rout_nom": 648352.9, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..d24a9b2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4787 + }, + "_frozen_from": { + "schematic": { + "err": 0.0275665, + "vmin": 0.3786519 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..7f27b369 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW2_sL1 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C01_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..15ae5a84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_sky130_sW2_sL1 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C01_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..ce0af4af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.09 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.09 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.09 +echo vout_test = 1.09 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..20acc9b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/case.json @@ -0,0 +1,105 @@ +{ + "case_id": "C01_sky130_sW2_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C01_sky130_sW2_sL2", + "ports": [ + "VSS", + "IB1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.2, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05, + "vout_test": 1.09 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "efdd6b96556445bd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..fb7430e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e2f1fb52d8d5f724bd332303200731026f82302773c9a2d41c86416fd1c471c5", + "qualification.json": "9a60d82c4a3185ecec7b816f746853105c0d0eae6820066a129b14dce29bab57", + "specs.json": "84c58f4469cc20004f7e9794363a672e6f7789e55a432eddb419962b139ed7a5", + "target.spice": "8b04b01a6a1d814014aca36d6f53b9a6fc29491c1c912ff27501e0b4431b346f", + "target_lvs.spice": "c7ca37294f76a78ce13a267678ba0973f074211361b535923cc550b6f2c189e7", + "testbench.spice": "951a51dfdb6b7fb1412931ea70ce3abdce10c51f480bc47ed18cece205df1e72" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..80ede8a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/qualification.json @@ -0,0 +1,91 @@ +{ + "case_id": "C01_sky130_sW2_sL2", + "circuit_id": "C01", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "efdd6b96556445bd", + "mirror_pass1": { + "vmin": 0.3807052, + "status": "passed", + "vout_test": 1.09 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4807 + }, + "_frozen_from": { + "schematic": { + "err": 0.0221195, + "vmin": 0.3807052 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.0, + "schematic_measures": { + "iout_t": 2.044239e-05, + "err": 0.0221195, + "vmin": 0.3807052, + "dev_at_vdd": 0.06807787, + "gout_t": 1.45266e-06, + "rout_t": 688392.6, + "vout_test": 1.09, + "rout_nom": 688392.6, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..b2bdcaad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.4807 + }, + "_frozen_from": { + "schematic": { + "err": 0.0221195, + "vmin": 0.3807052 + }, + "floors": { + "err": { + "abs_max": 0.05 + }, + "vmin": { + "max": 0.63 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..c9a96e17 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C01_sky130_sW2_sL2 VSS IB1 IOUT1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +.ends C01_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..bd45295b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C01_sky130_sW2_sL2 VSS IB1 IOUT1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f6 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f7 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f6 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f7 IOUT1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C01_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..5531bb5e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C01/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IB1 IOUT1 C01_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDDB IB1 2e-05 +.nodeset v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.09 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.05 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.09 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.09 +echo vout_test = 1.09 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..b678ee7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C02_gf180_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.84, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.0 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fc301ba6bb21b3a4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..8e7e418f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ce7dd9efcc783000f1ae8d32fe9269b49d6fc0ea146897ce0da738e707dfbb8e", + "qualification.json": "2ccbc1384aa3d3e55ed25ee29c161faddbd54e1932124ba4c478ae28a2e90163", + "specs.json": "5c5e00d7423ab1fdfc8e8746049b85df484e7392af898c6285b2b02d980e6be1", + "target.spice": "47cf4259f5358165051b12df54cfb6c9bb7ef8e6b44a10cc38b56b697ca5f5b1", + "target_lvs.spice": "004f93cf3eb9647ba95758e2047caf114b5a81cdbcac9f61d2e600cc0f6fa1c4", + "testbench.spice": "a573ad45a0e83f2e552582ac970d9231e5c3fd659ef1d01cb3c9006853e38dbb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..57bd14dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fc301ba6bb21b3a4", + "mirror_pass1": { + "vmin": 0.6954534, + "status": "passed", + "vout_test": 2.0 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7955 + }, + "_frozen_from": { + "schematic": { + "err": -0.0001375, + "vmin": 0.6954534 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999725e-05, + "err": -0.0001375, + "vmin": 0.6954534, + "dev_at_vdd": 7.452212e-05, + "gout_t": 6.509062e-09, + "rout_t": 153651300.0, + "vout_test": 2.0, + "rout_nom": 153651300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..743323c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7955 + }, + "_frozen_from": { + "schematic": { + "err": -0.0001375, + "vmin": 0.6954534 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..e50f8eda --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +.ends C02_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a807c8f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C02_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..24e552dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2 +echo vout_test = 2 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..c9b39728 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C02_gf180_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.56, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.02 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "77590a9359bb5a82", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..11203545 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "deefa32b84dc62a55b46d0e31498c246f51444f2ab9e2ff68208fcdc77ff6be1", + "qualification.json": "b742e4e8d547aba3f7d59db2cc4d31a4115a14960231afa38d8b4e141cefc3dd", + "specs.json": "d27039ad27cf8eb25d585d694cf5807b444eeafe3d78cd75e21a73fc4b5f7c34", + "target.spice": "603b32216e493bc0d1c0e8332be8d495965e83c09e4b6eefcf95a02463ea2b27", + "target_lvs.spice": "feb6db9f449e692c4aa4184daf18042ae2aa814ac9852fe50a1db7fc824d1507", + "testbench.spice": "2d011449872e11a5f4a00975ab7de1118bc36be8632f19c2d7036e1fe536a2ef" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..0dafd995 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "77590a9359bb5a82", + "mirror_pass1": { + "vmin": 0.7435945, + "status": "passed", + "vout_test": 2.02 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8436 + }, + "_frozen_from": { + "schematic": { + "err": -0.000192, + "vmin": 0.7435945 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999616e-05, + "err": -0.000192, + "vmin": 0.7435945, + "dev_at_vdd": 0.0003154771, + "gout_t": 1.068846e-08, + "rout_t": 93560570.0, + "vout_test": 2.02, + "rout_nom": 93560570.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..c1673505 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8436 + }, + "_frozen_from": { + "schematic": { + "err": -0.000192, + "vmin": 0.7435945 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..484fd260 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW0.5_sL1 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +.ends C02_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..282dfe1c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_gf180_sW0.5_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C02_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..45304d1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.02 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.02 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.02 +echo vout_test = 2.02 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..dde14178 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C02_gf180_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.01 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4af620ff0d57022c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..c8823da1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "620c8402e759df5a55f99c8778eaa6367c947b0ca65f8f857d8e66c3e186d5aa", + "qualification.json": "0b752c01e8a84d6ec7963fd2bafaf0f2b47dab655df70796919a3d5d741bbc1a", + "specs.json": "ecbac8b20362406317e9d37008b04e0fd1a9dbc5a5958cb190cb02ce10d077ba", + "target.spice": "78cd6ed5b830ec7e49e806cd4b17c338d48675aa1be09c90017e026a18476d42", + "target_lvs.spice": "0b234a76bc3a35defb94eb5b59776f178f7066c5c07ab0c0ce05c1748bcd9e97", + "testbench.spice": "b5fe5d9c17ca996ca43a46f433d27fa56ee17baf00529e60d43af23922be83d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..51581e32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4af620ff0d57022c", + "mirror_pass1": { + "vmin": 0.7109873, + "status": "passed", + "vout_test": 2.01 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.811 + }, + "_frozen_from": { + "schematic": { + "err": -0.000122, + "vmin": 0.7109873 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.999756e-05, + "err": -0.000122, + "vmin": 0.7109873, + "dev_at_vdd": 2.446146e-05, + "gout_t": 6.874304e-09, + "rout_t": 145538500.0, + "vout_test": 2.01, + "rout_nom": 145538500.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..8e6f5921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.811 + }, + "_frozen_from": { + "schematic": { + "err": -0.000122, + "vmin": 0.7109873 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..fc7befff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW0.5_sL2 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C02_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..1456ecc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_gf180_sW0.5_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C02_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..78f0ff99 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.01 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.01 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.01 +echo vout_test = 2.01 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..74dc98b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C02_gf180_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.84, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "39e6f9cd7c9ad576", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..c844794b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8141288feea00aa3d722de718d0809dda86501041250528b1a7f57759069261e", + "qualification.json": "af22ec12893a69ee7833faf791db976a13075e6a377f5d3a558b773da5df5cba", + "specs.json": "d4469f8126a2fadec518d8ade14ea614102128bb2c9e94c2c54e29040db2a589", + "target.spice": "5d87c3de11f28de5cb5fed45cc0a8396a6f9b9a22fa95debd17e776229a76b97", + "target_lvs.spice": "f91db22ff26353b86258c6355f631c48ceb0f149208fc97f163433ea41ca1be6", + "testbench.spice": "bcc66e610ac608a2f18950f1d559babcf1b1c5647981c1eca68487494295270f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..af41e730 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "39e6f9cd7c9ad576", + "mirror_pass1": { + "vmin": 0.4599782, + "status": "passed", + "vout_test": 1.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.56 + }, + "_frozen_from": { + "schematic": { + "err": -4.25e-05, + "vmin": 0.4599782 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999915e-05, + "err": -4.25e-05, + "vmin": 0.4599782, + "dev_at_vdd": 0.0004312884, + "gout_t": 3.111474e-09, + "rout_t": 321393600.0, + "vout_test": 1.88, + "rout_nom": 321393600.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..0374231a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.56 + }, + "_frozen_from": { + "schematic": { + "err": -4.25e-05, + "vmin": 0.4599782 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..f14d18ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +.ends C02_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..dd8503af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C02_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..8d167fda --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.88 +echo vout_test = 1.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..b8a44bd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C02_gf180_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.56, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.93 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e77f24768a6419d7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..05c6568f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b02d15dbab0dc44b630a8a43b32e41fa4fea1a68f5aa77515fa957817d8e6b77", + "qualification.json": "4f64913b273da4bf30a159ea2c34eb4ff0cd47f2b7e570b83da50d4e7007996a", + "specs.json": "ae59ee0f3e39acdefc4a98e1372cb01db014d2e82f9929a6a7f8f0fc6f76382d", + "target.spice": "f95b57b62fd46cf8e889cb29fe0b9b4ed72fc9861ede05d9dc042e83221a6043", + "target_lvs.spice": "8f097b28ed6eb9fbb143121d979641ee6a9f8416a00b144990676f720849ee04", + "testbench.spice": "3cdcb4a6ea664d6db2bcc4df8998457c048c65f8adeb253712cb6a2d49a06a60" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..ba72d86d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e77f24768a6419d7", + "mirror_pass1": { + "vmin": 0.5577191, + "status": "passed", + "vout_test": 1.93 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6577 + }, + "_frozen_from": { + "schematic": { + "err": -3.75e-05, + "vmin": 0.5577191 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999925e-05, + "err": -3.75e-05, + "vmin": 0.5577191, + "dev_at_vdd": 0.001026859, + "gout_t": 7.294065e-09, + "rout_t": 137098000.0, + "vout_test": 1.93, + "rout_nom": 137098000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..ccd7b6c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6577 + }, + "_frozen_from": { + "schematic": { + "err": -3.75e-05, + "vmin": 0.5577191 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..7d83b37b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1.5_sL1 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +.ends C02_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..97ce1acc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_gf180_sW1.5_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C02_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..3dfb5673 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.93 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.93 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.93 +echo vout_test = 1.93 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..d5a7b628 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C02_gf180_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.87 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "108b7665c0c5f997", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..19929d42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "22325b44f855e2aa65694accdc32ad5c3e7e00b869ff0a758e800ac83c740695", + "qualification.json": "b7506e137a5b6050d1d8e993286a3f6d91c39c98fcd29985f9770f28b7128a84", + "specs.json": "9bee644a2e56855115c59f7650d1f0a5a2f7a704fe9243db50c2b8fbd4e9ed95", + "target.spice": "9a4d0b0563e12d7ba1321ca7d7404f71e7429f77b1f3354764cd1155c4e78dbf", + "target_lvs.spice": "42701dd2b92c7db5859035c97126808aea40483550b3f582282b72f49e9a2972", + "testbench.spice": "cb7f05a821ebc5aae7d64b658d19c0a240c4845ed320f094f7e107514f16f46b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..e03126d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "108b7665c0c5f997", + "mirror_pass1": { + "vmin": 0.431989, + "status": "passed", + "vout_test": 1.87 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.532 + }, + "_frozen_from": { + "schematic": { + "err": -3.7e-05, + "vmin": 0.431989 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999926e-05, + "err": -3.7e-05, + "vmin": 0.431989, + "dev_at_vdd": 0.000208023, + "gout_t": 2.06274e-09, + "rout_t": 484803600.0, + "vout_test": 1.87, + "rout_nom": 484803600.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..449fdb6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.532 + }, + "_frozen_from": { + "schematic": { + "err": -3.7e-05, + "vmin": 0.431989 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..09439f02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1.5_sL2 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C02_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..3ddcdf22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_gf180_sW1.5_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C02_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..4e4670ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.87 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.87 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.87 +echo vout_test = 1.87 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..c1624ef0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C02_gf180_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.91 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2899078a84470112", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..10ba63e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a956e021cc798507428eb83457278586baf804e5898a7a65a6b1835274f2c648", + "qualification.json": "ed1e34d23d499d7ad75d58c2ede900f1bbc0673d48f0e175ee4d13ed8862cfc9", + "specs.json": "6b015f9feca5214b55e0b526e56e28bc912378fa4f6beef13cce247a9facf2f0", + "target.spice": "8a0235ecd2f13cde06e10c1b5f30a4358c8e2a6eabd800a2f6e0651f6a7c6722", + "target_lvs.spice": "5ae4ab9d96d75a519d9eec0a997fb46d8e797d9e6d1dac5d4212ff6e3fde0aee", + "testbench.spice": "dbc2ee73a94d2c942d01b7a2d66d6b1ab82068c8e5b2bbd96407c7a4b7f06fc6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..661ed06a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2899078a84470112", + "mirror_pass1": { + "vmin": 0.5269029, + "status": "passed", + "vout_test": 1.91 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6269 + }, + "_frozen_from": { + "schematic": { + "err": -6.55e-05, + "vmin": 0.5269029 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.999869e-05, + "err": -6.55e-05, + "vmin": 0.5269029, + "dev_at_vdd": 0.0002402067, + "gout_t": 3.689619e-09, + "rout_t": 271039400.0, + "vout_test": 1.91, + "rout_nom": 271039400.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..8924e9ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6269 + }, + "_frozen_from": { + "schematic": { + "err": -6.55e-05, + "vmin": 0.5269029 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..13c0d28c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C02_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..98e03865 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_gf180_sW1_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C02_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..70c33601 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.91 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.91 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.91 +echo vout_test = 1.91 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..0893696c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C02_gf180_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.95 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "696ceb44a6fa6494", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..28608069 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b0e60fd97759acb3fbecb1c2e867d631b511de93913ec047b170ce0d19bc9b01", + "qualification.json": "c4ce220a66f07f36be52d151534e86b887a6040c110d019450cf2157d94c2f50", + "specs.json": "32c66be98a3c3d3a76db8326f7c93c38c8b04a0e8016595b31e102e60e4f1602", + "target.spice": "8706c8b891770ddf3baa387fdd97ee78913415339ea6758652bf5287054ac9d6", + "target_lvs.spice": "42c3db0e5c1f72a4c5138d569ed64617e02ba4455286691fc93c5ef78538fa92", + "testbench.spice": "bc66e7b9aa47e845bea5766a7bd036b6f976afd0e3d426a6ae781b0a8ef9d962" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..d8ccb5a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "696ceb44a6fa6494", + "mirror_pass1": { + "vmin": 0.6092603, + "status": "passed", + "vout_test": 1.95 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7093 + }, + "_frozen_from": { + "schematic": { + "err": -8.05e-05, + "vmin": 0.6092603 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999839e-05, + "err": -8.05e-05, + "vmin": 0.6092603, + "dev_at_vdd": 0.0006958431, + "gout_t": 7.968778e-09, + "rout_t": 125491300.0, + "vout_test": 1.95, + "rout_nom": 125491300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..33d18851 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7093 + }, + "_frozen_from": { + "schematic": { + "err": -8.05e-05, + "vmin": 0.6092603 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..c9e4d5e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1_sL1 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C02_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..e80e0969 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_gf180_sW1_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C02_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..8541919b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.95 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.95 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.95 +echo vout_test = 1.95 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..102e7330 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW1_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C02_gf180_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.91 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "219af85053dd9873", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..ee364e03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1eff6b8a4450f4835f7b8235a963fed69024db5d761afd807a9349b74ae567df", + "qualification.json": "628d468f00d857d6e8eef36e7c1e0055dd988ddf6515446bbc3085d6f6b50aca", + "specs.json": "cd6c8924cc6d1deb5261065d6fd82ce66a54a239f3e576066eb3edbfebc7aefd", + "target.spice": "1e74e2ab533ee185cf556046a389ee798702557a65850f0bf3e53aa9c4a7b6c3", + "target_lvs.spice": "9bf8e4c10bd37a609db9705a580611cf0cbb634f2825d925535d752624b55d2f", + "testbench.spice": "bef5019b2ceaf52e7841f762c017bcc9c4427981c39103d0626fe005293f2c3f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..ea50233d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW1_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "219af85053dd9873", + "mirror_pass1": { + "vmin": 0.5125606, + "status": "passed", + "vout_test": 1.91 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6126 + }, + "_frozen_from": { + "schematic": { + "err": -5.45e-05, + "vmin": 0.5125606 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.999891e-05, + "err": -5.45e-05, + "vmin": 0.5125606, + "dev_at_vdd": 0.0001010362, + "gout_t": 2.588956e-09, + "rout_t": 386278100.0, + "vout_test": 1.91, + "rout_nom": 386278100.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..4a9071c2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6126 + }, + "_frozen_from": { + "schematic": { + "err": -5.45e-05, + "vmin": 0.5125606 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..77a185f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW1_sL2 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C02_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..c509d3d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_gf180_sW1_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C02_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..ad5c4bf6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.91 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.91 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.91 +echo vout_test = 1.91 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..875c88fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C02_gf180_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.86 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d88167d0f21f7579", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..feac74de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "60d5c914c446d074dc0ede6580454c6811a8ba883ce59b7f0784ad6951c08c6b", + "qualification.json": "fbe6136bfccbacc9ab96611aded1f6bca2f9a44018942b795aed011404fbab1d", + "specs.json": "a73fed3da68d1b0a9e453c967e641b40879630e4e6af8f54805a3dffcfa08e1b", + "target.spice": "a35e5bddad6edbb4bb4e0656cc240103e9297cb4c059de071a162646c7067b04", + "target_lvs.spice": "610d610ed68fbe8132a6cc373782f2de6cc4ae9fb5f0461ec111062d442a376d", + "testbench.spice": "4397b481c741ed9240f9e265dfcc91bffa752a5bd2ca2282d6f73d2b8397cddf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..352d3f7b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d88167d0f21f7579", + "mirror_pass1": { + "vmin": 0.4234542, + "status": "passed", + "vout_test": 1.86 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5235 + }, + "_frozen_from": { + "schematic": { + "err": -3.05e-05, + "vmin": 0.4234542 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.999939e-05, + "err": -3.05e-05, + "vmin": 0.4234542, + "dev_at_vdd": 0.0006111761, + "gout_t": 2.895754e-09, + "rout_t": 345337400.0, + "vout_test": 1.86, + "rout_nom": 345337400.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..a6ae0a11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5235 + }, + "_frozen_from": { + "schematic": { + "err": -3.05e-05, + "vmin": 0.4234542 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..2534f53e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW2_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C02_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1bc803cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_gf180_sW2_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C02_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..266b7748 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.86 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.86 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.86 +echo vout_test = 1.86 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..fec19e3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW2_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C02_gf180_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.92 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a3e77f280dda9152", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..69f149e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5c84e7bba821928d463b66aa61ffb20e9097362a8912c08048a30257198a74ee", + "qualification.json": "dbd25b0dfd13785bfeb36abd4edc8008e8241599ff5d66decb428e2d612e15b1", + "specs.json": "2fff34ef582f57eb3577af7d8a99b0da96bbf9869fb62d293cdf94d411bd083d", + "target.spice": "ac2258cc45dc96b375ac546f1eae439dda61875c5fbf51d2c5bee0b9b6cff2c8", + "target_lvs.spice": "dd60ecc74041ec9fd59ddc810c0c72f453baa755820db25ca3691ead3ad099bc", + "testbench.spice": "80543bfad3278b964d9b7eb2bb378546dd48b5785edddfb21a6cbb7992be5288" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..70d7a813 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW2_sL1", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a3e77f280dda9152", + "mirror_pass1": { + "vmin": 0.5301283, + "status": "passed", + "vout_test": 1.92 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6301 + }, + "_frozen_from": { + "schematic": { + "err": -1.3e-05, + "vmin": 0.5301283 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999974e-05, + "err": -1.3e-05, + "vmin": 0.5301283, + "dev_at_vdd": 0.001301787, + "gout_t": 7.061242e-09, + "rout_t": 141618800.0, + "vout_test": 1.92, + "rout_nom": 141618800.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..6ddcafeb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6301 + }, + "_frozen_from": { + "schematic": { + "err": -1.3e-05, + "vmin": 0.5301283 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..48ea40e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW2_sL1 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C02_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..30c447cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_gf180_sW2_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 net6 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 net12 net6 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C02_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..d2b75ef2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.92 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.92 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.92 +echo vout_test = 1.92 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..4865d2fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_gf180_sW2_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C02_gf180_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11f3545f762ddd46", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..5b09b4c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a11708109302bcb2e9ed325cf6b4dc7281afde4aeed85e015a26cf586c7bbf20", + "qualification.json": "76ca672927abb8620bdaac2df4f5c91e6b9089b69ea323d33baf1f01f9a3eee9", + "specs.json": "ef424ee2fae3ed0e3521ee040c39081493af17b6e91bee8272742e05c2e53769", + "target.spice": "764a205b3f3c532b3ea3a1ff2087bb09fa4033da2818cab0fa2b69905fb0fb32", + "target_lvs.spice": "5534e75a22098e4cfe7981b973e88ff418e28a6c75b5ef3780f606c2b3c2c9ee", + "testbench.spice": "43fca9feedf47fc54b207d3d1f6dba783a792e138c924b564f7ad9b6f534f2d3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..9e3bfd08 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_gf180_sW2_sL2", + "circuit_id": "C02", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11f3545f762ddd46", + "mirror_pass1": { + "vmin": 0.3868082, + "status": "passed", + "vout_test": 1.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4868 + }, + "_frozen_from": { + "schematic": { + "err": -2.95e-05, + "vmin": 0.3868082 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.999941e-05, + "err": -2.95e-05, + "vmin": 0.3868082, + "dev_at_vdd": 0.0003213657, + "gout_t": 1.88651e-09, + "rout_t": 530080400.0, + "vout_test": 1.84, + "rout_nom": 530080400.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..d2967193 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4868 + }, + "_frozen_from": { + "schematic": { + "err": -2.95e-05, + "vmin": 0.3868082 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..89fa0c05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_gf180_sW2_sL2 VSS IIN1 IOUT1 +MM1 IIN1 IIN1 net6 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net6 net6 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 IOUT1 IIN1 net12 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 net12 net6 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C02_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..3cdac6dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_gf180_sW2_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 IIN1 IIN1 net6 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 net6 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 IOUT1 IIN1 net12 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 net12 net6 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C02_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..da9908e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.84 +echo vout_test = 1.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..e5d439a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C02_ihp130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.78, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.78, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.78, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.78, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a2fee2b3a2cb4273", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..35f3099e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8e98e4fa186222e200eb413e8399cc69c95e091d26f82d17471fa1b968c43927", + "qualification.json": "4dbc90397ee2c7e3e3ce75bf41b106856adb4e1788fd450d258b490b46a95b23", + "specs.json": "53f4bbf267012e659865da7112113a672a33a5c37ce8d3e3ea577a4dcf911472", + "target.spice": "4f51799deca56d3892250327a72c68016dc85b3b8385492ae1bc929beb3530c8", + "target_lvs.spice": "967f13361071001b62ff823ef3bd4b35b8d98f32488522f1a0a018f508cb9ea4", + "testbench.spice": "61b0ac7d3a684564ac9cd1a748a1087265094c6e8344266b75f550887b86c264" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..2f85de31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a2fee2b3a2cb4273", + "mirror_pass1": { + "vmin": 0.5686756, + "status": "passed", + "vout_test": 0.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6687 + }, + "_frozen_from": { + "schematic": { + "err": -0.0031305, + "vmin": 0.5686756 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.993739e-05, + "err": -0.0031305, + "vmin": 0.5686756, + "dev_at_vdd": 0.0001911442, + "gout_t": 3.092906e-07, + "rout_t": 3233593.0, + "vout_test": 0.88, + "rout_nom": 3233593.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..bda7c696 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6687 + }, + "_frozen_from": { + "schematic": { + "err": -0.0031305, + "vmin": 0.5686756 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..c9c7b508 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=1u l=0.78u ng=2 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=1u l=0.78u ng=2 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=1u l=0.78u ng=2 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=1u l=0.78u ng=2 m=1 +.ends C02_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..cbd5661b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C02_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..10171c5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.88 +echo vout_test = 0.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..2075bc71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C02_ihp130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.52, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2291a191007f09a4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..21c40007 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "324c3baa4b5db2014c3e88ff4c5ccd2beb6cf324038949bf16f87e62144bda0e", + "qualification.json": "2905ba4ee7abf66833d0fc2e24e4e3cca5979f2d8f059decf7722b4f428b24ab", + "specs.json": "ae75f48fdf8906925944db3f772ec9db567313c6c8e7298d802e105832c61231", + "target.spice": "87b89e8822313c6c06357bdd9500db03b794b34beb04b75b1bf14072ff0a313b", + "target_lvs.spice": "b20955fbbbc76c47e0a87c80304fdd23934cc7cc8f1048bb7bede5287c623f85", + "testbench.spice": "997ff20c28e1bacf7db3c9525042d5acb99d540ac67064342511e0e5bb991de2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..41d705bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2291a191007f09a4", + "mirror_pass1": { + "vmin": 0.5520631, + "status": "passed", + "vout_test": 0.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6521 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033385, + "vmin": 0.5520631 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.993323e-05, + "err": -0.0033385, + "vmin": 0.5520631, + "dev_at_vdd": 0.0003863601, + "gout_t": 3.137602e-07, + "rout_t": 3187212.0, + "vout_test": 0.88, + "rout_nom": 3187212.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..5b337bf7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6521 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033385, + "vmin": 0.5520631 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..863d6518 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +.ends C02_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..2320372e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C02_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..2966972d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.88 +echo vout_test = 0.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..5bdc1f85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C02_ihp130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 1.04, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.89 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d396a29721c76006", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..3705b8a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f284bd359c0482eb542fdec0567760a5c8c88bf354ee6e7f04f842e69b702d71", + "qualification.json": "c54df039a553a46d38c5e0a7bddcca8044645d03460ba421136efbbfc9deb221", + "specs.json": "a38ee94e95ce7969d9ab15b8504eb530f2c87ef601e6fc274ee57f3b88ec4077", + "target.spice": "f9b6852fcbd01362c5a7b9647f53175eb60f94bddda1ba82ed592d8ffcf5527b", + "target_lvs.spice": "99074cce5ae86fd0b1947477bfc14ffd3552bea5564679692724c0ba3b679983", + "testbench.spice": "9acd91d812778592f89c1d3d4fbbe889b11a41414e2d5c6c21e1eaaedc28ff72" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..e759974d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d396a29721c76006", + "mirror_pass1": { + "vmin": 0.5894041, + "status": "passed", + "vout_test": 0.89 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6894 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033235, + "vmin": 0.5894041 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.993353e-05, + "err": -0.0033235, + "vmin": 0.5894041, + "dev_at_vdd": 0.0005298698, + "gout_t": 4.422629e-07, + "rout_t": 2261795.0, + "vout_test": 0.89, + "rout_nom": 2261795.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..1d386cf4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6894 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033235, + "vmin": 0.5894041 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..87b40a71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +.ends C02_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..ec8bf2d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C02_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..87c63bb3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.89 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.89 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.89 +echo vout_test = 0.89 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..00ecda3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C02_ihp130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.78, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.78, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.78, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.78, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.81 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3bf56c781ae2513b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..eb389e03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b64abd8e7d5f200cff2bc54c3b2451be6b8fa5b0248c207811e1f644fdaa0268", + "qualification.json": "7221ee6df3c94f8b287180428d37408176f6d4d0429d4dbc86bbdad0c03463fe", + "specs.json": "13a9bd37b83fad96ed434b448ae01aaa8c427f45626970abfd9af67e1b9a5e57", + "target.spice": "7cedb8d249f32668efb98b2c5fcbae21ed8efe915f720f51ee35932a71f7db8a", + "target_lvs.spice": "71f74c5b61824624177e84c55ee2969c6d16714cd570e90574231a9d16f7ab0e", + "testbench.spice": "3e61060d277cfc7c13a33bfaee9051c06f160817a1e450088b40855e6b82477b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..0de75acf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3bf56c781ae2513b", + "mirror_pass1": { + "vmin": 0.4297788, + "status": "passed", + "vout_test": 0.81 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5298 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014615, + "vmin": 0.4297788 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.997077e-05, + "err": -0.0014615, + "vmin": 0.4297788, + "dev_at_vdd": 0.002586955, + "gout_t": 2.597865e-07, + "rout_t": 3849315.0, + "vout_test": 0.81, + "rout_nom": 3849315.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..ccd9d314 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5298 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014615, + "vmin": 0.4297788 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..065e81bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=3u l=0.78u ng=6 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=3u l=0.78u ng=6 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=3u l=0.78u ng=6 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=3u l=0.78u ng=6 m=1 +.ends C02_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7ac61e39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C02_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..46c8da37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.81 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.81 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.81 +echo vout_test = 0.81 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..33917201 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C02_ihp130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.52, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.82 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "57b50b03a56e4590", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..996c79f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7f884dea676a1d5b17a3eb999854642f8e05668c951641e595ec6bdc80d92e56", + "qualification.json": "a19e4843d27071e7292d98699a96b017f20e109ff0feb4715bc89f8e135aa448", + "specs.json": "fb7e8441fd7f16de49185004c8c0d7d2f5053d0c2f595e1db8977e963754fa03", + "target.spice": "2015a1aa16d443b57ecda49e514364edf03cfb1cca13712e5b45236867af809f", + "target_lvs.spice": "a251eb2ccab41b583a703c353a8467786c3749d1e8b01912ce0e85faf2965c97", + "testbench.spice": "dbcbba3b7a130c0e7cef6fdaa87d7828cd90602839e36d55944a7f7590b8eb9f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..88631c27 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "57b50b03a56e4590", + "mirror_pass1": { + "vmin": 0.4307584, + "status": "passed", + "vout_test": 0.82 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5308 + }, + "_frozen_from": { + "schematic": { + "err": -0.001464, + "vmin": 0.4307584 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.997072e-05, + "err": -0.001464, + "vmin": 0.4307584, + "dev_at_vdd": 0.004151491, + "gout_t": 3.612603e-07, + "rout_t": 2768095.0, + "vout_test": 0.82, + "rout_nom": 2768095.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..856c94b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5308 + }, + "_frozen_from": { + "schematic": { + "err": -0.001464, + "vmin": 0.4307584 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..ef183e80 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +.ends C02_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..7ab01e28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C02_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..270ac2f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.82 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.82 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.82 +echo vout_test = 0.82 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..828a8fa2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C02_ihp130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 1.04, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.82 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3bb1211635a6db28", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..12709175 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bdf3258c8be78966526f0df114cabf361381a1a7bbe56f25b88133681e3199ce", + "qualification.json": "750c58ffc3da309e85a6a1e3424b5be2823e5a0d8b92d926f2b2c5ae83f9cba4", + "specs.json": "9aeb6c2f7ecb57cb4e22a0de07da98b7b5651e6022d0b3de7aaf537c51b66ce7", + "target.spice": "6691464a55a65e9ee9534d5bb42a68ecb69bde244fe2efb2b334b2cab184fcc1", + "target_lvs.spice": "1b95d18061217c1e0b6e907539c45da8a29d237786fe087510cef095eb9034e6", + "testbench.spice": "b707ca3a482c073a42f6d1d25d5ae6dafcc8f77b81f92b00612ac09f315166b5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..f0aa8c92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3bb1211635a6db28", + "mirror_pass1": { + "vmin": 0.4348501, + "status": "passed", + "vout_test": 0.82 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5349 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013475, + "vmin": 0.4348501 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.997305e-05, + "err": -0.0013475, + "vmin": 0.4348501, + "dev_at_vdd": 0.00170769, + "gout_t": 2.036465e-07, + "rout_t": 4910495.0, + "vout_test": 0.82, + "rout_nom": 4910495.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..eda9f962 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5349 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013475, + "vmin": 0.4348501 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..8ac32b78 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +.ends C02_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..33a75d0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C02_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..457d01a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.82 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.82 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.82 +echo vout_test = 0.82 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..9d860e97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C02_ihp130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.78, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d8de84c95a231086", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..47baea7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3d1321ded5f96083ecd9f3645669c4da60b3140432396701f7fd2248ce451d3f", + "qualification.json": "6b7be25df2168f2bbfdafe6445953c8681803dedc530d8ca91bb0d17f4eb3b13", + "specs.json": "55f4c80237c14fece48ec2fc2cbe485f20022557bcf2acb8bff9d729cad9f31c", + "target.spice": "03c3b6873e685bb90bff6a51868fc1891946222864d3f2a4fdd0243bf8995305", + "target_lvs.spice": "ac45c51cec88c62c32bb15377283985b555491fbc328cca7bed8ae13ec709031", + "testbench.spice": "c64c2d1571af10a303b9e77ae4234d149504a9e8d47334072db32b10043b1af2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..f13fe532 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d8de84c95a231086", + "mirror_pass1": { + "vmin": 0.4723216, + "status": "passed", + "vout_test": 0.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5723 + }, + "_frozen_from": { + "schematic": { + "err": -0.001908, + "vmin": 0.4723216 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.996184e-05, + "err": -0.001908, + "vmin": 0.4723216, + "dev_at_vdd": 0.001451824, + "gout_t": 2.377361e-07, + "rout_t": 4206345.0, + "vout_test": 0.84, + "rout_nom": 4206345.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..8534ae50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5723 + }, + "_frozen_from": { + "schematic": { + "err": -0.001908, + "vmin": 0.4723216 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..1ec0ddef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +.ends C02_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..9e6ec451 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C02_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..af350e2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.84 +echo vout_test = 0.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..fd5cda06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C02_ihp130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.83 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "66e86865cef02a99", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..6885d107 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0eb66d7e0fd255b7b056cfd45dbdd66945ff673b7935cc59bcdb48f539be9a93", + "qualification.json": "37d68492f33c16d87c213475f68f4969f2a458ac2b401040e3bf9f0219198a11", + "specs.json": "91aa56d2fd3263e86c6b929be0298cc289b6711c691e49c9baf3bb829cc5ed6e", + "target.spice": "8ad6ef174d9455134545421574946258aba9bf2237d862fc6cbaee8e12367f73", + "target_lvs.spice": "f4ce8c0ccfbcc7a2c06c5c0355933e94d5119e0e26db44d6e9b7f29e23f6d1f3", + "testbench.spice": "e4eb8c34636ff5b92c2ebdd8f4dcb600f0bb949de39106311beff0677b1c8ba5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..f5514b54 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "66e86865cef02a99", + "mirror_pass1": { + "vmin": 0.4684034, + "status": "passed", + "vout_test": 0.83 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5684 + }, + "_frozen_from": { + "schematic": { + "err": -0.002309, + "vmin": 0.4684034 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.995382e-05, + "err": -0.002309, + "vmin": 0.4684034, + "dev_at_vdd": 0.002584595, + "gout_t": 3.298376e-07, + "rout_t": 3031809.0, + "vout_test": 0.83, + "rout_nom": 3031809.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..dee4f3c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5684 + }, + "_frozen_from": { + "schematic": { + "err": -0.002309, + "vmin": 0.4684034 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..3d745488 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +.ends C02_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..295c6588 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_ihp130_sW1_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C02_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..7973f368 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.83 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.83 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.83 +echo vout_test = 0.83 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..222289f7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW1_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C02_ihp130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3f0beef46459e717", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..d8e587f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3b0a69e3f771d714063798eeffb9794da0e1fd8ab41f926d0668be8e54971065", + "qualification.json": "630b0edc114ffc81e467aa2d0d9e3bc82237758e7ee2a6d17c3454e8c3d0ff51", + "specs.json": "08d91a5ce2431e65710b197db8a2cea79a2953ebf5f510f9d783155b5642e0cd", + "target.spice": "3a6ae0beefa82dfce9aa1fd5141fa84946e0b651364e663368b1476aafc4719e", + "target_lvs.spice": "e5e5769393ae2c0e9aadb0cec2c78d9875beae2135b13d3b5650a02262fe9e99", + "testbench.spice": "7ff5c11f34f38c78e42550ede504c133b6a883735bbe6a1ccd562c70225c8fba" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..4c7a0bc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW1_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3f0beef46459e717", + "mirror_pass1": { + "vmin": 0.4816118, + "status": "passed", + "vout_test": 0.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5816 + }, + "_frozen_from": { + "schematic": { + "err": -0.001863, + "vmin": 0.4816118 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 1.996274e-05, + "err": -0.001863, + "vmin": 0.4816118, + "dev_at_vdd": 0.0008137832, + "gout_t": 1.988411e-07, + "rout_t": 5029141.0, + "vout_test": 0.84, + "rout_nom": 5029141.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..cbdab5e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5816 + }, + "_frozen_from": { + "schematic": { + "err": -0.001863, + "vmin": 0.4816118 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..2527e366 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW1_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +.ends C02_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..f1f8bd47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_ihp130_sW1_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C02_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..2ce646c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.84 +echo vout_test = 0.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..1271506b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C02_ihp130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.78, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "369851ccc7abddea", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..6f71c8ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "428d7eeed77a819bd7adc24c60850a4dd48df00f3ffb2cf4471ad4754817e570", + "qualification.json": "0a99472eaf194246caf5775d23ed2d53c959700edd0810c6335a86263cc8bf38", + "specs.json": "4381bfd7f8c1c6cbf8360acde2577d189893989508ff35c8deeee11fd2605468", + "target.spice": "2678b1cc490051f5967ca0889462d37c9819471579c5e6e85844f89a48ce9372", + "target_lvs.spice": "6f256351ccfe39c741efff0f70af87282dcaac624502fd67274ff95de18074f5", + "testbench.spice": "de796d04dc326a00eecab022c0c58929446a1eae2e44ccad8c245b2b2fe75294" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..1d49d708 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "369851ccc7abddea", + "mirror_pass1": { + "vmin": 0.4040129, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.504 + }, + "_frozen_from": { + "schematic": { + "err": -0.0010005, + "vmin": 0.4040129 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "iout_t": 1.997999e-05, + "err": -0.0010005, + "vmin": 0.4040129, + "dev_at_vdd": 0.003509739, + "gout_t": 2.791383e-07, + "rout_t": 3582464.0, + "vout_test": 0.8, + "rout_nom": 3582464.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..1e7c0f57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.504 + }, + "_frozen_from": { + "schematic": { + "err": -0.0010005, + "vmin": 0.4040129 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..069cd7a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +.ends C02_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1c1ef939 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f6 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f7 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f6 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f7 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f6 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f7 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C02_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..07824ba5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..2e974304 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW2_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C02_ihp130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7cd9e3ddd394d92e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..dba61354 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d25e7091fc14e3c722a931016cb985b9df99c43e1eb24de6c184f7f4a1f820ba", + "qualification.json": "c68c81b795598b5bb8ca268879848e365ffdddd0de969dc712f6f89372375cfc", + "specs.json": "e4d744ed982ab2437cc3ddabc585a7aa76869f56e1729cc23f65f784b61bbcb3", + "target.spice": "918b5b51ebe9454d0532f0b096f1788bec8b4a01686598c1ddea15581b3038d0", + "target_lvs.spice": "9c044ed6375261c7d8170f1142d59f6e1c14fcbd93d52f58d72d368fb26c81b2", + "testbench.spice": "ee370f24daa9e0c77b7c06f0e5ca953b3bd8de341d612b647a1ed00649b819de" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..475ddc0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW2_sL1", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7cd9e3ddd394d92e", + "mirror_pass1": { + "vmin": 0.4077134, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5077 + }, + "_frozen_from": { + "schematic": { + "err": -0.001074, + "vmin": 0.4077134 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.8, + "schematic_measures": { + "iout_t": 1.997852e-05, + "err": -0.001074, + "vmin": 0.4077134, + "dev_at_vdd": 0.005426679, + "gout_t": 3.974781e-07, + "rout_t": 2515868.0, + "vout_test": 0.8, + "rout_nom": 2515868.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..df1a90a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5077 + }, + "_frozen_from": { + "schematic": { + "err": -0.001074, + "vmin": 0.4077134 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..d003a407 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW2_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +.ends C02_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..da82317f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_ihp130_sW2_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C02_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..5bb6f89a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..a8e8df42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_ihp130_sW2_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C02_ihp130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.04, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "057857a71ac3d1dc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..9ef3f861 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9b5f9617fb57a6d75848bd6604e2bdebec24ec250475a712d5238f1d94de77f9", + "qualification.json": "13dc91f79b4a382339a07b9cbcad0a8c33b9980bac1aaa9a840016dcfea3fae0", + "specs.json": "13ac64b2185e1c186ee962d1b69047c9f0edefbd7abac5aa8a3374ef87a73072", + "target.spice": "59ab986761ceb0f3848404bbaab5960e536fda5fa332031d6cf750fcbad3433d", + "target_lvs.spice": "92f1d21aecc10c337890983cebbb5452e3cc0c0c7a83db348d5fa55c947050e0", + "testbench.spice": "ae2cbce05a83712dc7f43ef310a4ec9713a2543534bd6912c4d69c0ee95cebe0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..7b1aa08f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_ihp130_sW2_sL2", + "circuit_id": "C02", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "057857a71ac3d1dc", + "mirror_pass1": { + "vmin": 0.4068016, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5068 + }, + "_frozen_from": { + "schematic": { + "err": -0.001059, + "vmin": 0.4068016 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "iout_t": 1.997882e-05, + "err": -0.001059, + "vmin": 0.4068016, + "dev_at_vdd": 0.002429683, + "gout_t": 2.189419e-07, + "rout_t": 4567438.0, + "vout_test": 0.8, + "rout_nom": 4567438.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..99d4d0b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5068 + }, + "_frozen_from": { + "schematic": { + "err": -0.001059, + "vmin": 0.4068016 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..99f69594 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_ihp130_sW2_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM2 net6 net6 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM4 net12 net6 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +.ends C02_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..cd0b3d0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_ihp130_sW2_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f6 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f7 IIN1 IIN1 net6 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f6 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f7 net6 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f6 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f7 IOUT1 IIN1 net12 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 net12 net6 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C02_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..d3bff9b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..8a3a4a03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C02_sky130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.45, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.26 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9962a96c328aa24e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..d5030c96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "36f4c00406dd08ffd37339069c2daaace164c53f5ac3d5e68639be97a4b999a1", + "qualification.json": "6524b1b31e683921a804364d0787f4e6eab6f08d071f3f22ae0d3b80c7064efd", + "specs.json": "dbecc10ffea598bbb75b7daf30da1e78b1cc27f62bd79ee07664916c30b2a5d9", + "target.spice": "51f5d87793de277e8bfbe62253ebc32e6e93d284e0119b7d708311fcade1755e", + "target_lvs.spice": "4f782ac296c3db53f8c07d05e4ce6966f1b2080ae645ebfc952fe370e94429b7", + "testbench.spice": "4aeda3df1a6513510206a46679857549b8be338c87e9628fa74aa9846d7d5bb5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..83a170cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW0.5_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9962a96c328aa24e", + "mirror_pass1": { + "vmin": 0.7174334, + "status": "passed", + "vout_test": 1.26 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8174 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013765, + "vmin": 0.7174334 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 16.5, + "schematic_measures": { + "iout_t": 1.997247e-05, + "err": -0.0013765, + "vmin": 0.7174334, + "dev_at_vdd": 0.0002110897, + "gout_t": 9.573341e-08, + "rout_t": 10445670.0, + "vout_test": 1.26, + "rout_nom": 10445670.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..78b7653c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8174 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013765, + "vmin": 0.7174334 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..e0ffad6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +.ends C02_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5d169bdd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C02_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..811ee9d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.26 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.26 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.26 +echo vout_test = 1.26 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..6761c903 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C02_sky130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.3, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.27 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7a0796ed8bbaeaf2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..435d4dea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4b9ea8efa619fdaf11e1b9243f82722bd1394927b8b83262c305a02ca762d41d", + "qualification.json": "6146e8fe67ac231e566a20a3e04078dfa16856100a7d6541048b859181fa4169", + "specs.json": "8fa16df0de33f9961f0e09f5c5f3277b49583802d451584cf0a084f76d2c85ed", + "target.spice": "1b0560c4e03a28793fc0b4f3bb5142079d033fa808fbc0520070ec7630b819d9", + "target_lvs.spice": "669305943eec2f64ae75161fd73238112c5908dc2a80e0c9e64f4e97b1d2d550", + "testbench.spice": "5d766c041fd9f8afd6d3b1589a79743edcddecfb2de6052f6087c6a887d6ff36" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..28ab44ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW0.5_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7a0796ed8bbaeaf2", + "mirror_pass1": { + "vmin": 0.742627, + "status": "passed", + "vout_test": 1.27 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8426 + }, + "_frozen_from": { + "schematic": { + "err": -0.0017955, + "vmin": 0.742627 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.1, + "schematic_measures": { + "iout_t": 1.996409e-05, + "err": -0.0017955, + "vmin": 0.742627, + "dev_at_vdd": 0.0002320793, + "gout_t": 9.266985e-08, + "rout_t": 10791410.0, + "vout_test": 1.27, + "rout_nom": 10791410.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..dfa96e20 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8426 + }, + "_frozen_from": { + "schematic": { + "err": -0.0017955, + "vmin": 0.742627 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..2e3a3a68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +.ends C02_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..18df78b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_sky130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C02_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..5442eb9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.27 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.27 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.27 +echo vout_test = 1.27 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..c308306f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C02_sky130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M3": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.26 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e99087ba8803a050", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..2d3bfc52 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1e226630435d3342784568a7db7f0017c64ffd767ab55f7a20324b731c695f62", + "qualification.json": "0ad556e8952c1892cc7b578fab83db891d1f4fe024eed9251624403fd5b20514", + "specs.json": "06df24f046d3a93071ac4fc93274a8d7c42759a1f74fe1b512cd536a58a03ae4", + "target.spice": "75cefb44a8157e18a2a29179fffbf347fdcad56646f4f033d4f8b1f6039ee6f0", + "target_lvs.spice": "5d31417e28af28146e54dcd187f94b8691c8e67d7a232a3fadd6f4854bbc6ef7", + "testbench.spice": "704a2f89b0840b0cb64fb3b3221a24150170efc4af8288e46aa0c72362b4589d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..d5190e9e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW0.5_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e99087ba8803a050", + "mirror_pass1": { + "vmin": 0.710947, + "status": "passed", + "vout_test": 1.26 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8109 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014165, + "vmin": 0.710947 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.997167e-05, + "err": -0.0014165, + "vmin": 0.710947, + "dev_at_vdd": 0.0002164835, + "gout_t": 1.435474e-07, + "rout_t": 6966341.0, + "vout_test": 1.26, + "rout_nom": 6966341.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..a52c5d72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8109 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014165, + "vmin": 0.710947 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ea7e2d66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +.ends C02_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..6374de5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,10 @@ +.subckt C02_sky130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C02_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..79fc7227 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.26 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.26 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.26 +echo vout_test = 1.26 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..ef985dd2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C02_sky130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.45, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.2 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2458f178b486d709", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..9fc418f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "174904d83edd04560155a5032e051b4f2a6a50689c76bfe7352cd30fb8d18226", + "qualification.json": "56fe581e8cd3fef782c24b4e1404f6ed7cc14a5449505545b3ad7bfe3033d808", + "specs.json": "aa9cc300c3629e03a4b5e7442f5c38b81108d04e9ec99d40e309787eba135200", + "target.spice": "91a0601cbbce4eecba4701560544d7e1f4630070d8dfcb5c8c08ff6953fd3870", + "target_lvs.spice": "2e90aa55a709166f4c8a4f6f95f2b671b68b94f0605626f21f7a7c154a2143cf", + "testbench.spice": "c35ed6a3958ae455ceaae56e8986a951709882a65486b4e5289bf4810b0e9873" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..0840a984 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1.5_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2458f178b486d709", + "mirror_pass1": { + "vmin": 0.6033771, + "status": "passed", + "vout_test": 1.2 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7034 + }, + "_frozen_from": { + "schematic": { + "err": -0.0007555, + "vmin": 0.6033771 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 13.1, + "schematic_measures": { + "iout_t": 1.998489e-05, + "err": -0.0007555, + "vmin": 0.6033771, + "dev_at_vdd": 0.0001205313, + "gout_t": 4.32638e-08, + "rout_t": 23114650.0, + "vout_test": 1.2, + "rout_nom": 23114650.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..cfde33ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7034 + }, + "_frozen_from": { + "schematic": { + "err": -0.0007555, + "vmin": 0.6033771 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..16ff958d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +.ends C02_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ad2f6e92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C02_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..9e05251c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.2 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.2 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.2 +echo vout_test = 1.2 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..0000af37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C02_sky130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.3, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.23 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9003b1a735973f41", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..533f2334 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "602b9c9304897727103b049fa7a690f9bdace94416e8de636c58c5e07434b9af", + "qualification.json": "f09c5547671bf92dd2023c693ab01b4d9c9aa10b9dbc23bb904a5d719e06eb1b", + "specs.json": "189e5a0334a2a688ac8346ce0cd5eb9df74291afdd23afb69e050522e7391b48", + "target.spice": "a42418e21b1a19a6c0fe2badba52e3b9bcb09858a89c966cb2de17930f2f3497", + "target_lvs.spice": "48483386ea412f9d2a899a2f6b6113c5a8bdc9976f9a050ed82aa86ed0254b8a", + "testbench.spice": "c3532f18ef27c1f6ce3d56ff6c41a40b49c98ed17cd28a750533b0525b06386d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..cc449676 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1.5_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9003b1a735973f41", + "mirror_pass1": { + "vmin": 0.6541737, + "status": "passed", + "vout_test": 1.23 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7542 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013375, + "vmin": 0.6541737 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.9, + "schematic_measures": { + "iout_t": 1.997325e-05, + "err": -0.0013375, + "vmin": 0.6541737, + "dev_at_vdd": 0.000315141, + "gout_t": 7.266066e-08, + "rout_t": 13762720.0, + "vout_test": 1.23, + "rout_nom": 13762720.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..d13c9af8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7542 + }, + "_frozen_from": { + "schematic": { + "err": -0.0013375, + "vmin": 0.6541737 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..6009357d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +.ends C02_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..9be272f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_sky130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C02_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..ad4f3343 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.23 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.23 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.23 +echo vout_test = 1.23 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..04ef1069 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C02_sky130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M3": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.18 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6cb15f7df9a0927a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..cee5a39d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2bd480b654448a7cbe4de5bbeb6117c853ef1345313f07256f5fbdb81156d7fd", + "qualification.json": "7f468826492c079ef271e610b0feb657f222aa780ed1d3e7f3347e39579de3fa", + "specs.json": "7eae0b324c29a7f7ec7a21f217df9044cb9c21d5106444e0dc4d0b32bfea3751", + "target.spice": "321106be5267ef531930f051778e5d236c487209407afb4be37b5aa748f267f9", + "target_lvs.spice": "39f4b734c49bc50e02977593f8a8803951db6e047c3619d6d2cccac9f2678d85", + "testbench.spice": "c884ecd78f7d7fd00a8d73eb58f6524ee8e73db7aa6c53b1843281647f199d13" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..59d9e396 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1.5_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6cb15f7df9a0927a", + "mirror_pass1": { + "vmin": 0.5589609, + "status": "passed", + "vout_test": 1.18 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.659 + }, + "_frozen_from": { + "schematic": { + "err": -0.000534, + "vmin": 0.5589609 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.5, + "schematic_measures": { + "iout_t": 1.998932e-05, + "err": -0.000534, + "vmin": 0.5589609, + "dev_at_vdd": 4.010322e-05, + "gout_t": 3.407456e-08, + "rout_t": 29348980.0, + "vout_test": 1.18, + "rout_nom": 29348980.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..5cc06174 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.659 + }, + "_frozen_from": { + "schematic": { + "err": -0.000534, + "vmin": 0.5589609 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..845cf3cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +.ends C02_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0a8d26c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C02_sky130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C02_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..6b16753b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.18 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.18 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.18 +echo vout_test = 1.18 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..268d7e32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C02_sky130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.22 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "1d181a682fb86f1c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..51de3649 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "68c730a685093cf9d8fb9b2d7dfa7c2498eeb7c7ad0c4b2d071e23fc23f32337", + "qualification.json": "06db73a2d3efa798079a6e24afbdf0447644ebe68ea0547eb72e50172ff5da04", + "specs.json": "84cce310ce66dc34b093b78bed64d4632b119fddaf1194d8ac4f4e4b1962210b", + "target.spice": "6440fa1889cca7ca3ad3926006d5dfab8502ae68c643bdcb6d046f2b488d6eb4", + "target_lvs.spice": "2ef3c6949382ba36ea0ae2f5b427eedd7505a8c7fd27fdcc2cf306f08510e0b4", + "testbench.spice": "133cd3be25dcb66f9f53369ec96791556050eb43cd64009480a07311499ec720" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..62bd269a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "1d181a682fb86f1c", + "mirror_pass1": { + "vmin": 0.636125, + "status": "passed", + "vout_test": 1.22 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7361 + }, + "_frozen_from": { + "schematic": { + "err": -0.00089, + "vmin": 0.636125 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.9, + "schematic_measures": { + "iout_t": 1.99822e-05, + "err": -0.00089, + "vmin": 0.636125, + "dev_at_vdd": 1.956831e-05, + "gout_t": 5.11016e-08, + "rout_t": 19569280.0, + "vout_test": 1.22, + "rout_nom": 19569280.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..364e7041 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7361 + }, + "_frozen_from": { + "schematic": { + "err": -0.00089, + "vmin": 0.636125 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..41b95591 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +.ends C02_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d0f3a772 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_sky130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C02_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..ba0cbe71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.22 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.22 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.22 +echo vout_test = 1.22 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..e47e8390 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C02_sky130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.24 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8d0db555bdfc9e9d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..92c63f45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "21eca61a843f6da027375e94b73ebc62aece0cc4f3c8d4a6e9acd90c5d77263a", + "qualification.json": "7daa0dbb27f7d8a45ff0f0185383ce22b2b701921e883bcc524b20ead9ee96e3", + "specs.json": "7c79c2fa01f66a2947fcd96308007d586148c6cb62d1925cc4f325cf2f780362", + "target.spice": "9a57bd4a0d4149fc8d671091f0da1d5bfbca204042a56d0fdd2a986f73a737d6", + "target_lvs.spice": "3c0b70eb42aa0dec785aaf0723b102810edd68e67155dec6c56f5fa2d7597f7e", + "testbench.spice": "d4e6b4f54ed01d366d6ff5293ab27bd87b566f8c38d1ce1234cb81bd2cea76c4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..98f6780a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8d0db555bdfc9e9d", + "mirror_pass1": { + "vmin": 0.6808938, + "status": "passed", + "vout_test": 1.24 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7809 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014555, + "vmin": 0.6808938 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.5, + "schematic_measures": { + "iout_t": 1.997089e-05, + "err": -0.0014555, + "vmin": 0.6808938, + "dev_at_vdd": 0.0001185779, + "gout_t": 7.478576e-08, + "rout_t": 13371760.0, + "vout_test": 1.24, + "rout_nom": 13371760.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..18b0a05c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7809 + }, + "_frozen_from": { + "schematic": { + "err": -0.0014555, + "vmin": 0.6808938 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..5d0b8489 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +.ends C02_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..8607760e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_sky130_sW1_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C02_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..26ec02b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.24 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.24 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.24 +echo vout_test = 1.24 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..4a079a0d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW1_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C02_sky130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.2 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "54c7f706cf7bf208", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..a159ae9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "60e6c11eddee9215701c25b1f1bb1a362b5554832f139612a609c9fa457b583a", + "qualification.json": "1bc204b636f3d275b5582932b1ef2421fe7ec93ddd96eeaec81c31e0b0dcb5ff", + "specs.json": "492d309685cc51639e1646cfb99fbe4161cdb2fa76656bec407208d812b93905", + "target.spice": "f5b2fbbb440c60a55e2b52c56e9418d5bb2304d024a993c7273c45e6ab2ec00a", + "target_lvs.spice": "f7992c96126837f75af04a78a5eaae18f955de0ee602393078dc6791f631ba52", + "testbench.spice": "5ac7817d26db2da93b8ad28dd95e315e25c1124bb1ea95e81794cafa0c75212b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..84e506cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW1_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "54c7f706cf7bf208", + "mirror_pass1": { + "vmin": 0.6025103, + "status": "passed", + "vout_test": 1.2 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7025 + }, + "_frozen_from": { + "schematic": { + "err": -0.000714, + "vmin": 0.6025103 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.1, + "schematic_measures": { + "iout_t": 1.998572e-05, + "err": -0.000714, + "vmin": 0.6025103, + "dev_at_vdd": 2.352138e-05, + "gout_t": 4.94023e-08, + "rout_t": 20244820.0, + "vout_test": 1.2, + "rout_nom": 20244820.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..8e96201d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7025 + }, + "_frozen_from": { + "schematic": { + "err": -0.000714, + "vmin": 0.6025103 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..1cee17d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW1_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C02_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..1d22c4e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C02_sky130_sW1_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C02_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..c6f59c90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.2 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.2 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.2 +echo vout_test = 1.2 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..0cff3e48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C02_sky130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.19 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e4a9c21c3c9a18df", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..14594729 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "aff1ffa3091e03978ddd6818b4d842656d393df93402561dc3684a6046bbc4d9", + "qualification.json": "5ae600dd032423cb136a985b75db7acd9c791b2541a43edf1c5f56ae336a3917", + "specs.json": "c43aa261a783a32609ba7a801c6446bb5b90eba8d62ea3de72dcc116b7b52653", + "target.spice": "2a187d5ac360d691ed4b4aaf9ed4123ed96616010f5b28cd8eb018eb9aed2b84", + "target_lvs.spice": "a6e2efa5a7fc42a9d4bc49b9478b641ecaa99a1603f42be6dcf51880a5df4183", + "testbench.spice": "9914822cf717a6930a8e9d3015d92347cba04bd95fc3e04d2d8edfb8fb37ba70" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..9a0de106 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW2_sL1.5", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e4a9c21c3c9a18df", + "mirror_pass1": { + "vmin": 0.5843798, + "status": "passed", + "vout_test": 1.19 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6844 + }, + "_frozen_from": { + "schematic": { + "err": -0.000684, + "vmin": 0.5843798 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.1, + "schematic_measures": { + "iout_t": 1.998632e-05, + "err": -0.000684, + "vmin": 0.5843798, + "dev_at_vdd": 0.0001858258, + "gout_t": 4.004975e-08, + "rout_t": 24969460.0, + "vout_test": 1.19, + "rout_nom": 24969460.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..a168896a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6844 + }, + "_frozen_from": { + "schematic": { + "err": -0.000684, + "vmin": 0.5843798 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..2d928f9d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +.ends C02_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6d5fa402 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_sky130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f6 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f7 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C02_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..7780e0c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.19 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.19 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.19 +echo vout_test = 1.19 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..e7ea172c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW2_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C02_sky130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.22 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ac888ea0c21e788b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..2fb7f031 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "354d185028e17389a57781d908002d0ee0b46ccea46ee75b47a1663903a36e74", + "qualification.json": "d557ace24a20824323c3448d32e34cb8adc13945f2799ac52c2d536f3e9b78ff", + "specs.json": "203918f6b1b7a0c5f0dfd93a1da01bebb6453469f2c43e70317ecb83b63bf113", + "target.spice": "ed35a579f5839233df96631dcefb10a415a7391dd37b0cb753e0a68f72d090c9", + "target_lvs.spice": "6740efc0f64728d5910f9919e74b05f5da2a1c0c1baa36a0816b8319dc071c79", + "testbench.spice": "9240da12c2e8d61a981395d185d70bf5e0a0a385c0bc429d84ac364a6682ab7f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..565f1058 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW2_sL1", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ac888ea0c21e788b", + "mirror_pass1": { + "vmin": 0.6378416, + "status": "passed", + "vout_test": 1.22 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7378 + }, + "_frozen_from": { + "schematic": { + "err": -0.001289, + "vmin": 0.6378416 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.997422e-05, + "err": -0.001289, + "vmin": 0.6378416, + "dev_at_vdd": 0.0004603069, + "gout_t": 7.354139e-08, + "rout_t": 13597820.0, + "vout_test": 1.22, + "rout_nom": 13597820.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..ce158580 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7378 + }, + "_frozen_from": { + "schematic": { + "err": -0.001289, + "vmin": 0.6378416 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..6a2b3417 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW2_sL1 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +.ends C02_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..f5963e6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_sky130_sW2_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f6 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f7 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C02_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..419aca46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.22 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.22 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.22 +echo vout_test = 1.22 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..865abe18 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/case.json @@ -0,0 +1,141 @@ +{ + "case_id": "C02_sky130_sW2_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C02_sky130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.17 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf6148deeedeb4f6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..0f8d2e6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1ae1d5e5f3de15149f6c0cd7cf93733c7fd278e2e8437833d1f92860971d2b8c", + "qualification.json": "bec34a1b9dab40fedd011c0aef56b6447f59e6ce3049e33b720317aad249f0b5", + "specs.json": "4711bbab225250fa97884110092619a1432e699237440100f578349676e2db3a", + "target.spice": "332fc7bb0214bc2c145ebca8786cc6b6bf9466c930f0be042575b1b562e9c673", + "target_lvs.spice": "dc563427dab0fc868f6d1ff6234721285cc2f095f29845487770ee1132d9e506", + "testbench.spice": "99e3b320e7691267cb8a69c852fdb0e7dc260b3b6ee5790bb18cb0523cf74c8a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..e26855b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C02_sky130_sW2_sL2", + "circuit_id": "C02", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf6148deeedeb4f6", + "mirror_pass1": { + "vmin": 0.5344892, + "status": "passed", + "vout_test": 1.17 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6345 + }, + "_frozen_from": { + "schematic": { + "err": -0.0004495, + "vmin": 0.5344892 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.2, + "schematic_measures": { + "iout_t": 1.999101e-05, + "err": -0.0004495, + "vmin": 0.5344892, + "dev_at_vdd": 7.496273e-05, + "gout_t": 2.82494e-08, + "rout_t": 35398980.0, + "vout_test": 1.17, + "rout_nom": 35398980.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..37daa1af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6345 + }, + "_frozen_from": { + "schematic": { + "err": -0.0004495, + "vmin": 0.5344892 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..76e49b7e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C02_sky130_sW2_sL2 VSS IIN1 IOUT1 +XM1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C02_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..d2b6a075 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C02_sky130_sW2_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 IIN1 IIN1 net6 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 net6 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 IOUT1 IIN1 net12 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 net12 net6 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C02_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..f0456405 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C02/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C02_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.17 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.17 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.17 +echo vout_test = 1.17 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..f3f6e917 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C03_gf180_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 3.36, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 3.36, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 3.36, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.44 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "359bc611df7023da", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..399785e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4ab42df9a818ecaad0389b3632d6790e9a4ba976d1fd8cbc948ab8cdfdf33b1f", + "qualification.json": "1276de1b767c3e5287ed63c925bb4b7b132ce67575d1181d80bb7f4939e05413", + "specs.json": "92c2075c29bc69970b866aaf5f2d083ceb787ea6257d106186dae5a7f7e98497", + "target.spice": "41672492b430818f1421206490f4d24f2eba0903ae98fcafa2d108ed8004efea", + "target_lvs.spice": "b0c596def096760f4142ee455c83155fbb707e400fcead79b0d4ff5a8eef395c", + "testbench.spice": "ea5309404c708a86c93d430bcbd340681b30fd3a6191de724810ed8af4ad8236" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..6f434fc5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.36, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "359bc611df7023da", + "mirror_pass1": { + "vmin": 1.583426, + "status": "passed", + "vout_test": 2.44 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.683 + }, + "_frozen_from": { + "schematic": { + "err": -0.0168415, + "vmin": 1.583426 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.966317e-05, + "err": -0.0168415, + "vmin": 1.583426, + "dev_at_vdd": 0.01676485, + "gout_t": 3.215138e-09, + "rout_t": 311059700.0, + "vout_test": 2.44, + "rout_nom": 311059700.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..abc87996 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.683 + }, + "_frozen_from": { + "schematic": { + "err": -0.0168415, + "vmin": 1.583426 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..4942d8bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=2u l=3.36u nf=4 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=2u l=3.36u nf=4 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=2u l=3.36u nf=4 m=1 +.ends C03_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..bc642dba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +.ends C03_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..b9bca968 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.44 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.44 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.44 +echo vout_test = 2.44 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..9265e9e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C03_gf180_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 2.24, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.34 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "04496cb3cbee2fda", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..8d005573 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "757cd40f1bcae290d4ed87073f425db9b4a9b7bf45c6762fb0442f1454470811", + "qualification.json": "9ef24280ca2d09437660cd8b3d4129b889496744e97f1856472a2a889783abd6", + "specs.json": "113e203050eec6e1d2de8a943067221fcff4d1e967777a861627ca1be2611a42", + "target.spice": "9594254898ac52b68e5c714d5922b05b5640dcaba6008a82ff0e570f4a241e24", + "target_lvs.spice": "9a62bd92635c77b66a994bf042cb1b87c328361555c019f38118a2ffce0244df", + "testbench.spice": "aa82a2892981a9188db77a4884da7344fd46f75401a05d57e537958b1c24105a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..d88b104e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "04496cb3cbee2fda", + "mirror_pass1": { + "vmin": 1.377771, + "status": "passed", + "vout_test": 2.34 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.478 + }, + "_frozen_from": { + "schematic": { + "err": -0.016521, + "vmin": 1.377771 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.966958e-05, + "err": -0.016521, + "vmin": 1.377771, + "dev_at_vdd": 0.01645253, + "gout_t": 2.02782e-09, + "rout_t": 493158800.0, + "vout_test": 2.34, + "rout_nom": 493158800.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..7a3a8665 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.478 + }, + "_frozen_from": { + "schematic": { + "err": -0.016521, + "vmin": 1.377771 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..f40ed246 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW0.5_sL1 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +.ends C03_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..eacabb97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_gf180_sW0.5_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +.ends C03_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..d33d16df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.34 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.34 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.34 +echo vout_test = 2.34 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..a677e4a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C03_gf180_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 4.48, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 4.48, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 4.48, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.53 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b921441dd9cb5765", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..41eb1be9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "71b76c868bf67da08cadf4a53e5ae9828689b9a86a8ca532e4a4d680558c6254", + "qualification.json": "8f67548074d054e2ac85944aa54a9b4469c6ac97e999a28870b2e3952d2fc831", + "specs.json": "04ea46964e76df33f6e39136a7b315761d04aa8e7390a479c7f8fb2b4f268403", + "target.spice": "cef8c2b88b61a284bbe3aeb9ecaccdfe8eaa2e876b73b99ddce0cc360039c7d6", + "target_lvs.spice": "9d8174f959c35878a2ee4707f12bcb6c36c8d3e3129607bf3bc6207d1301609d", + "testbench.spice": "92a0369d17b81d5886af67cdb62458ae1339273e793395b3101f78310447e74b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..117b35fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.48, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b921441dd9cb5765", + "mirror_pass1": { + "vmin": 1.765737, + "status": "passed", + "vout_test": 2.53 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.866 + }, + "_frozen_from": { + "schematic": { + "err": -0.0192845, + "vmin": 1.765737 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.961431e-05, + "err": -0.0192845, + "vmin": 1.765737, + "dev_at_vdd": 0.01918324, + "gout_t": 6.618019e-09, + "rout_t": 151192900.0, + "vout_test": 2.53, + "rout_nom": 151192900.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..d40ab3f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.866 + }, + "_frozen_from": { + "schematic": { + "err": -0.0192845, + "vmin": 1.765737 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a8c4cf75 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW0.5_sL2 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=2u l=4.48u nf=4 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=2u l=4.48u nf=4 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=2u l=4.48u nf=4 m=1 +.ends C03_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..2bfa31d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_gf180_sW0.5_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +.ends C03_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..e7c6d09e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.53 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.53 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.53 +echo vout_test = 2.53 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..cf401a5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C03_gf180_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 3.36, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 3.36, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 3.36, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.21 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3a06adf7af4eb057", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..b34d24df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e9c95d353d67018112f40d723b5169c1a5cffbc472927a2bd1cec044d2829c51", + "qualification.json": "20f0530b5bc28d4e0bec190d6df35081f5fb155c5e57175d90251db80ef8d300", + "specs.json": "4b51f2a936e53a52faeddbe7c541ab58a86535ffbe65ab48b5fddddb11aa304c", + "target.spice": "94dd5e0210dfec87cc28d2dfcb596aa900aecdc6c32493e655c7b52aed634a02", + "target_lvs.spice": "78044508310566cc655b2a4f3ab2511cc0e844af782b2c6e0672d555a9585974", + "testbench.spice": "cc89ca0d94f64b40c5f12af61b83fb55c06c89921043748334c5a59356d93d7f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..f9d30505 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.36, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3a06adf7af4eb057", + "mirror_pass1": { + "vmin": 1.12544, + "status": "passed", + "vout_test": 2.21 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.225 + }, + "_frozen_from": { + "schematic": { + "err": -0.010751, + "vmin": 1.12544 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.978498e-05, + "err": -0.010751, + "vmin": 1.12544, + "dev_at_vdd": 0.01065515, + "gout_t": 3.989691e-10, + "rout_t": 2506469000.0, + "vout_test": 2.21, + "rout_nom": 2506469000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..80b06e15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.225 + }, + "_frozen_from": { + "schematic": { + "err": -0.010751, + "vmin": 1.12544 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..0cfaa7a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=6u l=3.36u nf=12 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=6u l=3.36u nf=12 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=6u l=3.36u nf=12 m=1 +.ends C03_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..883480db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +.ends C03_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..ea13c594 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.21 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.21 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.21 +echo vout_test = 2.21 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..b61b94c0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C03_gf180_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 2.24, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 2.24, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 2.24, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.16 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9b3c48dde945aae0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..a6c9760f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9e2f79a1595d5d8b99542a5079d20b1a56ba1ce756afe7789e0de11ff2140e45", + "qualification.json": "685d4e592bcf464d751c332a3ab7e3d4cada046ba9734e249f6bd4746662b11c", + "specs.json": "4fe999c67f3411b0ab11c64926941a356ecc1a1762fed8f087031e7f28fa568d", + "target.spice": "fd0f377f23c60385824e5187ca40fa2c20e30ba42b9a19ad92f285f75d0c1712", + "target_lvs.spice": "70deea4cffdeb1b8ea7168ff35744d7b2918b868e1deed072952ef9bd57ee890", + "testbench.spice": "9747a09dea190401ca2606bbaf1f4f91651387e0aab0b3b0e8a67d73c7fa64ab" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..6dd5cc3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.24, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9b3c48dde945aae0", + "mirror_pass1": { + "vmin": 1.024915, + "status": "passed", + "vout_test": 2.16 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.125 + }, + "_frozen_from": { + "schematic": { + "err": -0.0146025, + "vmin": 1.024915 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.970795e-05, + "err": -0.0146025, + "vmin": 1.024915, + "dev_at_vdd": 0.01422239, + "gout_t": 5.411942e-10, + "rout_t": 1847772000.0, + "vout_test": 2.16, + "rout_nom": 1847772000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..005ae269 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.125 + }, + "_frozen_from": { + "schematic": { + "err": -0.0146025, + "vmin": 1.024915 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..188aa8de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1.5_sL1 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=6u l=2.24u nf=12 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=6u l=2.24u nf=12 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=6u l=2.24u nf=12 m=1 +.ends C03_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..237fcf3d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_gf180_sW1.5_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +.ends C03_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..e48b08c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.16 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.16 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.16 +echo vout_test = 2.16 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..c9b8c263 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C03_gf180_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 4.48, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 4.48, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 4.48, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.26 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "99ab7f4263734970", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..ccf7c702 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eced635e5d7d00dfd2291a8ff88abc0222c17ffcf15a967f36b50917cb804b1e", + "qualification.json": "eae74c12d673ecf49cf1add9b218e08ea384358efb973101d2ee1fe4562fc39f", + "specs.json": "77d1c465d69907c357636eff8dcf77e5b200114aacd7d5ac0f81ca9a69af78c5", + "target.spice": "c366a19772af2ed5657e6b9df41e468c648f7fa42ff52bc687ced93f48716882", + "target_lvs.spice": "ee2ba13e74ee6b5ab463b204cd69bd982297004845aa816f037d12b14e3fae57", + "testbench.spice": "daf853458131eefb2472481694dfc707dd636e3ff43a1111c63b4fad02fb2c4b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..50a7110c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.48, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "99ab7f4263734970", + "mirror_pass1": { + "vmin": 1.212092, + "status": "passed", + "vout_test": 2.26 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.312 + }, + "_frozen_from": { + "schematic": { + "err": -0.009085, + "vmin": 1.212092 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.98183e-05, + "err": -0.009085, + "vmin": 1.212092, + "dev_at_vdd": 0.009051847, + "gout_t": 3.619841e-10, + "rout_t": 2762560000.0, + "vout_test": 2.26, + "rout_nom": 2762560000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..cf67837f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.312 + }, + "_frozen_from": { + "schematic": { + "err": -0.009085, + "vmin": 1.212092 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..8f389d14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1.5_sL2 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=6u l=4.48u nf=12 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=6u l=4.48u nf=12 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=6u l=4.48u nf=12 m=1 +.ends C03_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..7ba4e683 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_gf180_sW1.5_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +.ends C03_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..e2190f6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.26 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.26 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.26 +echo vout_test = 2.26 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..288be3b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C03_gf180_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 3.36, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 3.36, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 3.36, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.28 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0d3aea99f2a4424c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..27a37f46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "98773f275b5163df978688c9bf1fe9d4754df832ee0e8d15dd879fcfbd00a775", + "qualification.json": "5c768727f264545e9442f0e8693823af77ab41ef5b308353e1f5edadf5f60e7a", + "specs.json": "77b9bb0a2c375c26f8321d067566ff650ccd9c6cfbb4a582e64c8054c263a565", + "target.spice": "ba052eb336f474bd8a32ab43897104b6e2a88389d6f5a15a5d8fc5202f16164b", + "target_lvs.spice": "bd23112a99a74b20faeeb4f2f6b068c900748d2d98afb155bf5a2518ab0b0548", + "testbench.spice": "4ff79c991e59ad6c91f311f1ea6903ca34cf026d79cf72d31c4e2819f7a7decb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..48289cec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.36, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0d3aea99f2a4424c", + "mirror_pass1": { + "vmin": 1.255746, + "status": "passed", + "vout_test": 2.28 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.356 + }, + "_frozen_from": { + "schematic": { + "err": -0.0112105, + "vmin": 1.255746 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.977579e-05, + "err": -0.0112105, + "vmin": 1.255746, + "dev_at_vdd": 0.01117144, + "gout_t": 6.478086e-10, + "rout_t": 1543692000.0, + "vout_test": 2.28, + "rout_nom": 1543692000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..172c22bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.356 + }, + "_frozen_from": { + "schematic": { + "err": -0.0112105, + "vmin": 1.255746 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..effe3e07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=4u l=3.36u nf=8 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=4u l=3.36u nf=8 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=4u l=3.36u nf=8 m=1 +.ends C03_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a67d9803 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_gf180_sW1_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +.ends C03_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..555254a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.28 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.28 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.28 +echo vout_test = 2.28 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..a4c06001 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C03_gf180_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 2.24, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.21 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9db71b9a393b0e44", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..4b6c2169 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "281bc9aaeb5197489a5dcb4058650eb65262f2e4ab926fba6d628060bd4e3248", + "qualification.json": "354c130692f99e83c49907d3ca889b6adf9378cd0e6670316a7d22da01822e48", + "specs.json": "3f2d2098f0ab75c830055397f3311e9338dde104502f05c4e5629bcc76252fc1", + "target.spice": "bede3eeceeff0025b0bb80e07cd5e057a9d404ea52eb8f510f611e51b60a8075", + "target_lvs.spice": "2e063b813e4c0e16e9a6b4dce9ea08a5747d839fbad554206638fccb4182a54d", + "testbench.spice": "0173f3c29bd1e04d9656d06cd6a0769941b2ad7c801faa4742662666a4db4227" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..a9ebe3be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9db71b9a393b0e44", + "mirror_pass1": { + "vmin": 1.126864, + "status": "passed", + "vout_test": 2.21 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.227 + }, + "_frozen_from": { + "schematic": { + "err": -0.014305, + "vmin": 1.126864 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.97139e-05, + "err": -0.014305, + "vmin": 1.126864, + "dev_at_vdd": 0.01415489, + "gout_t": 7.09511e-10, + "rout_t": 1409428000.0, + "vout_test": 2.21, + "rout_nom": 1409428000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..0a71cd91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.227 + }, + "_frozen_from": { + "schematic": { + "err": -0.014305, + "vmin": 1.126864 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..1b9bae6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1_sL1 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +.ends C03_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..16bf122e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_gf180_sW1_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +.ends C03_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..c69036c0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.21 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.21 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.21 +echo vout_test = 2.21 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..1b71cda6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW1_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C03_gf180_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 4.48, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 4.48, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 4.48, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.33 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1324023f18bc0d99", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..a2148d91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9815e86521c8b4fa615cd8bc7e13f511e30d788e5ae740ed3a5466451ce33f42", + "qualification.json": "16628817c12ed0c7b5a6ddc3da8d35448a3233ae6f89aa7ebcc483555491d809", + "specs.json": "a68239786f7c4fb6f2cc42704f1af4c9a592525f31bcc8040a0e1525f3ede09a", + "target.spice": "654478fda28e68b24c3dac0cf98a4187a12ad9ee03fdec541276aeb7512342fe", + "target_lvs.spice": "3aa5838a17bfe7ceb58d5177dfaca4812fd22c6c7665b72276727511aee8844a", + "testbench.spice": "f2ce441dd4f8264e6e78ed0c8af018f66cf6d88e1b909f95de8869b420e7e92e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..439c79b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW1_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.48, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1324023f18bc0d99", + "mirror_pass1": { + "vmin": 1.367713, + "status": "passed", + "vout_test": 2.33 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.468 + }, + "_frozen_from": { + "schematic": { + "err": -0.010186, + "vmin": 1.367713 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.979628e-05, + "err": -0.010186, + "vmin": 1.367713, + "dev_at_vdd": 0.01016059, + "gout_t": 7.13289e-10, + "rout_t": 1402004000.0, + "vout_test": 2.33, + "rout_nom": 1402004000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..9d7adda3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.468 + }, + "_frozen_from": { + "schematic": { + "err": -0.010186, + "vmin": 1.367713 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..f24ded54 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW1_sL2 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=4u l=4.48u nf=8 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=4u l=4.48u nf=8 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=4u l=4.48u nf=8 m=1 +.ends C03_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..3da06c47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_gf180_sW1_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +.ends C03_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..20321507 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.33 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.33 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.33 +echo vout_test = 2.33 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..7e766ad6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C03_gf180_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 3.36, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 3.36, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 3.36, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.18 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4d187a84ed2fa3f7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..19166626 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ac151b91b3dc13e0fc9287c8002bed5cfa23832481bd887cab6790193591c60e", + "qualification.json": "f65127b0a4908a876ad6dc294d447225f770bb6e0c15de5cd9aa78d5b925ce0c", + "specs.json": "0ffee015b2b531f016c6ec9d74f6bd68542d60d132283825d0515890402f180d", + "target.spice": "0e1505d5d735ebd4090583ba24748f6170e3470728dca4750b00e706b5494eb1", + "target_lvs.spice": "dc410188a51adfe9aa72a582d424ac2c83f8cde6e76c6b8cd0870fe3774f3fc5", + "testbench.spice": "e024db72fcc6e29db07b9304348e85425bf898905ab49f575e102b83e2a070e3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..21cee2ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.36, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4d187a84ed2fa3f7", + "mirror_pass1": { + "vmin": 1.051141, + "status": "passed", + "vout_test": 2.18 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.151 + }, + "_frozen_from": { + "schematic": { + "err": -0.0108945, + "vmin": 1.051141 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.978211e-05, + "err": -0.0108945, + "vmin": 1.051141, + "dev_at_vdd": 0.01069933, + "gout_t": 3.293691e-10, + "rout_t": 3036119000.0, + "vout_test": 2.18, + "rout_nom": 3036119000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..42ad31c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.151 + }, + "_frozen_from": { + "schematic": { + "err": -0.0108945, + "vmin": 1.051141 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..e704a9a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW2_sL1.5 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=8u l=3.36u nf=16 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=8u l=3.36u nf=16 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=8u l=3.36u nf=16 m=1 +.ends C03_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..db97f5eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_gf180_sW2_sL1.5 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f12 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f13 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f14 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM1_f15 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f12 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f13 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f14 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM2_f15 Y Y VSS VSS nfet_03v3 w=0.5u l=3.36u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f12 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f13 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f14 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +MM3_f15 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=3.36u +.ends C03_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..ace86baf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.18 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.18 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.18 +echo vout_test = 2.18 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..b21ef1e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW2_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C03_gf180_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 2.24, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 2.24, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 2.24, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.13 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "499d6f72f1a867a1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..2dfaa6df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5bb9b362deb9ec77cef132c4e52a11b8efa854e0b3bf09befb2326cf93521ddc", + "qualification.json": "d661d0a201cb16b1cd90b92d3780b18ee4853f05f2822410950a51f55fda7397", + "specs.json": "e293fe8e94e37731b53a4c90697b5d7baaacccd12212b809ab814fd49e43b403", + "target.spice": "69c9d76787065544ad2af1c6a3d88a6c6223f53067c6bc16bb1c4aa60c9ace4b", + "target_lvs.spice": "1ada9bb1873408f8bd5157819899b237af3c0168caabbc4b9ac9dbcbad31cebe", + "testbench.spice": "ad7dfaf34575462b54ede21f0c8078b1bbae71eadd24a3f0662b46c1fd8fa537" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..98f910e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW2_sL1", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.24, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "499d6f72f1a867a1", + "mirror_pass1": { + "vmin": 0.9661599, + "status": "passed", + "vout_test": 2.13 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.066 + }, + "_frozen_from": { + "schematic": { + "err": -0.0151325, + "vmin": 0.9661599 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.969735e-05, + "err": -0.0151325, + "vmin": 0.9661599, + "dev_at_vdd": 0.01448253, + "gout_t": 4.98348e-10, + "rout_t": 2006634000.0, + "vout_test": 2.13, + "rout_nom": 2006634000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..f6e81850 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.066 + }, + "_frozen_from": { + "schematic": { + "err": -0.0151325, + "vmin": 0.9661599 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..1d3811a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW2_sL1 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=8u l=2.24u nf=16 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=8u l=2.24u nf=16 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=8u l=2.24u nf=16 m=1 +.ends C03_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..621dda4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_gf180_sW2_sL1 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f12 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f13 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f14 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f15 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f12 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f13 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f14 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f15 Y Y VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f12 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f13 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f14 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +MM3_f15 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=2.24u +.ends C03_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..c53c0d62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.13 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.13 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.13 +echo vout_test = 2.13 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..447a5f02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_gf180_sW2_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C03_gf180_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 4.48, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 4.48, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 4.48, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1, + "vout_test": 2.21 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "92107ce4fee179c1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..30a7805f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4e585a6f1e2220e65c5ef65a783131b70238553d45ff0dd98777656fd6f5355c", + "qualification.json": "502c73b4ecf6a3cfdee559f061647487d207676aa2a0080d7e524c8215b42794", + "specs.json": "f128259e600b89cccbc10fce236998718f50c10449fafe73913b52d9d2f0ddb6", + "target.spice": "6207edb5386f4d522a3aac4e57c2e709dd0a814bacfd09ea2fa0eef2b4901fde", + "target_lvs.spice": "874fcf03f5677da632918b5a422c783b7b815e21d91635959eef0db33f8fcdfa", + "testbench.spice": "a07ea7ec8b88243c83d803389506e6914a07fd0a61425b709423cee7c81b370c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..c3a273a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_gf180_sW2_sL2", + "circuit_id": "C03", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.24, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.48, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "92107ce4fee179c1", + "mirror_pass1": { + "vmin": 1.124088, + "status": "passed", + "vout_test": 2.21 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.224 + }, + "_frozen_from": { + "schematic": { + "err": -0.008961, + "vmin": 1.124088 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.982078e-05, + "err": -0.008961, + "vmin": 1.124088, + "dev_at_vdd": 0.008892388, + "gout_t": 2.741858e-10, + "rout_t": 3647172000.0, + "vout_test": 2.21, + "rout_nom": 3647172000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..4872d77b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.224 + }, + "_frozen_from": { + "schematic": { + "err": -0.008961, + "vmin": 1.124088 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 2.145 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..ac1404e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_gf180_sW2_sL2 VSS IIN1 IOUT1 +MM1 IIN1 Y VSS VSS nfet_03v3 w=8u l=4.48u nf=16 m=1 +MM2 Y Y VSS VSS nfet_03v3 w=8u l=4.48u nf=16 m=1 +MM3 IOUT1 IIN1 Y VSS nfet_03v3 w=8u l=4.48u nf=16 m=1 +.ends C03_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..9e104402 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_gf180_sW2_sL2 VSS IIN1 IOUT1 +MM1_f0 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f1 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f2 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f3 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f4 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f5 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f6 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f7 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f8 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f9 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f10 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f11 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f12 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f13 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f14 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM1_f15 IIN1 Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f0 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f1 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f2 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f3 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f4 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f5 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f6 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f7 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f8 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f9 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f10 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f11 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f12 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f13 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f14 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM2_f15 Y Y VSS VSS nfet_03v3 w=0.5u l=4.48u +MM3_f0 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f1 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f2 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f3 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f4 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f5 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f6 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f7 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f8 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f9 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f10 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f11 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f12 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f13 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f14 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +MM3_f15 IOUT1 IIN1 Y VSS nfet_03v3 w=0.5u l=4.48u +.ends C03_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..5e7a0563 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.21 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.21 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.21 +echo vout_test = 2.21 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..37d276ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C03_ihp130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 3.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 3.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 3.12, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.95 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "53cef8e23a479779", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..a03b371d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "45b56065e068071ef453ecf6b449bd775e2cf9d6a2bb062bab2d334eed0f47f8", + "qualification.json": "475385a8e271f9681c7508a8be7b1a00b7048351cdfeb34687cd876dc645b709", + "specs.json": "085e9cea03ca71df01bccc6ff6921773b4939f3031709f421b4b9dc7c116d2dd", + "target.spice": "ba8cc2efae500f3a1bcc6dc3a8570568674c633140ecb28e4e363dc59d5ad021", + "target_lvs.spice": "9189dab3e13d99dbab9c7b60657fcb56fdb55faeb561edfeeb875c35be964e0b", + "testbench.spice": "dbedae43747ccdb9f76dc53f7a5d891ea3ab617fd2db098d2f95a29940c4b787" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..8e2db060 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 3.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "53cef8e23a479779", + "mirror_pass1": { + "vmin": 0.7060432, + "status": "passed", + "vout_test": 0.95 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + }, + "_frozen_from": { + "schematic": { + "err": -0.056157, + "vmin": 0.7060432 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.887686e-05, + "err": -0.056157, + "vmin": 0.7060432, + "dev_at_vdd": 0.05519875, + "gout_t": 2.84866e-07, + "rout_t": 3512583.0, + "vout_test": 0.95, + "rout_nom": 3512583.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..c9aebb60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + }, + "_frozen_from": { + "schematic": { + "err": -0.056157, + "vmin": 0.7060432 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..7037b721 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=2u l=3.12u ng=4 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=2u l=3.12u ng=4 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=2u l=3.12u ng=4 m=1 +.ends C03_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..47cf6bdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +.ends C03_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..7a63f03d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.95 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.95 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.95 +echo vout_test = 0.95 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..302f41a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C03_ihp130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 2.08, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.92 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c96ce9ef9e8b9b6c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..693d6fb7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c82525110db34f63fd43dd7567680a325fbb99a1f3bd02d808dc2a8439d5be25", + "qualification.json": "d7a9d2137cc40c04b430a7b5d48036694dc777966be4ffb1cf7afadc9c36639e", + "specs.json": "ca3ee94beb7f6aa4366d29f3944c54a47b433ab1312c0727851318b4883d9b14", + "target.spice": "e899615437dd95b7d6055f7ce9ba45ff26423561e7e65065116df3f024f3dae3", + "target_lvs.spice": "26992a42b2f6cd1425cfdb13cd0cabbbc8ae30b1f3b887b255edca9be90492e6", + "testbench.spice": "8c6f92e2b16775bb1ac837c1d297240720003e460f3412367d3e7f675b9c0f98" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..6af7b0cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c96ce9ef9e8b9b6c", + "mirror_pass1": { + "vmin": 0.6393236, + "status": "passed", + "vout_test": 0.92 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.7393 + }, + "_frozen_from": { + "schematic": { + "err": -0.0699635, + "vmin": 0.6393236 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.860073e-05, + "err": -0.0699635, + "vmin": 0.6393236, + "dev_at_vdd": 0.06921668, + "gout_t": 8.710236e-08, + "rout_t": 11482700.0, + "vout_test": 0.92, + "rout_nom": 11482700.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..2cd7d440 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.7393 + }, + "_frozen_from": { + "schematic": { + "err": -0.0699635, + "vmin": 0.6393236 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..ac46630d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +.ends C03_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3d000a90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C03_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..d80b27e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.92 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.92 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.92 +echo vout_test = 0.92 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..89dbb0a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C03_ihp130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 4.16, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 4.16, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 4.16, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.99 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6a279ddec0850926", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..4cb002bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "65535eef925b233ab0b2112e7bb0be8e5dda5084fd35990e1c1a7deafe281cb6", + "qualification.json": "65d6ec9db0b68182cefa7a002714d2d2f4c7d7901808a0c6ff5fa8e7a1b536d3", + "specs.json": "9aa016c82018c23d9467d6fad1414bec6081f037aa7e93d26b55bae29174482a", + "target.spice": "5f5b276caa818f65989cf04569e0d14aae39e4ad2cc64b63e3702d3c32a62f55", + "target_lvs.spice": "29507535616f4a84fba186c1987eecf87c20d016c9113f21a5eac654976f10bf", + "testbench.spice": "f4564b2b74afa9be78ae7b92ad261b6ab246d0ce8618baabe81f1036af2e90bb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..2b168adf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,105 @@ +{ + "case_id": "C03_ihp130_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 4.16, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6a279ddec0850926", + "mirror_pass1": { + "vmin": 0.780093, + "status": "passed", + "vout_test": 0.99 + }, + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "vmin=0.7801 above floor 0.78" + ], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + }, + "_frozen_from": { + "schematic": { + "err": -0.0488655, + "vmin": 0.780093 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.902269e-05, + "err": -0.0488655, + "vmin": 0.780093, + "dev_at_vdd": 0.04699181, + "gout_t": 5.681386e-07, + "rout_t": 1760134.0, + "vout_test": 0.99, + "rout_nom": 1760134.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..87195459 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + }, + "_frozen_from": { + "schematic": { + "err": -0.0488655, + "vmin": 0.780093 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..bd0480f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=2u l=4.16u ng=4 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=2u l=4.16u ng=4 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=2u l=4.16u ng=4 m=1 +.ends C03_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..521a37ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +.ends C03_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..a26f6148 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.99 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.99 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.99 +echo vout_test = 0.99 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..7a298953 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C03_ihp130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 3.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 3.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 3.12, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.85 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f1d23c8922edb903", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..a045f774 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7afaeb3d6fb4af2ffadadaff08ed7a1643c55d36ddbd910a62f99a6120f3b9ee", + "qualification.json": "41f46d5333b37c0b27d7e682df78facc4ec108bab601025636caf4f22ed35997", + "specs.json": "dcf9314a553111bb87163084d05fbcc7bb537609558ed6e5afe2cfad6d665c92", + "target.spice": "6d87fb7f248eb61741ba06a50ab2c34cc24b81e8bb9507f9aec8e4787109b2df", + "target_lvs.spice": "a15bc8427f55c73b409fed87b37a28049bc3f387aab33ea1b50c37a123daee3e", + "testbench.spice": "66ff53d8c962d3c08ac9552fa966cf19e316d3f376174e388b6bfc5f4dee1d04" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..0d441a0d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 3.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f1d23c8922edb903", + "mirror_pass1": { + "vmin": 0.5064997, + "status": "passed", + "vout_test": 0.85 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6065 + }, + "_frozen_from": { + "schematic": { + "err": -0.0718915, + "vmin": 0.5064997 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "iout_t": 1.856217e-05, + "err": -0.0718915, + "vmin": 0.5064997, + "dev_at_vdd": 0.07107148, + "gout_t": 5.92658e-08, + "rout_t": 16873230.0, + "vout_test": 0.85, + "rout_nom": 16873230.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..ef79b2e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6065 + }, + "_frozen_from": { + "schematic": { + "err": -0.0718915, + "vmin": 0.5064997 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..f82f8513 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=6u l=3.12u ng=12 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=6u l=3.12u ng=12 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=6u l=3.12u ng=12 m=1 +.ends C03_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..b8d1bf98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +.ends C03_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..56746935 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.85 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.85 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.85 +echo vout_test = 0.85 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..cf639053 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C03_ihp130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 2.08, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 2.08, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 2.08, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.85 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a25067b2aa8dc024", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..b0a927b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c07fb5ca99d0166de6e85a20e633b1a40da5e58fc913bde4396e064c343c1799", + "qualification.json": "060bede830165f66805abce83b2cdba0e34fd9d62ffdd8172ac5ba0bd679ce60", + "specs.json": "5ff8d5cb9724e436897cac780d2dc04ea4894842ef5328d24a31fb337dd21c85", + "target.spice": "e2960666b19da0b500c9956586238ef03c518d28bf24552e9542779994b7da91", + "target_lvs.spice": "6ed0284cd618719c7bd1305b354cac0533da0156d86b1d6315ba804a06eade07", + "testbench.spice": "d84d907071c6ec237c9bfaee44b4003649c2049cdcb906a704de5ce583a1c6b6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..54b6d7cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.08, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a25067b2aa8dc024", + "mirror_pass1": { + "vmin": 0.5052037, + "status": "passed", + "vout_test": 0.85 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6052 + }, + "_frozen_from": { + "schematic": { + "err": -0.0898685, + "vmin": 0.5052037 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "iout_t": 1.820263e-05, + "err": -0.0898685, + "vmin": 0.5052037, + "dev_at_vdd": 0.08867583, + "gout_t": 8.355636e-08, + "rout_t": 11968010.0, + "vout_test": 0.85, + "rout_nom": 11968010.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..1d694d01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6052 + }, + "_frozen_from": { + "schematic": { + "err": -0.0898685, + "vmin": 0.5052037 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..459d6ca4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=6u l=2.08u ng=12 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=6u l=2.08u ng=12 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=6u l=2.08u ng=12 m=1 +.ends C03_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..62b1b1a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C03_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..398d1799 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.85 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.85 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.85 +echo vout_test = 0.85 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..e32447f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C03_ihp130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 4.16, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 4.16, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 4.16, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.87 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e624a962708bc8f8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..af6b0dd4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c27ad63da6860a4714479aacf3baa3f00f5a4581e4ea02bcdb75f57e528b51e6", + "qualification.json": "084d4f02ee733ab0888edb286eec502f9db9074da070ba0c6b6046b4f61f2c7d", + "specs.json": "629b36f865b9e7869430896a980b4a6da0b78b3c516bdf6d5037e89a22778c01", + "target.spice": "f38d72a2d497027486c6ef78801e87bfde9c76724c48a60546db5d6e8f7f96a1", + "target_lvs.spice": "d67d8160ee67f01f22d9c89b26d7a4a279b4e1fe5f6ed824478aff96cc47055d", + "testbench.spice": "56f169763c01b3fb36800967bbb46c9c4adf2dfdcce36a415e2954cc387a7dd7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..b27f1158 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 4.16, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e624a962708bc8f8", + "mirror_pass1": { + "vmin": 0.5321486, + "status": "passed", + "vout_test": 0.87 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6321 + }, + "_frozen_from": { + "schematic": { + "err": -0.0612935, + "vmin": 0.5321486 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "iout_t": 1.877413e-05, + "err": -0.0612935, + "vmin": 0.5321486, + "dev_at_vdd": 0.06069959, + "gout_t": 4.672538e-08, + "rout_t": 21401650.0, + "vout_test": 0.87, + "rout_nom": 21401650.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..d021e138 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6321 + }, + "_frozen_from": { + "schematic": { + "err": -0.0612935, + "vmin": 0.5321486 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..4ca000ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=6u l=4.16u ng=12 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=6u l=4.16u ng=12 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=6u l=4.16u ng=12 m=1 +.ends C03_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0947dd9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +.ends C03_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..dae3fd4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.87 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.87 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.87 +echo vout_test = 0.87 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..bcf9d556 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C03_ihp130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 3.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 3.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 3.12, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5b9e18c661300475", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..49454ae4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "af91ecc7fee452fb0da8a9d90df96bfbcfed078ef047b2fcd761a45690655e75", + "qualification.json": "4d7b13e843b296b385122588a67e61ca8a7affd65d0e039c05738047f5c4f1b3", + "specs.json": "34e24040b794c7b6f765ea45619faed8a244174a376e8a86e913f8be2fd7e810", + "target.spice": "4edfd4c61cb90f08c3bfbd68a37972689508065919bddab88a9c0d24b4b21246", + "target_lvs.spice": "1446632ac36e6b621bdbc6fc87c8066530742cd8dde57bde30f4b63e202a8d66", + "testbench.spice": "df50a19176b9a57d96545f4884b64b0ae04f02347e0d52a24a97d577b8293adb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..c4dd38e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 3.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5b9e18c661300475", + "mirror_pass1": { + "vmin": 0.5642074, + "status": "passed", + "vout_test": 0.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6642 + }, + "_frozen_from": { + "schematic": { + "err": -0.065394, + "vmin": 0.5642074 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.869212e-05, + "err": -0.065394, + "vmin": 0.5642074, + "dev_at_vdd": 0.06472306, + "gout_t": 5.646776e-08, + "rout_t": 17709660.0, + "vout_test": 0.88, + "rout_nom": 17709660.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..489ec750 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6642 + }, + "_frozen_from": { + "schematic": { + "err": -0.065394, + "vmin": 0.5642074 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..411fd4b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=4u l=3.12u ng=8 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=4u l=3.12u ng=8 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=4u l=3.12u ng=8 m=1 +.ends C03_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ba6877d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +.ends C03_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..35e90b9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.88 +echo vout_test = 0.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..a64f5c00 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C03_ihp130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 2.08, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.87 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b5e3471e68d0d905", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..be1cc75e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "08e793653888d5a7c8d6fea9ff19e213cac7476b0f9799487e2a3a0f01c240f8", + "qualification.json": "37c6d03ab934ee70a8c66acc266be0f238fd7a0237a883cde1ac6d011aee775d", + "specs.json": "248bbb15b26a9bcbd45e264760aac66290179f4e79691520d2f3ad5302785fc1", + "target.spice": "715194768ee3dcba04667053a18682f5f7de6bac650e1d3d444490c1bf0223f0", + "target_lvs.spice": "78a4e1f6228a89468a8d7e9a382348ce7cf30b67ebc19d09bce4d4d5eb93df9f", + "testbench.spice": "1aadff21d236b1afb1c28126bca7603694de46ab9bf73e2d6337ac880eddbc55" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..5c01178f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b5e3471e68d0d905", + "mirror_pass1": { + "vmin": 0.5380896, + "status": "passed", + "vout_test": 0.87 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6381 + }, + "_frozen_from": { + "schematic": { + "err": -0.081922, + "vmin": 0.5380896 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.836156e-05, + "err": -0.081922, + "vmin": 0.5380896, + "dev_at_vdd": 0.08094295, + "gout_t": 7.393831e-08, + "rout_t": 13524790.0, + "vout_test": 0.87, + "rout_nom": 13524790.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..63c7eecd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6381 + }, + "_frozen_from": { + "schematic": { + "err": -0.081922, + "vmin": 0.5380896 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..c35610f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +.ends C03_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..fd57bfbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_ihp130_sW1_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C03_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..81a6e2b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.87 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.87 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.87 +echo vout_test = 0.87 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..20cf77a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW1_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C03_ihp130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 4.16, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 4.16, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 4.16, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.9 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b6debe16c4743f34", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..7396bc72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5555bd88f30983875402606fad060348a8b7422ee51aa84fe2bd710c06b9922b", + "qualification.json": "a2c433afcfdb5f396d1cd9ca24b870a6d07499c4d30644d517a650bc1a3b3477", + "specs.json": "52dd750cd8b0a492cd4b54a2c5a0a42932654900a03ce06a878c01fc4dab5c20", + "target.spice": "08155e55a716cfcee9f893744c17b7c2f34fc2429b13364f0d88a196ea3be004", + "target_lvs.spice": "70427913c089e698da490979aba45696dec2f792dd8e9a96d78ba0ce5a52ae2a", + "testbench.spice": "7cc42c4cf1fd8ec7cb0604cbab432d21a960064470946d1b3fe098fb5f48338a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..78353c74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW1_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 4.16, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b6debe16c4743f34", + "mirror_pass1": { + "vmin": 0.6032443, + "status": "passed", + "vout_test": 0.9 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.7032 + }, + "_frozen_from": { + "schematic": { + "err": -0.0557205, + "vmin": 0.6032443 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.888559e-05, + "err": -0.0557205, + "vmin": 0.6032443, + "dev_at_vdd": 0.05519737, + "gout_t": 6.220546e-08, + "rout_t": 16075760.0, + "vout_test": 0.9, + "rout_nom": 16075760.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..58690fcd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.7032 + }, + "_frozen_from": { + "schematic": { + "err": -0.0557205, + "vmin": 0.6032443 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..4ba3bc5f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW1_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=4u l=4.16u ng=8 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=4u l=4.16u ng=8 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=4u l=4.16u ng=8 m=1 +.ends C03_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..3e013374 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_ihp130_sW1_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +.ends C03_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..65c3ebe0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.9 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.9 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.9 +echo vout_test = 0.9 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..a42958e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C03_ihp130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 3.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 3.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 3.12, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "05c2eb893fe84728", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..ca231d37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0b9317f30134e9a70d4f015ea53e6b738623ed0d26e81ab00bf751faff15a1ca", + "qualification.json": "38e81f1c2c9f24477dbff5b4f33ec0e1b162d1e141aa56e089f432995a109c45", + "specs.json": "17afb5b4d622c8511cbe2f0c272bf3d672022a8d3ce979c8580097ed427b63c5", + "target.spice": "bb625d3b84d7f5374e8ff8c47d7ce153640aa716b4003de4c9352d10fd7487d0", + "target_lvs.spice": "a5548953ec4825e7b9bab92d47ba4f2fe850bb5349ea3184ea17ccf15983f3d5", + "testbench.spice": "acb614af754d921865732840811fa383b36f4435b07c71478978cfdff736179c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..54129156 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 3.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "05c2eb893fe84728", + "mirror_pass1": { + "vmin": 0.4735241, + "status": "passed", + "vout_test": 0.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.5735 + }, + "_frozen_from": { + "schematic": { + "err": -0.076829, + "vmin": 0.4735241 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.3, + "schematic_measures": { + "iout_t": 1.846342e-05, + "err": -0.076829, + "vmin": 0.4735241, + "dev_at_vdd": 0.0759008, + "gout_t": 6.412233e-08, + "rout_t": 15595190.0, + "vout_test": 0.84, + "rout_nom": 15595190.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..7b787199 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.5735 + }, + "_frozen_from": { + "schematic": { + "err": -0.076829, + "vmin": 0.4735241 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..f5a80edf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=8u l=3.12u ng=16 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=8u l=3.12u ng=16 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=8u l=3.12u ng=16 m=1 +.ends C03_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ca5fca88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f12 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f13 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f14 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM1_f15 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f12 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f13 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f14 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM2_f15 Y Y VSS VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f12 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f13 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f14 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +XM3_f15 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=3.12u +.ends C03_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..39d0af5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.84 +echo vout_test = 0.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..27a5d8bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW2_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C03_ihp130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 2.08, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 2.08, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 2.08, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.85 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2d4e356bd97263f8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..dcf66b89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4d06a0d5dca3a3f1dfe69b1b7f247dc1da9cda1e448baae3fda08e474234cb86", + "qualification.json": "d50a5287c9db52161f06142aa60e0930d00fd12150ca203d1c27991e726ece04", + "specs.json": "d02e202bd88282eb6a2b5751728138fa246ebc31f379c0f932751d26a4d8dc5f", + "target.spice": "d980910653e2a9fd5b7bd11ddd7dd06c99fbff159d09eff65e0eab96871d648f", + "target_lvs.spice": "c3e34d435c013d50b13bcd5407e19a9f7ad25ed351038709b8edd8a7762bdf4a", + "testbench.spice": "0eb9215cf85ee68d8146837e406aae25fb3f12288f75dc8372ae86c3d7c2b86f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..bb0de4b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW2_sL1", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.08, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2d4e356bd97263f8", + "mirror_pass1": { + "vmin": 0.5092047, + "status": "passed", + "vout_test": 0.85 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6092 + }, + "_frozen_from": { + "schematic": { + "err": -0.0958015, + "vmin": 0.5092047 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.3, + "schematic_measures": { + "iout_t": 1.808397e-05, + "err": -0.0958015, + "vmin": 0.5092047, + "dev_at_vdd": 0.09448254, + "gout_t": 9.114522e-08, + "rout_t": 10971530.0, + "vout_test": 0.85, + "rout_nom": 10971530.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..e0bd4a25 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.6092 + }, + "_frozen_from": { + "schematic": { + "err": -0.0958015, + "vmin": 0.5092047 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..ddf12e86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW2_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=8u l=2.08u ng=16 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=8u l=2.08u ng=16 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=8u l=2.08u ng=16 m=1 +.ends C03_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..f14ad866 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_ihp130_sW2_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f12 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f13 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f14 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f15 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f12 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f13 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f14 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f15 Y Y VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f12 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f13 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f14 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f15 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C03_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..74a83708 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.85 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.85 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.85 +echo vout_test = 0.85 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..1a5d71e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_ihp130_sW2_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C03_ihp130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 4.16, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 4.16, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 4.16, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1, + "vout_test": 0.85 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74f359119e81f700", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..3ff1b6b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4d239bf8265214c4ad25bff888ec81a840e4d12fcd3e133ea1bdbc6de745fe18", + "qualification.json": "446a7032423e206b616d1250fd1b2914f5e16e584b645d9fe1e69ae70030cda7", + "specs.json": "a866458bf3878eeb60e4e3c3a2cfb29f3b9cd37319d21e66748c468ba989efc5", + "target.spice": "75c94a02b9ce2c5898f908d6c0243d36cc165b9026a78e04e72bcb1f1d6279db", + "target_lvs.spice": "14f69b9e8330e66be5c5aeec0cbf64b69cf69ea7a4a93075820d67ad9996ab8f", + "testbench.spice": "73c060e6403063d4ad2b76bdf670afda895bb5b3008e7f62b789c64df23b40ac" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..78cc16c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_ihp130_sW2_sL2", + "circuit_id": "C03", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 2.08, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 4.16, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74f359119e81f700", + "mirror_pass1": { + "vmin": 0.4913955, + "status": "passed", + "vout_test": 0.85 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.5914 + }, + "_frozen_from": { + "schematic": { + "err": -0.0655975, + "vmin": 0.4913955 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.5, + "schematic_measures": { + "iout_t": 1.868805e-05, + "err": -0.0655975, + "vmin": 0.4913955, + "dev_at_vdd": 0.06490927, + "gout_t": 4.967715e-08, + "rout_t": 20130090.0, + "vout_test": 0.85, + "rout_nom": 20130090.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..fdad4c57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.5914 + }, + "_frozen_from": { + "schematic": { + "err": -0.0655975, + "vmin": 0.4913955 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.78 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..1b4328ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_ihp130_sW2_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sg13_lv_nmos w=8u l=4.16u ng=16 m=1 +XM2 Y Y VSS VSS sg13_lv_nmos w=8u l=4.16u ng=16 m=1 +XM3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=8u l=4.16u ng=16 m=1 +.ends C03_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..416a3389 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_ihp130_sW2_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f1 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f2 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f3 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f4 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f5 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f6 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f7 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f8 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f9 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f10 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f11 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f12 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f13 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f14 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM1_f15 IIN1 Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f0 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f1 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f2 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f3 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f4 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f5 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f6 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f7 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f8 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f9 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f10 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f11 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f12 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f13 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f14 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM2_f15 Y Y VSS VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f0 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f1 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f2 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f3 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f4 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f5 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f6 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f7 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f8 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f9 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f10 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f11 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f12 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f13 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f14 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +XM3_f15 IOUT1 IIN1 Y VSS sg13_lv_nmos w=0.5u l=4.16u +.ends C03_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..61b4cf6e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.85 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.85 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.85 +echo vout_test = 0.85 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..31f9a391 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C03_sky130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.8, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.8, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.8, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.41 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a82dc8d176e418ba", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..3d1c2075 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a944a6146519be779e994543a365de55aa2fdb18dffd6c0361b886469e7b2547", + "qualification.json": "163ec642026ccd4c99f6cbe9a451e2daedad54372adf1680c4b3be5b231467bb", + "specs.json": "b0577aef81a780311cbf517272412703b364bb496ea1dd25365cb3281cda704e", + "target.spice": "d29e524cb509e68348db9a5631c3740f29ecc6dff084f32b63e32ea857ebacc1", + "target_lvs.spice": "de54920167c550749b7a538b75d0e8d3049550ec40492bf0ea7f02e6296eba8d", + "testbench.spice": "ffa140d442dc3e8408c8cdb9d3cb3f3ea73446f3656c42feb7c03fbb090dea51" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..041fae8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW0.5_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.8, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a82dc8d176e418ba", + "mirror_pass1": { + "vmin": 1.018252, + "status": "passed", + "vout_test": 1.41 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.118 + }, + "_frozen_from": { + "schematic": { + "err": -0.053443, + "vmin": 1.018252 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 20.8, + "schematic_measures": { + "iout_t": 1.893114e-05, + "err": -0.053443, + "vmin": 1.018252, + "dev_at_vdd": 0.05303414, + "gout_t": 4.862011e-08, + "rout_t": 20575750.0, + "vout_test": 1.41, + "rout_nom": 20575750.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..693c8e33 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.118 + }, + "_frozen_from": { + "schematic": { + "err": -0.053443, + "vmin": 1.018252 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..cf09182f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.8 nf=4 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.8 nf=4 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=2 l=1.8 nf=4 +.ends C03_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..25d228a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +.ends C03_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..cbb13103 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.41 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.41 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.41 +echo vout_test = 1.41 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..c97f246e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C03_sky130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.2, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.37 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "284a079fce6f5248", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..2b0050e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7f242addf363ea5d0b0f0ed8b574584ec56ed81c00387c1ce6be62a92815de4d", + "qualification.json": "6386d8169056ab93995e3a679c39043b70bb82500a84202bf44a28222942e23c", + "specs.json": "46c814c62837b2ec6854453e05a3f70177214f7e033fdb8865d8070a5837488c", + "target.spice": "e1fc5c6866029fdb3360dfcdf1619987f52d06b092f5324647ee52d7c364cbf7", + "target_lvs.spice": "07764facb1fbc9510ed4a1dddf1e1973e3fecbe585dcdb9398259c684f2979ed", + "testbench.spice": "ec45df741ad092f2c901ac1e439fc272eaf804e3166438e253d3533584af4bee" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..361b7d53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW0.5_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "284a079fce6f5248", + "mirror_pass1": { + "vmin": 0.944352, + "status": "passed", + "vout_test": 1.37 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.044 + }, + "_frozen_from": { + "schematic": { + "err": -0.0576435, + "vmin": 0.944352 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.2, + "schematic_measures": { + "iout_t": 1.884713e-05, + "err": -0.0576435, + "vmin": 0.944352, + "dev_at_vdd": 0.05727683, + "gout_t": 2.995324e-08, + "rout_t": 33389350.0, + "vout_test": 1.37, + "rout_nom": 33389350.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..17c35670 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.044 + }, + "_frozen_from": { + "schematic": { + "err": -0.0576435, + "vmin": 0.944352 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..51dbac8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +.ends C03_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..42f0adc7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_sky130_sW0.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C03_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..992087af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.37 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.37 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.37 +echo vout_test = 1.37 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..84d705d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C03_sky130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.4, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.4, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 2.4, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.45 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5f86b0c35341a71a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..1296f1f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a5050966cc653eb82b5a81a50e4e3c1252f34410056d4ecd63822d09cfbb68eb", + "qualification.json": "866d1e49e1e3d7b2f02031cbbadc51bd2cd2ae3f23095d87e8b04fc6291967c7", + "specs.json": "cb07d13726fc8e9e842c2fb52af2457624067beb7121fabc70d4afda18f0a9ae", + "target.spice": "5c950d96ff9e7a4563dd7647aba9a06a174b7dc9c35878efe2d45b21d5ce99a0", + "target_lvs.spice": "fb4945008aee77920d8f66fa1dd857d1cf9cf44dd3cd3c66df3899c19e06c309", + "testbench.spice": "466380a2bf498ac4d735868d276f79281d87d24cd90a13c64626c79b4cdae539" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..cc242b45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW0.5_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 2.4, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5f86b0c35341a71a", + "mirror_pass1": { + "vmin": 1.092726, + "status": "passed", + "vout_test": 1.45 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.17 + }, + "_frozen_from": { + "schematic": { + "err": -0.0451645, + "vmin": 1.092726 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.5, + "schematic_measures": { + "iout_t": 1.909671e-05, + "err": -0.0451645, + "vmin": 1.092726, + "dev_at_vdd": 0.04462777, + "gout_t": 1.082491e-07, + "rout_t": 9243799.0, + "vout_test": 1.45, + "rout_nom": 9243799.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..9008e944 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.17 + }, + "_frozen_from": { + "schematic": { + "err": -0.0451645, + "vmin": 1.092726 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..fcdc7d87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=2.4 nf=4 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=2.4 nf=4 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=2 l=2.4 nf=4 +.ends C03_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..98adf80f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C03_sky130_sW0.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +.ends C03_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..42a2f2da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.45 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.45 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.45 +echo vout_test = 1.45 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..fdc0a3fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C03_sky130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.8, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.8, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.8, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.31 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ad62c7bd943afc81", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..162296ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "823096b9542926720bfd7ffb033571fc77c48dd0c95ee46ab28f47580e97709f", + "qualification.json": "df8fd1847b48113b7bc916cbff55ab1764620046b48ba950e69ff506114d2ed2", + "specs.json": "4453d0567a4999c3acf0d0893d89fc9889b4eaff4451d3741b3734fc4764115f", + "target.spice": "3d17a5413c401a66f7a17ea2c45cfd6a7c5e2053410a177b3d5937a5b35b19aa", + "target_lvs.spice": "2a3f9e15e812a133c74569709c1e892a89aa81bcd5d22607f2386ab1db2e858b", + "testbench.spice": "00e26b190ce71ba7c2f9fcae0f41b03599e80be500faf9e16a8819dc8ed79b86" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..9550a8f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1.5_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.8, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ad62c7bd943afc81", + "mirror_pass1": { + "vmin": 0.8145786, + "status": "passed", + "vout_test": 1.31 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9146 + }, + "_frozen_from": { + "schematic": { + "err": -0.064108, + "vmin": 0.8145786 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.4, + "schematic_measures": { + "iout_t": 1.871784e-05, + "err": -0.064108, + "vmin": 0.8145786, + "dev_at_vdd": 0.06380109, + "gout_t": 1.627051e-08, + "rout_t": 61461280.0, + "vout_test": 1.31, + "rout_nom": 61461280.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..9093ef5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9146 + }, + "_frozen_from": { + "schematic": { + "err": -0.064108, + "vmin": 0.8145786 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..0f6c9d46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.8 nf=12 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.8 nf=12 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=6 l=1.8 nf=12 +.ends C03_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1a03e5f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +.ends C03_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..1caece8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.31 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.31 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.31 +echo vout_test = 1.31 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..e3929e79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C03_sky130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.2, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.29 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "74eae343c490b5c3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..e70c5330 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "474b1a326978ede8974278e81e49dffdcc1b2f11e494a6f932e1eab8c967be5a", + "qualification.json": "496520aba936277ac97be316f652e45dd7a6d320e58d981541e060723ee70440", + "specs.json": "bf3d5d5b1b45b8c2af0386b56c99d080caedde11dd44911fc46bc0f63e3e4651", + "target.spice": "8ff58e7501f69c36fcf8060946fd13a063255608168be63a22e31b814370d9ba", + "target_lvs.spice": "053043ab48d79c4848a7a9b53e1232dffbc0988c00e272002e78f076a53c130e", + "testbench.spice": "41adbdf8be72a4ed6df9c8ab5e636f32ef106391523ebebeaa69f9e5eedbbd5b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..8e3b4ae3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1.5_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "74eae343c490b5c3", + "mirror_pass1": { + "vmin": 0.7792565, + "status": "passed", + "vout_test": 1.29 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.8793 + }, + "_frozen_from": { + "schematic": { + "err": -0.067462, + "vmin": 0.7792565 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.7, + "schematic_measures": { + "iout_t": 1.865076e-05, + "err": -0.067462, + "vmin": 0.7792565, + "dev_at_vdd": 0.06715289, + "gout_t": 1.602318e-08, + "rout_t": 62410420.0, + "vout_test": 1.29, + "rout_nom": 62410420.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..3759be09 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.8793 + }, + "_frozen_from": { + "schematic": { + "err": -0.067462, + "vmin": 0.7792565 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..7442dca2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +.ends C03_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..55da9fab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_sky130_sW1.5_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C03_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..bab48982 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.29 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.29 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.29 +echo vout_test = 1.29 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..7e4caa55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C03_sky130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 2.4, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 2.4, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 2.4, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.32 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "2cd6f97b3bbc6b7d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..fae6dd41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3e9bad0a0472f439e9091a86480909a34c2195efd87391d4e0b6041ba420e82e", + "qualification.json": "71a15d48874c55a6b791a5c2dba4596e0bf45461fef3d7615b6923ffb2b086a6", + "specs.json": "e83d3499093b5a02e70a8f3fac5b75967a8ad74b98c3b872b23db30f6d22c529", + "target.spice": "949c3683373ed1005d94791e37ed9808e0f386f98f990d456f2b5330a6a603a7", + "target_lvs.spice": "6e4e011501ab4796992541631feffe8de6a0c0eebad0500240aa682ac6837b39", + "testbench.spice": "cb1bd4848480cee64255d79604dcb1422314b2c8d4a9ab3cdec22c537b813af8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..c93dddcc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1.5_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 2.4, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "2cd6f97b3bbc6b7d", + "mirror_pass1": { + "vmin": 0.8451094, + "status": "passed", + "vout_test": 1.32 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9451 + }, + "_frozen_from": { + "schematic": { + "err": -0.053092, + "vmin": 0.8451094 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.4, + "schematic_measures": { + "iout_t": 1.893816e-05, + "err": -0.053092, + "vmin": 0.8451094, + "dev_at_vdd": 0.05285044, + "gout_t": 1.405508e-08, + "rout_t": 71151010.0, + "vout_test": 1.32, + "rout_nom": 71151010.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..c1e8b86c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9451 + }, + "_frozen_from": { + "schematic": { + "err": -0.053092, + "vmin": 0.8451094 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..24ec471f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=2.4 nf=12 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=2.4 nf=12 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=6 l=2.4 nf=12 +.ends C03_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..a5500b4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C03_sky130_sW1.5_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +.ends C03_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..25516f0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.32 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.32 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.32 +echo vout_test = 1.32 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..c5aa961a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C03_sky130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.8, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.8, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.8, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.34 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "291f97cbcd18eec2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..88b298f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "aca4a0d9a5882a5517ccd5ec302aa3d906a0911a83c818859db98d2e28ce04cf", + "qualification.json": "fa32411ed6a626dd5d5d3ad7848c8949fe87e636ed338e7fc2a0ed44b5b94dc8", + "specs.json": "471778d16df10609c7bee98b226b10b92b807ef0d6907b3eeda1e9712e5cd336", + "target.spice": "b52d91a84ec0623343d0437f77b45cea2dfa3c5cba844d902454c8a13b52507e", + "target_lvs.spice": "bc5bc907b962f4becffffd85aae1ef2e8d5528a081b6022e10d26d2a41fc93e0", + "testbench.spice": "f8f70de03aaddb59b88c7709e66c9406ef42f5fa0241882f9402fa2793f0c9b0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..aa49dd06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.8, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "291f97cbcd18eec2", + "mirror_pass1": { + "vmin": 0.8733776, + "status": "passed", + "vout_test": 1.34 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9734 + }, + "_frozen_from": { + "schematic": { + "err": -0.059348, + "vmin": 0.8733776 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.5, + "schematic_measures": { + "iout_t": 1.881304e-05, + "err": -0.059348, + "vmin": 0.8733776, + "dev_at_vdd": 0.05904376, + "gout_t": 1.907403e-08, + "rout_t": 52428960.0, + "vout_test": 1.34, + "rout_nom": 52428960.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..93a94a31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9734 + }, + "_frozen_from": { + "schematic": { + "err": -0.059348, + "vmin": 0.8733776 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..d2ee29ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.8 nf=8 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.8 nf=8 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=4 l=1.8 nf=8 +.ends C03_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7d38b0a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_sky130_sW1_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +.ends C03_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..6aa3923c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.34 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.34 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.34 +echo vout_test = 1.34 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..c6b564b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C03_sky130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.2, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.31 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "23d4d2bffd33d197", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..34feb5de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9213a53ba1610ec6284fa88cdef2ba7e17ce6c3a29c804cf070fa9dd9cf6fb1c", + "qualification.json": "b2d346e17dd9d5bd86123f91b25db7c82c59e5da83c4df7cca1a3ce8faca0edd", + "specs.json": "84c0e7fdeedc5b1d38fa921208f96bb4c1c9c7ddeafed7ee1adf916279ce6e22", + "target.spice": "eef487322e1bf8a9bc0e514f12830c5e3456112641911548c141f543665cff83", + "target_lvs.spice": "d513bd218554f8e0a954fc9ca8b4e90c7624759878dc522d978c2294c7333a0f", + "testbench.spice": "d81bfc4f70e68e399859cab248a157238deb87deed5671d51f61466f0f55f32d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..9b5b973c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "23d4d2bffd33d197", + "mirror_pass1": { + "vmin": 0.8278448, + "status": "passed", + "vout_test": 1.31 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9278 + }, + "_frozen_from": { + "schematic": { + "err": -0.0631645, + "vmin": 0.8278448 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 14.1, + "schematic_measures": { + "iout_t": 1.873671e-05, + "err": -0.0631645, + "vmin": 0.8278448, + "dev_at_vdd": 0.06285188, + "gout_t": 1.813997e-08, + "rout_t": 55127510.0, + "vout_test": 1.31, + "rout_nom": 55127510.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..434c5105 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9278 + }, + "_frozen_from": { + "schematic": { + "err": -0.0631645, + "vmin": 0.8278448 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..b434cd1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +.ends C03_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..f8a06d93 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_sky130_sW1_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C03_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..1373b0b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.31 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.31 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.31 +echo vout_test = 1.31 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..c965598d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW1_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C03_sky130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.4, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.4, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 2.4, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.36 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0aefeceb302adf47", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..03904f46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "48f83bd43a570319e1cbe33e673248881f4c62efc349bb9122415f525d1bd503", + "qualification.json": "e063a6742d4a5e8ce719f2932dc8ddbdc0c926acb9944df61be65e992f62005c", + "specs.json": "758aa9054c289d48f9e4d2afb6d9aa883788fb665ece319a939206001a9cc211", + "target.spice": "724d51b6d03577a3cec453e81d7282a134783884cf0f13f067d8f63fc64e8619", + "target_lvs.spice": "ac40916475dc91a18d2d3bdf1aed2fa313776274d344733427c8197c9d9cf020", + "testbench.spice": "b73c3e7a8858b3a3a50625dba97cdfc5d1b34376f307145348ba6882bee1ca21" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..9d201041 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW1_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 2.4, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0aefeceb302adf47", + "mirror_pass1": { + "vmin": 0.9165947, + "status": "passed", + "vout_test": 1.36 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.017 + }, + "_frozen_from": { + "schematic": { + "err": -0.0493415, + "vmin": 0.9165947 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 20.7, + "schematic_measures": { + "iout_t": 1.901317e-05, + "err": -0.0493415, + "vmin": 0.9165947, + "dev_at_vdd": 0.04909291, + "gout_t": 1.889715e-08, + "rout_t": 52922570.0, + "vout_test": 1.36, + "rout_nom": 52922570.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..7a384f31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.017 + }, + "_frozen_from": { + "schematic": { + "err": -0.0493415, + "vmin": 0.9165947 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..bd679f52 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW1_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=2.4 nf=8 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=2.4 nf=8 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=4 l=2.4 nf=8 +.ends C03_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..dd780941 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C03_sky130_sW1_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +.ends C03_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..717ba468 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.36 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.36 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.36 +echo vout_test = 1.36 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..3cf14a2a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C03_sky130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.8, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.8, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.8, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.29 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5344a87aa48d26c8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..54f6e8ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "adda95e5634eed7ad262117949d131ced633f1925ed1aa8349a8c2e3513f70ee", + "qualification.json": "f819015101cc69b6c4733b381a6c509ab4ff8a80298978f6823988e1a61ec843", + "specs.json": "7bd8732627086d8451172ed2d2953e3dea79e2c800be5021612935a5fb5786da", + "target.spice": "9c5ef38dbc3138672b1b09d58fc43ad44b2ae8fd9011b40cfed96c7bfa98de26", + "target_lvs.spice": "2ef5b67bb9ff293366f1682f18ffa44261c4fdf439dea8448a568f6dca33ce51", + "testbench.spice": "c2655d99b6d41dc72cec9f64e323fd0c02fdb6db481d476402ad8d2a11d495ec" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..3e6c2932 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW2_sL1.5", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.8, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5344a87aa48d26c8", + "mirror_pass1": { + "vmin": 0.7809883, + "status": "passed", + "vout_test": 1.29 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.881 + }, + "_frozen_from": { + "schematic": { + "err": -0.068048, + "vmin": 0.7809883 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.863904e-05, + "err": -0.068048, + "vmin": 0.7809883, + "dev_at_vdd": 0.06772667, + "gout_t": 1.563482e-08, + "rout_t": 63960370.0, + "vout_test": 1.29, + "rout_nom": 63960370.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..9d39dcef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.881 + }, + "_frozen_from": { + "schematic": { + "err": -0.068048, + "vmin": 0.7809883 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..e995030f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.8 nf=16 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.8 nf=16 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=8 l=1.8 nf=16 +.ends C03_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6a38f712 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_sky130_sW2_sL1.5 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f12 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f13 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f14 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM1_f15 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f12 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f13 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f14 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM2_f15 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f12 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f13 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f14 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +XM3_f15 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.8 +.ends C03_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..c32ad188 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.29 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.29 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.29 +echo vout_test = 1.29 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..fd968fcf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW2_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C03_sky130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.2, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.28 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "56ac4688540b57a4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..9dfb22b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7a1f572790730da8b7cb4da405fd6b44d542cbd2e2ce8495ac3d545eec007960", + "qualification.json": "3e5a21d08c4f153b9c83cb785cd03a9881998835dd86b917e54e64a00824e799", + "specs.json": "ee26a4d6990c252f57e64583946abd091cf42b0f41d3beabd9888e02a7c4c8f5", + "target.spice": "08c4904e45af4939f66363c635b214a5337f366df68eeab40de540ef1a765cc6", + "target_lvs.spice": "70e2ae84405465cd583dcba8dafe2cbdf4a7adfeaa234d2824350e6226bd199f", + "testbench.spice": "23014c4ee7b225995bebd6e183a3a872fb759923b966ebf0edb3c2cdff761f04" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..9ec05ce9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW2_sL1", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "56ac4688540b57a4", + "mirror_pass1": { + "vmin": 0.7507061, + "status": "passed", + "vout_test": 1.28 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.8507 + }, + "_frozen_from": { + "schematic": { + "err": -0.070958, + "vmin": 0.7507061 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.2, + "schematic_measures": { + "iout_t": 1.858084e-05, + "err": -0.070958, + "vmin": 0.7507061, + "dev_at_vdd": 0.07064225, + "gout_t": 1.540003e-08, + "rout_t": 64935570.0, + "vout_test": 1.28, + "rout_nom": 64935570.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..e83b9351 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.8507 + }, + "_frozen_from": { + "schematic": { + "err": -0.070958, + "vmin": 0.7507061 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..b787f21b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW2_sL1 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +.ends C03_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..27589674 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_sky130_sW2_sL1 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f12 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f13 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f14 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f15 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f12 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f13 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f14 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f15 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f12 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f13 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f14 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f15 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C03_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..d8079947 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.28 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.28 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.28 +echo vout_test = 1.28 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..83acd1a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/case.json @@ -0,0 +1,123 @@ +{ + "case_id": "C03_sky130_sW2_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C03_sky130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 2.4, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 2.4, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 2.4, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1, + "vout_test": 1.3 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "75af9ca34d6fb9fd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..00f8bd4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "92c23b477ba9467fee95f072932ea311d3ddb0a1eaadfc5b5997a016ac511fcb", + "qualification.json": "d10ddf2a8100fd10e5c52c9c485cfb958cee699e18b3474fc01c5fc34b4ae722", + "specs.json": "c96a58e103c35cbcc1b1cf442a04d9ad131d8c61a10a075acdfb315b542bc5db", + "target.spice": "658e1904a70054822e6493ec0ddeea3da25b236cc7c8b54e0f7145a1bd0cf127", + "target_lvs.spice": "ca56b60d76b7b00939723d61a6f33de1b1e8cb64adc5b371aa8a981b0cadb159", + "testbench.spice": "49a811a956635b92be803472e3105ac8ddd79f8e6d2522a4c030a98c41b36443" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..e570c3f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/qualification.json @@ -0,0 +1,103 @@ +{ + "case_id": "C03_sky130_sW2_sL2", + "circuit_id": "C03", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 1.2, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 2.4, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "75af9ca34d6fb9fd", + "mirror_pass1": { + "vmin": 0.8043552, + "status": "passed", + "vout_test": 1.3 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9044 + }, + "_frozen_from": { + "schematic": { + "err": -0.0562665, + "vmin": 0.8043552 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.4, + "schematic_measures": { + "iout_t": 1.887467e-05, + "err": -0.0562665, + "vmin": 0.8043552, + "dev_at_vdd": 0.05602016, + "gout_t": 1.274017e-08, + "rout_t": 78492470.0, + "vout_test": 1.3, + "rout_nom": 78492470.0, + "ok_at_vdd": 0.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..9244447f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 0.9044 + }, + "_frozen_from": { + "schematic": { + "err": -0.0562665, + "vmin": 0.8043552 + }, + "floors": { + "err": { + "abs_max": 0.1 + }, + "vmin": { + "max": 1.1700000000000002 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..3196cd66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target.spice @@ -0,0 +1,5 @@ +.subckt C03_sky130_sW2_sL2 VSS IIN1 IOUT1 +XM1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=2.4 nf=16 +XM2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=2.4 nf=16 +XM3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=8 l=2.4 nf=16 +.ends C03_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..8a05baa5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C03_sky130_sW2_sL2 VSS IIN1 IOUT1 +XM1_f0 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f1 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f2 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f3 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f4 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f5 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f6 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f7 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f8 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f9 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f10 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f11 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f12 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f13 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f14 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM1_f15 IIN1 Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f0 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f1 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f2 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f3 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f4 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f5 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f6 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f7 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f8 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f9 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f10 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f11 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f12 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f13 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f14 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM2_f15 Y Y VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f0 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f1 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f2 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f3 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f4 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f5 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f6 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f7 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f8 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f9 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f10 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f11 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f12 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f13 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f14 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +XM3_f15 IOUT1 IIN1 Y VSS sky130_fd_pr__nfet_01v8 w=0.5 l=2.4 +.ends C03_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..84f0676d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C03/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,25 @@ +X1 VSS IIN1 IOUT1 C03_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +.nodeset v(IIN1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.3 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.1 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.3 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.3 +echo vout_test = 1.3 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..60cdc4d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C04_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.84, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "226afc0f6f4023b3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..cb08b9d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b6bb0189ef7fce2257a2a0c3e2518cb72c9ef62b70c36f6001b404791487b288", + "qualification.json": "97e5113017ccc59c26fcebac015c19f2bfef78a065513930a37e95b582d316de", + "specs.json": "35c254eec5e1e19b802736a5dd8e026050f3e765ba9dabff0188d4b76bccded9", + "target.spice": "c003ae643dda5a5973d3ffb8d7aa8d4a198dfe8180194ddb477689a804e46ed6", + "target_lvs.spice": "84ffdc85b5dd55592ee77ce1273ffa220f4b3549f44be8d626a8ed2bdda0873a", + "testbench.spice": "4ebc4f267d4968e922686de278a7e2d940ea483f18df2137dab9260286180e91" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..bbfadbb3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "226afc0f6f4023b3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.71 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.71032, + "f3db": 1338737.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.20415, + "vin0": 1.20415, + "idd": 2.048337e-05, + "gain_lf": 37.71032, + "f3db": 1338737.0, + "ugf": 103237300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..06fbb187 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.71 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.71032, + "f3db": 1338737.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..6097f8de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +.ends C04_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d648a12b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C04_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..33ed71b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..ef8c936b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C04_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.56, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9720970bb1f7ebca", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..0347430d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9fc315b88bc5e63816313fb50faf253f66fefa10441cace9a2ba68ff7e0dabc7", + "qualification.json": "d8a23f78cdaae0801eb421d8bec4539d8c45802d39902c8354d499cbdd8e4845", + "specs.json": "650850212dc284f80095066a5406b38592fa32c2eadd6841110db734bf111b08", + "target.spice": "3c2f27651f66e8fcc57e09f535686d63f763262d94870b770da8b1ca6e058757", + "target_lvs.spice": "32dc9b280dbc8d196d97b6d09c72e91a39815d94c11e157d09208a4ea2732c9f", + "testbench.spice": "43fae1edc565dbe1f0d574cb297d2541c89746345c37d242a1438c9f182dee57" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..bc584d9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9720970bb1f7ebca", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.98 + }, + "f3db": { + "min": 1364000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.97751, + "f3db": 2273552.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.096757, + "vin0": 1.096757, + "idd": 2.077341e-05, + "gain_lf": 34.97751, + "f3db": 2273552.0, + "ugf": 127908600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4779bd0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.98 + }, + "f3db": { + "min": 1364000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.97751, + "f3db": 2273552.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..d722d118 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +.ends C04_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..d168b183 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C04_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..077947e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..c15829c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C04_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ff8468bd000fb2c3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..d350af3d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "69d6ef3f3fd192a1f28a2c8260f3eddc86f6df28d70b3f6a8eba8c8d68511140", + "qualification.json": "03995045952d321afa891d95812ac75e0c8cbac39e1ba534d4bf7eb35e4ea188", + "specs.json": "7c7b5fb9c5e70b6a63635da0e7bd2b12cf8188b59ebda56fe1fc43d2505131d6", + "target.spice": "0efd7e973444d4aa40f365037fadc0df27a9a0c738c93a99b07fc54da9f3f48f", + "target_lvs.spice": "4c61c3efc8d7d2bb8a8dfe011dc8cd2179974b5892601e51797980811a921df2", + "testbench.spice": "ff899e033c56bc7f91ae8a529773c4eea414b51a325819da7dd7e4d37325acf0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..bace69c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C04_gf180_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ff8468bd000fb2c3", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "f3db=9.953e+05 below floor 1e+06" + ], + "spec": { + "gain_lf": { + "min": 36.06 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.06276, + "f3db": 995268.4 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.295546, + "vin0": 1.295546, + "idd": 2.048308e-05, + "gain_lf": 39.06276, + "f3db": 995268.4, + "ugf": 89599820.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..18ec7bd5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.06 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.06276, + "f3db": 995268.4 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..5b33b3ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C04_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e240aa9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C04_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..41c265b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..9867c6a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C04_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.84, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b7e1596f18559e41", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..7c894106 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "822584fbbbdcaf780648306957e2a39a2a35d821ee8f7b36d5c541069d3afdc4", + "qualification.json": "88ea542aae5d6ca5901da5c7af2fdf1f413a4d9322110530e5dfc1c23b287fe0", + "specs.json": "6ee3d39cb34f4c80d95b7f4de9c1188ae6ae0a44f8b531c3f6e7f1cce39dd7c0", + "target.spice": "70ab9004fbd85c7afda061fcb423e8a57270a71d7c047b1b47043ba05d82654e", + "target_lvs.spice": "3d08b88ebfb0916cd949cae12b83ff788ce15337c2e32d48e744fa542b00deb9", + "testbench.spice": "031a86af30974ae64afbe0e6c3dcf5a0d95c8c6b57a90932daa72224dacd270c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..4ea46edf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b7e1596f18559e41", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.7 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.70021, + "f3db": 1455363.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9561736, + "vin0": 0.9561736, + "idd": 2.058442e-05, + "gain_lf": 41.70021, + "f3db": 1455363.0, + "ugf": 177737900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..16a1c84f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.7 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.70021, + "f3db": 1455363.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..1ca3f677 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +.ends C04_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..621ec4eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C04_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..f59c1f19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..11fa7789 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C04_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.56, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "834dbe4cf1c65d82", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..62cec3a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0ea0a7e1301bf52128c46d433862df079ad641c586a569144cc9b4c11bf2a696", + "qualification.json": "4400040a6704ea8386f02c7116e49a3d4772c0a48d330e060ac8f342663baf06", + "specs.json": "e6adf8d89ffdfbdd87099d9049a70ae5a7b41b578d99b9492ba907a130c56639", + "target.spice": "3578eb6663cdd4b7d2f7f17d59d7fee91afe98e7b7f2f89de7b3168d3684ba83", + "target_lvs.spice": "493e24de87ff3d6a9f245dfb72b2fbd0585e9bed02304a9534058efed05d9b19", + "testbench.spice": "34d260e8538b8ffaecf9eea7eb51d05e5367627e2b662f6e24ebaef769d06eb3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..a82a3809 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "834dbe4cf1c65d82", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.44 + }, + "f3db": { + "min": 1608000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.43946, + "f3db": 2679591.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9008991, + "vin0": 0.9008991, + "idd": 2.180169e-05, + "gain_lf": 38.43946, + "f3db": 2679591.0, + "ugf": 224676300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..0a1eb475 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.44 + }, + "f3db": { + "min": 1608000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.43946, + "f3db": 2679591.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..f3b7e6eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +.ends C04_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..03fa60c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C04_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..91f1fdf6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..827ba949 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C04_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac9c00f6ba32d8e6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..79b4aef8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "632f791ffab925b5c53292b984318fa87e6ce06558eb9a92d6c9912fd275181c", + "qualification.json": "202035633c183183a45df4500f7d4ed96e3ab9e2dde1fa94ec6ce9ecaab887e6", + "specs.json": "badeeb223f02f3b0237dfba8c01e635492c545b59bd8d2d7fb88e3abe777729e", + "target.spice": "f85fa043cbf4bdbbed8cfd16ed4b3f24159998cc1a09b7a7f10ccfb6fb8fce45", + "target_lvs.spice": "22bee181e7033db34899098092219f0da9477d3e28114a6fccf34da68ef58c32", + "testbench.spice": "40c9f533f3026ad1f17edff2437cda5cbd79580985dfdde79a0f06639f7dae23" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..4b27a116 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac9c00f6ba32d8e6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 40.26 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.26178, + "f3db": 1043772.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.00573, + "vin0": 1.00573, + "idd": 2.025167e-05, + "gain_lf": 43.26178, + "f3db": 1043772.0, + "ugf": 152947800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..8b0819ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 40.26 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.26178, + "f3db": 1043772.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..714aa692 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C04_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..9c6cefda --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C04_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..dd7a4b0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..9dd82c67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C04_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eb31a3b03ab1e1f1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..bd54b10f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "15694cc5f4984f0b4aaf11450cf8f9413a2bb718fb22ce9f31ba8aa38913edca", + "qualification.json": "325b1dd51e16fc9f64fa19220745d8a6ee4bf20647ec870476523dd62d424c53", + "specs.json": "650889df7ccc9fb35b9e81cc9522211997680e027c4b2d9b5dcd2d6b1a8596b9", + "target.spice": "dd0eb4ece9d66aff85a908187065fd00971cac0a9bc35fd13a52ef652d09742d", + "target_lvs.spice": "381f0c4316c0230ca4fa72a070b6bbc63df3062eb65be2bf33b3e468e84c3764", + "testbench.spice": "be0e82c15b253eadb06a28bbad7dfbafabd949a12bd75f572c616581c0fa6e75" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..2104be37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eb31a3b03ab1e1f1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.42 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.4152, + "f3db": 1400763.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.029848, + "vin0": 1.029848, + "idd": 2.043086e-05, + "gain_lf": 40.4152, + "f3db": 1400763.0, + "ugf": 147613000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..23366a24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.42 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.4152, + "f3db": 1400763.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..7df0b9d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C04_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..70cfd945 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C04_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..7c826e71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..906fcdfe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C04_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1de1531581fde416", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..f4960239 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "00d57837ec42eb1713e33966dc0c2123cd66fe3c52dbdd80546c882337908cc0", + "qualification.json": "6ef8c5d26bb130c950e308a60de7410c7998b8a347390804f1e21c3e026ef103", + "specs.json": "efc983190c5700984bc13878ffb06b884d1967913bc6f39537d66ed1a4e34e26", + "target.spice": "d0e00e27cdb04a8957c9f63b6ed06f9f3fbbd01d4caf23a2b2e43c77d0e75add", + "target_lvs.spice": "b9b4dab203c5e269329e20f130d346e65bc39ffdfb0480156adcc147029d2624", + "testbench.spice": "4e5edda3bca58dd256f29cd404531dac80da34b3e0ff2d45e8aebeabf1f23bcc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..22258b31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1de1531581fde416", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.34 + }, + "f3db": { + "min": 1506000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.34011, + "f3db": 2510374.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9591849, + "vin0": 0.9591849, + "idd": 2.124699e-05, + "gain_lf": 37.34011, + "f3db": 2510374.0, + "ugf": 185593900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..e79a21d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.34 + }, + "f3db": { + "min": 1506000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.34011, + "f3db": 2510374.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..89ab54ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C04_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..95e68b30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C04_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..f860c35b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..d9d1f8ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW1_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C04_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7728496ffc2a1c2e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..74118f15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "164f7b810eca96db5cf1d3308584e707698b9801600cefcf5984ae3fe3a35fba", + "qualification.json": "19a6a6365b3a71cf6870bed97328a0b53f6f2b09cd208528eae97ed39e867a93", + "specs.json": "74024ec591bf68cf1280d8121a7b9be06e6eaec36a72d33a8f79feb9704a6168", + "target.spice": "c38eb11af0c21515829b354f2396d2ec22ef8979e5c1bfefce03c4a31472a4dc", + "target_lvs.spice": "9d9fd3d638e3fe74e00627505f11766d97eb501de7798b7cb860b9afd94b4a88", + "testbench.spice": "d79b1fe8a8f0459bb81cbda78872b4d20c6c41daa4f86b5a9b9d557c12fda238" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..b1cf0757 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW1_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7728496ffc2a1c2e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.93 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.92742, + "f3db": 1013506.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.091967, + "vin0": 1.091967, + "idd": 2.02447e-05, + "gain_lf": 41.92742, + "f3db": 1013506.0, + "ugf": 127029000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..32337c84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.93 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.92742, + "f3db": 1013506.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..2642160d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C04_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..1d2ad791 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C04_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..ac30ca9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..0da4a15e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C04_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2abf8061df3bc753", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..0d2aa0bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6dc4a2231ef215b8e7dca378540b52315e1ee9aa2d4ec59d399d4d285c8aa522", + "qualification.json": "85fa7db85ade1401d415e7c6a3723304d115c33e8f8247ca44873436f7978fda", + "specs.json": "04648158465b1aead8ba35a59ad55c2f8532fec167d169b422772d5f741c5465", + "target.spice": "d81ad3b3f9f63eb80aa112205b9a012c56aa9832d5509ac752bab0c5688713e7", + "target_lvs.spice": "8d0e677a471e893ab566b3f84d6ffd907a61d47941e011c8bccb1ba1de3ff6ed", + "testbench.spice": "e24b68c679c963571272e10f605b6ce8b1f9e2d78a5cdd1baf2086810252239f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..d4a74575 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2abf8061df3bc753", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 39.49 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.49499, + "f3db": 1495316.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9128714, + "vin0": 0.9128714, + "idd": 2.077108e-05, + "gain_lf": 42.49499, + "f3db": 1495316.0, + "ugf": 200476500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..55f97b38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.49 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.49499, + "f3db": 1495316.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..9a54f48d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C04_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..87c79a1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C04_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..d6cb9dec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..f4fbd7ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW2_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C04_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f26ae743bd8c1153", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..04a649c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "734458b622a1fe0b2de6f8391ad23dfee413a4efbc16058f589c499e5d7182e2", + "qualification.json": "748281a2ca59cdae217c46454ca89c6acf8797d589407bded4a11c0459527a91", + "specs.json": "d205ff35b0ed5b47cf81ea1c7e4dae4cf406ae8f41fea6dd55e7f437e5a5bd1c", + "target.spice": "86dc881c55cb20b04208866ea10ef2ef6521474087a9b9b123b3bc73f375fb4c", + "target_lvs.spice": "d5d7769aeb16406fc9ff4f0ec9ab23ce180a509e3707cbeb60f420a70358e709", + "testbench.spice": "ce349e24e2ae56ebf84b6774ff82c0c60056e11165b11a8bbf21f64600c504e1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..7cfc1a4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW2_sL1", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f26ae743bd8c1153", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.1 + }, + "f3db": { + "min": 1682000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.1024, + "f3db": 2803340.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8664028, + "vin0": 0.8664028, + "idd": 2.23145e-05, + "gain_lf": 39.1024, + "f3db": 2803340.0, + "ugf": 254032700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..1f14fa73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.1 + }, + "f3db": { + "min": 1682000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.1024, + "f3db": 2803340.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..409f073e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C04_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..7dbc6840 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C04_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..987fdeab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..4ce9772d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_gf180_sW2_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C04_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d9962e9042c54950", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..3e3047d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "455b0d9003607a99c55e8849580a30c86cc2088987aa59c3495136e8d7963bcf", + "qualification.json": "25da878756aca8592303ce61643c51f07a639550134ef752c053ac74a51c173b", + "specs.json": "8cdeac9d10c8185af3ccb30ab82f76e1b9b15836b1428a8d87f7437773d71585", + "target.spice": "701d9ad62728c9ecd560399a84392d33a3502dd3533e83f8e8f15ec7fc945ba4", + "target_lvs.spice": "745c85f5dc4a3ca1dbc1b3be2281ae157f473b75fcd62d6683a9434ae6cfb9f7", + "testbench.spice": "01fb5ffca377326f9aba2f5065b66e44bc93e48ff019113b677b44cd9450439b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..2a82d9f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_gf180_sW2_sL2", + "circuit_id": "C04", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d9962e9042c54950", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.09 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.09058, + "f3db": 1067028.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9551104, + "vin0": 0.9551104, + "idd": 2.031433e-05, + "gain_lf": 44.09058, + "f3db": 1067028.0, + "ugf": 172375100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..fd62f70f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.09 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.09058, + "f3db": 1067028.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..46a11af8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C04_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..4bb7f437 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C04_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..03daf2d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..aa496ade --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C04_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.39, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8b813574283ad134", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..bbba9107 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0e24ce57b438c0ea4eacba04e3dd542faee73ac33d0f3769236963062273e048", + "qualification.json": "47479cb2812b93d95e0a9676de7c5db1998108f3b747fec73526d880f36932f8", + "specs.json": "633b05e130be8e1f7847145e73382be58e950d3e36304bc022c2661002172bad", + "target.spice": "59e1385dc494b703118ba449d696ace79a5b6e5cec15d0914a228ef8ca07f898", + "target_lvs.spice": "f623d1698fd050c330037d12017f873d5b94e504d445f5a3c75522b229bec8cb", + "testbench.spice": "783ad4d1da9f7c8f4856acc0580530fb97bdd9df8884942a250a90458bc93e31" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..8b537db8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8b813574283ad134", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 21.77 + }, + "f3db": { + "min": 8830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.76924, + "f3db": 14717410.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5453245, + "vin0": 0.5453245, + "idd": 2.18489e-05, + "gain_lf": 24.76924, + "f3db": 14717410.0, + "ugf": 255338500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..9a1ca265 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 21.77 + }, + "f3db": { + "min": 8830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.76924, + "f3db": 14717410.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..e55dff6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +.ends C04_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..eb5a81cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C04_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a5ccbcd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..590a9028 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C04_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.26, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0945adf3afbcf5e8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..7f57bfb2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e5d855addfb29cf78f0b78709764d71ffac74147899b9cb91bbfcfcb0a20b580", + "qualification.json": "03332b78139a6e281d7a54e60dace329368556545a5526efec11a5078f951f6b", + "specs.json": "fc62973abaa8e7c3e64b3ad1e47d67e0e7f59e6494fe350c5780a09e9ff9de69", + "target.spice": "777e7a7bfeccd884d7166e1613c732759778cf740c0d6a57eb3a8aac12c3feaa", + "target_lvs.spice": "e283a548cb0c8a593bd8f872fc6fa635e8c3ab38ae507faa4c6488d3b84fba39", + "testbench.spice": "84880cb93fa2153cc204568de8b21537f73e059588abb4c02bdf0baf05e5b99a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..4391f5c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0945adf3afbcf5e8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.51 + }, + "f3db": { + "min": 11260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.50605, + "f3db": 18772100.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5445191, + "vin0": 0.5445191, + "idd": 2.10582e-05, + "gain_lf": 23.50605, + "f3db": 18772100.0, + "ugf": 281196600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..106a1466 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.51 + }, + "f3db": { + "min": 11260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.50605, + "f3db": 18772100.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..f14e027d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +.ends C04_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..542ca7be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C04_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..f898e548 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..36e50ca0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C04_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.52, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4ae5b357404368b3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..c9158e46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "24717989e41b2da3db6a63f3b1966ba1665ab5e7b363607d90dfc46b7d18f9a2", + "qualification.json": "e9286eaf9a63600ab0513f1fb57ac796bf7dfdb2bb5f98bde0a7d8c37d0dc3e7", + "specs.json": "6739fae2d7b6839a48e8feaa3e1f432f8c572f8454c3ca9767893896fa99cbea", + "target.spice": "663711523dc8a1c3f2cdd256a1133ced9dd095d04587829dcd064c6d11b54278", + "target_lvs.spice": "e0bac1b22fb6a968a89904ef059208ab294b01e6ceba855568cc8fb5e7054952", + "testbench.spice": "650cc57b450e90bb38df35e4bec2b024fb98b44dfcfe540114699a0452b054c2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..131b9bf1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4ae5b357404368b3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.43 + }, + "f3db": { + "min": 7444000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.43384, + "f3db": 12406650.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5593728, + "vin0": 0.5593728, + "idd": 2.216823e-05, + "gain_lf": 25.43384, + "f3db": 12406650.0, + "ugf": 232659000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..e168e4bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.43 + }, + "f3db": { + "min": 7444000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.43384, + "f3db": 12406650.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a6f6c9cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +.ends C04_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..11736ec4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C04_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..f19de330 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..41eb24b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C04_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.39, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "787e72fcac157b6f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..224f1965 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "843bf8a05ebe0d8f71d5b3d37cf3122e79b4088fbb33b02376c2e26cfea5ca58", + "qualification.json": "5afd80a1fce280a663179faf375b68b4e2f6eab71b71e4936cee069059d79f34", + "specs.json": "5fc4f0a7f8b13ea756d2e4bf967433e715ed2b1bf1a771d5ae3f9c5870a78fb8", + "target.spice": "5235fc49c9dc9e85823904c7320f91644b0d70942a46aeadaae49eabb77c335d", + "target_lvs.spice": "ed4dd78b2682b77488c65db1a2ca5ad7d2d1809e4e8018a1d2dfd24edb16f27e", + "testbench.spice": "11a7411ee8d8bd931eb3c9fd84cc9ef78f83597ab7482f3ce2be83dae8dc981b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..b11fa4af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "787e72fcac157b6f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.43 + }, + "f3db": { + "min": 12350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.43194, + "f3db": 20582690.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4396949, + "vin0": 0.4396949, + "idd": 2.337619e-05, + "gain_lf": 25.43194, + "f3db": 20582690.0, + "ugf": 387849100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..92f4021e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.43 + }, + "f3db": { + "min": 12350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.43194, + "f3db": 20582690.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..d4b3309d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +.ends C04_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f4bb6457 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C04_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..6acfbde2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..fc283fe3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C04_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.26, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "49cbe5fbb3ed1378", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..49ba00aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "836c341c758d2668e7c65fa302513add5941240d3a2799fd2341231985df3a1a", + "qualification.json": "52231cf9866fcf744d88b64e123db2b87a4efdd264384722cbdf753bff869434", + "specs.json": "d86323b637b82d233647f08d3b777a09a7f99e2727ec2063a9787c3bce63aee3", + "target.spice": "2f43ff1c6601f128c1595cbc7bde2bd24e09e5ae33a1f99a597454f5cd03707d", + "target_lvs.spice": "3c33cd0eddd597e348d2ad26aa2bbedf411782ea6bce67fcb5797eaa3dd66bb9", + "testbench.spice": "a7cfdf6d4f329a81ba54d588284747cd1e7882af5d2174eb0bb68bad01c12385" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..3eb8052f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "49cbe5fbb3ed1378", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.97 + }, + "f3db": { + "min": 15580000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.97213, + "f3db": 25973440.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4506865, + "vin0": 0.4506865, + "idd": 2.233765e-05, + "gain_lf": 23.97213, + "f3db": 25973440.0, + "ugf": 412146200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..730cff62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.97 + }, + "f3db": { + "min": 15580000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.97213, + "f3db": 25973440.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..28d16adf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +.ends C04_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..c59c53f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C04_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..5399a000 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..bdef69d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C04_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.52, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "37f0005d77350767", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..bea79d3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4212c6419d1dc99f983218102377b925c6ad1ba1d91b0e9dd55959816ca0d72f", + "qualification.json": "2a2af6124224b57b478f2400a8f768cacb4e3a2d60618112955cb359af589fcd", + "specs.json": "e7ba95462f7840b5fd9ac86b59a2f62ff5444d423a2074409647e33a4411074a", + "target.spice": "05e5ee68ed2589d0a99b3ebd3043e6340d57439af95994f81c23642020108af2", + "target_lvs.spice": "af9452b3c8c23d093a38b746e1dc9225c1e75f790576fd2d4d08439fe2611d63", + "testbench.spice": "94574104ca7431acdf497a957432d15b8f039e527603f1e6d533dfeaab480868" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..306cfbe4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "37f0005d77350767", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 23.3 + }, + "f3db": { + "min": 10380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.29534, + "f3db": 17307010.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4427213, + "vin0": 0.4427213, + "idd": 2.382704e-05, + "gain_lf": 26.29534, + "f3db": 17307010.0, + "ugf": 361730700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..896e3ea3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 23.3 + }, + "f3db": { + "min": 10380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.29534, + "f3db": 17307010.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..9fa038b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +.ends C04_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..69cedac2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C04_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..4285b92f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..bf11b9c0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C04_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "67bdfb9a5ac76ac4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..5ef6b660 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4e69257286f5a18ce1d176fa4558768e88571165966111556e5301dd2ecbe0e1", + "qualification.json": "096e3651e1d6f114820132c135310214aa2cbb3f2db500f7eef7a99c9af60800", + "specs.json": "795be68df7038d5d1bf244bda15babf672395e6af099995ad36f43ef69d7cd37", + "target.spice": "339a336d33056752abe2abf0e06f465d67381b7c7dd94ba823e5e16327923a86", + "target_lvs.spice": "cdf270a72a1938032aa513abc84d924a9bb51ccb32f8f2f150c2e3f27d8ca357", + "testbench.spice": "63c64c856fdc02f320b61e0cbfea3696d64232e185096b40ac36aa049a68a6d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..8833f70e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "67bdfb9a5ac76ac4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.3 + }, + "f3db": { + "min": 10950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.30474, + "f3db": 18257830.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4740232, + "vin0": 0.4740232, + "idd": 2.286579e-05, + "gain_lf": 25.30474, + "f3db": 18257830.0, + "ugf": 337900800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..8781594a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.3 + }, + "f3db": { + "min": 10950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.30474, + "f3db": 18257830.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..baaed0e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +.ends C04_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..34d643fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C04_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..afec09b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..9d5f335a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C04_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4c5bd60ff54f2cd1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..3c9577d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0a45a4d1fa0715ed4a9c7a039d9190bb5ad1927f18821f8e555d8bd17d84f1f3", + "qualification.json": "b0a01034cb27ba65aa781ffbf64fd2e6b9cf22f8b80cbccdb75969fe1a1086e8", + "specs.json": "fe27a3ec948fc4497ea9887bef0cdc863c43b64cf75bf8846871dde95ddfcd57", + "target.spice": "8334b37c00ae19ab2682ec6bad239d1da068193035e869afeae8fd5e7d47eb6d", + "target_lvs.spice": "1d431dddc923b4d97bf9cb42864dcafbe351471d503339ac3ff4fe8fd9b8d15e", + "testbench.spice": "b9801005ba7c3517c69a4d61b295191b682a9f89add4bf2578ec2ec788041f43" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..33ae5bd5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4c5bd60ff54f2cd1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.89 + }, + "f3db": { + "min": 13910000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.89137, + "f3db": 23180350.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4813387, + "vin0": 0.4813387, + "idd": 2.189247e-05, + "gain_lf": 23.89137, + "f3db": 23180350.0, + "ugf": 363696500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..bc68c32b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.89 + }, + "f3db": { + "min": 13910000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.89137, + "f3db": 23180350.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..09ee90f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +.ends C04_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..1285a363 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C04_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..aeaeffd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..7feada2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW1_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C04_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "20581ff512e96703", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..7a88b72d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "995464e5b27d3762a1312d408334f1cf342e80883e77496774bb4792eb478a8b", + "qualification.json": "7cc14bff31965f4289e466ceeb9318b3602a75c253d204715bb5bba76b141d78", + "specs.json": "b8f44a172be5ff4b557e457cea69b4b38e6c5eca806d16fd5d8a3a87f445c733", + "target.spice": "d1f9188f29d5e60a919cc6e267e1098ddaf4ea08c8a029b499ce022348bb3063", + "target_lvs.spice": "51487e7f08e0c12a538b324f41ffa201b2b13214d8d9da08ce1e4a872322a30e", + "testbench.spice": "3e16903fffe7edeb64a84ebb5f70721261ddcfef9891a094237b1fc13b9a5a09" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..d0a9e584 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW1_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "20581ff512e96703", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 23.13 + }, + "f3db": { + "min": 9182000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.13388, + "f3db": 15303070.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4804788, + "vin0": 0.4804788, + "idd": 2.327906e-05, + "gain_lf": 26.13388, + "f3db": 15303070.0, + "ugf": 311941800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..8ef96438 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 23.13 + }, + "f3db": { + "min": 9182000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.13388, + "f3db": 15303070.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..b0e7584f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +.ends C04_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..510a5733 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C04_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..f3a9dfe5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..a8064cd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C04_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "22f808f4000767ba", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..2fe7a621 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "399bac93e65d639e6c9bbf8b7192ea44d0e64343bb92fb7a66771aaaac233838", + "qualification.json": "6b6e662d262f8739e0294c906e8aa1e8e042037b783248518a97c478b152c62e", + "specs.json": "2ac49affd0c6fc7d636fbfa4b69653a78635cc9872b66304caa57de5355dacd9", + "target.spice": "c78a2f5a454cfc0d21a81e49abb6833f03a5c5bbdd6354abdce2f525f566175d", + "target_lvs.spice": "cede4a39fb18784c57d76e8ccb0fd6af164312cc75b32be8fc0082cb90c371dc", + "testbench.spice": "3f163e39a2e21eced65ac1d2863ddcbda98d8c1ae13542c12bc8d5ca49ebd1eb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..d012f78b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "22f808f4000767ba", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.48 + }, + "f3db": { + "min": 13320000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.47899, + "f3db": 22192700.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 0.4180287, + "vin0": 0.4180287, + "idd": 2.370763e-05, + "gain_lf": 25.47899, + "f3db": 22192700.0, + "ugf": 422939400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..08faa0a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.48 + }, + "f3db": { + "min": 13320000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.47899, + "f3db": 22192700.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..cefa71ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +.ends C04_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3bc56a72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C04_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..1d3264f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..0d298ff2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW2_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C04_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eaf68bc3d5cb10f1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..9dcf6db8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "318ead8d0f1bc88a6af46691777f9113c59d680660149785303e05ae3b9ac99c", + "qualification.json": "a00a2c0c07e44ef36e2de330443c4a56f5c99182f07513a818f2677355f88251", + "specs.json": "7e81f770c42c370a3bd8b565c233f112c826f20e67d2608d08ac904ac992e905", + "target.spice": "91a08a12b232710ceea2b73219d64bcf427d18c4fac366a1ce55fb7600c96f02", + "target_lvs.spice": "ba65b5b9e7a6ea0442ad94256cb2dfd62cc9b81b12f01cdaadb6d34638de6206", + "testbench.spice": "7acf77496bee05d6f8b6e160439d56b2e1f1c825d6ff2310758ce29d25021fd7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..730d92ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW2_sL1", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eaf68bc3d5cb10f1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 21.0 + }, + "f3db": { + "min": 16720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.99546, + "f3db": 27870130.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.4312207, + "vin0": 0.4312207, + "idd": 2.263739e-05, + "gain_lf": 23.99546, + "f3db": 27870130.0, + "ugf": 444095400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..4fc56331 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 21.0 + }, + "f3db": { + "min": 16720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.99546, + "f3db": 27870130.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..0048bd94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +.ends C04_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..7528be29 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C04_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..2abd2070 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..6f9a04c2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_ihp130_sW2_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C04_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a48b30eaf5be6695", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..2a7e915e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5cddbe7f3a9295a43067127d37e0313195f335c34b00b738b56573d49bcf5f0e", + "qualification.json": "4fd1fd085ff6de8fd03966abf5cf52f12b3c58b5637ec34f2ea1567cf8e9c536", + "specs.json": "028f44b16153869705210d0ba6f90395a82ae2b7246781d82d54f412ef86ed26", + "target.spice": "ba7c015c469d981f5f8bc7ef5f2e5c7255cd577ec84238f5253187822feef9aa", + "target_lvs.spice": "d023efe96fceb9c46ba3fb25ad00d69c5159f64dc8dfac2d2769b21d2530b9cd", + "testbench.spice": "f8851402759f79aff44a8402635a5317c3304afa535512ba8f2eb07c85d67175" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..c73667e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_ihp130_sW2_sL2", + "circuit_id": "C04", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a48b30eaf5be6695", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 23.36 + }, + "f3db": { + "min": 11230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.35756, + "f3db": 18722290.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 0.4190026, + "vin0": 0.4190026, + "idd": 2.418103e-05, + "gain_lf": 26.35756, + "f3db": 18722290.0, + "ugf": 397053400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..9b4a5c6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 23.36 + }, + "f3db": { + "min": 11230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.35756, + "f3db": 18722290.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..abb83843 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +.ends C04_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..a17e3a7e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C04_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..63b83ddc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..5151f980 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C04_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.45, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "db9070de99473313", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..e1e472cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "170309abeae2c54ecdc4003edc89636a2596df65ed49fea4649cd8d5469cc290", + "qualification.json": "f293f8b3c867b76ad71a4991b065bca0962e98d4cbb6e8f4cdb5ca0ca770e72e", + "specs.json": "fbf751181bc7ab06e0fd65b0f8521d2deec147c561ccefdccd11eb71d8cd93ee", + "target.spice": "f8c9b4b0425a05dceeea808057f540110babea48b5922804797f82724125abb3", + "target_lvs.spice": "3a1257a934d266a92e0838943901a3105dedd60f70b6f4337125c8f7ba87686b", + "testbench.spice": "78dbaa003f68032d2aa1923f41bf1336189cf1484b8e357d0c0e5c98f09b8014" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..c60f7e7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW0.5_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "db9070de99473313", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 26.29 + }, + "f3db": { + "min": 4832000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.28869, + "f3db": 8053563.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.2, + "schematic_measures": { + "vout0": 0.9562723, + "vin0": 0.9562723, + "idd": 2.728845e-05, + "gain_lf": 29.28869, + "f3db": 8053563.0, + "ugf": 235469500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..27b520fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 26.29 + }, + "f3db": { + "min": 4832000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.28869, + "f3db": 8053563.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..322b832a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +.ends C04_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..88772398 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C04_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..07676389 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..ae1eaaf2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C04_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.3, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "acfabf7c9971dc41", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..ab0e8348 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d5a0e249276bbf7226be822bd80b65dbd94fb677cf01dc98c43ebaac2bf54805", + "qualification.json": "f2d87bb66ab6ba92f8d2aa767b360595cb2b8635ab1475763a21061675f503ef", + "specs.json": "e63b81d38f7d53bf36d70f1f9eeeb96a89dcf0b4e4ca05ea9fda45bb6a79c9d6", + "target.spice": "33e494b60026a375b05a9bd4164ca6ce7b484071e20e57f7939dfea36fc3a3a4", + "target_lvs.spice": "c04b07d0fe2d7c61faed24c4f95abcc9d7f4f41c50cb94f865c0242c141457ae", + "testbench.spice": "cd9b25cf234182d95b7f34cd47d401a265a3a7eb02909cd9ac195197929fcd94" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..9f0a08ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW0.5_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "acfabf7c9971dc41", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 24.83 + }, + "f3db": { + "min": 7233000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.83126, + "f3db": 12054280.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.0, + "schematic_measures": { + "vout0": 0.9178438, + "vin0": 0.9178438, + "idd": 2.828317e-05, + "gain_lf": 27.83126, + "f3db": 12054280.0, + "ugf": 297935000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..5280c273 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 24.83 + }, + "f3db": { + "min": 7233000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.83126, + "f3db": 12054280.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..b1374394 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +.ends C04_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..258701c0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C04_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..8755560b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..eabf0d50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C04_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9c00386f50a410f9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..e5313f12 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1b9e797279a5ea0ab2d20e3ced1ad3a2ed485765c41f43450056f145e490b490", + "qualification.json": "06560f699fa60dec1c9f1c510d12cb070657acec30050f1a7f19ad68a6e777d3", + "specs.json": "164fa9a2ddc2ad5549dd85e5f3c619566419e7953acfac8fd68d4d8aa95209f7", + "target.spice": "a33700ba7d55bc6225c86a425942a12fda0e5d89c252b6e1a0e452ae71183d23", + "target_lvs.spice": "68b052edabe0f38bdd2859097f46f8df2c6a59c557e24b834049298aa985d600", + "testbench.spice": "0461a691c39bfb70bbf328ed98953f7b04791e122dbeca9c204644acdb18485d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..0a7082ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW0.5_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9c00386f50a410f9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 26.53 + }, + "f3db": { + "min": 3995000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.53157, + "f3db": 6657604.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.2, + "schematic_measures": { + "vout0": 1.001204, + "vin0": 1.001204, + "idd": 2.708523e-05, + "gain_lf": 29.53157, + "f3db": 6657604.0, + "ugf": 199892300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..94dc3d54 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 26.53 + }, + "f3db": { + "min": 3995000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.53157, + "f3db": 6657604.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..5538bf6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +.ends C04_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..98931e2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C04_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C04_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..a07ea586 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..62bb2b74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C04_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.45, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7e3a8751fae6c89a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..70d1b37c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "29ced85f1a34c53e73f39e1ca8b3801d771b754e680fbbe0973ca8a2e2766a5d", + "qualification.json": "643734eeb536fd88e2fc4979ec1a45432cf45c22a0530f9c2ff8cb7e0324acf4", + "specs.json": "472da5f42c96983fa8f1c885fb0c530c4257c5a0f0dc297a7b5cc17c93ce25c8", + "target.spice": "e0aa0cfe26144c2dd62a9e55c008416db9654b16ed449a5f103598ee003c9ca4", + "target_lvs.spice": "99a16d79865fd8d8f1378f8f211340993a51f73b019e3c0061e62d44d2156926", + "testbench.spice": "6c17b9b0536b4c6668def59de52f957c4f4ade329aa0790a3c4e16411cf7eb4d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..02990272 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1.5_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7e3a8751fae6c89a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 29.27 + }, + "f3db": { + "min": 7205000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.26552, + "f3db": 12008180.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.1, + "schematic_measures": { + "vout0": 0.8482126, + "vin0": 0.8482126, + "idd": 3.951739e-05, + "gain_lf": 32.26552, + "f3db": 12008180.0, + "ugf": 495057200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..51e43165 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 29.27 + }, + "f3db": { + "min": 7205000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.26552, + "f3db": 12008180.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..35946e48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +.ends C04_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..712d7a50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C04_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a8d722a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..c3dda655 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C04_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.3, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "44601873b4d9e32b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..b4054c07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "81299e55c71484d23620626dd5813b1447845f112fc24b83ef6a5bfcde378197", + "qualification.json": "75430220a7d3ea192f31eeebe48324f7ce408c702e75b0492318309202261afe", + "specs.json": "438fafd163b82fb90aa263d0249f7d344a22ef2224014b09cad8af42f209d4b6", + "target.spice": "b30135e4db0e01d4730de8e3c3ca9c80d480591f3e7d86e00cd9daab5be6d7d4", + "target_lvs.spice": "76c526e271573b1d275dea076de133aafacca947da80a9734c74fd4fd133500f", + "testbench.spice": "af3a336afede9e946286b79cc496965eecd1c925e1aa1f8edbb1edcfdd28b9cf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..8f0c762d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1.5_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "44601873b4d9e32b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 26.71 + }, + "f3db": { + "min": 12390000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.70515, + "f3db": 20647140.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.9, + "schematic_measures": { + "vout0": 0.8363995, + "vin0": 0.8363995, + "idd": 4.41524e-05, + "gain_lf": 29.70515, + "f3db": 20647140.0, + "ugf": 633062300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..7dc654df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 26.71 + }, + "f3db": { + "min": 12390000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.70515, + "f3db": 20647140.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..e9fe4552 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +.ends C04_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..c91d56fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C04_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..effe19eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..ede0725a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C04_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "51bc1411ed2fbe23", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..7f2ce8a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "16f62b5aaca59f9824eca0a8f4963d3b60f02753b2521d94d1bb12d04b2bdf6f", + "qualification.json": "53d37f2ed68f40879017b7619efca0b9e26fa36c36eb2e181141483b91048ee3", + "specs.json": "2aae472b87906845706c1ca3704a1f6da259257bd0f8e35139ee474bbcb0f2eb", + "target.spice": "ca94f5c178b0127d1c392e4a7ba3c1d6518d90c757518630d900d9d8db78a68f", + "target_lvs.spice": "b0cf0bc0db53eaf4a88656b5b8d592f0b7530ba29a9b94b36097fa826d5a4d02", + "testbench.spice": "1f204dc4a186e46efc28a976950b85ef85a8f6642da50b6c2efaf5106a657dd9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..4d8faea6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1.5_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "51bc1411ed2fbe23", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.84 + }, + "f3db": { + "min": 5083000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.84283, + "f3db": 8471881.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.8702655, + "vin0": 0.8702655, + "idd": 3.779692e-05, + "gain_lf": 33.84283, + "f3db": 8471881.0, + "ugf": 419619300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..1da22be0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.84 + }, + "f3db": { + "min": 5083000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.84283, + "f3db": 8471881.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..aa8d8d50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +.ends C04_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..28f3d306 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C04_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C04_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..5a72ee0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..42f88268 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C04_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "98c26f7ec9445349", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..562348b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ee704cc1504286a2fd7ed7d66af2c6fcc276ab75fcab06b6ce04a1d35c207d1b", + "qualification.json": "99c7885b3abc7b2243585c8d61288a615425f0a5499ab7b04860fb0c8a2054d1", + "specs.json": "490380798e5c06f8647999074216ced2411944847d408bc913fcf8419f7ff4b6", + "target.spice": "fdfac76986baa95984d3e8b821f97c701ef1148e1762e74b23d4b69667525be8", + "target_lvs.spice": "858a843a59a5bc781062396b7898b2d6a89cef486216df391d0d997ec6501a8d", + "testbench.spice": "f02c521aa9427166b6a34d224879cfa4b94fe5bcb325eb4582866b66e34cc61e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..5c9d8ad3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "98c26f7ec9445349", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.39 + }, + "f3db": { + "min": 6074000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.38694, + "f3db": 10124020.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.3, + "schematic_measures": { + "vout0": 0.8813821, + "vin0": 0.8813821, + "idd": 3.399709e-05, + "gain_lf": 31.38694, + "f3db": 10124020.0, + "ugf": 377153400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..49251101 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.39 + }, + "f3db": { + "min": 6074000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.38694, + "f3db": 10124020.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..2206c965 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +.ends C04_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c915b57b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C04_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..7490fde1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..aab34e88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C04_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1cf81ad6c2ef8819", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..310fdce5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9391e584f1be709074b42d8246638dc9dafac412107d01738f250fbce69b7107", + "qualification.json": "d96bbcf0f82dd8f49e76780efac01acebd24682e34cd8cd7090b6b6aec3ab83d", + "specs.json": "ebb27ac2dee4371b00e86f1d2dbe397798da58510d07410df6f1c7a3cc161456", + "target.spice": "26b75fb3fe3437197d8a8a675dbee5a93bda9937d6ba6e876146bb58713d63cb", + "target_lvs.spice": "0388562c979029dabda7ecb4f4c17c00e11bc0171e76d526f965cb74e693d405", + "testbench.spice": "686542d39f3fd288deefd880b18f2c12064617a8504b48ad1c82c77e64c2d988" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..4f4e4f36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1cf81ad6c2ef8819", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 26.15 + }, + "f3db": { + "min": 10050000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.1507, + "f3db": 16754670.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.1, + "schematic_measures": { + "vout0": 0.8624328, + "vin0": 0.8624328, + "idd": 3.714779e-05, + "gain_lf": 29.1507, + "f3db": 16754670.0, + "ugf": 482189600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..a0c36902 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 26.15 + }, + "f3db": { + "min": 10050000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.1507, + "f3db": 16754670.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..4594fdd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +.ends C04_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..c6b79c15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C04_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..0f550137 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..28a49a70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW1_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C04_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dd0f8ae02d0c0fa7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..e0c59b42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d10d395a9d85395a1738988f17d99007a595b0af81bbeb6ef7b06f8a49381582", + "qualification.json": "7b72d224a5cc5c0c45b9cc133fa78e17b54ae80ec3f8351f70500111c40c2fef", + "specs.json": "36132c0fc11b494ebc001066b6585c661f8b0068d102dd711074c6a8d20d67ee", + "target.spice": "56fba1ae370f4de51d19338980495a10a0f52403ecc6c21ddf92ad608e678e53", + "target_lvs.spice": "6f317d8db80f00f71447a794071fd42e3bbb8acc469ff48807fa0babe2999542", + "testbench.spice": "24158d70baaa1ebe3a24110e50f81f5c0896785d60885f258dfcd00fdaad8972" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..ad30cb80 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW1_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dd0f8ae02d0c0fa7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 29.6 + }, + "f3db": { + "min": 4465000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.59777, + "f3db": 7441151.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.0, + "schematic_measures": { + "vout0": 0.9094343, + "vin0": 0.9094343, + "idd": 3.282374e-05, + "gain_lf": 32.59777, + "f3db": 7441151.0, + "ugf": 318398700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..cd25c667 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 29.6 + }, + "f3db": { + "min": 4465000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.59777, + "f3db": 7441151.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..994cc528 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C04_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..b8cefa7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C04_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C04_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..1cc55e74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..577ddd84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C04_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4e00250019e951d1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..e3663e6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d7cfdd8a7ae4e4e59942511765938a18b06a8a2f2ef637b28a3b21e4f114b585", + "qualification.json": "8f0c21d434aab78e2676c6804b817e75c26bb89c84c6c8cb002c633ebd7a81c6", + "specs.json": "1bfeba63b845fcd0c92d01e2b29fba9a6bbadfc3a6b64cbd3a01c1c548affb7d", + "target.spice": "90ec58c7489677c61c811e529a057a15223b11871df6e61536ea9a5fd198958a", + "target_lvs.spice": "1296f2f890fdd343c291c228ea2c6b62515c2f5d96e98e4f78bb4a5523db4fd4", + "testbench.spice": "da8e27835f6db7a067f39205322d8061f619a670bec1a28a0d9b7610419a995c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..ce495283 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW2_sL1.5", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4e00250019e951d1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 29.79 + }, + "f3db": { + "min": 8176000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.79353, + "f3db": 13626050.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.7, + "schematic_measures": { + "vout0": 0.8275789, + "vin0": 0.8275789, + "idd": 4.41498e-05, + "gain_lf": 32.79353, + "f3db": 13626050.0, + "ugf": 598776900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..a6c93905 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 29.79 + }, + "f3db": { + "min": 8176000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.79353, + "f3db": 13626050.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..4db34d62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +.ends C04_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ca4b5327 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C04_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..aa0f5f04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..f08947f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW2_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C04_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7f8e4b176acbfb40", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..115941f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "957fe6ec2ff19d540b5214d0ea0ea4e0cb9deca561f23fc29f052d86b86a27a5", + "qualification.json": "c4d037be4d6bf112b2818d192b4bb04908a69051c87aa07ed7c92a1cef07a74b", + "specs.json": "f73fbd234229302cf93392903aea7676c095953af3e1ed88850dc09b49004e4b", + "target.spice": "5bab3be9d88a08d53e9b10ec624eff074c22c7cbbe2be272f1fd770295bb1628", + "target_lvs.spice": "c0c1e0652c8101fffcefb933e585cbeb8d133a5952ce7652047da6542edaeeb4", + "testbench.spice": "b65b911a6c8226178948c505a8841a1a16a032f150f94b2bfd56ac0ae94284c9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..00869184 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW2_sL1", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7f8e4b176acbfb40", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.03 + }, + "f3db": { + "min": 14350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.03456, + "f3db": 23917820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.1, + "schematic_measures": { + "vout0": 0.8195053, + "vin0": 0.8195053, + "idd": 4.989e-05, + "gain_lf": 30.03456, + "f3db": 23917820.0, + "ugf": 763914300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..c9c9564e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.03 + }, + "f3db": { + "min": 14350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.03456, + "f3db": 23917820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..a8f5df8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +.ends C04_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..cfba297e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C04_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..21a20505 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..cd45b190 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/case.json @@ -0,0 +1,101 @@ +{ + "case_id": "C04_sky130_sW2_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C04_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1a815ffbe3043411", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..b2e8264d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "67b389b9218d92f3b42b5cb993f55ce8f1c2d368331bee845850d47158ddebf9", + "qualification.json": "7401a1396fb3ee1441dd8a651db016462cf5647c837fc5a4be19a04f5311c00d", + "specs.json": "b1a02498be02468a784df4f6733f22e5e1c92c9d2be7d3b79600946edc564f73", + "target.spice": "e48394e1b9876aeb663c4cb113ef00b14587a6a4d18285c5f21d0349c57cad90", + "target_lvs.spice": "5571e2a77d19b0b909daec8bc7f277c3da121fc0cf8a3757ab31ee12e6bc2891", + "testbench.spice": "384ea34731c55528fb832951e074c802c705bc370952f06e75f741ab37af55c4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..6608fe59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C04_sky130_sW2_sL2", + "circuit_id": "C04", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1a815ffbe3043411", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.59 + }, + "f3db": { + "min": 5641000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.59165, + "f3db": 9401574.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vout0": 0.8465248, + "vin0": 0.8465248, + "idd": 4.208694e-05, + "gain_lf": 34.59165, + "f3db": 9401574.0, + "ugf": 508469700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..a4719731 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.59 + }, + "f3db": { + "min": 5641000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.59165, + "f3db": 9401574.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..ba250d89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C04_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C04_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..612e042f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C04_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C04_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..be3b8791 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C04/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,27 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C04_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..867a7df3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C05_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "de0f3d880667d197", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..52633933 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5e38a88b5290a337766c8abf7bac94470832d951c80ce6dcd11c12f40a0f11df", + "qualification.json": "ba129872b7832d1432e9b39d7d1c3eb4026757892920e91b3377da94ab1a74b8", + "specs.json": "9fe5ddd87d07ceb69ff437069ee9b6890749b9b21bfb6363e82ea7ff27dee4ff", + "target.spice": "bec6fae418f8ace6fc1544872997f762e00acfa53826f9d326842d247b92d649", + "target_lvs.spice": "11d329f91a6add3bc7c886280641e15645f9941bd32195b02a1b9755bfc580b7", + "testbench.spice": "a9308cb68e0cacf83190bc4606738234f3351ed2a23d81cccb8b021fd8cfa8c6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..1ae5b662 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "de0f3d880667d197", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 23260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6176683, + "f3db": 38759890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.6577102, + "idd": 5.325655e-05, + "gain_at_nom": 0.6176683, + "vout_at_nom": 0.6577104, + "vin_lo": 1.500472, + "vin_hi": 1.500472, + "gain_lf": -4.184004, + "f3db": 38759890.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..9b68c91c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 23260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6176683, + "f3db": 38759890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..7dbfbad7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C05_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1ae13566 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +.ends C05_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..7386035b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=0.84u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..b3528ab1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C05_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "010cd44721340082", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..07d82edb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cd83814810c442c51be36e4eb61add70091e943ef3a8bd4f98d055d9af52a318", + "qualification.json": "c6c2d2dff280a0fc77326ae4a12baf8521aba6a39b83bb27fc9c5292d07fee3d", + "specs.json": "2b1811b963008fc1a29b525561ae9d4660acf5cdd909b77ab31faee4966e36f0", + "target.spice": "7d8a947a1040b39ae13d111858bd8462cb876fc915fc5a23766663630d887c02", + "target_lvs.spice": "3c537681371254dc71803bfd767644cd28a4e7208cf0de372a27cc1ddc1e3db2", + "testbench.spice": "66b4aafa3d1caa5d200733a266f6d64876b30b22f12b327c804fff9fad07fd41" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..439cb76c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "010cd44721340082", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6052 + }, + "f3db": { + "min": 28090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6551654, + "f3db": 46820220.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.7461246, + "idd": 5.820329e-05, + "gain_at_nom": 0.6551654, + "vout_at_nom": 0.7461246, + "vin_lo": 1.266606, + "vin_hi": 1.266606, + "gain_lf": -3.67227, + "f3db": 46820220.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..13637f36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6052 + }, + "f3db": { + "min": 28090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6551654, + "f3db": 46820220.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..c4d311ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C05_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..961505a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +.ends C05_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..4fcf691e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=0.56u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..b0cc7567 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C05_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bb0d0563348d42f5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..bb32c007 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "93677a416c1d22cb98fc93cd5bb7acb70275344f42904d3ad6de7be0da7f69f6", + "qualification.json": "70574da4f4a5f32cd5fa927dad44b919e9eb59f0c3fde64bbb7df9f92fe93582", + "specs.json": "525a393956874e21a1139bb17d4074638171483f9aff0b668ac529dad07225d8", + "target.spice": "98638dc6a7522393d4b50e945156107b81e6cee85d85ef2c05bfd62578578858", + "target_lvs.spice": "9564b2216243ed2d910eecf08675c889d0d0368bd06cbdd2743b962ecf275ed7", + "testbench.spice": "1c9188632e41e6513848a976ce4954858815b4b9215914696d2919b0c9d0894d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..175610b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,87 @@ +{ + "case_id": "C05_gf180_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bb0d0563348d42f5", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_at_nom=0.5874 below floor 0.6" + ], + "spec": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 20580000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.5874089, + "f3db": 34292100.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5940654, + "idd": 4.976311e-05, + "gain_at_nom": 0.5874089, + "vout_at_nom": 0.5940654, + "vin_lo": 1.703668, + "vin_hi": 1.703668, + "gain_lf": -4.620147, + "f3db": 34292100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..9323313f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 20580000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.5874089, + "f3db": 34292100.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ed28e9a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C05_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..96afecaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +.ends C05_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..0e3a0dd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=1.12u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..6437d96b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C05_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0aadb8d8802ec67b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..038ef45f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9c63867c84647a6d11f05f1ad4b10580e31fe3ca26793b2b3d4867c0caacb4e2", + "qualification.json": "a2e63e4f44afd71608906d3ca9a700074985d859ef03e45b2ab63392108942ca", + "specs.json": "57865ddd7c420686e86084231ea24afd0c4760bab1eca047f68aaf42eba78f4c", + "target.spice": "20e2f056494b361f3fa200e7f0aeacae180e4b25217ca3baa942195b95117b6e", + "target_lvs.spice": "97c19a834e0122126122b61a5066380ee32762be01bb673d32bb0cf79f93d256", + "testbench.spice": "51678865c9a0cac7a4a7c2879add8f7baf9ae21f3fd316e17fb0ca42ce8658d4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..897dd8b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0aadb8d8802ec67b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6498 + }, + "f3db": { + "min": 41210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6997546, + "f3db": 68675720.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8545068, + "idd": 6.312905e-05, + "gain_at_nom": 0.6997546, + "vout_at_nom": 0.8545068, + "vin_lo": 1.046353, + "vin_hi": 1.046353, + "gain_lf": -3.10038, + "f3db": 68675720.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..82628a88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6498 + }, + "f3db": { + "min": 41210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6997546, + "f3db": 68675720.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..8bfe15fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +.ends C05_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f7a8c8e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +.ends C05_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4b576df7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=0.84u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..19422dd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C05_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4e7e8f3c2e1d6706", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..77b89dd1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "898996a32d8060f76cab70321b1d447068d17b717b154ff49e90d164c7648be7", + "qualification.json": "b4a97a374ea8d6e674c2100f470e2cea4e7968710ea32f5f6c885aaa6d341df9", + "specs.json": "66f5456d890598e74c96608191add85353272cb3490e58370a5863749aa8bdf4", + "target.spice": "f4119477961240a3d00fe677810a8edc0fca47588cb20928557a64245b464eed", + "target_lvs.spice": "f40072af8ca0efd2dfbb33c00b1284e0c56f8dcd72317d587878abaf821d6ab7", + "testbench.spice": "8e3cc43f1947b4ec731d5eb437f1afecb8e281dde3a1f7277cea6cc00be4edb0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..cc9adbec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4e7e8f3c2e1d6706", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6763 + }, + "f3db": { + "min": 51110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7263237, + "f3db": 85187880.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9170634, + "idd": 6.834132e-05, + "gain_at_nom": 0.7263237, + "vout_at_nom": 0.9170635, + "vin_lo": 0.9501328, + "vin_hi": 0.9501328, + "gain_lf": -2.776847, + "f3db": 85187880.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..3091f1fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6763 + }, + "f3db": { + "min": 51110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7263237, + "f3db": 85187880.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..cd5cff9d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +.ends C05_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ff99496e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +.ends C05_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..a0dc17ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=0.56u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..d7e189e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C05_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c690c8a6767bd4cb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..7b1dabdf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e9de476fcb03d564f5d7ad5cb57de7572afba6ff493850983e0cdde88272d9a7", + "qualification.json": "420d1d97cc32f80c6ba3168186d968df0df6bcd7f5ad25f766fe0061e752527d", + "specs.json": "355ea30e779516b1d8f277b116c19beb599a3b0fee66be08749277d5a21af239", + "target.spice": "fee552860487c599cfefd443cc183a247b3a5eeb0235e5143c22c7c48b8504b1", + "target_lvs.spice": "8a173df4e209d67dd31e7b10c6293600592e02aed23927155373839e64ecfc90", + "testbench.spice": "8d868ba4b9892e134a8eb9b156e8cd4d5cab24a67c360e8a0783456161b95c31" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..dc1fa067 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c690c8a6767bd4cb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6309 + }, + "f3db": { + "min": 35530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6809448, + "f3db": 59222770.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8087849, + "idd": 5.99297e-05, + "gain_at_nom": 0.6809448, + "vout_at_nom": 0.8087849, + "vin_lo": 1.12946, + "vin_hi": 1.12946, + "gain_lf": -3.336947, + "f3db": 59222770.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..08b8e837 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6309 + }, + "f3db": { + "min": 35530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6809448, + "f3db": 59222770.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..2fde154f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +.ends C05_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4994f30c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +.ends C05_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..c2a1728e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=1.12u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..2e69ad51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C05_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "1f80275162187fc2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..e4c5d2c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "22054d9387f0c77c8355612566552ed049bc5213334c21da645181d9e5708b2b", + "qualification.json": "28053a067e678fd9a4cad69827feb6ab850e6571beb88fffee0b7315cd4291d2", + "specs.json": "d26aa5b641d5f652527bf1ababa6a1dfc5b694b5ff880fd11d9e35a3891ddfd7", + "target.spice": "892d1c10b2e48f152ba85bdac38d71d021257c38575bafd85622f570622b3b04", + "target_lvs.spice": "8ae3916959a5b601b3f4a3839d946509d34b35f19cf30e6daf36740992a5bd01", + "testbench.spice": "35e9c9d50dc46cdf2659de9b2f38be55a6a8cf907b2d9deabf74193fa057d42e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..e7d0d45b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "1f80275162187fc2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6255 + }, + "f3db": { + "min": 33420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6754529, + "f3db": 55698050.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.791703, + "idd": 5.987414e-05, + "gain_at_nom": 0.6754529, + "vout_at_nom": 0.791703, + "vin_lo": 1.165817, + "vin_hi": 1.165817, + "gain_lf": -3.407319, + "f3db": 55698050.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..49832466 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6255 + }, + "f3db": { + "min": 33420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6754529, + "f3db": 55698050.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..5e3b4536 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C05_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..86f5f2ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +.ends C05_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..854b742b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..2eec9828 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C05_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0e05434cd8b5f2d9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..abc0fdf0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "053a7c237e09a800ca5eb6d54b7353add6b6760b2dc81d7fe08fb69b8c4fb465", + "qualification.json": "0075d81575769965d6e485bc2fb2383f7e000baf3e6dc439ef21873000fa1dbc", + "specs.json": "b18cf04789615281ee1056de75d1dc51ab37eefcbd856622ed879d41ef9035b5", + "target.spice": "0740b09e4cec571704d59341a247ff233256f8c8988ba71a72a043ec29a308d6", + "target_lvs.spice": "da8662ffc7f64ce96aba42d4da6d908a4461c60c8666f0c03f5e55f49da7a586", + "testbench.spice": "f4da465ddd95fae68c21029be49b4873dacdf4a76d85a380a5d6b5830eef4713" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..f64cfeaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0e05434cd8b5f2d9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6554 + }, + "f3db": { + "min": 41180000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7054489, + "f3db": 68638120.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8631292, + "idd": 6.490372e-05, + "gain_at_nom": 0.7054489, + "vout_at_nom": 0.8631292, + "vin_lo": 1.03423, + "vin_hi": 1.03423, + "gain_lf": -3.030078, + "f3db": 68638120.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..d1886c31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6554 + }, + "f3db": { + "min": 41180000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7054489, + "f3db": 68638120.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..fb76144c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C05_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..451d3a37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +.ends C05_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..b28bc2ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..f2817b9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW1_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C05_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "94adb534ca849a23", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..0f501218 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f061509676d9ca1d927a98a912e3ecc8c4149506a490fc882989e6e010cd6c67", + "qualification.json": "0a1a97704e456eb0413e21bb0e41e200f2ae5a22ef15815f29cabade4fd7f3cb", + "specs.json": "6ca16e9b41ab3a71d786acf8c251c1617310dfc9fe2edc2fbb85ac7d80f05d05", + "target.spice": "f9a965bd480c116f5d37adde5a784f70fe7576041d9700325d9229254bfd40b7", + "target_lvs.spice": "f3dc9bef03e50dad131594e4571d8af4293098d7f56af0048aa3774390496043", + "testbench.spice": "12c127a84e7e436cccf0a0fc7b88a8cfc582f8c68e596d8ab4424033214aec4e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..8d45ff13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW1_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "94adb534ca849a23", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6039 + }, + "f3db": { + "min": 28990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6538903, + "f3db": 48312250.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.7393739, + "idd": 5.662267e-05, + "gain_at_nom": 0.6538903, + "vout_at_nom": 0.7393739, + "vin_lo": 1.280164, + "vin_hi": 1.280164, + "gain_lf": -3.689009, + "f3db": 48312250.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..d7cab65a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6039 + }, + "f3db": { + "min": 28990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6538903, + "f3db": 48312250.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..0bcb3197 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C05_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..4783c8e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +.ends C05_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..bdcdcbdf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..23a52aa9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C05_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "dc565ccae0092713", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..ee3fe2f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "34ccc6c7e2ee42790689f7113271abd18cdac3d13b8ada7ae189e77cbdbaacfa", + "qualification.json": "92bf5f2325717d42bee2c4bb454aa844a0e0dd9063f0362e82fc26a904dc55d8", + "specs.json": "4288171fe89f42826b0be12d64fb4e9ab04f312ed6557b78926762792941e1e1", + "target.spice": "3411f6872eb4028103a835be5ee03b0c4679d9620689616155b0e278cbea98bf", + "target_lvs.spice": "74c16b46d8f205199047f0e2dcebb242e74b6aa272c252bd2ec84bc0c9961d81", + "testbench.spice": "25622edbb412f206519a937ae13bc0831595c9d8d1ca5f275dca8adadcca5824" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..cb6bb03d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "dc565ccae0092713", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6638 + }, + "f3db": { + "min": 47630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7138419, + "f3db": 79377220.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8927972, + "idd": 6.530943e-05, + "gain_at_nom": 0.7138419, + "vout_at_nom": 0.8927972, + "vin_lo": 0.9824942, + "vin_hi": 0.9824942, + "gain_lf": -2.927308, + "f3db": 79377220.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..87da5f90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6638 + }, + "f3db": { + "min": 47630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7138419, + "f3db": 79377220.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..9f5edb15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +.ends C05_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f65155e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +.ends C05_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..e004f810 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..49549e98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW2_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C05_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e0addbaefaea9a09", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..957f40e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a91f8ad86b602d62b8ae5dd28992d5855c991840591ecea073b6ebac8b11e63f", + "qualification.json": "e1e9bd0bbafddf70d13cf91b71e7e570b266f6e30f8e3f399c15a5c877025cd1", + "specs.json": "b509c91b65e8a80849cbff2db7ad519c6e2aee96d77d37cd657c04fb5d5eb890", + "target.spice": "12f8b55ef87810f1cc6b6acee555dcaf59d6b2b45f0ed1de06c8fd013bb2f590", + "target_lvs.spice": "9aa7c7ae0312901fe4d431e14f126e822af2b7cc2f171e6d195a4f11fcedb402", + "testbench.spice": "94f38522fe5d60abc0a1d9ff27c8361bb7268f27e301117219125586be6ee64a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..773de4eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW2_sL1", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e0addbaefaea9a09", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6882 + }, + "f3db": { + "min": 59210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7382363, + "f3db": 98678480.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9498892, + "idd": 7.067995e-05, + "gain_at_nom": 0.7382363, + "vout_at_nom": 0.9498892, + "vin_lo": 0.904072, + "vin_hi": 0.904072, + "gain_lf": -2.635587, + "f3db": 98678480.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..c1e3ceb9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6882 + }, + "f3db": { + "min": 59210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7382363, + "f3db": 98678480.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..601ce06c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +.ends C05_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..11a51740 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +.ends C05_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..a08f58b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..2f6bdf1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_gf180_sW2_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C05_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4035e4161c10cfbb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..d3f006e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d8297176cba895e93a4adf4b46e599dd6b74427617bbd771fc0d19b429d2baa8", + "qualification.json": "8972997f3813e695290c85313b6b025dbf93fc9dccbe254f46a12c2cba966805", + "specs.json": "4545e99048c9f72166df362c2081037e4437b6aeb96b1d78093a7ed97b79f787", + "target.spice": "57e6aeb78d0492859439ff642e6061794589962c2dcbdfa8069c10afd3bd811a", + "target_lvs.spice": "0ca3eca01dd2cddb81f728b5c7f471dd80599d95dd4384a97c75c2e28dfb8e1c", + "testbench.spice": "e15b788153c32bc2c937b523439f922e70d5be3fd14d3467a6794bb768b8c051" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..fab4a54e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_gf180_sW2_sL2", + "circuit_id": "C05", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4035e4161c10cfbb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6468 + }, + "f3db": { + "min": 40950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6967894, + "f3db": 68257440.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8513223, + "idd": 6.212506e-05, + "gain_at_nom": 0.6967894, + "vout_at_nom": 0.8513223, + "vin_lo": 1.049555, + "vin_hi": 1.049555, + "gain_lf": -3.137212, + "f3db": 68257440.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..689fd00d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6468 + }, + "f3db": { + "min": 40950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6967894, + "f3db": 68257440.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..2848c0f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 VOUT1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VDD VIN1 VOUT1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +.ends C05_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..50a3b48a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 VDD VIN1 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +.ends C05_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..f5887004 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 2.145 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 3.3 0.00825 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=2.145 +meas dc vout_at_nom find v(VOUT1) at=2.145 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..917d0092 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C05_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cfb9562ee86242de", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..7b6d1bde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "807cde4fc5be2d33a6c3889c3f92372d64e83365da57e8ade03f7557ce22bf81", + "qualification.json": "58e66d90079a5dfe4a29e2a11dc93ce26d5472e742c0033dbae75035899d7591", + "specs.json": "e9602a32e3e8fb20d368dc04f990e3175c540f4fdfab9eb5b736959a5c562244", + "target.spice": "66930b554f680bb34debea3208201f7ff7e81b8840f65832a52a19856ed8c487", + "target_lvs.spice": "ea3d49d09c49cd736cfd647339b55767d5c6f915b7796d21f9e0e8d248cfda52", + "testbench.spice": "f65540a919226f8d4db3bf5ef141116e21cd6a2c84d7b231174ed6440c9ca0b8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..4ba8a265 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cfb9562ee86242de", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6754 + }, + "f3db": { + "min": 35230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7254285, + "f3db": 58723160.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.2602329, + "idd": 3.020821e-05, + "gain_at_nom": 0.7254285, + "vout_at_nom": 0.260232, + "vin_lo": 0.4965802, + "vin_hi": 0.4965802, + "gain_lf": -2.788168, + "f3db": 58723160.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..bbc4755e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6754 + }, + "f3db": { + "min": 35230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7254285, + "f3db": 58723160.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..21ac0abd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +.ends C05_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..02dd027f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C05_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..fd2f73f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.39u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..603fb0b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C05_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "abfe36960c3ba7cd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..bb068144 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0d45cdf3982ee0f8c5d10a7952b40c8401da75a7a10027bf828d82d9cc9d9aad", + "qualification.json": "63a2587bb5e1156fcd911435c349f60922b556100d532443286c9b0e0a99922b", + "specs.json": "e33e20c32c7bf7c3a24d475bbde007954859fed4af398d7015829c160991a797", + "target.spice": "7fdcba34b87c954451957987f6bdee26d9da06974c4e565953bd1c3396313ffc", + "target_lvs.spice": "cb97598d9608949bf8a263c5e792875083ac296731ebfd53b4c8f0e1d6b23e23", + "testbench.spice": "97804d5527a6cc0d0cbf2355b3aadd40f3a90dca2bfe136a2f0d1735e2a1452f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..6093153c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "abfe36960c3ba7cd", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6798 + }, + "f3db": { + "min": 38110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.729817, + "f3db": 63517890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.2576804, + "idd": 2.917118e-05, + "gain_at_nom": 0.729817, + "vout_at_nom": 0.2576796, + "vin_lo": 0.4872625, + "vin_hi": 0.4872625, + "gain_lf": -2.735766, + "f3db": 63517890.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..e1422e6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6798 + }, + "f3db": { + "min": 38110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.729817, + "f3db": 63517890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..2bca871e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +.ends C05_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..cdc0dc36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C05_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..4c489f72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.26u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..8396abc9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C05_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "2ef8027b87d2499f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..54768c8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ce35c14e9c7064ff778f0707972c1d41f4624585047a1c40e9f18b2a0fc29e56", + "qualification.json": "5172946a7415c9bc01ce5362e15af0d7096942da29f4412c6fd6f73b45b92d5a", + "specs.json": "67dd1a6e46aa6eb0e39073be5c5ee4154f225dceec48bcfe9daf61d154796795", + "target.spice": "c93921478cce921954208a4dcd1c833486e4d4d26d0a7abf37ba0067b4354303", + "target_lvs.spice": "c039c73db0239d96bb578c310e7620c442b6211c83b48ccf55882903209c5568", + "testbench.spice": "c4beda567ec6f4f55623666c655ca1a438220ae956971dea747d65be4365db90" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..f9b2cfd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "2ef8027b87d2499f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6639 + }, + "f3db": { + "min": 32500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7139067, + "f3db": 54158500.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.2527973, + "idd": 3.011537e-05, + "gain_at_nom": 0.7139067, + "vout_at_nom": 0.2527961, + "vin_lo": 0.5171557, + "vin_hi": 0.5171557, + "gain_lf": -2.927275, + "f3db": 54158500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..267c84ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6639 + }, + "f3db": { + "min": 32500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7139067, + "f3db": 54158500.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..065df1c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +.ends C05_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..f730f0cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C05_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..fb9f6c93 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.52u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..484fb7f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C05_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7df5eef1df75bb86", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..0ae61dba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2cd5bbb7253fc84524845cd966dc172bfefed5e8918b7fa48d50559c8f68d063", + "qualification.json": "e9e95345119d299902b0f6ec416db573e53e7613bcb2b3baba3c877d21e30f0e", + "specs.json": "14416a346c21a8644e477f7878b869bd620543f8568af94e27146818c8f8e4fb", + "target.spice": "6ae0c048676ac98ad71a9ac7751751590f01cb8669b22417f41d36acd766b526", + "target_lvs.spice": "1a6cbfe6d20aa7ccf364369f9f398e25cd9719395c77414830ffd0e1956d6adc", + "testbench.spice": "9f323c69c9873f5fad5966281b9903f7037d31521e8dcaf12f763f90968cb496" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..34a442d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7df5eef1df75bb86", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7277 + }, + "f3db": { + "min": 51610000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7776932, + "f3db": 86023690.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.3420958, + "idd": 3.298738e-05, + "gain_at_nom": 0.7776932, + "vout_at_nom": 0.3420954, + "vin_lo": 0.3681853, + "vin_hi": 0.3681853, + "gain_lf": -2.183841, + "f3db": 86023690.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..1e051a35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7277 + }, + "f3db": { + "min": 51610000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7776932, + "f3db": 86023690.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..e5620148 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +.ends C05_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..e28d50df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C05_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..38d0cd6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.39u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..110eab87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C05_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0648556f7a684bd9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..89469ff6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6d09e39fc142e4a333b8b7f87ce0672d79b3218e3333769d76461cec10e2b0c1", + "qualification.json": "bf328f00b32c99125fa57ca3632278812968e16a40587ef0b7624dce6ff12a95", + "specs.json": "aa5252bde45c60b9fd04f7675043cb9b9864657efb64cf6d600d066c67fbd23e", + "target.spice": "dff48ac8bb7d0a7570fa756d379a48e7f123e06c73e9445e8336c313c18d6b11", + "target_lvs.spice": "0561cb31ea9e10060f59ff6ce40b10338222bdcd8b6eadcc8b7a29da1f3398df", + "testbench.spice": "99b19d911259ebf59b4b865aaee3c12c774835191917d353454f11790fdbd729" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..2cd75c03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0648556f7a684bd9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7264 + }, + "f3db": { + "min": 54030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7763982, + "f3db": 90048590.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.3326983, + "idd": 3.107174e-05, + "gain_at_nom": 0.7763982, + "vout_at_nom": 0.332698, + "vin_lo": 0.3736716, + "vin_hi": 0.3736716, + "gain_lf": -2.198318, + "f3db": 90048590.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..d1d720cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7264 + }, + "f3db": { + "min": 54030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7763982, + "f3db": 90048590.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..b0297c4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +.ends C05_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..7f733cab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C05_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..997e36ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.26u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..cac6467b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C05_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "006eee7ac8dae220", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..1f7a5a70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "43e7ee7b17f89047ad7c85ee7e8d3d7fe4d1c2f32d673a84665de6ea561baebe", + "qualification.json": "2d53ade55d557a31a5a6ed7a906f6b46c2a606819d312612e0c7b53fe7caf901", + "specs.json": "c5c133e61e4142fc9fe6bd726b3a7ff7d13cb982edd9cc3caac865e4b3e9a4f6", + "target.spice": "c95b350fed78756428f392f22419ac03bb95586cd5463df40aee807f93b93965", + "target_lvs.spice": "7f4df300dc59f9aba9d64c356629b20ae4b5384b6b3619374237c6a22c4291af", + "testbench.spice": "4cb5f9aaf46f1f0524e9c8e0238851ff627b693526237934eb98ff5d2890ef1f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..839c4cdd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "006eee7ac8dae220", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7253 + }, + "f3db": { + "min": 48330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7752678, + "f3db": 80548170.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.3405532, + "idd": 3.35421e-05, + "gain_at_nom": 0.7752678, + "vout_at_nom": 0.3405528, + "vin_lo": 0.3744812, + "vin_hi": 0.3744812, + "gain_lf": -2.210972, + "f3db": 80548170.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..ecbde2a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7253 + }, + "f3db": { + "min": 48330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7752678, + "f3db": 80548170.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..6d61078f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +.ends C05_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b0333674 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C05_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..2da9dbde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.52u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..617351fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C05_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "82bd959f65e7bb80", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..e37b311a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d759c40b7a0a9657a0f39dbf7f1de44540e6453585cd3567f57f6213482010b3", + "qualification.json": "b7ee39e4303322822026da1c96e601bf380c94f7e228e5f58d5626ec2fa58f23", + "specs.json": "31c4e3bccb41c40a1e43345cd4358cd5b7f875ece747f04de7d64c4b3d41c834", + "target.spice": "2b81ae2c922e10c3a265446a72d84f68fb31eff62e6d1f80b19a2822da561d15", + "target_lvs.spice": "2b20727244dde369d5ef64c66b2ebd6c1c3a40212554b8124c9cd1f3124704bc", + "testbench.spice": "cb7edddfe2ee16ca598758122994e169cfcf364732459128e0be622bf8248062" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..879da7db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "82bd959f65e7bb80", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7132 + }, + "f3db": { + "min": 45290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7632474, + "f3db": 75490140.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.3140574, + "idd": 3.246175e-05, + "gain_at_nom": 0.7632474, + "vout_at_nom": 0.3140569, + "vin_lo": 0.4092456, + "vin_hi": 0.4092456, + "gain_lf": -2.346705, + "f3db": 75490140.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..f1d51ce4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7132 + }, + "f3db": { + "min": 45290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7632474, + "f3db": 75490140.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..2308a68d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +.ends C05_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..98835cc8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C05_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..1803a172 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..bfa5497a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C05_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2aebf270f7880bf1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..f916fce6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e4fe17b9fa7f32181d773523ade6d9046470c85671f50ab5ef31faca62b15221", + "qualification.json": "5a3509517d19a6d052be0b9e011f5ab354b05ac7cb21d268a43e60a67e51921c", + "specs.json": "3820206f827dec1ee3a167ad2a31ddd67da79f4b55b7177692d54b0a44144173", + "target.spice": "8701ccfa39c94f2c4f320d02d074e5bf9ce049535a2ec5a9220c3639ce6ffa30", + "target_lvs.spice": "4ecc09416aaaa35d698871241007312141718c962a12c0a3cda42393a6b075d2", + "testbench.spice": "fd760855f64b9c9174bb7fd9d5f324755fca218ec84c383e2a149e2f1f292bf8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..c6c18bd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2aebf270f7880bf1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7131 + }, + "f3db": { + "min": 47940000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7631106, + "f3db": 79894260.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 0.3069455, + "idd": 3.08296e-05, + "gain_at_nom": 0.7631106, + "vout_at_nom": 0.306945, + "vin_lo": 0.4096913, + "vin_hi": 0.4096913, + "gain_lf": -2.348263, + "f3db": 79894260.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..a7b2f072 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7131 + }, + "f3db": { + "min": 47940000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7631106, + "f3db": 79894260.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..f231d6b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +.ends C05_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..6b04b2b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C05_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..9c78a258 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.26u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..dcdab293 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW1_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C05_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b7284ee6da15bd44", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..38622046 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ebb21afdfdf6f648d65283afb6afe9c12582e0a54ccc5f4e17f32a4f6f4e2bc6", + "qualification.json": "b72ea3f3d412c3e25cc60f78c37bfc13db4b9b0ea489ea8b8c1a7dc2a03bc92d", + "specs.json": "c5fd39865b880dbc5736abaad547e8fa6a168b6dc7280e6b4ae70b1644998792", + "target.spice": "18bf76ecb7249f865eeca5b4c4295cfc32157217ee8db4179a3503ea2d4f70d7", + "target_lvs.spice": "325662be14049742effaea2556fddaa8804e3941e4421cb491031cb046e29a20", + "testbench.spice": "5f5aaa5b4e95d66b5b533dce8b62038a3f91cfa227e924891a937697a4632e83" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..8f8e5a7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW1_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b7284ee6da15bd44", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7091 + }, + "f3db": { + "min": 42110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7591457, + "f3db": 70185470.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.3104767, + "idd": 3.280455e-05, + "gain_at_nom": 0.7591457, + "vout_at_nom": 0.3104762, + "vin_lo": 0.4197914, + "vin_hi": 0.4197914, + "gain_lf": -2.393509, + "f3db": 70185470.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..ee4b0197 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7091 + }, + "f3db": { + "min": 42110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7591457, + "f3db": 70185470.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..32b52934 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +.ends C05_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..48575b99 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C05_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..460871d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..4d65b1ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C05_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "730a68d562366227", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..10eae50b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b2dcdd949fa17e95089102290ef9b57ed906158f24a91d7e9936b9fd5b690dee", + "qualification.json": "ca54bb68a380d82b43b18d32c12121d70fda606501c174892bb8b0de7608b3d3", + "specs.json": "d5491c3bf8dc8af084be6eb6b51ed8ced5b027d4a201cbd266c9f60b9b513132", + "target.spice": "f3ab817ea20917a230f8da77ebea40950b30befb0e8607d84b30c6d1cece1189", + "target_lvs.spice": "f09eb99f8e1dd455f7de24e6b29244b13190bf147abd77d1e0fb0719c1f310ec", + "testbench.spice": "1eed1139a6aebe3ce7b0aea8432eef36684bb8e052e1c59af36ae1b16d93a80f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..b5b0719f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "730a68d562366227", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7362 + }, + "f3db": { + "min": 56070000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7861768, + "f3db": 93451050.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vout0": 0.3605514, + "idd": 3.296641e-05, + "gain_at_nom": 0.7861768, + "vout_at_nom": 0.3605511, + "vin_lo": 0.3427679, + "vin_hi": 0.3427679, + "gain_lf": -2.089602, + "f3db": 93451050.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..e642fb64 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7362 + }, + "f3db": { + "min": 56070000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7861768, + "f3db": 93451050.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..5995564e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +.ends C05_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5337d7a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C05_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..a5bea7a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..819a3828 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW2_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C05_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8ef63d5b6f4fc7df", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..c6e6c2b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "85c74ce99211cf648641d835acd841d0a2b20e662c5a2a48447ec14877f3265e", + "qualification.json": "1df0603c2d37678dc31022cc704a7d153d03026d54cb6141f1d7d479c7351217", + "specs.json": "bb7c7f00c876967251f81b898775d116712d14a45fbdf2159807819eb7bb3b3b", + "target.spice": "35bca2717dc6235ba57bdacc64e98ad02f8bd6b2a80146b6f6ee4f3baf0a6656", + "target_lvs.spice": "7ad0de7a16cce2b4597c1bab22d2a185b6c76c95eb986a3a6cb6f433a42245b6", + "testbench.spice": "ee8099e98f0bd3dc67329e3ca12eb75d88900ed75db73a544135c2566d3d3975" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..0095a3e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW2_sL1", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8ef63d5b6f4fc7df", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7345 + }, + "f3db": { + "min": 58370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7845447, + "f3db": 97280540.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vout0": 0.3496368, + "idd": 3.090327e-05, + "gain_at_nom": 0.7845447, + "vout_at_nom": 0.3496365, + "vin_lo": 0.3515873, + "vin_hi": 0.3515873, + "gain_lf": -2.107654, + "f3db": 97280540.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..31cd7f15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7345 + }, + "f3db": { + "min": 58370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7845447, + "f3db": 97280540.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..2dcd8960 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +.ends C05_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..900818d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C05_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..5d225490 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..91934a92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_ihp130_sW2_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C05_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "288b182ad6ac88a2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..000249ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "51a5fca72eef8c5289d74f4ff8fab6ceb66b5b8c5c6f4397ebe60667e9b7b9c4", + "qualification.json": "0053bd68a36c76cd2c3b9eac51ae8fbb7e438835930fa82ad94e00b002fc9797", + "specs.json": "0a6abcbda28bfc634b854757c55c100df63db1e6c20c54b052357b5425f54596", + "target.spice": "2e6aefaf0912fc2ba685f5bb80a4b838274277f40f4517af688ab3b49085f72e", + "target_lvs.spice": "b96afee50acc2fd5fe7a9ad9be1dc6a73bcdff047a4f09ef4b4ecdf605a80564", + "testbench.spice": "6a8cf327df91931c444bc64f8df7a10fe635a3d479b869ce08fa388c29021095" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..9a641ed7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_ihp130_sW2_sL2", + "circuit_id": "C05", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "288b182ad6ac88a2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7346 + }, + "f3db": { + "min": 52740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7845507, + "f3db": 87893260.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.3603281, + "idd": 3.365257e-05, + "gain_at_nom": 0.7845507, + "vout_at_nom": 0.3603277, + "vin_lo": 0.346292, + "vin_hi": 0.346292, + "gain_lf": -2.107586, + "f3db": 87893260.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..1f79d748 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7346 + }, + "f3db": { + "min": 52740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7845507, + "f3db": 87893260.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..00709aeb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +.ends C05_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..65108a32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 VDD VIN1 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C05_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..d89e1431 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 0.78 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.2 0.003 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=0.78 +meas dc vout_at_nom find v(VOUT1) at=0.78 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..b84a9b4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C05_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "635cda71f9594d72", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..07c0566c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e5d5a09646707b114d86b8a00ff4eec33af91d3856346eb5ef070957e6718446", + "qualification.json": "72e7d97f5654451b3192ebc781852fe17c08f76790d6a170f7c44fd09133c557", + "specs.json": "b615bb8cc3bf2a1c04f7a12a3e2c65add0631cb0f40ca836ba70d365c524c399", + "target.spice": "b033eacf742cad66b3272915de418209302bab0fa6d11161d71eb374e4eef6ce", + "target_lvs.spice": "4bba21ec0376a4909d1f623ebfd5e1aa501bf2365d83d943de4882a746ed6ea6", + "testbench.spice": "3f5933c0d882cc667a4819acbd70c07cf8f4d81e10a0c5673454204de8771dcd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..8dd243cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW0.5_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "635cda71f9594d72", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6286 + }, + "f3db": { + "min": 33020000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6786287, + "f3db": 55028800.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.6, + "schematic_measures": { + "vout0": 0.2590432, + "idd": 3.09043e-05, + "gain_at_nom": 0.6786287, + "vout_at_nom": 0.2590432, + "vin_lo": 0.9045592, + "vin_hi": 0.9045592, + "gain_lf": -3.367227, + "f3db": 55028800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4917442d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6286 + }, + "f3db": { + "min": 33020000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6786287, + "f3db": 55028800.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..fdbb92c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +.ends C05_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..4681ef02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C05_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..99df5c97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..2e9b2735 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C05_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9e3ff600c55a2835", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..3f4e5f0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a163cd3d39959c737030a5058b25f1f739e38799093ceea64ada7cacfc06175d", + "qualification.json": "8f9b0e6dc6f85a237e1572ef1f4b20a0f988737e285e6abcdda1edaf6773ef59", + "specs.json": "1d7d056aaf013e37a2ebfdaf967572383a769aa6ca516effc6ebf7ae26f15d97", + "target.spice": "4b4ba159776a8457bbb43d811a12b445ffd4262960d40af0810a34ba0ee4752a", + "target_lvs.spice": "2924e4e8fb98d700ad8c14b0b60b100dd991ee89df472863fb61e81dbf21e023", + "testbench.spice": "d386a88a2bf7010ddcbaaa09efccebe2be241998de3e337ba5123c5dca9a26b1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..95ad6c2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW0.5_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9e3ff600c55a2835", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6587 + }, + "f3db": { + "min": 39900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7086538, + "f3db": 66496440.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.1, + "schematic_measures": { + "vout0": 0.2746515, + "idd": 3.261578e-05, + "gain_at_nom": 0.7086538, + "vout_at_nom": 0.2746515, + "vin_lo": 0.8699711, + "vin_hi": 0.8699711, + "gain_lf": -2.991257, + "f3db": 66496440.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..52b423b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6587 + }, + "f3db": { + "min": 39900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7086538, + "f3db": 66496440.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..86da45a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +.ends C05_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..9cf232bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C05_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..38be26ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..92a424a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C05_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "69d1e61e4c1779ff", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..50905b4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e573308dee34e08fe55b87a58f1f5575cb613ca0f8009558e578c038c39b632b", + "qualification.json": "79c39e096a0b882f4e920f790edc19aa2efd6e7e1bf1ff1f25f2dcebf4682cf1", + "specs.json": "a448cfa96836be77bf6876de90af397857cb07eb900b7e55ad48fbbbd7e053a3", + "target.spice": "c83ca53a9e5ab4b7a28da8becb76e1bd05a281775661aee8ad4317f232085b23", + "target_lvs.spice": "12fda14fe1401202c88980ad3af5883ae3b1ae65e7b6c1fdb942d6c53bb754d3", + "testbench.spice": "cfeea9a0f87575d7cbf20f017247762d3e86714cd5a335b12ede10dd7dac1495" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..50711dd9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW0.5_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "69d1e61e4c1779ff", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 29170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6365827, + "f3db": 48621940.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.5, + "schematic_measures": { + "vout0": 0.2407817, + "idd": 2.863318e-05, + "gain_at_nom": 0.6365827, + "vout_at_nom": 0.2407817, + "vin_lo": 0.951101, + "vin_hi": 0.951101, + "gain_lf": -3.922816, + "f3db": 48621940.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..4580a150 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 29170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.6365827, + "f3db": 48621940.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..49676225 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C05_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..97d1e361 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C05_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C05_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..b19e01bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..c0b32a31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C05_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eab5696aa66e742d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..9834bb69 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b51af491b4581861c896064386bd7310ec84a97758d63a251e5ac6c8039fb4b7", + "qualification.json": "df0f4bfb5c21a491aa1394556c3db14f931028f71fb629f5096fe66fb337d334", + "specs.json": "3f1c8898899418e86d03c47abca09804d92de9b5e99a02c3f7c2c77e3864c75a", + "target.spice": "03dd06e6fa76aa72feed17d743c7cece5df53bf6da1c01bb2fbb531ed1606bd0", + "target_lvs.spice": "5aa539301363d1d0351c4a494536a21d6f2776fb04f907be86205ef8b624fdc7", + "testbench.spice": "594f09bfb0421be57beeae29e5fe36567b2418e426312120fcfa5a832b7d38a9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..c9986583 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1.5_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eab5696aa66e742d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7088 + }, + "f3db": { + "min": 52110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7587754, + "f3db": 86842120.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.3, + "schematic_measures": { + "vout0": 0.3437213, + "idd": 3.540741e-05, + "gain_at_nom": 0.7587754, + "vout_at_nom": 0.3437213, + "vin_lo": 0.76352, + "vin_hi": 0.76352, + "gain_lf": -2.397726, + "f3db": 86842120.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..0c196647 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7088 + }, + "f3db": { + "min": 52110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7587754, + "f3db": 86842120.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..8e6e6529 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +.ends C05_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..18a4b764 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C05_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..2432b92e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..3e076b04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C05_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "df0df0653fb4c194", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..6166ca04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5c5ee6e9c300dfe9ed307b3fde01c36bb4c0e67c181281ecbbc13320fae6cffb", + "qualification.json": "0238d39dcafb98c75bfac8ebfc2b87ece09a9f10e6f7c93c586a75f836cddf3f", + "specs.json": "6739aaef6ec754b66b2bdd4eee68e3665341c36cbc146ad5e1d95cb7c07780f0", + "target.spice": "443d419dc6c4214172a5fc1b244ea5121eaf467c8ec148771a36a7ed864c9d0e", + "target_lvs.spice": "578f90f62b1d66549ed8f9288115bf8a46d6f86e46491d262f4a18b2ed4141f0", + "testbench.spice": "43e7eb04e1a6d0fb34c36fa8c73fc870dd32bbfda9013c7035e8e82c8cef9b0c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..28330882 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1.5_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "df0df0653fb4c194", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7092 + }, + "f3db": { + "min": 60030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7592457, + "f3db": 100054200.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.5, + "schematic_measures": { + "vout0": 0.3494129, + "idd": 3.574033e-05, + "gain_at_nom": 0.7592457, + "vout_at_nom": 0.3494129, + "vin_lo": 0.7522897, + "vin_hi": 0.7522897, + "gain_lf": -2.392343, + "f3db": 100054200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..c872b4ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7092 + }, + "f3db": { + "min": 60030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7592457, + "f3db": 100054200.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..1d75ac21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +.ends C05_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..e31cb4a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C05_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..14d223b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..f3d36f91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C05_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e277d7c7f7380fda", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..e2094a4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0d5f917939549159e8f8714c83b058ea499f9a1656c9272f46ca3359a4680646", + "qualification.json": "2ce9c15b570dad0dc47b5ec1df9441a124b702709875fdce69ce3b605c5d9a09", + "specs.json": "bc918af377ad12ea3c85a325abd12cf30aea3f72db83b5c327967bd02270f576", + "target.spice": "7b60a39764b63bd0129928d85e516d2a7a1555f773568c28df2b5ecbca0184b8", + "target_lvs.spice": "78ed2086dabd63b249bad4870c4f96f647a56ac2fe24ae0e7b5c2855ca313dbd", + "testbench.spice": "b4c6c8d8c1877a597145b43c34f61af6af66deecbcdcb730871ddbe02bc7b25b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..3715c0fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1.5_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e277d7c7f7380fda", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6994 + }, + "f3db": { + "min": 45420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7494204, + "f3db": 75701030.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.9, + "schematic_measures": { + "vout0": 0.3326244, + "idd": 3.356999e-05, + "gain_at_nom": 0.7494204, + "vout_at_nom": 0.3326244, + "vin_lo": 0.7794716, + "vin_hi": 0.7794716, + "gain_lf": -2.505476, + "f3db": 75701030.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..cb5a647a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6994 + }, + "f3db": { + "min": 45420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7494204, + "f3db": 75701030.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..f383d66e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +.ends C05_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..d969f008 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C05_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C05_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..79226c29 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..f35cb865 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C05_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c635b50631355e72", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..18263958 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "19dfb1fb0180320ecf0f1b4c722c2962df02dc6af1e98f8d2f118612a4686538", + "qualification.json": "e56f1e846f45449bb82c4e9e659d826800c29d8b42d479eb08b8399fb8620245", + "specs.json": "f98bb6c197a70e92453f1ead0b39bb3ca74986850702932d5fda3ad749245ae6", + "target.spice": "5fb959c43557dce733fb63e189d4b118a9433bb931a23346540a1f83b3e2cfaf", + "target_lvs.spice": "474e140944737f999fb2c7c6da3d9e54eb748141c13bebf50242e7e84650e64b", + "testbench.spice": "289a16863a49b097399921900d570fac21270d586cde91b72f5d2befd6bdccc4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..dc6d5bcf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c635b50631355e72", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6903 + }, + "f3db": { + "min": 44140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7403227, + "f3db": 73573610.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.6, + "schematic_measures": { + "vout0": 0.3161718, + "idd": 3.386103e-05, + "gain_at_nom": 0.7403227, + "vout_at_nom": 0.3161718, + "vin_lo": 0.8034114, + "vin_hi": 0.8034114, + "gain_lf": -2.611558, + "f3db": 73573610.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..06cb45b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6903 + }, + "f3db": { + "min": 44140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7403227, + "f3db": 73573610.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..24d2461e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +.ends C05_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..4f0a4413 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C05_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..f69ade23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..b63cc829 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C05_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "fd1865c2ef80024a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..57813260 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "af4eac4e4dd84a8a39999a7b0404da39fb4f4bd4017a73fbde66191762318422", + "qualification.json": "462243fbed4bafff9164713328c4a610636179961ea2dc727694628c0d355c23", + "specs.json": "d9a19538debe79e2b3fae4110ff27bf166cd087ae9eb59fc372451b514a0f62c", + "target.spice": "b3717322b6b2832ae76626f96df76bbc07c4ba105e990b847bfe6ec8f3dc6f23", + "target_lvs.spice": "8c551041485630d4cf908659aabbc86eb0f3bf3fe5c3652e31f19fcc51d0472a", + "testbench.spice": "d5c6e4863ff3b1582562ffe6c28782ec282403df765224c375429982717fa3a1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..f0b90ceb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "fd1865c2ef80024a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6961 + }, + "f3db": { + "min": 51990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7460907, + "f3db": 86655320.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.3, + "schematic_measures": { + "vout0": 0.3255993, + "idd": 3.429753e-05, + "gain_at_nom": 0.7460907, + "vout_at_nom": 0.3255994, + "vin_lo": 0.7868045, + "vin_hi": 0.7868045, + "gain_lf": -2.544153, + "f3db": 86655320.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..15fce666 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6961 + }, + "f3db": { + "min": 51990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7460907, + "f3db": 86655320.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..58d2d53c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +.ends C05_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..198450ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C05_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..2dd03af7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..5c6fa6dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW1_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C05_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9db1cbe6ad1c381f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..68e10934 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f7ba00d2f9ad7760ad5101ca56542f789de01bf45ca960b1be65e2a7fe4ca585", + "qualification.json": "630716a5e15bcfa981d394bcbff52b76f97f2b4e4581d53fd1f48ef7ab24ba60", + "specs.json": "11136d47c164f9cf5c2c424ece2033d6656495ff2d73bbb68ff1b1aa516cb144", + "target.spice": "e375a9b54e5a0b256cdf1480629e3926ceb7626645b9927188f31aa101440d9b", + "target_lvs.spice": "0ee6011e7c216f61cc7042f6bdb6a9d97541bdeabf6c4713db986d285dc0d2ea", + "testbench.spice": "da84754cb3d13ef2f8dfd56c4fbdb70297347ac97078e05c1c138f508592b5ed" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..ce9f64f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW1_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9db1cbe6ad1c381f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.6762 + }, + "f3db": { + "min": 38230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7261568, + "f3db": 63718630.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.6, + "schematic_measures": { + "vout0": 0.3024541, + "idd": 3.198847e-05, + "gain_at_nom": 0.7261568, + "vout_at_nom": 0.3024541, + "vin_lo": 0.825593, + "vin_hi": 0.825593, + "gain_lf": -2.779357, + "f3db": 63718630.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..be69e0ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.6762 + }, + "f3db": { + "min": 38230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7261568, + "f3db": 63718630.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..f701ce57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C05_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..312025a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C05_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C05_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..3541d2cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..56c37bb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C05_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7a061e1c7eb1a934", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..ccb1a248 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "58b125dcd34d461ba58b330e48abb3f48521ffe84c4167798f759c0b267b7f3e", + "qualification.json": "f7c70bf09552490737566020a597d0bd1f05a7cac97fdbdc0952b8f22b0a4ccc", + "specs.json": "0fb674568a386c9d1034d2770ec606ff4761e74d58c23d2d2734f6776c20dfc8", + "target.spice": "0cd921fc02d087ec48499db17af2104ce0ca6725f5dc911ceb28a3b6e1e5a0d8", + "target_lvs.spice": "f2f6d1e64349656f2c6f4dab0a97e38591ead75ee2734ea3bc139f5750544c1e", + "testbench.spice": "b6a6b2d4397ef28f37c3fae1015ecdb3817f31d3e2e4b6a96b9c86dbe876444f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..2ba294ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW2_sL1.5", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7a061e1c7eb1a934", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7178 + }, + "f3db": { + "min": 57000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.767843, + "f3db": 95002890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.8, + "schematic_measures": { + "vout0": 0.3630991, + "idd": 3.539556e-05, + "gain_at_nom": 0.767843, + "vout_at_nom": 0.3630992, + "vin_lo": 0.7361643, + "vin_hi": 0.7361643, + "gain_lf": -2.294543, + "f3db": 95002890.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..1624fb48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7178 + }, + "f3db": { + "min": 57000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.767843, + "f3db": 95002890.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..83640569 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +.ends C05_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6afc2014 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C05_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..d03d90f7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..15442579 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW2_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C05_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e675b4595c16f64f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..b6c147de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2413b1ea6f085b41b5c6f90d1d43d0073a2d170d6ea2cd16cd2d7d66d62210f6", + "qualification.json": "4d6fda57d0aee0b10595e45eab2c1586d4e8ed2ba20b0f67547b66c1533befa0", + "specs.json": "0eb4410528914e8ba8f674685eb8c91d924107a2e4a7503ce57842be7daa1e35", + "target.spice": "520fdbf3c115766e6a6b833c890056cedfb4077de9ab98cd79039aaa38cb35b3", + "target_lvs.spice": "b144113649ac6eae0e0b14fe6b8034d4030c4db36c35ff8514d9b65d07a36055", + "testbench.spice": "4063c61b09d3b42935919c83df0bec00be7f379ca93c3dbfa0793e993b31ede3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..25514505 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW2_sL1", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e675b4595c16f64f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7154 + }, + "f3db": { + "min": 64130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7654134, + "f3db": 106882800.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vout0": 0.366875, + "idd": 3.544366e-05, + "gain_at_nom": 0.7654134, + "vout_at_nom": 0.366875, + "vin_lo": 0.7264476, + "vin_hi": 0.7264476, + "gain_lf": -2.322071, + "f3db": 106882800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..71f05c32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7154 + }, + "f3db": { + "min": 64130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7654134, + "f3db": 106882800.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..efadb953 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +.ends C05_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..6356888d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C05_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..072352b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..2b1f351e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/case.json @@ -0,0 +1,103 @@ +{ + "case_id": "C05_sky130_sW2_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C05_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "category": "follower", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dfdf19015b0f0b0f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input source" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..468bd741 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "21911a75aa7cb6acb527358745c653e464cc3e5a911c9e0a539a667e3510830b", + "qualification.json": "16d40dcff636babe66e6ab4a08fdc8886c36c6076cea1d33a10ed9f08a8d9172", + "specs.json": "b07a8bec265ae27963b53a3e442fab4b01e5f9ce6468e9f07d75ce889b052fcf", + "target.spice": "9cccd30fd878f75cc4928c00f7cafba8e205e12ee18572524867064fa8d7bd89", + "target_lvs.spice": "0abe60c4d8e3de8f2c3e7fed3847ba45f730c8eb08a8ca4611f237ae3cb829cf", + "testbench.spice": "49ce63edd2b28d541084b98fb2ac3061772fe63b7de17bd66015a636e0dc42c6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..b77b4078 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C05_sky130_sW2_sL2", + "circuit_id": "C05", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "follower", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dfdf19015b0f0b0f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_at_nom": { + "min": 0.7114 + }, + "f3db": { + "min": 50670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7613855, + "f3db": 84455480.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.3, + "schematic_measures": { + "vout0": 0.3522278, + "idd": 3.434093e-05, + "gain_at_nom": 0.7613855, + "vout_at_nom": 0.352228, + "vin_lo": 0.7517677, + "vin_hi": 0.7517677, + "gain_lf": -2.367897, + "f3db": 84455480.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..db0441ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_at_nom": { + "min": 0.7114 + }, + "f3db": { + "min": 50670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_at_nom": 0.7613855, + "f3db": 84455480.0 + }, + "floors": { + "gain_at_nom": { + "min": 0.6 + }, + "f3db": { + "min": 10000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..a397e572 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C05_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +.ends C05_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..9d8f5d21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C05_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 VDD VIN1 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C05_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..70e3bc2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C05/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,30 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C05_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 2e-05 +VIN1 VIN1 0 dc 1.17 ac 1 +RL VOUT1 0 20000 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +print vout0 idd +dc VIN1 0 1.8 0.0045 +let gain_dc = deriv(v(VOUT1)) +meas dc gain_at_nom find gain_dc at=1.17 +meas dc vout_at_nom find v(VOUT1) at=1.17 +let okg = gain_dc - 0.5 +meas dc vin_lo find v(VIN1) when okg=0 cross=1 +meas dc vin_hi find v(VIN1) when okg=0 cross=last +ac dec 20 1k 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=1k +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..bb810bf8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C06_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.84, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4de731f518e1d118", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..add76e13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0e18e832c50f87415d74328cf585734c30c2fd8652fc5373697be2eabc5fa9c1", + "qualification.json": "5d0f74d43630d6828c9c736d1d1cb0a59880daffbd4e6e4a9d70e2990aa3ef15", + "specs.json": "137e2b71bbc7a2053f218baeecaed8420dd6eac49c1e8e01c46333548175b34f", + "target.spice": "48285446e4b62054f076929a839f1c75770faabf655d3365fbe1945f3351bcd4", + "target_lvs.spice": "02c40d76fe723bd9d2bcbf9cf8fc44c858adb58830b1a1cf3ebbdfd232f3cfa7", + "testbench.spice": "4d822b30e51b5e1601403da89de8d7180d58efa605e41a14e551ca63ac4d1a9e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..df956eb5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4de731f518e1d118", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 53.43 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.43498, + "f3db": 135535.3 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.201718, + "vin0": 1.201718, + "idd": 1.947492e-05, + "gain_lf": 56.43498, + "f3db": 135535.3, + "ugf": 90143860.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..7e03ff34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 53.43 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.43498, + "f3db": 135535.3 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..9f817d17 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +.ends C06_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..598c1ae6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +.ends C06_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..b6130e30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..7846fc80 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C06_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.56, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ce7474b5e041d6c0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..9862ba33 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "db3ff36145b72f0e6c91232ce65ec61a2d97dcdeb9470a4dbc3a643bf4b50d3e", + "qualification.json": "03af1284aa78cc76b9724169fd180920365f1904f18a99168d45eaca82bab6c9", + "specs.json": "d305a45c521ea89aa436b8b80314abb6b788ac9415bcffd3cbe62fc3c79f4b8e", + "target.spice": "6938d48d1a5bc4d0a27492e4f11251fcfb469312457e438ff85da909058dc142", + "target_lvs.spice": "56203cf278ff638dae9ec27136c7c101bb137d85f7badac9c3bd689ffb5efd90", + "testbench.spice": "3970673e344ef1683c81a8aff4315eec1adc4456c6a8ea1411180055143c4fdb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..aaee4768 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ce7474b5e041d6c0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 50.11 + }, + "f3db": { + "min": 140300.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 53.10618, + "f3db": 233789.4 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.092331, + "vin0": 1.092331, + "idd": 1.90246e-05, + "gain_lf": 53.10618, + "f3db": 233789.4, + "ugf": 106116900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..1948412e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 50.11 + }, + "f3db": { + "min": 140300.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 53.10618, + "f3db": 233789.4 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..3cc4f10f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +.ends C06_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3c717231 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +.ends C06_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..7dfcddc1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..f9a3dd92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C06_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3e91ef5ed8d080a5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..0cf0b226 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4ad6afaaf00f0d0943878e2acedb774cc72193a157d6efb7de4679908f27b382", + "qualification.json": "ec448432b622922865f7eed0ceed5749e1ff97c24666b49b902f0f14e077c250", + "specs.json": "fbf0d7a7e445bd44dbc682d465571094c83dd428fe303ff626c2ca5941770c2b", + "target.spice": "48c2fc1e67da74e8949c95e5305005e6faaf7ad76543e8d41db98bfb29cf9f22", + "target_lvs.spice": "b607ee6134484f09467860e2911b3b06ba7a0e1799a59e60e98eb34dbc31817e", + "testbench.spice": "2ffd8133920f64815889db4df8ced579af3936f970d65148fcc37e9a8a6bcac7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..7778c9f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3e91ef5ed8d080a5", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 54.27 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.26683, + "f3db": 109227.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.294706, + "vin0": 1.294706, + "idd": 1.979704e-05, + "gain_lf": 57.26683, + "f3db": 109227.1, + "ugf": 79918480.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..47eff1d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 54.27 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.26683, + "f3db": 109227.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..43cb0527 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C06_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..8ff02229 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +.ends C06_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..c45e488b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=1u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..bd70d88d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C06_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.84, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "edb15c0901c45b69", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..51591ac4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e6b90ba3e9865f8e6e81e76a2cb68351ce76fcc8edbefe108207d4b4ec92eb61", + "qualification.json": "302535d092e1aa4169840c686ae6a36d6e8999b6b0c95ec83f1a2775c52c4113", + "specs.json": "ac078fe913261349a06c471420a44276f2e8f20385ab4d620f7a88f679a97c09", + "target.spice": "c10a9eeea71fdfad7c327333ab2f5ded31dad35c5f40621bd82d0171b140341f", + "target_lvs.spice": "d4773bb9e57bb84050926672b507110952badc3efb3e923a3d02c4882d4bbf93", + "testbench.spice": "a7ec13a3d6183cb7b85fdc1b20ad1f1632ec7fbecd15253291cab79a5068b8ba" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..4c34dfd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "edb15c0901c45b69", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 53.84 + }, + "f3db": { + "min": 111100.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.83854, + "f3db": 185121.9 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9575607, + "vin0": 0.9575607, + "idd": 1.891868e-05, + "gain_lf": 56.83854, + "f3db": 185121.9, + "ugf": 128931800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..a8e77945 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 53.84 + }, + "f3db": { + "min": 111100.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.83854, + "f3db": 185121.9 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..da9c76b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +.ends C06_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..21550b5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +.ends C06_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d979aae2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..c82b7518 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C06_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.56, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dd2d433e7113c6a1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..8362b94c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "21eb834ef56bcf0f0ebbd9d75e69aa557954a3ab05585d0328ec631d3a83fd60", + "qualification.json": "0d8fd5a2d13a3b71137273b67bf2cbecbc5a90480273f3e7434e5d4733bc4f1b", + "specs.json": "6930cc22a64a0532b1ccb8ee28077bac66807ace9e17587a1d2eceb0cf780254", + "target.spice": "4a0d38d88cdb444ac11fa63ce755f298e4302eb59bb4d32d8126a3717135d1b7", + "target_lvs.spice": "4a21b8a859e81c1af36f12e494059be4496e628ed1a5382ccd910b79c8c526a7", + "testbench.spice": "dbe71d325847d8d276ff8f5767515a65b876c3862275247ad76b04de29e6b58d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..7c550c38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dd2d433e7113c6a1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 49.87 + }, + "f3db": { + "min": 208700.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.86996, + "f3db": 347908.6 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9005459, + "vin0": 0.9005459, + "idd": 1.894019e-05, + "gain_lf": 52.86996, + "f3db": 347908.6, + "ugf": 153526800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..1f74df23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 49.87 + }, + "f3db": { + "min": 208700.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.86996, + "f3db": 347908.6 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..50c28f6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +.ends C06_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ef550c71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +.ends C06_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..4c87937c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..214cf547 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C06_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf7895c3dd71f8b0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..20eb728f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3cdcd6a99b75ce050c9c59a032279144483f23c5f73728614e23c36dfc27470a", + "qualification.json": "bdf86793b3e73349d292f964b5c79230a535ed39889d669e8a596fb989ef1777", + "specs.json": "99f83ce9a69bae846c462e9daf7d5e3e6f1121124d5e644ed87bf17743752daa", + "target.spice": "02691026bb9064299c8fbb25547beecddab5f7489fe825db711d506e738b6490", + "target_lvs.spice": "4c4823b2aefcf33a3b888e192bd3798f218c11c1533195f9378f5a501f18a4fb", + "testbench.spice": "3c64fe961a15d4b8ea5d9d7172bd47deab568182d3ed8de8a79ef3ba2d5cbf2f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..da6f21b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf7895c3dd71f8b0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 55.59 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 58.5935, + "f3db": 132664.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.008382, + "vin0": 1.008382, + "idd": 1.907116e-05, + "gain_lf": 58.5935, + "f3db": 132664.1, + "ugf": 112980300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..2cab9509 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 55.59 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 58.5935, + "f3db": 132664.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..a43996a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C06_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b31fc761 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +.ends C06_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..93e5706e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=3u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..b585b863 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C06_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b79e403cdffeb3b6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..e0d91e7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "94534a4676bfa3cc9b930c9a3a405346834f7a6dc2f7f9a6ab4f907c986100c9", + "qualification.json": "286eb71fc829d4f3145e8fbba23b53851fd5299d1d475010d4e857a67d0c98a9", + "specs.json": "3845a7e3847fe338c135770cf2a57997a45add20c42bc70842f0100eb3ae6348", + "target.spice": "cfa24d80196ca58cda55248b51f3d8087b6d3f4e97460250fae90ec2421c1143", + "target_lvs.spice": "86b9eb1ae406cabe973089b80e53b5812c2cbf6b202e261a42d21cd40740b09f", + "testbench.spice": "2e2780984fac2d5e979e09d18e29c250acdb8d7cb9afaf45a93b4e74679e59e8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..8aad3ad0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b79e403cdffeb3b6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 54.27 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.27059, + "f3db": 157449.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.029786, + "vin0": 1.029786, + "idd": 1.903041e-05, + "gain_lf": 57.27059, + "f3db": 157449.1, + "ugf": 115321000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..37800df4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 54.27 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.27059, + "f3db": 157449.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..7134dcfd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C06_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..18233c30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +.ends C06_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..6d67f4b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..b1f3a07f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C06_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7b3650aef46077cb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..9107f253 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7215a8e53640666096f8bcfba33d1b342999d5cf361bd080fdee2c81d108bf20", + "qualification.json": "71658198c8c8e995fff3f39cc8d636e5bb7f5753bd94382407ccb4c28a77d665", + "specs.json": "c6d676b5fe797786f6f7a3654a6eaa5869c65b9d88ee01abb7289348cd5d9eaf", + "target.spice": "3402dd5a92a70a8d8571dec8cddd4c054aeca88b4f2ca9552b4e55d3b3f01288", + "target_lvs.spice": "2ca579cbf5723ab691f1c34ffb9dfa461d69cdd8ba7d416ac88dac66994e5132", + "testbench.spice": "e468358c1b24cda5297f6d22df6c2c14d918315d13f66e89f4b6e9626e7b2cf7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..f3f6671e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7b3650aef46077cb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 50.27 + }, + "f3db": { + "min": 176900.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 53.27176, + "f3db": 294878.4 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.957582, + "vin0": 0.957582, + "idd": 1.884774e-05, + "gain_lf": 53.27176, + "f3db": 294878.4, + "ugf": 136348000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..7794c482 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 50.27 + }, + "f3db": { + "min": 176900.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 53.27176, + "f3db": 294878.4 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..3c6fbe81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C06_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..4ed893c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +.ends C06_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..f3fa76e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..03b9e95d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW1_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C06_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac0492233c8a0173", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..dc73f964 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cb09492ed7b0ab418d9b0fbcc2a022aa3cb4590630ae9b1d490742130d3689c7", + "qualification.json": "68a0d35b756d3a07181bc2660fc60d1b1e12cb4e4c66528408169347dba5aafc", + "specs.json": "31d78c7ca3121ea52246c55c5feea226bd4e7a2caab6a15919a3219390fb2470", + "target.spice": "2cfe748dcc8552a5f28807d9dd6266092be599930d118b2413628186108b42c4", + "target_lvs.spice": "fd3babfc791c880084450324c47f334b56ccaf0b932bfc72fccd6e2b4a5d7141", + "testbench.spice": "64058f24753018c107bc283e5db6e10f24bc9c3b540f215904e07da0b51fba0e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..a2cd3344 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW1_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac0492233c8a0173", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 56.04 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 59.03807, + "f3db": 113210.2 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.093088, + "vin0": 1.093088, + "idd": 1.925956e-05, + "gain_lf": 59.03807, + "f3db": 113210.2, + "ugf": 101564500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..5a50a81e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 56.04 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 59.03807, + "f3db": 113210.2 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..e7fb44b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C06_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..5f58138a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +.ends C06_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..b2deb4ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..497279ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C06_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "516eec9f3eae926c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..c59c3376 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f26071853d567c84a36a16da4c396db6584630628f124e87e3f293dddd9b7786", + "qualification.json": "e8615f6a4e21772fab87b898d24bc806966c4bd2aaa73289c64173d308d7062e", + "specs.json": "11603f309209b5ad7f9a0bf4f54834f74000d6f2e10fdf70fe132a01be8e46e8", + "target.spice": "9d6e243162f2535fc773ed0e083622886533eeeb42d34d63c0a43efcf1e3d971", + "target_lvs.spice": "904cb27a06be25e2686ca1298ae82238fa3cf4331c3818b82c77dc30ab1d667e", + "testbench.spice": "2786403e3beb289f70123aa83af2b2a0888941301b921c8de1f9cf9b9ea42604" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..9f9c0049 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "516eec9f3eae926c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 53.71 + }, + "f3db": { + "min": 121600.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.70929, + "f3db": 202665.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9148134, + "vin0": 0.9148134, + "idd": 1.889219e-05, + "gain_lf": 56.70929, + "f3db": 202665.1, + "ugf": 138947700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..3aca3120 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 53.71 + }, + "f3db": { + "min": 121600.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 56.70929, + "f3db": 202665.1 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..37c59114 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C06_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7c140342 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f12 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f13 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f14 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f15 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f12 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f13 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f14 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f15 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.84u +.ends C06_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..64808c27 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..e1facba8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW2_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C06_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5222460009e30c42", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..831c0c51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4b0c1a90e0a283680f9659c50baee8b7e4b69c29a47bd3bf9a8a4a281817f5c8", + "qualification.json": "dbd9eca252651ea44534c9ee0af8ce8811431b7ce64b1878f29bb231024d75d7", + "specs.json": "7ebcbd7377a02e16e8d57e4771f0de5a514cd2a15a3b3a6fa97745a1f23e4ff1", + "target.spice": "9f0839b8e2af8d36ab33962e036a8d65049c3522763bde1e46a1a403ac12efc4", + "target_lvs.spice": "d6cbec169b328560251ce20794fb4abfe3d826b8ecb3fe1d24b898c092920f5a", + "testbench.spice": "97558694258bca8afac244c9fedb880379a07dcc62f460da77fb2162493572cf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..32e89fec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW2_sL1", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5222460009e30c42", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 49.73 + }, + "f3db": { + "min": 229800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.72692, + "f3db": 383023.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.8664278, + "vin0": 0.8664278, + "idd": 1.907915e-05, + "gain_lf": 52.72692, + "f3db": 383023.0, + "ugf": 166221300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..ffff6599 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 49.73 + }, + "f3db": { + "min": 229800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.72692, + "f3db": 383023.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..bddd1a4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C06_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..0728f7cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f12 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f13 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f14 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f15 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f12 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f13 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f14 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f15 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=0.56u +.ends C06_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..72ab6171 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..aff74851 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_gf180_sW2_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C06_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "20ae0bd437c33c25", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..382f52af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1836b570ad186b198e4656455823c7a445066e50c45f1b28218a2fd9ce099d9e", + "qualification.json": "c2319217d84cf99170802962792ec696a7de26e092936e466b19ca6d4f34a69f", + "specs.json": "6ae3fac035319b57789f9cdd73b8eb9121aa71478d5dde926d76f17b847f632e", + "target.spice": "0832cfb010876bf3fd258963da1b115c7e188f74deb1986326e8473b264255b9", + "target_lvs.spice": "2f213afe09166cbb88ee8c26d2600f531ee58ed67d669af4e7ad374455918aaa", + "testbench.spice": "98ae69f9054868a75b33a499833e916bfdeb777842ca54261260edd7c1b07b86" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..40f07166 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_gf180_sW2_sL2", + "circuit_id": "C06", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "20ae0bd437c33c25", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 55.46 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 58.46082, + "f3db": 145002.3 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.9583967, + "vin0": 0.9583967, + "idd": 1.897854e-05, + "gain_lf": 58.46082, + "f3db": 145002.3, + "ugf": 121660600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..89daf636 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 55.46 + }, + "f3db": { + "min": 100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 58.46082, + "f3db": 145002.3 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..a6a014a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1 VOUT1 VB2 net10 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 net10 VB3 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net9 VIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 VOUT1 VB1 net9 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C06_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..835a5fe5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +MM1_f0 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f12 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f13 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f14 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f15 VOUT1 VB2 net10 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f12 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f13 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f14 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f15 net10 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net9 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT1 VB1 net9 VSS nfet_03v3 w=0.5u l=1.12u +.ends C06_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..d564a7ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB2 VB2 VSS 8e-05 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..7b1cb7dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C06_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.39, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6c5a38204228862f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..ad71ed56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b2071538a0303de0aa3a60e3c487d1938c07bf34b0f39e1e913f6617c9838ca5", + "qualification.json": "e021b2173268fcacec695e0e1d8ef3da4b88622ac2093394a53be80ac0334eb1", + "specs.json": "5337f581ed5824322082029d16bc8f4b4c78422047a1040c59ec12d7e276bfe8", + "target.spice": "77a64176a3000bd487e751050b09fadf53282d1a9f375875c1554adeac88f155", + "target_lvs.spice": "c87f7726ae340aad2030227f510a25bd4a007dee2eaa62ba52f65a13da047cf8", + "testbench.spice": "f47b8a4d59b9081433c05065ff0fa13fe20aab894b7f4918e09e7d7600cad6e1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..a55f8699 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6c5a38204228862f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.63 + }, + "f3db": { + "min": 1644000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.63339, + "f3db": 2739355.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5601549, + "vin0": 0.5601549, + "idd": 2.008242e-05, + "gain_lf": 36.63339, + "f3db": 2739355.0, + "ugf": 186625000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..356fd9af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.63 + }, + "f3db": { + "min": 1644000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.63339, + "f3db": 2739355.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..1dfa71b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +.ends C06_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..9a24f1b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C06_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..cee8e6f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.39u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=0.39u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=0.39u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..f7de899f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C06_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.26, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cea5e9b1e5ca88d2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..7e66ba35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ff26ad2e271f876f0108ff512e0a97545b1e3eb434b062b9b25c470d35217442", + "qualification.json": "a9ac2cdd438f157337caa3888498917b0049d6f29e79560499e1852a1734bccc", + "specs.json": "23786727ae938a7c5ccb3ec3724a08092f9b93d05f6a3c9283881dc40a7d455d", + "target.spice": "f79c1e2b54d56c4ecb60ba90df3b2d761949e5f5b2525ca955b6196da5ad28be", + "target_lvs.spice": "0462af90dc3556e4f714fb5a1e7b8e384fb6f4b2d56e8495e25144ffa5f2904e", + "testbench.spice": "65878864fd15aa3d0089b169759790d5bb745ba2d0f39793c1d1392fa80e1e43" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..cb5b518f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cea5e9b1e5ca88d2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.29 + }, + "f3db": { + "min": 1818000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.28555, + "f3db": 3030727.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5597058, + "vin0": 0.5597058, + "idd": 1.845556e-05, + "gain_lf": 36.28555, + "f3db": 3030727.0, + "ugf": 198128000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4597f54e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.29 + }, + "f3db": { + "min": 1818000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.28555, + "f3db": 3030727.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..f2aefeee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +.ends C06_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..f7b2c228 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C06_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..5f4150d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.26u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=0.26u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=0.26u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..2a41fb7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C06_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.52, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8552463d5d873ae3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..122283b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0a685f602533e08d422de906e33e3993ace3dd8ece535144102e66cedd25d598", + "qualification.json": "1e7cfe907b80b932a5c2a4a85fa3a80aed81ed97cbf0f43118da23149f0cab3b", + "specs.json": "8320e18910a5334710f30df4913a8d75f44848189d94bf05f4fb111a996272f7", + "target.spice": "046b748f1148c0513cc85ce00f6b041f36cb17259923ef79fb4c3451a1dde60f", + "target_lvs.spice": "d3be2dbbcd23681f856bb246877088bc1c379796657c3c650b4fa51672094f11", + "testbench.spice": "6e649bfb8a64db977d838f90140d42ae7371dca49d6f1fd45a16fe60ee5bd38d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..78ec1035 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8552463d5d873ae3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.7 + }, + "f3db": { + "min": 1882000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.69502, + "f3db": 3137098.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5741607, + "vin0": 0.5741607, + "idd": 2.084907e-05, + "gain_lf": 34.69502, + "f3db": 3137098.0, + "ugf": 170957000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..05f19042 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.7 + }, + "f3db": { + "min": 1882000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.69502, + "f3db": 3137098.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..0391ab55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +.ends C06_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4db9f2e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C06_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..d74fd0c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=1u l=0.52u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..05697bd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C06_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.39, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6400ffa0df8ec521", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..622486cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "acaaa265dc299461ac0d342798e76d9e9d99b3fd2126fcd647b12e88572a081d", + "qualification.json": "2791f9b312f8418a607c009110645df789eaaf1d9e39217c72f052f3bfba29af", + "specs.json": "58f7648d00d5a6e0a1df7f86999c4ef2d6f92ebb3f3e2ae96a60f8214e6add02", + "target.spice": "a0cb6b0d8ceb10cee6d1e3aa524968880b8ed86a48cee59f779d542bbc46a46c", + "target_lvs.spice": "94eb2b4db567ac418090c4d864c43de40533e9bd71f7f7588b422d4c9becf618", + "testbench.spice": "ef953bb1ed69b19d04704218fa3ab60a81642c9e223930df802f7087200edea2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..ddc836a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6400ffa0df8ec521", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.05 + }, + "f3db": { + "min": 2523000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.05241, + "f3db": 4204701.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.4553442, + "vin0": 0.4553442, + "idd": 2.026799e-05, + "gain_lf": 35.05241, + "f3db": 4204701.0, + "ugf": 238673600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..cb35f4d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.05 + }, + "f3db": { + "min": 2523000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.05241, + "f3db": 4204701.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..7a8a218f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +.ends C06_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..187788ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C06_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..9df16384 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.39u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=0.39u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=0.39u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..38a0b090 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C06_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.26, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5169a8d045964c4b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..66437ae4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "963b1e445f6d11534b13b35046698056fdc203998d8d1af8329acca106416922", + "qualification.json": "daa9222b39dd7abb9d26f2efb7e11d56e5e3748d27cbdf7e76579c262c532544", + "specs.json": "7585d76408b2065e924f7f0d88c2879414c0d7a3d24edc8dc7d9a4282c06ecff", + "target.spice": "e2d02032865f16a79789ebd4e7fee694d22237b86d15b924844b012ca9e4b9a7", + "target_lvs.spice": "5d37f72f89851c356f41f3dd6dfc5223a135828a62093847d50ee0cefb1eb14d", + "testbench.spice": "fa6b2020476ec9c49e7af0144526307c6f49ab2fed6c3acdec49865feda9f964" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..b498ac81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5169a8d045964c4b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.57 + }, + "f3db": { + "min": 2800000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.56628, + "f3db": 4667127.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.4661412, + "vin0": 0.4661412, + "idd": 1.813558e-05, + "gain_lf": 34.56628, + "f3db": 4667127.0, + "ugf": 250163500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..873d5977 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.57 + }, + "f3db": { + "min": 2800000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.56628, + "f3db": 4667127.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..884f3d38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +.ends C06_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..25ff70c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C06_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..b1058bdf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.26u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=0.26u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=0.26u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..f89d9220 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C06_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.52, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c104af8159c860d1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..ca66a36b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ab4054a27d893c05606511cacc9d293ccf848428679de4d6c36e11bdd3c69055", + "qualification.json": "72c905c148893981756c0af779b8da98855a0e3b40f81cf8c2f0c2782969e9bc", + "specs.json": "7aeac01ced941f4fcc08f3a0f73eb3efa967e91172ea8b5d9a0b9c077e51e4c1", + "target.spice": "282719a6aa4302d9e4c0f9af0042b15d19ff7f76e3defa505f0ffc37ea4e8cc4", + "target_lvs.spice": "870499c67477d20c62e71fce04a3377aa7baffb85da831a8d767f3b91ba7691d", + "testbench.spice": "0e65ad75809416a9c3538c33c16a9b2557b382c89cf67fbc099b9eb964df6f43" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..2efbac93 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c104af8159c860d1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.33 + }, + "f3db": { + "min": 2275000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.32998, + "f3db": 3792025.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.4588734, + "vin0": 0.4588734, + "idd": 2.134392e-05, + "gain_lf": 35.32998, + "f3db": 3792025.0, + "ugf": 221981100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..002015ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.33 + }, + "f3db": { + "min": 2275000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.32998, + "f3db": 3792025.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..9f62d6d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +.ends C06_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..6d4d6cf9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C06_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..91b74754 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=3u l=0.52u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..2c357fcf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C06_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6c18fac722792f53", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..46dda6e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "75eadddf3ce34ae3e80057f314c51d06dd072399dac77b1cd7fb2d638ccaafbc", + "qualification.json": "d84a36d8ca8a526f3118e0cc045c8e21b55c3fd1c7d68cbe0fe3707e431b8421", + "specs.json": "69bb6b7d7a48bae62cad95d70e37b595c4ed6b92a78033dde6220f2faf763a8e", + "target.spice": "1b53354d956e5c6c016b4ba121bb0472ec060b02d492ea99f2431d1643dd8537", + "target_lvs.spice": "d31d645b57196c4cfd4b60d967f6190a7dbda953514b4b8ffd6cace130c0bca8", + "testbench.spice": "791451aa3c71ddd6a5a8c2bac010a4577e5f98573f81a5c835c3c00440c8aac3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..f3537200 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6c18fac722792f53", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.48 + }, + "f3db": { + "min": 2011000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.47854, + "f3db": 3351195.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 0.4888074, + "vin0": 0.4888074, + "idd": 2.026449e-05, + "gain_lf": 36.47854, + "f3db": 3351195.0, + "ugf": 223861900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..5714b9f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.48 + }, + "f3db": { + "min": 2011000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.47854, + "f3db": 3351195.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..c5323061 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +.ends C06_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1db81615 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C06_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..381a5038 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=0.39u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=0.39u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..a6b8a4a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C06_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "597c1e5723987d1c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..bab819ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a548147296de05a9f06df38625d63f111ed1f4d9ae3414a3d10b0a836bffa0b3", + "qualification.json": "f9006b22e79db2be1cdadaed248d4cdcee86c925f4d17d3a8aeda9c5bd805871", + "specs.json": "9de34e79f8258f3cf515848b25aa3c7e45a72b86eca7a7a73bc343027ebccaf8", + "target.spice": "47ddd66e9fb040a9df902197efa54d59db71b7319d1faf30d204ccf4a1942c33", + "target_lvs.spice": "752b800fd83dfa8d0fe01ad42c1464a27bd5e322e6c00fb8e51ec5a607d44c56", + "testbench.spice": "d18e5284eb09d89824a5b7365a4b08ea2a8b0dc571ad40ceeecff33b1077fe5d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..9d387f31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "597c1e5723987d1c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.78 + }, + "f3db": { + "min": 2291000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.78481, + "f3db": 3819148.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 0.4960872, + "vin0": 0.4960872, + "idd": 1.828126e-05, + "gain_lf": 35.78481, + "f3db": 3819148.0, + "ugf": 235936300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..cfac11a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.78 + }, + "f3db": { + "min": 2291000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.78481, + "f3db": 3819148.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..4e333842 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +.ends C06_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..5e07edfe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C06_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..de05aafb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.26u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=0.26u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=0.26u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..d0754d31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW1_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C06_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ba95db124d335dc8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..c0d8b149 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2f69b69e74c1dd0624b6010c1053ce8daff63a30825ebec482d79cdc0367ca03", + "qualification.json": "9f98de32e458b2c987d42ec6b87d47fe2b3f2bde1df9a1aa804980179f12d07e", + "specs.json": "342a318d866618fd07b90e8e2758b8255fd0429e1dd22a78f8c142ea91b84408", + "target.spice": "55ca8248d942cc856a7977851da93d6c86ccaa34280fd02a703174604a06b145", + "target_lvs.spice": "ec2b179c7e83b1dff9fcfb8e007a9f43829ae79101e4598b4d2416171c4faf06", + "testbench.spice": "75bbc3ff8fff2946d5668c16d8986779dffa2169cb5150269fa0ec1ef92789e2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..058e46d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW1_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ba95db124d335dc8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.75 + }, + "f3db": { + "min": 1810000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.74976, + "f3db": 3016877.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.495658, + "vin0": 0.495658, + "idd": 2.125107e-05, + "gain_lf": 36.74976, + "f3db": 3016877.0, + "ugf": 208240200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..80b4887a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.75 + }, + "f3db": { + "min": 1810000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.74976, + "f3db": 3016877.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..7c5b6239 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +.ends C06_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..0f9dadbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C06_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..e28927c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..400a1cc5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C06_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "851f47a091e47c6b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..0a161074 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "97b008999b13754fc174f6f5e594b7a1041af76ede66012c72ea5cbe9b7c82f8", + "qualification.json": "8e29c5228a940e47d50dde21abd8c782755bb754824901fecfdeb7f17d713db2", + "specs.json": "2d430ded0b4b1b5bdbdf5292cde4ef66ed70c650935e31d03d0063f73358ea2c", + "target.spice": "39c81dc835b571fac0cd531cda484b6caa05e3d7c9d1e07d5c5fa498eeeccc05", + "target_lvs.spice": "dad6dd52c02cce42cb4fd02c4f3e75ea2f64e97a149e60b94bade05f9b1ddf17", + "testbench.spice": "3a3cf6a9eab611b429b317c55999f53c5f50ca2e64ac0502475d0c1292e14855" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..d247be01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "851f47a091e47c6b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.63 + }, + "f3db": { + "min": 3017000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.62703, + "f3db": 5027927.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.4350349, + "vin0": 0.4350349, + "idd": 2.024208e-05, + "gain_lf": 33.62703, + "f3db": 5027927.0, + "ugf": 242105800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..41bd99d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.63 + }, + "f3db": { + "min": 3017000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.62703, + "f3db": 5027927.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..72bbc2be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +.ends C06_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d005c8e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f12 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f13 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f14 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f15 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f12 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f13 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f14 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f15 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f6 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f7 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.39u +.ends C06_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..31c0b7c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=0.39u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=0.39u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..82ad6e24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW2_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C06_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "deff2cc2b4a17a28", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..c215a41a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "28cd6b46400c6ee9b95a50cbe0cc7d27c61fe8bb2810646b895373e27d9c0e06", + "qualification.json": "2fdfbec37e3d7ccf24b5ada2ab8b14ba1bb01190a13f60b38576610844b47480", + "specs.json": "322b5f2c1cb0a1c976c875a4a9233740b1e5b2b266b5c0a075625a601bb452b6", + "target.spice": "054f67a9b6fe8fb712bc5498ce4859dcec15fc21d4af50b5b187e5005cdfba50", + "target_lvs.spice": "6fab02b30cece71395cc8c24f603db1a801d17c8788fc5f1aa0c6f3e48d63cfc", + "testbench.spice": "a6722fa155644859a7f23252130d42fe66ba4a8c9a0dbefbb035dbcb502c8165" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..f2bdaa9e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW2_sL1", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "deff2cc2b4a17a28", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.28 + }, + "f3db": { + "min": 3295000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.27684, + "f3db": 5491747.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.4478767, + "vin0": 0.4478767, + "idd": 1.802846e-05, + "gain_lf": 33.27684, + "f3db": 5491747.0, + "ugf": 253779400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..26d56237 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.28 + }, + "f3db": { + "min": 3295000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.27684, + "f3db": 5491747.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..7de75a20 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +.ends C06_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..a7ada69f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f12 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f13 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f14 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f15 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f12 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f13 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f14 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f15 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f6 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f7 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.26u +.ends C06_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..83973013 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=0.26u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=0.26u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..df50c135 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_ihp130_sW2_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C06_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11a2dd171388db52", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..88e35d3e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "688505db4cee3fcb36f0936dfc37948ad02796c5724ab7227fd7d16df69bb93a", + "qualification.json": "feb0e587d11af05a9ad4bf832b5b1636e51a5f96bbed9038a8c9eb31372ff762", + "specs.json": "c3dc1fb4a9f0c05520509356b9d489486004d381e5c688960ef328bc4e9fa38d", + "target.spice": "b098892d368f10b05a3b2dbeaca07b0c845ba64069720a8e4b2a30d6b19b5d44", + "target_lvs.spice": "c06e256bab48788973e71c0ee57bb8e73edc74514a0b4735e931b9049c283f05", + "testbench.spice": "820111de5a10f23c6f6ba295f343af747300293d86cd60be72cceb50d72c7453" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..319a00b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_ihp130_sW2_sL2", + "circuit_id": "C06", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11a2dd171388db52", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.92 + }, + "f3db": { + "min": 2723000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.91987, + "f3db": 4538329.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 0.436597, + "vin0": 0.436597, + "idd": 2.137046e-05, + "gain_lf": 33.91987, + "f3db": 4538329.0, + "ugf": 225810500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..dab8dc5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.92 + }, + "f3db": { + "min": 2723000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.91987, + "f3db": 4538329.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..0170c57b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM2 net10 VB3 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM3 net9 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +.ends C06_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..25b80a01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f12 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f13 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f14 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f15 VOUT1 VB2 net10 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f12 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f13 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f14 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f15 net10 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net9 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 VOUT1 VB1 net9 VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C06_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..b6a7e315 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..c06c4263 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C06_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.45, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f6de7845e8f9caf2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..2796d5f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e528b04027980bd50d7a6a5a35c4ea7ade3ff3ce1db09f9b0a36153b2eccbdbf", + "qualification.json": "3d83fef2c620177058ffb0906a341429b562708ce5fa87afecc6a131c9a60bc5", + "specs.json": "58e20c1b5ca26039405cfa6058611274dfaee7b0fd39c35d6f0b503083aea1a3", + "target.spice": "2eabdd5b1723ec74744141e5d0b166c921065e10eeb5b7f048cd9ed3291b7e93", + "target_lvs.spice": "dd5d1d5d214561afb524bba92f810cd7bc720b92ff5058aad5eb9f6d22eb3fbb", + "testbench.spice": "04511cad0eeade8e1330467286b14adce1a8609d08c5a826e3599c48c5ae7bab" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..a602c916 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW0.5_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f6de7845e8f9caf2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.49 + }, + "f3db": { + "min": 1245000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.48902, + "f3db": 2074689.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.8, + "schematic_measures": { + "vout0": 0.9721896, + "vin0": 0.9721896, + "idd": 2.417715e-05, + "gain_lf": 36.48902, + "f3db": 2074689.0, + "ugf": 138911500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..b4aa98da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.49 + }, + "f3db": { + "min": 1245000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.48902, + "f3db": 2074689.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..fd85678a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +.ends C06_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d7755990 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C06_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..eaf1e839 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.45 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.45 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..546cb4ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C06_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.3, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f55d153da27b7e6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..17341702 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0e7b82013b07ad976e5636036eed71235f4485f36f242dda3212a868fcee23f7", + "qualification.json": "2230f8a90e396665373e9fb0a4a40b0982abfe97248e7035b2006f9d8fc77116", + "specs.json": "1d5115fbcadd2400fa68c380f353e619f2386182f78bb96528aa071bf2cd4787", + "target.spice": "fa434b93b9295704f35d523aa6cd305d45fe35defe85f61814cfacd40cb85888", + "target_lvs.spice": "24c9a38a60960d6122b16eb3cbb7e32e3a8da68abc58b374fc62975e42477e13", + "testbench.spice": "31f6a6d65aa667133717d60d846575e3ec9fcf79f988c9e38db9e3427b13855c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..5640a2eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW0.5_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f55d153da27b7e6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.32 + }, + "f3db": { + "min": 1320000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.32105, + "f3db": 2199673.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.0, + "schematic_measures": { + "vout0": 0.9259073, + "vin0": 0.9259073, + "idd": 2.36117e-05, + "gain_lf": 38.32105, + "f3db": 2199673.0, + "ugf": 181913400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..2d8dd67c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.32 + }, + "f3db": { + "min": 1320000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.32105, + "f3db": 2199673.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..072f4c24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +.ends C06_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..2e8b347f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C06_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..d955fc55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.3 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.3 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..a8dcd821 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C06_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M4": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74cb5b113c474ab2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..a21ef56b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3b1f20bf25f74963deecfe0c92aba9b57c6d3b4063efde57e9cf5b98baa72d4d", + "qualification.json": "88ac13c7cd39dc0016566f6e6d84f92ed076a4f6036bea9638ecf9e4f823b8fc", + "specs.json": "7d5d889f2f3e5c87c9a46a94c632ea38a1f5ac90b4518162b84e07efaba34604", + "target.spice": "017461cc0569707513f983db64750abe3d025a53686c295ad1242afb10d02465", + "target_lvs.spice": "4ae8d422bba402d340c44c40785f6536cfc170d65c711f7e1a869404991645f3", + "testbench.spice": "0a335073f3b664a833930bbdd85364b0f93669ce782691cc11fb473eb51280b4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..b64d41d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,109 @@ +{ + "case_id": "C06_sky130_sW0.5_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74cb5b113c474ab2", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=27.82 below floor 30" + ], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2776000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.82435, + "f3db": 4627096.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vout0": 1.021696, + "vin0": 1.021696, + "idd": 2.453699e-05, + "gain_lf": 27.82435, + "f3db": 4627096.0, + "ugf": 114174000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..bf20ba53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2776000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.82435, + "f3db": 4627096.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..dd519a5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +.ends C06_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..406453ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C06_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C06_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..446c425c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..b0b88643 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C06_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.45, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "32456d73fa1c5aac", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..2eb88fc2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0c7f384e24de3bf845b68c5eb77b0408f7d16ed05e664efae26d9d4ff78c5f48", + "qualification.json": "560b7cff24c4bfef518dfb77a62a443a857cf357369e2e60a4f9ba2f8070a20b", + "specs.json": "d0783c1848e136ab4cc51edcc2ee4de3d93400b5df949ac0cc5f4e4a2016dcd2", + "target.spice": "6ec8d9b811312ca71dc1ef695346181a9fa2f3b8efec1d8d8e68125ba50c4b61", + "target_lvs.spice": "32e4575cf7b1900a4b8aa7dc7b0663d63a45f6a3d6c18b06907d2f0bb85e2424", + "testbench.spice": "d96d9ff5cc557761cc2d52512fdfb4db1754ab6041797e7a90e02ee1caab6550" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..c0d13be3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW1.5_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "32456d73fa1c5aac", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.62205, + "f3db": 3499481.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.7, + "schematic_measures": { + "vout0": 0.9040551, + "vin0": 0.9040551, + "idd": 3.155117e-05, + "gain_lf": 31.62205, + "f3db": 3499481.0, + "ugf": 133912400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..d149ad9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.62205, + "f3db": 3499481.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..83499e23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +.ends C06_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d50b5a6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C06_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..52220aca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.45 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.45 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..98e1a9ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C06_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.3, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e99a2b2be0d3f9e5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..10010762 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fbeb76e802f6b83d96414863166686ec05349484e255760250475d3dff73dabd", + "qualification.json": "3f650fffa1c8c52cd578c8ad5de17d55f0b1bd9f315f5675f5a4c92f825fe339", + "specs.json": "598baf26f33a74b475a46b125f57b33dbd0b5c48d66326fce241da16c15543c5", + "target.spice": "5a2d05e1b21a3d0a56f08452262da2686ffe6eaf8e56d68cf04b4a6acc701209", + "target_lvs.spice": "a71136b08eb734c548f8d9c18b3664ac7214cff1f44f7c0aff67935bebc728aa", + "testbench.spice": "a4f9c0c8da49683f4506772487d3b1b2c34f8d29d29d42722e0624a469e8a8a1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..8cf8e389 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,109 @@ +{ + "case_id": "C06_sky130_sW1.5_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e99a2b2be0d3f9e5", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=28.66 below floor 30" + ], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 3461000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.65828, + "f3db": 5767797.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.8, + "schematic_measures": { + "vout0": 0.8882844, + "vin0": 0.8882844, + "idd": 3.270373e-05, + "gain_lf": 28.65828, + "f3db": 5767797.0, + "ugf": 156660600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..3a4ccdfc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 3461000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.65828, + "f3db": 5767797.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..2b495e30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +.ends C06_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..e50f3d4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C06_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..c4567996 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.3 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.3 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..4e6e3723 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C06_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M4": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "101e3c82adc5b1b7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..88dea891 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b49614d2091cdf43eb6cf1969f6ec344f5da1dd6aeb570a4869ac6063fd373c4", + "qualification.json": "b54fe5e74ea8efb434468594213a40847f1e4e07e6a763aba59541012cb0ad83", + "specs.json": "e4b24900b6f813fc1aa0327ec8e4c04e584cf1a1972c91f112cf8a393ad67351", + "target.spice": "52e1a1aa080f45178ed8dc6792d0738273e61a3377f129cd601246462bfaffff", + "target_lvs.spice": "52ba908d5cfab7b655277620375b9feb644f2621668b0ac17701c54db2abbd79", + "testbench.spice": "adf9be64e5c980e026577c31a9b15bf8cde1b1995b2938031f12f632d2a553a5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..79d69608 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW1.5_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "101e3c82adc5b1b7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 1617000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.72946, + "f3db": 2694726.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vout0": 0.9448314, + "vin0": 0.9448314, + "idd": 3.132846e-05, + "gain_lf": 31.72946, + "f3db": 2694726.0, + "ugf": 104413800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..90a42452 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 1617000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.72946, + "f3db": 2694726.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..0db6a3b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +.ends C06_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..d7049f2a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,38 @@ +.subckt C06_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C06_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..138a2c01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..95bd9208 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C06_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "833cfe7aeaa9cc95", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..c0e93a51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "34aad71116bb3d4231ba28091a2102d433a27e6b8a5b32c4e6e30da2fec0e7ac", + "qualification.json": "0e9117744a452cc678b3c74b326a0ef6ec7d88ad383017ab58d103274ae12386", + "specs.json": "a739f806c7e24818d6bebcf8ea77379665da5d2a301e07d545731a4b6ff1cc46", + "target.spice": "f1c48077566d772001235c2958a67bc8faf89a04790c055f0853b2754786379d", + "target_lvs.spice": "69a5e63a4d8e271e53a387dbb75424fe17470d79e934b21bc4b1c3c41bb2771b", + "testbench.spice": "9c5ce06b06039b515ffacc1a8ea66aa422bc7578eb6e92815238fab2b1bb6ff5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..2cdbdccd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW1_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "833cfe7aeaa9cc95", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.06 + }, + "f3db": { + "min": 1623000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.0632, + "f3db": 2704167.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.4, + "schematic_measures": { + "vout0": 0.9196085, + "vin0": 0.9196085, + "idd": 2.827558e-05, + "gain_lf": 34.0632, + "f3db": 2704167.0, + "ugf": 137010100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..75f3885b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.06 + }, + "f3db": { + "min": 1623000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.0632, + "f3db": 2704167.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..737f3646 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +.ends C06_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c72bb7c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C06_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..a070000e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.45 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.45 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..0c0bb118 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C06_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "335d0b79d88c93fb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..95f3f092 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ed3883b668fff644961f02f1d9e429f309958808bf27e832f51a5054c5177b6b", + "qualification.json": "2fb4dc0a25a294ccd3483e6c4150ce1920856a78034b7e8b3e249c09f8711f62", + "specs.json": "3ef57aa8234e4df7a813a6d5e7c4bd379888e6c79bdcf07f44735c9d415d84fa", + "target.spice": "910e8e808b975db88d7628b8b4b3c6248bb89ddd963d0e0d6a1d8b3d55b6a961", + "target_lvs.spice": "473be6702cb8088d0787b07aabd5ff8a98f5662e15546f9790cbaddac5618c86", + "testbench.spice": "bbbc255dca36419207661606cf72f0b6330991aead3fe8ab449d50ce56f17ad3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..67857d82 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW1_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "335d0b79d88c93fb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2513000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.85868, + "f3db": 4187927.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.9, + "schematic_measures": { + "vout0": 0.8956893, + "vin0": 0.8956893, + "idd": 2.87363e-05, + "gain_lf": 31.85868, + "f3db": 4187927.0, + "ugf": 164614000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..a70d8a86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2513000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.85868, + "f3db": 4187927.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..58a1f566 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +.ends C06_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..27eabdaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C06_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..6918766d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.3 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.3 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..c68b4987 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW1_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C06_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74eb3cfbec8c455b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..cabc4b96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2da6e1ab6fe72b77c43a0466078115bde97b7ce45be6131f2fc7a3c1e889026f", + "qualification.json": "8155eba1e5c41dd995440cb92fcc75e173e77a9a3ddaab03d89b000e0dea53f8", + "specs.json": "a3d80efe9ab2f9e57716ad3199acfb7f2c5d5232a9997157cb7fefd9b04b3b7c", + "target.spice": "8768f34fd3c229eb34a6b836091417832e739fb8f9da2fb823d7acd7e45da57d", + "target_lvs.spice": "7a9408de72d9488af2b4f3af24164c4dabd799f523bc5836ee6078c1e0bc5937", + "testbench.spice": "62e202e31ba126ecef5f6b9b33e21bfed6297319b42a0c58d4dde53b6f49346b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..8287664d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/qualification.json @@ -0,0 +1,107 @@ +{ + "case_id": "C06_sky130_sW1_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "74eb3cfbec8c455b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.47 + }, + "f3db": { + "min": 1375000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.47465, + "f3db": 2292044.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.4, + "schematic_measures": { + "vout0": 0.9613413, + "vin0": 0.9613413, + "idd": 2.825032e-05, + "gain_lf": 33.47465, + "f3db": 2292044.0, + "ugf": 108532800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..b0369a21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.47 + }, + "f3db": { + "min": 1375000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.47465, + "f3db": 2292044.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..bb08b59e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C06_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..26868c64 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C06_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C06_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..57458552 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..8e0564f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C06_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8a82d1153ad1fe98", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..3e854d73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "51544f31fbdf1861e9b426a3f64bfb6f0800a23e1195d318778dd39bd18a88e1", + "qualification.json": "9c80789a5f4337116a4dfdd56a11f097f55d60d657d973d06a70ffa5b49c4e93", + "specs.json": "f3a74e1ff792c2178f3609a923b71835b2397208d8fef4399cec1ab1a1395faf", + "target.spice": "c42ed50961963679f8c271dcabbc793e09af5719e4321cf90e1829e5b6195530", + "target_lvs.spice": "4907bcf3911cd310f7d5f2ba7f97be5068942f1731500f82ae0eb2362fb48a9c", + "testbench.spice": "c2558973141d5b7209b624bfb812e1957d1cc4cd16a247da2fcdf5bc1920ca46" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..35a67344 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,109 @@ +{ + "case_id": "C06_sky130_sW2_sL1.5", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8a82d1153ad1fe98", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=28.59 below floor 30" + ], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2596000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.59087, + "f3db": 4326249.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.4, + "schematic_measures": { + "vout0": 0.9109606, + "vin0": 0.9109606, + "idd": 3.433001e-05, + "gain_lf": 28.59087, + "f3db": 4326249.0, + "ugf": 116742800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..362d0822 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 2596000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.59087, + "f3db": 4326249.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..640586e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +.ends C06_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..997d89ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f12 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f13 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f14 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f15 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f12 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f13 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f14 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f15 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f6 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f7 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C06_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..744013a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.45 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.45 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..0d82d67d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW2_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C06_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2f46255bebd9aa8c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..c1cf8019 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e5818e6818aa24ab721a1a4e6a626f21210d92ae1befb97b007caf65a685714f", + "qualification.json": "4593c7874fed4aabea1cca858db0089c97a6c966af09099f791138d333286b37", + "specs.json": "4a6bc118d13b658002ad2fb7a74875d16cba193729e818c701d73c9c6b44350c", + "target.spice": "047b2373662a90b476f006b4db4600ab3511f4ccdf634fd676b6ae40a658eb9d", + "target_lvs.spice": "2d36768e49d5ef0414a4dc6eb4c165350029fc0d2b677dfd4464efa70b6f4454", + "testbench.spice": "c7069f6c45e4743ca047dd5078bb425d19a0b2bf907f91bb7175fd7a12dfd0e3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..dea35a5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/qualification.json @@ -0,0 +1,109 @@ +{ + "case_id": "C06_sky130_sW2_sL1", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2f46255bebd9aa8c", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=24.89 below floor 30" + ], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 4437000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.88672, + "f3db": 7394724.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.3, + "schematic_measures": { + "vout0": 0.901791, + "vin0": 0.901791, + "idd": 3.598761e-05, + "gain_lf": 24.88672, + "f3db": 7394724.0, + "ugf": 130087900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..eb63133a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 4437000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.88672, + "f3db": 7394724.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..1362aa24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +.ends C06_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..de849490 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f12 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f13 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f14 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f15 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f12 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f13 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f14 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f15 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C06_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..bb4a2642 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.3 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.3 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..3f644c7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/case.json @@ -0,0 +1,163 @@ +{ + "case_id": "C06_sky130_sW2_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C06_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1", + "VB2", + "VB3" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "874c1c3eb064baa2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M4", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M1", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..70c51224 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bded9cc56295cfa578a4a6fe6008dd203157d479fd0cc1145a719d2fbfd631a4", + "qualification.json": "ae1126ee1a914f9c4d18101917c06f32172530a0d96173d45bed44d3b10d0b9d", + "specs.json": "a6d531aabcd86067d76d499c50a23dd94b115abb5d10a9afa97245cde4e46598", + "target.spice": "dbe26c2d175c1decbfcb44c8d7420d7dbd3f83dff8d6cd4d8485bdac57b575b1", + "target_lvs.spice": "a5cf83f8c6436dfe62a46cf74f4063d2d3637a5bf72a665fc2535c729ee9a2a6", + "testbench.spice": "eca0c0603eaa671344fe35056a65d4e687f08f56d7cd9babca48e081eae7e497" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..08f828fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/qualification.json @@ -0,0 +1,109 @@ +{ + "case_id": "C06_sky130_sW2_sL2", + "circuit_id": "C06", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "874c1c3eb064baa2", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=29.84 below floor 30" + ], + "spec": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 1869000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.83562, + "f3db": 3115616.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.9447336, + "vin0": 0.9447336, + "idd": 3.401447e-05, + "gain_lf": 29.83562, + "f3db": 3115616.0, + "ugf": 97059820.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..5aadb70d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 1869000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 29.83562, + "f3db": 3115616.0 + }, + "floors": { + "gain_lf": { + "min": 30.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..77f2fde2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C06_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C06_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..5cb85293 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C06_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 +XM1_f0 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f12 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f13 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f14 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f15 VOUT1 VB2 net10 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f12 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f13 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f14 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f15 net10 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net9 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT1 VB1 net9 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C06_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..5531ca07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C06/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,31 @@ +X1 VDD VSS VIN1 VOUT1 VB1 VB2 VB3 C06_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 8e-05 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB2 VB2 VSS 8e-05 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB3 VB3 VSS 2e-05 +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..ac8d6be4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C07_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bf6dd03a5e67665f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..95a371d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f271728fb434ac1d652d23722f93044d55b8232c3aa430ef77ba9518ec9e9135", + "qualification.json": "2162b1c62eca5951bb1526b3e08b406b3de1feebedc9aef7605f11d0a2e6ddf8", + "specs.json": "fe4ed9fdfbc7d76f94590aa160095c293b8ed0f810ba43b6a806bedde7fc0209", + "target.spice": "298fd649f50dfd578cdc2cbad57d5b874308f50ae0ecb94034e98d6a98f05eae", + "target_lvs.spice": "ad2b3426fa064106ea9fff36d91787a910c671f2e1383e7fdfb33e039378aa88", + "testbench.spice": "129a780a1cd5681716350f4e23acf88f98664c48476e372510b1338ab5d99a02" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..0df6f2f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bf6dd03a5e67665f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.61 + }, + "f3db": { + "min": 843900.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.60838, + "f3db": 1406516.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.65033, + "vo2": 1.65033, + "idd": 4.000002e-05, + "vos_in": 3.637979e-12, + "gain_lf": 40.60838, + "f3db": 1406516.0, + "ugf": 151479100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..efee174d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.61 + }, + "f3db": { + "min": 843900.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.60838, + "f3db": 1406516.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..693b4530 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C07_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..83540b3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C07_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..f59704ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..32cba934 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C07_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f483279329cf82a0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..f36e07fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5302377bc3b1c3724fa3bccb19f41026724ce4342ad4b15e3ae9612a7d5b8279", + "qualification.json": "b4aae0e5e0bc5fa33a65331e05541176e35603e0ec95456806d5b2b8eda52dd0", + "specs.json": "e514ea64a318209d33845b3ba92bcbe5ef72d6834f3a419e5fe92002fd361266", + "target.spice": "94ea6fa9abdd93e0ec6160313ab2f0406ab74da83f92766a173ef7dc4b170599", + "target_lvs.spice": "15393299b9787a04b8117e8f4b59c7ab85690b4dc92dae76992107b24836453a", + "testbench.spice": "d8b24a38940274f2225695f044c05e91e954b05d9981d985a48fba6664d6d6b8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..c83ae939 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f483279329cf82a0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.97 + }, + "f3db": { + "min": 1412000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.9669, + "f3db": 2352737.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650378, + "vo2": 1.650378, + "idd": 4.000002e-05, + "vos_in": 0.0, + "gain_lf": 37.9669, + "f3db": 2352737.0, + "ugf": 186921500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..2c5601bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.97 + }, + "f3db": { + "min": 1412000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.9669, + "f3db": 2352737.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..fffd4c42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C07_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..dfbc3c84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C07_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..159c78af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..eb92f5e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C07_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f02fecbcd6320c1b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..eb0f9c81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a4ef1ed6de3739bd53bd18e6cc5e91f5d8234d9043c36840aaa8cec0662fef2d", + "qualification.json": "9ee1efe61a7b6ca82f7929f877144bbe48e6b36f06355530ca3f2c93cce88783", + "specs.json": "14dc6e989f02fd7d78515253421f1aa57d3d61e1e169486a1cc2692505dda7fd", + "target.spice": "dd678acdb530b1b977df7c07d62a7c9a085da65aa7d68631122c35f974559f7a", + "target_lvs.spice": "768afcc5099b7513e3559be125e2b56e49b9223154e34f5975b65722cf3d1867", + "testbench.spice": "0d73eb438796894f4baf09f4aba434e73a100b35c0b3adb332f4079a34760636" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..efce0192 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f02fecbcd6320c1b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.8 + }, + "f3db": { + "min": 635100.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.80138, + "f3db": 1058574.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650445, + "vo2": 1.650445, + "idd": 4.000002e-05, + "vos_in": -1.92813e-10, + "gain_lf": 41.80138, + "f3db": 1058574.0, + "ugf": 130792200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..5c0c2b84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.8 + }, + "f3db": { + "min": 635100.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.80138, + "f3db": 1058574.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ab54def0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C07_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..dd68fad3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C07_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..fbb440d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..15c2cfd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C07_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.84, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "454f5cb369384cb9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..43e6b4ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7806a558bf8f18c9dcecad85bc7e96d7d7d9f96cbcd0cd2231422cc06c6d6447", + "qualification.json": "92bc31a54ece5e2fc5ca020bfa9de779c39120727d5fd212db87232fb586e5aa", + "specs.json": "873aff9c7308a1436c43ce22c9ccb8e4acb81c692c81de853d9f36f096126068", + "target.spice": "81be087356a9d73744ae1468e78c51db796515e7364e5b7ddef302ecd5041a9c", + "target_lvs.spice": "0cf7f0490ec72eac36d62eac1ea243509d6fa8a00ddb3181a1ff471493d9f2ce", + "testbench.spice": "49f7ec19af4b147067f249a5f4d2f42272381c195447db3c91e7fe7f3e3abae5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..c1dd3cf4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "454f5cb369384cb9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.31 + }, + "f3db": { + "min": 882800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.31449, + "f3db": 1471348.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650203, + "vo2": 1.650203, + "idd": 4.000005e-05, + "vos_in": 0.0, + "gain_lf": 44.31449, + "f3db": 1471348.0, + "ugf": 243001000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..43ff4fb0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.31 + }, + "f3db": { + "min": 882800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.31449, + "f3db": 1471348.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..bc149690 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +.ends C07_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..23ccd9de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C07_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..80c4da61 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..8c908a22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C07_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.56, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ab5f62a0ef4aedf1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..acd6e356 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b8288bf3547aa7790e73ab8e9f59f5b14d5feefef76b9cd6d1bc5601dbd726c5", + "qualification.json": "07b96b2cf959d38247b27f968041aabc55c63c9ab6e376a75a2c63b362fa2442", + "specs.json": "4fcb219f343a6a0c6599bf626c4611c1605f1cfa1da187f80402954adef6963b", + "target.spice": "499518b4d0c2c21049563d303b7fa4db273edf3677b413177c53f9ed6bba74b8", + "target_lvs.spice": "3dc03e225c39be54a53f220e608e78bbcd241fd8983991a2937192a3ccfe72f1", + "testbench.spice": "9b6cfc567881f3359c96a6dcd84d8fcff754d00c5f4d48ab7c8de3ffad3c9e26" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..7f37e959 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ab5f62a0ef4aedf1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.96 + }, + "f3db": { + "min": 1554000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.96297, + "f3db": 2590804.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650604, + "vo2": 1.650604, + "idd": 4.000005e-05, + "vos_in": -3.63798e-12, + "gain_lf": 40.96297, + "f3db": 2590804.0, + "ugf": 290673800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..abfce7a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.96 + }, + "f3db": { + "min": 1554000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.96297, + "f3db": 2590804.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..3a80f468 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +.ends C07_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..06f436ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C07_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..d453ed36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..4c6670b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C07_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.12, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "99b4505dbd9b9ef1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..b78ab296 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "618e3945be225e2f09ca3e1ea5e83e87e112cf2ba29ca58ad2bc3abc5359efbc", + "qualification.json": "b8f7217c7e6809a8c45e68b5ea5913ae998aca4da134a86500136d76d4e8c385", + "specs.json": "069e7fa4dc1dce5282f838da2b6fd5221bd5c3a5595529cdc099a109c7159bd5", + "target.spice": "0593c2d1ae26eae1469d828c6bbfeced6db4526fd8050315bd3547e1a8125670", + "target_lvs.spice": "25d490615de5a1524a9bddb4b19c824d59e16d41509c89fdaa2f5db08692fbdc", + "testbench.spice": "5efe77fa8c5ec2b8f6d259bb26cc13c71fc2af47788931ebef0770a56a715b11" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..d97cad34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "99b4505dbd9b9ef1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 42.75 + }, + "f3db": { + "min": 654400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.74969, + "f3db": 1090687.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650063, + "vo2": 1.650063, + "idd": 4.000005e-05, + "vos_in": 0.0, + "gain_lf": 45.74969, + "f3db": 1090687.0, + "ugf": 212765600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..c07261d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 42.75 + }, + "f3db": { + "min": 654400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.74969, + "f3db": 1090687.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..56cdd76b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +.ends C07_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0229d246 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C07_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..09aa1c9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..ca2d1b1a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C07_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d1fe42bc2b7be1a4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..f5829690 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eb76a99c15d8f2fd6cf3494aa4bf3ac76ec6579909a7b3e82dbeed8321b2a7f9", + "qualification.json": "701ff96bf62c8ee76322c269f4a336440e8a3944510cfeb97fe123e9ccc66fbd", + "specs.json": "f2038a94aea78c6ec79953a083c153a29c39fde37ba74c0cf032f464105ec3f1", + "target.spice": "21e045544533a1fdd679d9e5c564964789588a7b4fa16655b868d958bd3bc80b", + "target_lvs.spice": "ec2aec12885423d896e583e69f5af17d53f7f5227ab374ca4f2015ef1773cb63", + "testbench.spice": "af871ef279e5185e37e0be6728e69c0030924717006cc850aa21467f8769009a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..3e3d45e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d1fe42bc2b7be1a4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 40.16 + }, + "f3db": { + "min": 866400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.15772, + "f3db": 1444063.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650159, + "vo2": 1.650159, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 43.15772, + "f3db": 1444063.0, + "ugf": 208666900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..f0774f29 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 40.16 + }, + "f3db": { + "min": 866400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.15772, + "f3db": 1444063.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..392a204f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C07_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5c28afac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C07_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..5e1fe06d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..350189d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C07_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "256c1bd0e2e5d8bb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..7549c94a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7d0381be9a8caf83dc48566ac0568853d87d0f80cf7f49c7248cc6b841742651", + "qualification.json": "8b69e7b252b3bb1f33c394d6485a9805168fdb696553ad5800da37f75ad87da1", + "specs.json": "1d0d7f02cfb896236b877f429eaa1c09299f7c748059601b290689e95b41db1e", + "target.spice": "40ee88e107ca1de9854a00b4e19a0fbe0a450b6825be38d6f4641ec06b1017fa", + "target_lvs.spice": "138ab5021900e3b2a7c77fbab1a829e1fc3e688a92633b61a4dc4b2c89490091", + "testbench.spice": "dc9c9ca807110775c25c956f62f65f1a2dff06a90653ff72582873b939740f2f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..37e4f8d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "256c1bd0e2e5d8bb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.07 + }, + "f3db": { + "min": 1503000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.06547, + "f3db": 2504702.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650476, + "vo2": 1.650476, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 40.06547, + "f3db": 2504702.0, + "ugf": 253138300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..72014eec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.07 + }, + "f3db": { + "min": 1503000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.06547, + "f3db": 2504702.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..fe29b31c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C07_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..0f285056 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C07_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..3c9a8f6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..0cbc66f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW1_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C07_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a233a39b1f4f29dd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..25af1bd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "49830c89049cbf0d4f55083a5f5aec6400e162a68e082579aa68342664f9969e", + "qualification.json": "1b8a623028163de10bf6732abfc38baeb44e89a6e6c4b4c8d141b3c21a158cb5", + "specs.json": "2c2585b272bb72d74db69c3587a687bbf5b1c78028389f738ac9f582be84452c", + "target.spice": "7c56028fdedb07f3d9471443c65098fc27ba04a015aab9d3555573f6d843e52f", + "target_lvs.spice": "20e08bdf9c96ec7f34a62ff045e8227dbe3237652c77c5eb59716f7b2b90cab6", + "testbench.spice": "546ea4fe5ce828092f9b18e17cfbdcbe4f8282bcc7a6cb9ca7054a9aad12fefa" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..315461ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW1_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a233a39b1f4f29dd", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.51 + }, + "f3db": { + "min": 643700.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.50965, + "f3db": 1072820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650086, + "vo2": 1.650086, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 44.50965, + "f3db": 1072820.0, + "ugf": 181096200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..569edabc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.51 + }, + "f3db": { + "min": 643700.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.50965, + "f3db": 1072820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..67e0b5c2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C07_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..1b1c75d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C07_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..1f6ae2c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..a88cfb03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C07_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.84, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6a692ffd39e46bfa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..9918076f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3dde7602bccb260fa17c77c80960e8b6ecdd75a9315cda3e80eddb18c1784be8", + "qualification.json": "bbdedd3ed075ac22606b7b40e545242c5b114deda51160f3b1a936f737fa2095", + "specs.json": "3a7a953de8d8c9209032cfad530d4a2576ce6ac78c07504c3ad59ee4d27d7d8e", + "target.spice": "bfbdea0829aca32f6ed0b3ee5470eb2a374ca32c47399ab0ec318f6b796bb1fa", + "target_lvs.spice": "ae35a6ffc6e289aabad38188fbf9b453cf8e2b908db684692a6d54699a91ab6c", + "testbench.spice": "c44b0862f97aab83660831942dc4c600773ff7673048ac85b96d414c57ca3db1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..c9d1ce6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6a692ffd39e46bfa", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.99 + }, + "f3db": { + "min": 891400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.99227, + "f3db": 1485694.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650257, + "vo2": 1.650257, + "idd": 4.000007e-05, + "vos_in": 0.0, + "gain_lf": 44.99227, + "f3db": 1485694.0, + "ugf": 265542300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..e13b9459 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.99 + }, + "f3db": { + "min": 891400.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.99227, + "f3db": 1485694.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..24f27843 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +.ends C07_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c4ef5825 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C07_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..19c7d37b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..677aa3fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW2_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C07_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.56, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8795cf736a75aba2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..f79f8927 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b902682bd0827c018e6aa3d635588595307e17cc1bf2bf9a98e8a7960827aae2", + "qualification.json": "c888587fdc4b0974f64c43eb4b6417b2c00582ba19e02a25b587973c806afacb", + "specs.json": "5981b10340974d816449eeb3c6b47f77a7519d6d3346bd3d5650eb486644f1cd", + "target.spice": "de025d30877a70a221d1139de8bcc517f0c84c00875bcfd6fbf8361212550ba6", + "target_lvs.spice": "52e3d23d0561784a1a92bfc8a93f4a175b9ecd294b2da264b9826747d185ee65", + "testbench.spice": "7c0efcab9f2b975b765b69d5933344a46f0c50a3bab2a40dfe8d536538c4ed0e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..20c5bed7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW2_sL1", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8795cf736a75aba2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.47 + }, + "f3db": { + "min": 1582000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.46527, + "f3db": 2637462.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650697, + "vo2": 1.650697, + "idd": 4.000007e-05, + "vos_in": 0.0, + "gain_lf": 41.46527, + "f3db": 2637462.0, + "ugf": 313371300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..111d540e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.47 + }, + "f3db": { + "min": 1582000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.46527, + "f3db": 2637462.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..7bc3d4b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +.ends C07_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..d1345fbb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C07_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..ac382e27 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..c68bd921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_gf180_sW2_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C07_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.12, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95dad40c57a3086b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..1602394a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "382f01fb0a3608b2af1a024f0d7edec32c49ed00d6ffdee9723eb3fb850dcbd2", + "qualification.json": "d4d2706f43a7a7275e440b694a49df84d41a4c569acbea573373a28579cc72a2", + "specs.json": "93c7b324b06812b9700ba5b23efe1b5fe0f830fd26464a322286e89b95291135", + "target.spice": "05262ac95fa97fd0cd3cc70a70deb94854fba1fa8fbafba3b6307724b290bf64", + "target_lvs.spice": "3323156c51cbb03103ec441a3cc34f605dc93c4f3111cb6f931f95a045560aee", + "testbench.spice": "94943058c9f36f4d45f7dcc7f0a0f3fb59aaca982e90c8ef7f8707cfaca2398c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..bf615b04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_gf180_sW2_sL2", + "circuit_id": "C07", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95dad40c57a3086b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 43.49 + }, + "f3db": { + "min": 660800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.48706, + "f3db": 1101379.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650084, + "vo2": 1.650084, + "idd": 4.000007e-05, + "vos_in": 0.0, + "gain_lf": 46.48706, + "f3db": 1101379.0, + "ugf": 234161200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..536bec6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 43.49 + }, + "f3db": { + "min": 660800.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.48706, + "f3db": 1101379.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..e93ce2b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 VOUT1 VB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 VOUT2 VB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +.ends C07_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..84d9f75b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f8 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f9 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f10 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f11 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f12 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f13 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f14 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f15 VOUT1 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 VOUT2 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C07_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..29e4e20c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1n VB1n VB1n VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..f3398a9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C07_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "de4b561c7a402af8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..687073eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "281c9f0fe64fdc9657914676070f60129f254cc007fe47eafe867c68ef0d6eba", + "qualification.json": "7d04d1de7167a0f1933966d0eba8d2343ec0fc3c72bac4e3fb68dfad8f12dd57", + "specs.json": "5ff109c942619b36d9c379efa41284f8952f670c6037c55387b7c2afa9930cc5", + "target.spice": "6b199ed40ff8d0502da46fd520f49f8fbaeedd1ea53a1f52a23678ec55e996c2", + "target_lvs.spice": "46234b2df3bfae1e1d850f663f77e5352078a96c3f3de1399ed09fc806912074", + "testbench.spice": "24cbede3a186e8bb44ee1ad04226ad92cb7661ccfb9688beb126f4dc2a12191d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..5ea2b2ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "de4b561c7a402af8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.1 + }, + "f3db": { + "min": 10680000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.0983, + "f3db": 17807610.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.6006468, + "vo2": 0.6006468, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 25.0983, + "f3db": 17807610.0, + "ugf": 320882000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..9ec1f8c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.1 + }, + "f3db": { + "min": 10680000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.0983, + "f3db": 17807610.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..bdc34e8e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +.ends C07_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..605d723a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C07_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..483db934 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=2u l=0.39u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..bd9ae272 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C07_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "14e92c78a6f0b2d0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..fe3d1bdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7f455942a82c02c3b43da4ecdbfea600f7d57ba91407e9996c6f6364922479e0", + "qualification.json": "c07632af2950ecd802aa5a082ae63a1ebbd82e678697feccf5bb5c9d6a0997c8", + "specs.json": "373e4d2a0bf262e14969a7c998068023def1296d1afced55c786dac36e0a842b", + "target.spice": "332414966f9c08f808e573b6f6aecd37b18e9a06ab890b17e22ac646be23613b", + "target_lvs.spice": "1aa664071bf6325103ce5a3cdcb24e3e93028832769124e1d8b62e24a287a682", + "testbench.spice": "f1a79105557bfc33119233fef29f45cc2eaa4de638b7ab4c06fa0e433cb0f52c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..52bd8af6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "14e92c78a6f0b2d0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.77 + }, + "f3db": { + "min": 13730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.77264, + "f3db": 22884650.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.6002827, + "vo2": 0.6002827, + "idd": 4e-05, + "vos_in": 9.094947e-13, + "gain_lf": 23.77264, + "f3db": 22884650.0, + "ugf": 353554300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4f91091c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.77 + }, + "f3db": { + "min": 13730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.77264, + "f3db": 22884650.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..5c511526 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +.ends C07_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..f7f7dfc5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C07_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..cd2ad056 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=2u l=0.26u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..d5a91641 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C07_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5bfb2876a73e7f1a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..2dde305f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "25de7ce038936b71a9bfa3b4ecc93be0a7bc5abc54dcf1f9c16ae8a3bdba9afa", + "qualification.json": "992e104f2c387a7d90c04290a62523929939042cbe0819151c03048ecb6c6adb", + "specs.json": "e610e9c0cdda41faf106b94f9125f0668936ce2eb48929fba56fc36a6a55a69d", + "target.spice": "8e59b92e302f70cf191235cc5beb99a342ee338fb1fa4cdeb82923ddfb44904c", + "target_lvs.spice": "8bce12ebd7e30396beb288f33aa311562ad24a2e85767c04f11cc1742e5f2d30", + "testbench.spice": "40e07349d689a37748090bb903978e726ff65c6c9e35ad75f7f0e22f67047c17" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..83df15d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5bfb2876a73e7f1a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.89 + }, + "f3db": { + "min": 8927000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.89251, + "f3db": 14878350.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 0.6008857, + "vo2": 0.6008857, + "idd": 4e-05, + "vos_in": -9.09495e-13, + "gain_lf": 25.89251, + "f3db": 14878350.0, + "ugf": 294149900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..925db25b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.89 + }, + "f3db": { + "min": 8927000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.89251, + "f3db": 14878350.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..afb43e4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +.ends C07_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..56274f25 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C07_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..81bf3550 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..9d23b34c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C07_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.39, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9127391f3a93e650", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..501e34b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "75fadc718bedaa63505fe09dfeb854c8ced3732ea329977c78b56ad05b2e812f", + "qualification.json": "70a867933131a45db0d08fd51c8df1dc445e95b5b8f30cbc157ec67f7a375afe", + "specs.json": "50dd0c7f62a4194648957329dfe9942efeadc584b1dd76512304ffddf50fdc88", + "target.spice": "dd55f552d98f61e5a1e929015a5ee9a522458f3108ecd96cd31f968d219654b0", + "target_lvs.spice": "9346e1320a7279cbe0959407b5636d4a5ca1447194cdbb7c14a21994494d908c", + "testbench.spice": "9b22b291e567da291e67b67ed57ff1f23c9ab577e12c75564aea71dd411d6561" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..5bf0e416 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9127391f3a93e650", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.11 + }, + "f3db": { + "min": 14720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.10702, + "f3db": 24535880.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.8, + "schematic_measures": { + "vo1": 0.6006771, + "vo2": 0.6006771, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 25.10702, + "f3db": 24535880.0, + "ugf": 443202400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..b9ac78e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.11 + }, + "f3db": { + "min": 14720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.10702, + "f3db": 24535880.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..16243f05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +.ends C07_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d512a390 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C07_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..0a7d6542 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=6u l=0.39u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..d357f7c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C07_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.26, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c08a84dbcc35481e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..a969b3c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "88d82003d030b8e5bc41bfcf87e738cdbeb73d8cb5b11c46b86888eba8ee3544", + "qualification.json": "748bad17d9e1bd88dc4774317048b5b41542541c579a932305907a699cd9ef56", + "specs.json": "60989b23eff9f583a1e46432d6da30954b88cbef6da5c871aae507e9903302df", + "target.spice": "8f634b412f16624587bbcb6109aa38f2781e94694fe1547a1cc5fdd806bb0c22", + "target_lvs.spice": "fd9aa4ec23c7e8735a0a79f68dccb3a452cdd1d77103722c33e76230c5b4e68a", + "testbench.spice": "c2138500f7abca2d7d577a802c54f9f1387016ee7a2771c1efe68d23f0150c09" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..76119852 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c08a84dbcc35481e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.64 + }, + "f3db": { + "min": 18710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.635, + "f3db": 31189430.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "vo1": 0.6003577, + "vo2": 0.6003577, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 23.635, + "f3db": 31189430.0, + "ugf": 475420900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..939c0969 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.64 + }, + "f3db": { + "min": 18710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.635, + "f3db": 31189430.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..d2abd048 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +.ends C07_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3dc4affa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C07_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..d579dd4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=6u l=0.26u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..bf24d60d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C07_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.52, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44e06a459e1d96c0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..6bcf8b89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fcfeb5569bfa8514a6c88ff2f263bc5e3564ae6b6c9560dca3bd52d0d2c4fd19", + "qualification.json": "6442110ebe0e16b2742f59d9c8fb6807468eaa6d32ef7842f00cba1f027356a3", + "specs.json": "b2c79f931faf85734257271250d10f306a4a044beaaf618892f53292537b3b7d", + "target.spice": "a23abe21156bff67b55669db2780373c4a5b672265f8054a333db3c2225ccb20", + "target_lvs.spice": "628029d6f52e890adc2512c593f665cbc09a85d23d4c2d26ff4fbafa84dd3078", + "testbench.spice": "e9ed97cef5b0e6d1bead72052b361c9a4f61f7d96545e12323e181aeda588be3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..f0c76b07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44e06a459e1d96c0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 23.04 + }, + "f3db": { + "min": 12340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.0359, + "f3db": 20569130.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vo1": 0.6008833, + "vo2": 0.6008833, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 26.0359, + "f3db": 20569130.0, + "ugf": 414566700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..ec28560b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 23.04 + }, + "f3db": { + "min": 12340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.0359, + "f3db": 20569130.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..291b93fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +.ends C07_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..43281df0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C07_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..13fc7dca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..8efbc187 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C07_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b5cb51c678195e4c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..d79ff677 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "556e07c2917d40c0f28dc197c038b5600d403a0de410b2b4442b1d5bc74b52c2", + "qualification.json": "b577916bb20b2df072b5442195d2c57f2b89b39053286dfec44da9885097c5b6", + "specs.json": "f8500383b3cebb556adcc7c6384d72686cecd073661d1a5069de9fedf2c139b2", + "target.spice": "e4b1a3657a09ca5417598c853a30f96ead81030557b8383fc4ac02e43e3dfc45", + "target_lvs.spice": "7245fc63b775f80d1bbdddc61365f4f50967b34b374a5ef90c7f4dee1ba09c9f", + "testbench.spice": "c123692bf389aee14e77e0e61cbbea86fe78fbc7888c69b95454436f9b558be0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..80691838 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b5cb51c678195e4c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.17 + }, + "f3db": { + "min": 13190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.16505, + "f3db": 21988990.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.6006961, + "vo2": 0.6006961, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 25.16505, + "f3db": 21988990.0, + "ugf": 399388700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..01a46ad6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.17 + }, + "f3db": { + "min": 13190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.16505, + "f3db": 21988990.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..29b023a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +.ends C07_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c96ba9bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C07_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..0d6b5991 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=4u l=0.39u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..e83eee62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C07_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "32f278c8e9f1989e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..49b21612 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "743d2d4df69c20a6dc49bdbb066080368afd4874e0d4cf43f4e7b166d41a33f2", + "qualification.json": "2f83f3a0f9a2cb0f7d132c57d8355ff6aa9184896156b4caa7adc1fb981a6f8c", + "specs.json": "3113861cbe90a186198bfe14d2a232743553ba6c929721aaac7814be9b4c316c", + "target.spice": "edc56bc8f6804813e41fd2e01ccf6044bfaae669c83d671adb172bfeb4f795de", + "target_lvs.spice": "8dd77ed46d9e654b7eba375bf839ec6ac1c453bb07afe7816c3801cb9a5fb8ac", + "testbench.spice": "d3d33e10cfa3e669464072340db60df7f1fd8df3ed4313b75f7ee451ee607e28" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..c00bcb11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "32f278c8e9f1989e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.72 + }, + "f3db": { + "min": 16890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.71739, + "f3db": 28149450.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.6003496, + "vo2": 0.6003496, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 23.71739, + "f3db": 28149450.0, + "ugf": 432803400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..5fc64ac6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.72 + }, + "f3db": { + "min": 16890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.71739, + "f3db": 28149450.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..2cd2d096 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +.ends C07_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..4c7e93f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C07_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..4af49559 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=4u l=0.26u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..b007e96a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW1_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C07_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "499c4bcbf27c7078", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..4c334946 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "72ef99d6864cf7a0f49cf1020b6581b6fca64081da57de6c00ff87b8ae76da4c", + "qualification.json": "ed7453cf8972e377fb19e150a04043f3bca349d1617d78ff0a9961483f88c528", + "specs.json": "0f2fab7ef88317c47f8cd8bf864bd13046bad68d11fc4ffdb6d26084c6dd365c", + "target.spice": "a1e7818f27f673b1aa4e5925993ab8c2ac8c52c313498ed41b37f755834e9d70", + "target_lvs.spice": "aa6c1ba2d5be677c3b6b0a5efb40e0c86720a19e2d0b0a3b662d3d76213f74b2", + "testbench.spice": "28920ccce7aec18efcc15a4f240f5d3d607080f716a9954e371bfe29ed8ae4ff" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..1583f47a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW1_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "499c4bcbf27c7078", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 23.07 + }, + "f3db": { + "min": 11010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.06961, + "f3db": 18356100.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.6009213, + "vo2": 0.6009213, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 26.06961, + "f3db": 18356100.0, + "ugf": 370858700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..71a07fb8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 23.07 + }, + "f3db": { + "min": 11010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.06961, + "f3db": 18356100.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..1556d0db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +.ends C07_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..df01968e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C07_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..eff86cef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..185d6f39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C07_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.39, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c361bd3eb5b0b581", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..974d9e63 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "32739d917c5a7e3ae0f663262471017673e22ae084d6dfbeee0ab007feb64b64", + "qualification.json": "d9c75a3738658d6a2a6dc81d285635b0a1b97303549b8b39567d6726abd927fc", + "specs.json": "087f510b3dd4ceed95b46344d34d1c550de7c177697b1c467331e61e7cf573b5", + "target.spice": "6c2262004d81db3a2e12a7685f70604eca380b144aa48bcb8260deb7c41a19e8", + "target_lvs.spice": "171798b13cb9b7880a025f51dd485e1c340d75258ce2f15faa1c515707b0ebde", + "testbench.spice": "f9e458eb94971be02af547fbf9dd816edf8656328046381c14b80ab7acb4b95d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..e7d01c90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c361bd3eb5b0b581", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.06 + }, + "f3db": { + "min": 15710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.05554, + "f3db": 26179600.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "vo1": 0.6006539, + "vo2": 0.6006539, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 25.05554, + "f3db": 26179600.0, + "ugf": 471140000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..f7a8f503 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.06 + }, + "f3db": { + "min": 15710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.05554, + "f3db": 26179600.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..72546791 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +.ends C07_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3bef677e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C07_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..a716b0ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=8u l=0.39u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..11255bd1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW2_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C07_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.26, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f4be17b428abcb73", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..cedf5f03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7ea989e60170e2be7d842db9b8b05802a3224440d9e09499e39c336a6329a25b", + "qualification.json": "43cfabd433ac25d3fe8d16b791faa08afaf1b4b787400bf4ad83731aeb8cd0d1", + "specs.json": "b4e7e936ac872b9a7971d2d021b3df50404ba3fa20bda6a318b475789e9a1570", + "target.spice": "28a2b73afa12888dcd5e71f52d3837de85f80c921ed561e41fd8aae15c450ea4", + "target_lvs.spice": "b1d64638607ea061c4d1f08e3997c596e76007bbbd4409ce3be08c58995b1a77", + "testbench.spice": "d3d1b70ab333a1c391df2ff549eeef764ee7bf4dc3c8a9268249459fcb0e6218" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..865cc519 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW2_sL1", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f4be17b428abcb73", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 20.59 + }, + "f3db": { + "min": 19830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.58585, + "f3db": 33050730.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.8, + "schematic_measures": { + "vo1": 0.6003564, + "vo2": 0.6003564, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 23.58585, + "f3db": 33050730.0, + "ugf": 500458300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..37e31def --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 20.59 + }, + "f3db": { + "min": 19830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 23.58585, + "f3db": 33050730.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..5ed4551e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +.ends C07_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..f19becbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C07_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..1d2f6f71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=8u l=0.26u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..f32a59b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_ihp130_sW2_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C07_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.52, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "748fe8081e7c23b4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..b4611707 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c388f7a56567967c74cbde692e4d23ea7c86da317158e6814ee4d077c4e90b5e", + "qualification.json": "adfde8141226284eb3d63627c27f6c3b101e8e0f7e0e3f5b3fbc4dff87d7805c", + "specs.json": "f10af05d1888313b596e2035ed43b9158cbdc7809932ceae769501a665bddee7", + "target.spice": "be0d849d665fbc12d1768d37eec18d690d4b1e395e027993dfa4d2d1629e8f18", + "target_lvs.spice": "11ec947ec1bb4d9392005936227e7bcb0b7dc71bb1782b11610961ffb781e05a", + "testbench.spice": "7b109d9c67c1175854bee706f56d0d5306c04d356e2c3566fe614fb2b31e5616" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..bee536ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_ihp130_sW2_sL2", + "circuit_id": "C07", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "748fe8081e7c23b4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 22.99 + }, + "f3db": { + "min": 13230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.9892, + "f3db": 22044280.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "vo1": 0.6008455, + "vo2": 0.6008455, + "idd": 4.000001e-05, + "vos_in": -9.09495e-13, + "gain_lf": 25.9892, + "f3db": 22044280.0, + "ugf": 442230500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..703ec788 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 22.99 + }, + "f3db": { + "min": 13230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.9892, + "f3db": 22044280.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..f3bc25d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +.ends C07_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..bac5fe26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f8 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f9 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f10 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f11 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f12 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f13 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f14 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f15 VOUT1 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 VOUT2 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C07_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..4cdaecb0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 +XB_VB1n VB1n VB1n VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..8dcbac6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C07_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d45d402bf99a590d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..09c450b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1eea1b41e786ad5be1a74ce22d3889d7b6b03f3333dd5b3ea934116a48a9b710", + "qualification.json": "1b76cdbe5d7ec99684b3b9ff412eb413ff869c772fd22dd3f69417ba6dad1e37", + "specs.json": "5e2ed197c4757bd37a6880acb6fc5a9c97287f5fa03b2f8a22d5b1c1a6cf6978", + "target.spice": "e3b9b3aa478bda70a60bf2f36bb1354c8b791b578a271a6300fce5ac5e76289b", + "target_lvs.spice": "08fdadcbf053628fb8b9f0e2944d99aac45fca5a5064a06cab0b8b000839e052", + "testbench.spice": "02078362db13bfb8864969f8da659d682631d1cbd2b61e89350c954424581518" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..aba47a96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW0.5_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d45d402bf99a590d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 30.03 + }, + "f3db": { + "min": 3899000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.02688, + "f3db": 6497612.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.9, + "schematic_measures": { + "vo1": 0.9033138, + "vo2": 0.9033138, + "idd": 4.000001e-05, + "vos_in": 2.531669e-08, + "gain_lf": 33.02688, + "f3db": 6497612.0, + "ugf": 292225800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..a63fe7cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 30.03 + }, + "f3db": { + "min": 3899000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.02688, + "f3db": 6497612.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..de582512 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +.ends C07_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3db7f0b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C07_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..6633acaa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.45 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..590150b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C07_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b61a93ffab3be575", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..35c32db1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fea3ad75d7a5263d0f83b367f2d7b6a36ab758568502b7ea258f0a54190d00b5", + "qualification.json": "77ead2067cf95a5f8580f1f906155ec17798d83bf65770edc72e4b807106413b", + "specs.json": "81444fadd9daea916fc2999d72a9d8b71f7d4e9683c339b8c92a69e82f22f214", + "target.spice": "fb1c28571f34279dbf909c8d12ba73f8354a1849a8f30777ff3afb8f6b200721", + "target_lvs.spice": "fb6658e0caa11de25da8ac16eb8c7e27ccffe64f466ec673ba972e612fe097cb", + "testbench.spice": "0ab60f58602fe985ebe591bfb2136b66a230161c705ff13d83cb953758c169ab" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..2fbaba66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW0.5_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b61a93ffab3be575", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.66 + }, + "f3db": { + "min": 6076000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.66212, + "f3db": 10127190.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.2, + "schematic_measures": { + "vo1": 0.9031917, + "vo2": 0.9031917, + "idd": 4.000001e-05, + "vos_in": -3.13685e-08, + "gain_lf": 30.66212, + "f3db": 10127190.0, + "ugf": 346694000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4054d512 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.66 + }, + "f3db": { + "min": 6076000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.66212, + "f3db": 10127190.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..398fca09 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +.ends C07_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..80d9372a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C07_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..65442d39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.3 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..8f469a0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C07_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6ab9021f36419794", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..e6fd7655 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1c2ee15248b486fcf231396986211ee735166cea79dbc020122d28d8fbb1b1bf", + "qualification.json": "5658e523664430e62b9d4915e734141c6b9bf2bb24b672301b5d4bf36b203798", + "specs.json": "50540d88be1fa2e54e073fca47543cdf3d82ae268dddc7ebc5aaa7430d8c3c10", + "target.spice": "41864d6bf3e17ab7ade495af6a972c0de2e6f911c7d25e839f52ec7041b57365", + "target_lvs.spice": "7db9acc467c4dac6bdd47700156f4e567b706ebb9ce5422aa949847ec94cdead", + "testbench.spice": "2025f25ef43b2987945d9fad496a41005e3f83c5ee75342b97df3fc349ca2c90" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..857bd2bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW0.5_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6ab9021f36419794", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.45 + }, + "f3db": { + "min": 2884000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.44544, + "f3db": 4806507.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.6, + "schematic_measures": { + "vo1": 0.903684, + "vo2": 0.903684, + "idd": 4.000001e-05, + "vos_in": -4.63842e-10, + "gain_lf": 34.44544, + "f3db": 4806507.0, + "ugf": 254384800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..05f3a325 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.45 + }, + "f3db": { + "min": 2884000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.44544, + "f3db": 4806507.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..c6cde148 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +.ends C07_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..8a8d98c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C07_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C07_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..26ba3778 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..27b40f83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C07_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.45, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7e0eff77b0230ae8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..3e138461 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "465d14c92748163a9e45f44eae8bbd389328b8cd789125d58d3d535a83fa0ba1", + "qualification.json": "e8cdfb2a8969eacc2efb4eb1c6d566deb975ab945687dda1a6811a00885a84de", + "specs.json": "cdddfb04e16b4ace6bf1efe7d10ebedb6d56be90369f5ad06237b7af416e32ed", + "target.spice": "f152f8243df98809622aa23264a9eda2b809c2f5ea2eb4e9b8858ef2af2f2ab2", + "target_lvs.spice": "0183a44a6c4ae547c843d570698dc72c0343c765b93b2218be387e88a37935c7", + "testbench.spice": "0a85831e560775644f1b5db9d7f2c0e85168c43d589dcf383a7c7534c32c26a1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..b08d77e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1.5_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7e0eff77b0230ae8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.2 + }, + "f3db": { + "min": 4552000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.19793, + "f3db": 7587366.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.8, + "schematic_measures": { + "vo1": 0.904562, + "vo2": 0.904562, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 35.19793, + "f3db": 7587366.0, + "ugf": 438580500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..43328477 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.2 + }, + "f3db": { + "min": 4552000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.19793, + "f3db": 7587366.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..3ebe7b2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +.ends C07_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..82835264 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C07_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..fd75cb80 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.45 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..c42dcfd4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C07_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.3, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d4c987653d38d923", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..1bbf9128 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f54f6bdf8d9ef10b8a643f40d3b6431f70981abf7809823b2f6345627ee21e2c", + "qualification.json": "8828b53cb017ff11a7b2ef99283bb20bc09d75ea1869e37b7b9f44097c38116c", + "specs.json": "a35a0c6f59f9e8af2d4955813378aebdf9d2feba185df1048d31bece82620f64", + "target.spice": "24d4259ff13fe58ee0b729caf8c1580e3e230cbed5894340693332a25203f430", + "target_lvs.spice": "8f6440611cd167818a9b259ef4cd29e34527d140ebd4f9c5688344b36e6083f2", + "testbench.spice": "9d30cbc7d4cfb0341e79d7e7518d70478ceb14d9f7db3a04800cb31549ed45e2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..d6d3ec8f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1.5_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d4c987653d38d923", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.56 + }, + "f3db": { + "min": 7604000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.55705, + "f3db": 12673820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.3, + "schematic_measures": { + "vo1": 0.9047534, + "vo2": 0.9047534, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 31.55705, + "f3db": 12673820.0, + "ugf": 481568000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..9226ddbb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.56 + }, + "f3db": { + "min": 7604000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.55705, + "f3db": 12673820.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..5ce47549 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +.ends C07_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..99a1a491 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C07_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..4df470a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.3 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..3c15584b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C07_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.6, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db5adcd296ee3c65", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..f8e5f327 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ce3203743758a88661052b72e23c8a99ebaf7d8e7e53093726decefd56758000", + "qualification.json": "f88cf1056b08668a1c4a908cb230eb17ac6b3414483fee5a9c3fc741d45ef569", + "specs.json": "1a2311d9baf9571c3dfab8b1384495f224fa743570fc27b9f47805f58d27b1b1", + "target.spice": "728db9fd4337ad09a9bd7cb37cd50f251bf97bc0da1e59e64a39eeb3a7f12d71", + "target_lvs.spice": "ed1779a77893a0afbe269e6839c1d9cfa94699bcf5a7ce97ebe4b6c086e9ac88", + "testbench.spice": "2a70196c8c6a13a426fc3aa9d0fa413db9ea9e58b066c054cc530e0d5029c214" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..ed79bcb5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1.5_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db5adcd296ee3c65", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.81 + }, + "f3db": { + "min": 3075000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.80515, + "f3db": 5124564.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vo1": 0.9047223, + "vo2": 0.9047223, + "idd": 4.000003e-05, + "vos_in": 0.0, + "gain_lf": 37.80515, + "f3db": 5124564.0, + "ugf": 400100200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..6f98b2cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.81 + }, + "f3db": { + "min": 3075000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.80515, + "f3db": 5124564.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..f3aeb6ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +.ends C07_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..299db07e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C07_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C07_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..f5eccc68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..fa4fd4e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C07_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8a692dea32a17987", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..c97a46e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "aa550cd27b4dd0e787f29195b3f563b8cf98052d449bc229b06ca5eef82c5281", + "qualification.json": "9b863adc3efb3605753674d76a0026eafc326fa5ee48bc992bdb58ec0498a9d2", + "specs.json": "396a797f186bc8729db65e95177a95587d0df11c603b8cfa5c323fceeef40005", + "target.spice": "0345bebac9818da99e9a0d4d02e858a829400525b464d1d89c3d4a92da3ac3c6", + "target_lvs.spice": "6fd769b9a784371c2d5c727be9cc94cb2e9249e2d14099ad5056088f29736089", + "testbench.spice": "0fc11889c1c6b95b9e89c5ae5f90517e0dcc02e08e1d7739d1f342c3b2219d93" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..5edc5ff3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8a692dea32a17987", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.61 + }, + "f3db": { + "min": 4294000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.61195, + "f3db": 7157315.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vo1": 0.9041513, + "vo2": 0.9041513, + "idd": 4.000002e-05, + "vos_in": -1.65528e-10, + "gain_lf": 34.61195, + "f3db": 7157315.0, + "ugf": 386530100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..6890cd92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.61 + }, + "f3db": { + "min": 4294000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.61195, + "f3db": 7157315.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..a5b6ca22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +.ends C07_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..b3661606 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C07_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..748e7cfb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.45 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..3b4ba052 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C07_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "987ca528fb04696e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..813ea318 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "743f306d273dd59c1563dc03a3f5509f648ea5ac53a5233f01aa5529270dccc4", + "qualification.json": "4e6c4eda34bf86b52bf3e3629f90ca9743e355c38ae4ce6b2046c8fe15ab6578", + "specs.json": "d73f3205fde89b4e604ed60b40ba0eac7272c2484eac591370ae7ea9a27656ee", + "target.spice": "93effc14bd49f5f31b24d34544ff10b3e65cbe0fa78e2174b80d015c057a1278", + "target_lvs.spice": "838cd7715f81cfd526916902e89e2218001e531bd62cb4fec1e6506b8fe6dbb4", + "testbench.spice": "510e34e1678d8c0639e21350cbffe27b82c6b4943b6401ba0801cac43fd05a21" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..bfb9a034 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "987ca528fb04696e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.41 + }, + "f3db": { + "min": 7014000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.41335, + "f3db": 11690480.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.4, + "schematic_measures": { + "vo1": 0.9042868, + "vo2": 0.9042868, + "idd": 4.000002e-05, + "vos_in": -1.81899e-12, + "gain_lf": 31.41335, + "f3db": 11690480.0, + "ugf": 436524100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..e4476978 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.41 + }, + "f3db": { + "min": 7014000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.41335, + "f3db": 11690480.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..70586401 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +.ends C07_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..65fe4ee1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C07_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..b31c8ed9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.3 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..2b426d61 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW1_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C07_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "fda265233217f677", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..80524b8c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "26c24ac098ec5bd213f5aa203415f4a852822bd88539937bbac39b5b2e1077dc", + "qualification.json": "08f9e3cb76edbbb825e18c8c66c3bf9d83720605c8b1edc189ed04f432add452", + "specs.json": "cd966e7bf65722ba0e19cc2adc131c0631cca4675dc19460d1d06f649ddc1880", + "target.spice": "f313cefdc4ffd32ec816acff8fe18144aac767d5406af1bc9f76f37f832cb496", + "target_lvs.spice": "931ab481d26d18989ac19fcc9dc290a7b0026325a0a557d8c1b55bd970a94ff2", + "testbench.spice": "e092f53ae5c66972f6397b63010669c1a298dc9a85ca7031bd17cecb7860c14d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..f3b20b89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW1_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "fda265233217f677", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.83 + }, + "f3db": { + "min": 2981000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.82993, + "f3db": 4968312.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vo1": 0.9043304, + "vo2": 0.9043304, + "idd": 4.000002e-05, + "vos_in": 4.388494e-08, + "gain_lf": 36.82993, + "f3db": 4968312.0, + "ugf": 346516500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..1b12e896 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.83 + }, + "f3db": { + "min": 2981000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.82993, + "f3db": 4968312.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..8032e7b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +.ends C07_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..1d43f4dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C07_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C07_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..50fa4ed6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..4f59584a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C07_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.45, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c9a6d7f9b58b9a1d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..61754abc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "35ac9fbeedad74cfe5732f2765589180b8c742ae25e3e705289143b192c8b2f5", + "qualification.json": "dc5924183c6274f9c52477c51aa43859e0524610df937f939d98cb71b8c20cd1", + "specs.json": "b81027732cfe8afb2d4f3e82b1a840cbda5fdd5a5d0f64d5c51967d7d8c38511", + "target.spice": "ea23f4948b053d0d7fd79cbf0fd5d9ec6e5e467a630271b91a9db873d39412ee", + "target_lvs.spice": "04cc63431ca6616bedb4811280ee464881e0e14bfc5349592eb4254b2cc969b0", + "testbench.spice": "2d20b7fcae685a364175fdac4e4f0e9138c28f00fde4fdcec7e69c061767310c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..a74362cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW2_sL1.5", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c9a6d7f9b58b9a1d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.49 + }, + "f3db": { + "min": 4729000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.49124, + "f3db": 7881932.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.8, + "schematic_measures": { + "vo1": 0.9047924, + "vo2": 0.9047924, + "idd": 4.000003e-05, + "vos_in": -1.81899e-12, + "gain_lf": 35.49124, + "f3db": 7881932.0, + "ugf": 472136200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..1b7b051d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.49 + }, + "f3db": { + "min": 4729000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.49124, + "f3db": 7881932.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..f5772d67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +.ends C07_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1aec7bc2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f12 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f13 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f14 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f15 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C07_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..808b9bbe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.45 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..d91a7adb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW2_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C07_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.3, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "915c086e6bf2ab8d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..4e3f82c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a9436f19a10dd1f6449282271219289d165ba43fed9330a003cf09e6bd70aedf", + "qualification.json": "42eb9485528a81aa906729040bc8294e9c34bbf7558ae67981b38b6b65d612c5", + "specs.json": "994a0f6d22f24fc01cb46d438eb02faaf0467c3974da7087d87c8b4b3cabe636", + "target.spice": "5d113dc3f1283e566d9ceaa36cc80dc547f9128a3995bddad0aaa19d230fe6ac", + "target_lvs.spice": "2721854a4fcdaac403ae3aff563f0c86f905b0883806f43dd9414df974eafd24", + "testbench.spice": "af948140847df3e78a1e0e39c273c40da581d14ea5a9e34897ab27a5e9874e09" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..0760c636 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW2_sL1", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "915c086e6bf2ab8d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.56 + }, + "f3db": { + "min": 8015000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.55954, + "f3db": 13358630.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.9, + "schematic_measures": { + "vo1": 0.9049994, + "vo2": 0.9049994, + "idd": 4.000003e-05, + "vos_in": 2.273737e-10, + "gain_lf": 31.55954, + "f3db": 13358630.0, + "ugf": 507592900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..73df462e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.56 + }, + "f3db": { + "min": 8015000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.55954, + "f3db": 13358630.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..882d3960 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +.ends C07_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..b6431bc8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f12 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f13 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f14 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f15 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C07_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..8c42cd21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.3 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..ae673610 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/case.json @@ -0,0 +1,156 @@ +{ + "case_id": "C07_sky130_sW2_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C07_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.6, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "category": "diff_cs", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0d0b3898849cd39c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB1" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..84d3594c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0be1b75ee1c947e75303c62d9960489fdf32bdefad410e7a2cb1d6ac0b905a7c", + "qualification.json": "30043fe7b01ac6cdbc58c3784638cc6dbe829da3e92810e9bf9278ddfc7e36cd", + "specs.json": "411e8dd1fa934501db3c819324d46496c077d9cd041bdc8c596edefbf0b1af0e", + "target.spice": "0cdb1e452f0f00ec7263faecbff2f44b0f987ec458baca6b200bbb09c03620b5", + "target_lvs.spice": "6aef1d66806afed8205b2e2b4ccb510b3ef71928a92738d07a4f9d24f7c4dce2", + "testbench.spice": "26e413470f93acadc2fb326aa828634f1689b5c0468ff5f579759b8e9ec9a092" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..f9bf0261 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/qualification.json @@ -0,0 +1,108 @@ +{ + "case_id": "C07_sky130_sW2_sL2", + "circuit_id": "C07", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_cs", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0d0b3898849cd39c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.33 + }, + "f3db": { + "min": 3147000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.33312, + "f3db": 5244487.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.5, + "schematic_measures": { + "vo1": 0.9049579, + "vo2": 0.9049579, + "idd": 4.000003e-05, + "vos_in": -1.81899e-12, + "gain_lf": 38.33312, + "f3db": 5244487.0, + "ugf": 436283600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..9cfd2488 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.33 + }, + "f3db": { + "min": 3147000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.33312, + "f3db": 5244487.0 + }, + "floors": { + "gain_lf": { + "min": 20.0 + }, + "f3db": { + "min": 100000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..3f223575 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C07_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +.ends C07_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..6e136deb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C07_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f8 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f9 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f10 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f11 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f12 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f13 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f14 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f15 VOUT1 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f12 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f13 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f14 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f15 VOUT2 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C07_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..53a747fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C07/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,43 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 IB1 C07_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 +XB_VB1n VB1n VB1n VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB1n VB1n VSS 2e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +* ideal CMFB (disclosed): PMOS load gate = replica bias + Gcm*(Vocm - Vocm,target) +BCMFB VB1 0 V = v(VB1n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..aad63340 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C08_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.84, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bbc98ab733caefd8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..27944ea9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1c41e0452b6b54ee6d98e0cd89abb70d03a3f07fb9c8bd1e357cc120590b7db0", + "qualification.json": "73df47b0c375f8fa815999663a015f8d5835e0b86e5acd459150728d16a186d0", + "specs.json": "9312252209d6bb94d03f3d9689fc650df41961f8483cd0a92b184b1a2d0879ff", + "target.spice": "d0c952a312a67d1206a6aafbfbb62b58dd45598c91ca2ada8b84a3c05c64f25b", + "target_lvs.spice": "8a4cd61b0fd6d8bfecc4881960f616ad0e961029f31ad71c05c22d10a2dffbec", + "testbench.spice": "9b1a4619aef15a78a68119b318cf2e0306a1dda2c7787a778719bed05039c5a3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..4d3e7a32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bbc98ab733caefd8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.47 + }, + "ugf": { + "min": 8782000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.47497, + "ugf": 14636300.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.567391e-05, + "vos": -0.00154057, + "gain_lf": 40.47497, + "ph_lf": 0.05533407, + "ugf": 14636300.0, + "ph_ugf": -90.43508, + "f3db": 138085.6, + "pm": 89.50958593 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..36ee6028 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.47 + }, + "ugf": { + "min": 8782000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.47497, + "ugf": 14636300.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..a05642a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=1u l=0.84u nf=2 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=1u l=0.84u nf=2 m=1 +.ends C08_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..eb0ed0f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C08_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4bc86ea3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..c890d583 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C08_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.56, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c8f7bdc8b98415ed", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..44ec4e32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6350b560781b120d0bb8f45df65a829dde7e351117f756e4a1de546220e79ec7", + "qualification.json": "9d02c5ed0195fa39f0c1f772af08380f536895faf0cac84ef26d2141300bca0f", + "specs.json": "a61d13dda592ba54ebce3dbe9be78af367bd68af88e7be896035517357d2da1f", + "target.spice": "b9ed71b8019281ea7e314d82192b45fc79b4e78157e6f914aebc2c35f1017510", + "target_lvs.spice": "c6e0da770c9cdbecdb140c2b49e22b76e50d5d80c5fd8371586711ecef9a4155", + "testbench.spice": "5d8c9956e63bba82017d188493ae1ed338ae55b629286ed163bced1d746f1cbd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..5445a9fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c8f7bdc8b98415ed", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.73 + }, + "ugf": { + "min": 11280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.72799, + "ugf": 18808120.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.891173e-05, + "vos": 0.0003982061, + "gain_lf": 37.72799, + "ph_lf": 0.04682252, + "ugf": 18808120.0, + "ph_ugf": -89.96297, + "f3db": 243375.5, + "pm": 89.99020748 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..26db4949 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.73 + }, + "ugf": { + "min": 11280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.72799, + "ugf": 18808120.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..745bdde9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=1u l=0.56u nf=2 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=1u l=0.56u nf=2 m=1 +.ends C08_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3757a620 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C08_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..cfa965cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..57151ed9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C08_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "56f9bd7e977fa709", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..2eda58e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c58954c870124d86e515aa98b7ecf78f7cdab1eb39a5027c7c68670ad3b3f965", + "qualification.json": "67aa00a0c0fd9a094bcc42d63bc8a533349efbc2c75d491285cdf1f3abba9616", + "specs.json": "c73ad7089c33c9591822f22baefa2c5638202426c181136737877aa6c9c8c137", + "target.spice": "b41cbe50fe6748395952543f58d92ba703c08dcbf1f16da68eaad1617713f2cd", + "target_lvs.spice": "a235ba6ab6b25309571b51b101859063a15db71346d2e5b8a79ecb800771af06", + "testbench.spice": "538ec35013d77d2d9a97ef73c24b224d6145b97ccbe682c0c3939b82bd6eac33" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..fa837b35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "56f9bd7e977fa709", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.94 + }, + "ugf": { + "min": 7248000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.94394, + "ugf": 12079980.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.235917e-05, + "vos": -0.00228577, + "gain_lf": 41.94394, + "ph_lf": 0.05539647, + "ugf": 12079980.0, + "ph_ugf": -90.80232, + "f3db": 96233.96, + "pm": 89.14228353 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..baea6954 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.94 + }, + "ugf": { + "min": 7248000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.94394, + "ugf": 12079980.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a66c2fff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=1u l=1.12u nf=2 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C08_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e5d5b643 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C08_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..52660fff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..ce03e939 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C08_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.84, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0e70d53c874bdca7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..769f3f8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dc66270447d0c86cc1b27b02a8fd00e086cd17c0efc4e6336fd176afd102407d", + "qualification.json": "54d71599a062a18ff577166d2dc5397cc3949302277e59d9bf40e6a2bdc4c175", + "specs.json": "5e93e004850104a610c89d27a2b409d2b6ec7d9dab97307f1395805d67e69f29", + "target.spice": "5d5efea0e24660bb0d368a8914bf4c72e2ea238d761c6dd140ac334d675f591b", + "target_lvs.spice": "21853627c8863dc8b671c2a37705d35c1ccd3e7d6f67abb2e8e6665e8608ed6a", + "testbench.spice": "e8230d207821691209a5330b7cc67dfa702c6a0a1ba8432b78ec947d4750f53f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..6a6d8629 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0e70d53c874bdca7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.24 + }, + "ugf": { + "min": 15960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.23723, + "ugf": 26604640.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.917696e-05, + "vos": 0.001677474, + "gain_lf": 44.23723, + "ph_lf": 0.1134194, + "ugf": 26604640.0, + "ph_ugf": -92.15202, + "f3db": 162947.9, + "pm": 87.73456060000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..d5daf85a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.24 + }, + "ugf": { + "min": 15960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.23723, + "ugf": 26604640.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..7c7d992a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=3u l=0.84u nf=6 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=3u l=0.84u nf=6 m=1 +.ends C08_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5fb0a614 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C08_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..8724a93e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..6a607ee3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C08_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.56, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6a6ce56e82646caa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..849a0a87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7180ab62070eb4f48d400686878cf839c5af107e96126526d4498b293d75edfe", + "qualification.json": "bf9b61b4f6c99e131be24fdfb6222d2a9282981865f5b46cb6166ae562845c0a", + "specs.json": "6b6b7d8bb38372a33507192e2df1bb5ef07174facefd90ec7c26ddb5173e16fd", + "target.spice": "d918b2c93024607d2d8413a04f15a9cf22efad0e9d941d6e3bf59750053584ed", + "target_lvs.spice": "3da68bc7324882c2921e6cb50ad7d938d14c0b4905e7f5307ceae26effbd3830", + "testbench.spice": "a1be7cdab5c2150e97533b2ced53fcde93e3ad5bb55a27fa87a923dbdadfb613" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..d4a5ff6d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6a6ce56e82646caa", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 37.79 + }, + "ugf": { + "min": 20290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.79162, + "ugf": 33823100.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 4.332281e-05, + "vos": 0.003542733, + "gain_lf": 40.79162, + "ph_lf": 0.08127332, + "ugf": 33823100.0, + "ph_ugf": -91.36284, + "f3db": 307817.6, + "pm": 88.55588668 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..c9f9fc7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 37.79 + }, + "ugf": { + "min": 20290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 40.79162, + "ugf": 33823100.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..9f46aa2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=3u l=0.56u nf=6 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=3u l=0.56u nf=6 m=1 +.ends C08_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3b898664 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C08_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..e8f15ca6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..40120cd9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C08_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e6658e2440989467", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..cfd23c45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0becbb516924a240e422707ae0a63477c5bb4b461561db7cae18fd2ee9dbbc4a", + "qualification.json": "7dbc038c58b74ea48a7779544150c6636657748fd1fc864a2c8df892029bf6e3", + "specs.json": "8c36a4554d92b0d54460ac4397f328474ccc5113b67f196df3b6540d7f096628", + "target.spice": "8f70632497ecd1839178af9a500d803ffc6f92afc46388e8006fe00dc0079786", + "target_lvs.spice": "8d21bab7fd6815c778457dfc5972690b7c1988990c3c3705bfb70cf7bd29429a", + "testbench.spice": "b1d24ec2132ca816e5113a47a788d8f2b2e2ff927216a1950f0a6b79b5e3c3c3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..f8b4f5f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e6658e2440989467", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 42.76 + }, + "ugf": { + "min": 13570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.76099, + "ugf": 22610800.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.729526e-05, + "vos": 0.000924354, + "gain_lf": 45.76099, + "ph_lf": 0.1278973, + "ugf": 22610800.0, + "ph_ugf": -92.80872, + "f3db": 116432.0, + "pm": 87.0633827 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..6df111eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 42.76 + }, + "ugf": { + "min": 13570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.76099, + "ugf": 22610800.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..ef3cc0d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=3u l=1.12u nf=6 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C08_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..1088ebb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C08_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..1b4fa9c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..52ffc9a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C08_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "22aee7afdf9f5ebc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..20f88cd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7ac6e8b49500cda1bfc3df0b1029d48c5d8d374007781ca88c78e0539e2f19f7", + "qualification.json": "1f9a2c8661d6a27513872bb7cbe553b0d1fb8304829d0806e91c557a12470600", + "specs.json": "a85ca03b99ba89e3ed64f3a8b28896eb25f78c7f4970ee38873778c3adc7e33b", + "target.spice": "06d01b3e3d43e5688e6a74d9f7b14f0ecb3cca72d762e65aaf4d98eff807fe3f", + "target_lvs.spice": "fd71151cf15e94f20ec6f95ae88b661cb0b878144095194be8df8fbd655bc69a", + "testbench.spice": "7a6338671b4b8215bcf6a93d047292dba3b6b6c6fa11e03bdafd1356587632a5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..d8a7f014 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "22aee7afdf9f5ebc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 40.05 + }, + "ugf": { + "min": 13060000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.04609, + "ugf": 21769850.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.830364e-05, + "vos": 0.0009475883, + "gain_lf": 43.04609, + "ph_lf": 0.09210504, + "ugf": 21769850.0, + "ph_ugf": -91.33537, + "f3db": 152868.1, + "pm": 88.57252496 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..e4c9f146 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 40.05 + }, + "ugf": { + "min": 13060000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.04609, + "ugf": 21769850.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..cc64a9a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C08_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a0ba7eac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C08_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..bdf6a5d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..364606a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C08_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "867f68557540e58c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..aaa90cd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b0954d61d795f9eba02e0da8a93d2d1b780f9d1dad4313a22801b51bcc68fdd3", + "qualification.json": "aa763df9050aceefcafb298afe2758f4567e646722ff11ea6576d672ed2c838f", + "specs.json": "846e47e162b743baf3aee05a512da4b3beea209c0c6e7447290e06bf4f0e56db", + "target.spice": "34c17a88de53d4fede5d63b2c54324325c6976e16c76c344bdb0d5ab7a40f121", + "target_lvs.spice": "ff9937c00a5f1f37b7461e31e708c3cdba8cb4edb6ba43459f5dbb6a338d5419", + "testbench.spice": "4cd0fb28878d379d6dcb38eb7f2da372936964e3f8fdec7d1fc61dbeffe01d29" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..08ea08b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "867f68557540e58c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.87 + }, + "ugf": { + "min": 16570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.87391, + "ugf": 27619540.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 4.152962e-05, + "vos": 0.002837094, + "gain_lf": 39.87391, + "ph_lf": 0.06939099, + "ugf": 27619540.0, + "ph_ugf": -90.73614, + "f3db": 279430.5, + "pm": 89.19446900999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..69852a75 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.87 + }, + "ugf": { + "min": 16570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.87391, + "ugf": 27619540.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..ab5e2e2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C08_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..3c1ea1f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C08_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..e1b2a367 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..9aa929c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW1_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C08_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "94f40bc58f7d1dd9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..6fcdce74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b315069e631b3c37b6d134a94dbe34b0c431a1bdaadbc378ec22165771285ed4", + "qualification.json": "5092503ec17ffa542a84911669699ef7835397cfd4f179cb1bdad276c08c67f2", + "specs.json": "85ccff798feedeb5e9bfe8dab396d2a676854c4223c0d9ff274ceae327b87204", + "target.spice": "82b2aae525023bf9c88d30500781f455c87ab3471b9076e5a5326da7a277dd5e", + "target_lvs.spice": "1eb26482f04ccfd9ae7bc1db6aa54efdb457b39f9108ca540cf26efcbada51a9", + "testbench.spice": "5fe741e68471d7d628e03c6529e6e11a8c18224d6ac598bdd6cab9f650053a7c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..09ca2d40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW1_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "94f40bc58f7d1dd9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.46 + }, + "ugf": { + "min": 11110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.45594, + "ugf": 18509170.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.676275e-05, + "vos": 0.0001022394, + "gain_lf": 44.45594, + "ph_lf": 0.1006336, + "ugf": 18509170.0, + "ph_ugf": -91.81732, + "f3db": 110512.8, + "pm": 88.08204640000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..9aff3648 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.46 + }, + "ugf": { + "min": 11110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.45594, + "ugf": 18509170.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..bd147a77 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C08_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..e3c51f83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C08_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..219f0a69 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..d81b340f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C08_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "659c2ad457b68bce", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..765a697b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "991f174f223b4957e4cf7ee6c2190da9d96565f3792e108a66339d589563d6ee", + "qualification.json": "381ca42172722185653e2929e206400d718c7b06eb5694c4753331dfbbec906d", + "specs.json": "feac633eaaba59e93f843f3ee2ce612af3ac0185ff98f18c194b346088db5a12", + "target.spice": "133125443e0af7b318d5196a54c5c9397d53be27e2ab0bca9ad6c9d6b35f8d88", + "target_lvs.spice": "bf246be9d42b50b1c9bded7fcc1a42e743bbd592d23c9640305c9870937cff30", + "testbench.spice": "65aa0f3ef155b1bfd688ffd9eaa2d391ca00deaf91abaea12247375cb62f3839" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..b3b5b0ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "659c2ad457b68bce", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.92 + }, + "ugf": { + "min": 18230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.9243, + "ugf": 30378520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.995612e-05, + "vos": 0.002011632, + "gain_lf": 44.9243, + "ph_lf": 0.127504, + "ugf": 30378520.0, + "ph_ugf": -92.8935, + "f3db": 172103.3, + "pm": 86.978996 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..68720cef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.92 + }, + "ugf": { + "min": 18230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.9243, + "ugf": 30378520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..83f87c16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C08_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..385798fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f12 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f13 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f14 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f15 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f6 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM5_f7 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C08_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..3afe1af3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..ba302004 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW2_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C08_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "37e94361ce7b421a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..9824c13d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "19c2e75ad3766991a72147fca8af4b4a64b94ffcb96bb4e36fc9d8d3ab827758", + "qualification.json": "b643da0bbf0c26ca13e45dbaf4c537d7f5b3fb12b2a2db8348d7c9008d4d6d44", + "specs.json": "c76637cd5c5f56e9f80b8abfe82e17f5b673cfd9db2c0651db5f47172e81d3ea", + "target.spice": "bca49bffbd5b971366cf195b5b005c7c53dd483b25d88b9ef5ddf1c2b97dbf4f", + "target_lvs.spice": "67d5e35d65dd51d8d6dcc21efdd754f9c06efc429537ccdbd8eda8178e534c03", + "testbench.spice": "ddbaa9bbed29e6eaf8dc9ba12fd9e21bb6a2a4fb5b878b50d2abebfba291deb1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..739bfb49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW2_sL1", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "37e94361ce7b421a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.31 + }, + "ugf": { + "min": 23190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.31396, + "ugf": 38648770.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 4.47758e-05, + "vos": 0.003887041, + "gain_lf": 41.31396, + "ph_lf": 0.08878371, + "ugf": 38648770.0, + "ph_ugf": -91.91884, + "f3db": 331511.2, + "pm": 87.99237629 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..1bb8eff5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.31 + }, + "ugf": { + "min": 23190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.31396, + "ugf": 38648770.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..0a615dff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C08_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..6b3ebecc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f12 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f13 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f14 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f15 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net22 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f6 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM5_f7 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C08_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..12f461f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..7f789bae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_gf180_sW2_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C08_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c9bb5e751c50b45c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..d4cc98fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4877f3331f9ac6725e38836b6785f3440002c42ea20921e6b3dc9340bbf289a2", + "qualification.json": "1a3856e3ac05ddecbb478065ec84b01ef22ee504902d517392220c0ef1cb553c", + "specs.json": "7a2a2a6e4f485f370991632b8aaf00d46bd9174fd1b566688fc429da65cf983f", + "target.spice": "7880debb1a22be9ae1a44770c63bb5432a01de2d708e219fb1835589e5fb1dfb", + "target_lvs.spice": "dc024977c3dcc42e305db2b2f75b955fc357530187392ca9a90c4f0cda4ac555", + "testbench.spice": "e0af8e8f92e6ef895850a12fa0b5134f8f17832dca4b6b4962a87fc4a78625ee" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..e2635f2a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_gf180_sW2_sL2", + "circuit_id": "C08", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c9bb5e751c50b45c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 43.52 + }, + "ugf": { + "min": 15510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.51716, + "ugf": 25849390.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.65, + "idd": 3.775778e-05, + "vos": 0.001299616, + "gain_lf": 46.51716, + "ph_lf": 0.1462722, + "ugf": 25849390.0, + "ph_ugf": -93.73535, + "f3db": 122115.8, + "pm": 86.1183778 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..9006c529 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 43.52 + }, + "ugf": { + "min": 15510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.51716, + "ugf": 25849390.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..01083818 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1 net22 VIN1 net23 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 VOUT1 VIN2 net23 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net23 VB1 VSS VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 net22 net22 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM5 VOUT1 net22 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C08_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..7d1b7377 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +MM1_f0 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f12 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f13 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f14 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f15 net22 VIN1 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 VOUT1 VIN2 net23 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net23 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net22 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f4 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f5 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f6 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM5_f7 VOUT1 net22 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C08_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..adc50cc7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..dabc08db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C08_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.585, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.585, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.585, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.585, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.585, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.585, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.585, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "53f98b713459bcc6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..165154ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c1485c1cfec98bedd2ea408dc40db75dbbe6d22fd87b61638032fddf2fa53563", + "qualification.json": "cacf209b4e0912ddebc187e16c68e113ef98098fd47a85598783a487bac63bff", + "specs.json": "4cf943c292c23df02c9c480e262670936d72272ed05bf33499f72e1b9c420ef6", + "target.spice": "2f3ac482a4685570805241e9e2bc58e4b03d9a975ea348b1c4e9fc32638bbdd6", + "target_lvs.spice": "2c1c8f095eac8c822f92c4f1cbc45bc2b7cfab56d70a80cb17921d68730138bf", + "testbench.spice": "f57c8660d20bc2c0a1d03c17718e04e317b6dc3aec59e84263e942c20a035abd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..fe33ffec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.585, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.585, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "53f98b713459bcc6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 12790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.84446, + "ugf": 21318990.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "vout0": 0.5999991, + "idd": 2.779222e-05, + "vos": -0.0091125, + "gain_lf": 25.84446, + "ph_lf": 0.01334806, + "ugf": 21318990.0, + "ph_ugf": -88.13613, + "f3db": 1085072.0, + "pm": 91.85052194000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..d256dcce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 12790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.84446, + "ugf": 21318990.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..5da22587 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=2u l=0.585u ng=4 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=2u l=0.585u ng=4 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=2u l=0.585u ng=4 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=1u l=0.585u ng=2 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=1u l=0.585u ng=2 m=1 +.ends C08_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5fd10e4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +.ends C08_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..3533ebcd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.585u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..a0bc042e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C08_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.39, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "749950b295caac87", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..1f28c6d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dc0e05436b54c2adfec97a8fa3a7c1315ae0d05f1d50a14d3b771d655d34d611", + "qualification.json": "a53b33cdb297addf6f6ae13771264080a3a03b30214bb3b81dfd130cb192e45c", + "specs.json": "2dd7a3203bbca632f2fb04e94fdc86ea83ebfa514dbdddd8c82eaea7d3b939e3", + "target.spice": "ee11248e04243e82c1368e751928f93b022587d5dc8a4969e552f525f5dafa9b", + "target_lvs.spice": "1607605e9b38b4126d7446dd67412dd1fc6dd6ceb4d1aa8a744d12fec18e1899", + "testbench.spice": "075210105d4d3cd85765ede61ce4ea569d9aaa2d47d047e24f53158b7d5bcd36" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..db9f1257 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,124 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "749950b295caac87", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=24.93 below floor 25" + ], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 14620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.92868, + "ugf": 24369370.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "vout0": 0.5999993, + "idd": 2.790715e-05, + "vos": -0.00661216, + "gain_lf": 24.92868, + "ph_lf": 0.0123724, + "ugf": 24369370.0, + "ph_ugf": -87.4555, + "f3db": 1378959.0, + "pm": 92.5321276 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..b015a791 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 14620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.92868, + "ugf": 24369370.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..527a3ece --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=1u l=0.39u ng=2 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=1u l=0.39u ng=2 m=1 +.ends C08_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ced6125e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C08_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..6e2e1ea5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..c3d3f61e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C08_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.78, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.78, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d67ac26c94abfeba", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..44118ebb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bab413c50d61b4946e0a3d1f87695827ea214edadf4a29f79de1b9d74d4079f2", + "qualification.json": "2f427460861ead7384e6976c91776be53742feb94a1d36738357395636704a38", + "specs.json": "704f27fae0627e41a5a2933d7d807b0d34e20b2bbee117a12a4e0734db6a0620", + "target.spice": "0d35e3803bafc75c97155a21c496a4eb0c7edf51c00051bf7fbac414fd5ac42e", + "target_lvs.spice": "51153ef4317946a9851da5792aea63639caa43bd2a20efe2fa5efc90326af4e4", + "testbench.spice": "d2e7ddc0da023ff029629e2074539bd7a3d209b3be5148ad4aa51947920740a2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..f2d05005 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d67ac26c94abfeba", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 11010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.30932, + "ugf": 18351520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vout0": 0.5999989, + "idd": 2.6294e-05, + "vos": -0.0108065, + "gain_lf": 26.30932, + "ph_lf": 0.01353739, + "ugf": 18351520.0, + "ph_ugf": -88.65026, + "f3db": 885664.7, + "pm": 91.33620261 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..ec9d7f70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 11010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.30932, + "ugf": 18351520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..385dac42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=1u l=0.78u ng=2 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=1u l=0.78u ng=2 m=1 +.ends C08_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c4f9dcf1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C08_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..34ea3342 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.78u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..e650e8e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C08_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.585, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.585, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.585, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.585, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.585, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.585, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.585, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ad8cd836f536beef", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..e059ff97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d389bfd28a5171dca0bc73e8b3d09bbb373d35f97b8f60cf4e1ad8c2aba2d774", + "qualification.json": "9bd34028c7a3834f4de2927015596e8d70acaafcb6f24487d8cc941f946f25d9", + "specs.json": "e2f71d9e13d9590e26bf0c94e8a3d80dfe917d1e69b8d4febca2390e13b11546", + "target.spice": "51de012ab5d55f8f87126a9f214df99a1345b2765dccc6f4bdeecb297872a16b", + "target_lvs.spice": "c4641a215206531a9b3193aece5528736708a2d88cd2812409b7c36b019ab035", + "testbench.spice": "a2ecad04f7ad93d35e19a6e9d7afacefb58cf41b5d0c7bfacf62379e074eb4b3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..281046d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.585, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.585, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.585, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ad8cd836f536beef", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.32609, + "ugf": 31952060.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.4, + "schematic_measures": { + "vout0": 0.6000001, + "idd": 2.668031e-05, + "vos": 0.0005374781, + "gain_lf": 26.32609, + "ph_lf": 0.01522783, + "ugf": 31952060.0, + "ph_ugf": -89.66261, + "f3db": 1541715.0, + "pm": 90.32216217 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..a87e322a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.32609, + "ugf": 31952060.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..617900cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=6u l=0.585u ng=12 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=6u l=0.585u ng=12 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=6u l=0.585u ng=12 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=3u l=0.585u ng=6 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=3u l=0.585u ng=6 m=1 +.ends C08_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1bc80369 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +.ends C08_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a1021f22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.585u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..1b24ccfc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C08_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.39, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9552d7593fa18ddc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..b5520673 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ebe58a4dc5df47232fa6fdc03e49abec4a00ee00345186f8118aa0d073f288d5", + "qualification.json": "002b4a0abd4bd5d091a0265a7b4d7c7f851729a295e82a3ba99b16077a3e0292", + "specs.json": "fa792f8d1b05dd2987c7c9845e923b20840e9529b8b36c4043971f3e7872e8a8", + "target.spice": "56b92271feca94386436c60f7159d8b3d6f0dbb656da2929cc734eaf2daf727c", + "target_lvs.spice": "6bae094557414495aa31d52c00d23331c50b0ef7d88db25324a78795f4cfe88e", + "testbench.spice": "f160ca97ce3515922d6679dde7888885343b4288b730a0383afa08ee7cc66bfa" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..7d35b76b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9552d7593fa18ddc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19680000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.00595, + "ugf": 32807890.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.9, + "schematic_measures": { + "vout0": 0.6000003, + "idd": 2.426154e-05, + "vos": 0.002842062, + "gain_lf": 25.00595, + "ph_lf": 0.0131306, + "ugf": 32807890.0, + "ph_ugf": -88.43947, + "f3db": 1840752.0, + "pm": 91.5473994 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..483f591d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19680000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.00595, + "ugf": 32807890.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..1bf5f7e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=3u l=0.39u ng=6 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=3u l=0.39u ng=6 m=1 +.ends C08_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..04d52c9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C08_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..e399d0d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..a76165cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C08_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.78, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.78, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e3670a45183a2b3e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..0f3cb415 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "58c1869611f4c7de26f3a665daa30c6d1253148f9b103ef9bef8003c3f58e7ea", + "qualification.json": "4f96025e56d57474d99e8dd629036969a0424282343211e8d5301ff67f41e9a1", + "specs.json": "655c83e7268758e05b095f8d6483a9bec4098c82c492d0c00dc552fc5260a7e3", + "target.spice": "f1a4450eed99365e019f8283897ff921b4a700271d29bdf55205feb0bfaed5e9", + "target_lvs.spice": "6e2bdd8f6349f63ec7ff4ad9e09c5f53885d9305c697c46be987c1d272f021f1", + "testbench.spice": "98fe261975b73ac2594404b71ccddb6f889d809a6dfbb24dca7ee8da73634f50" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..e49f814d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e3670a45183a2b3e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18270000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.21287, + "ugf": 30442040.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.5, + "schematic_measures": { + "vout0": 0.5999999, + "idd": 2.797448e-05, + "vos": -0.00109955, + "gain_lf": 27.21287, + "ph_lf": 0.01669147, + "ugf": 30442040.0, + "ph_ugf": -90.73779, + "f3db": 1326164.0, + "pm": 89.24551853 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..de57a3d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18270000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.21287, + "ugf": 30442040.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..5b7a4824 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=3u l=0.78u ng=6 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=3u l=0.78u ng=6 m=1 +.ends C08_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0c4e4b76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C08_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..b066921f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.78u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..49bf8ef5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C08_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.585, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.585, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.585, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.585, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.585, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0a402a64f4f7ae60", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..ec51b01f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ee5b8a81daeb3272e1f8cff1b2932b1a1e6dcad541e4cb4302a7948f4d04a1c6", + "qualification.json": "d40a707a7a496ad6c7105eaa5f6f0a441d0238f9056542d31d2149afd2b6c654", + "specs.json": "f460812ac0fe8e45ee406f65ece9ae212fa8427baad8fa3058e7a738630644b7", + "target.spice": "fe836dbf4e2fd139196291da1b7f7cb3ec2c18f22cecaa189a3a87c63e178547", + "target_lvs.spice": "049e80c007c8006106893e69f9cf337c6cbbedcbe50c25976016524102eba38b", + "testbench.spice": "94c798944b46f6a41d30aea75010ff35df7673f1b137c51b801de15d511c0c3c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..6bc417fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.585, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0a402a64f4f7ae60", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 17640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.3514, + "ugf": 29403360.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.6, + "schematic_measures": { + "vout0": 0.5999997, + "idd": 2.921485e-05, + "vos": -0.0028096, + "gain_lf": 26.3514, + "ph_lf": 0.01505258, + "ugf": 29403360.0, + "ph_ugf": -89.00909, + "f3db": 1412325.0, + "pm": 90.97585742 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..ce2c5d23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 17640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.3514, + "ugf": 29403360.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..51781091 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=4u l=0.585u ng=8 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=4u l=0.585u ng=8 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=4u l=0.585u ng=8 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=2u l=0.585u ng=4 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=2u l=0.585u ng=4 m=1 +.ends C08_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..839ff2da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +.ends C08_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..92ed743a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.585u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..dc522516 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C08_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb3cf902919b635b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..64a58e9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "84423bf7247b3538c26aebd34eab4429e07e8167a2884affb2d2cc371cf45d02", + "qualification.json": "798a405d9f1876317656652e5acdc25e86bb43ce30635c2ff00f65da968389f1", + "specs.json": "d5cb41722f07a80e0663e4ec2e28ead0ca4f5c1a93771a7216fbc469fd48b4f8", + "target.spice": "aeb9a9fb2840f346894ffe6771ede0c67967e006ff7e3032952a4f108de394bd", + "target_lvs.spice": "a02f4bfd6378a376220af5d17bec819c269731bbf2c6e03d24fee1d27ec93f17", + "testbench.spice": "c7f25d3dc6839f47479c716a8e24c4c36e898c7034945df6dd3c23172030cb3f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..3afb1306 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb3cf902919b635b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.09325, + "ugf": 31051350.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.1, + "schematic_measures": { + "vout0": 0.6, + "idd": 2.712371e-05, + "vos": -0.000394234, + "gain_lf": 25.09325, + "ph_lf": 0.01316656, + "ugf": 31051350.0, + "ph_ugf": -88.01592, + "f3db": 1725048.0, + "pm": 91.97091344 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..0a1ba63b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 25.09325, + "ugf": 31051350.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..3a4f06b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +.ends C08_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..e7d0d102 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C08_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..5e5019d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..5444eb2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW1_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C08_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.78, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d9b17ef2697f09d9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..25eb952e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d535e70fe67c25c8d2bf10ef0f2dafc71813950a8dd6843359d6ea77cc8024ba", + "qualification.json": "9a5c2def2bf2307acb1e0851e05fc8e1b92dae8ae636e1befe839166cc3fa6bb", + "specs.json": "7f93174dd76215098db325f9b0a4d53202836b91918aa175268097ea769eb3a5", + "target.spice": "b1d00fe447326f034356b86cca16490e0b0487ce2dd24ab08fc6baae04ffe43c", + "target_lvs.spice": "96c43f5117c8bc2b21f74b6767961b788e2653d9777acba99bfd52a74e7dab43", + "testbench.spice": "9f6eba6a9f50012b2df6f1c736aeb9b78c44ead21df34fc5744928e08b66df21" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..92105d5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW1_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d9b17ef2697f09d9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 16380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.14772, + "ugf": 27305520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.7, + "schematic_measures": { + "vout0": 0.5999995, + "idd": 3.003247e-05, + "vos": -0.00457877, + "gain_lf": 27.14772, + "ph_lf": 0.01624442, + "ugf": 27305520.0, + "ph_ugf": -89.85906, + "f3db": 1197272.0, + "pm": 90.12469558 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..9504872c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 16380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.14772, + "ugf": 27305520.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..9c2fe45a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +.ends C08_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..436d1e11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C08_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..669b12d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.78u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..d6bd59cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C08_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.585, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.585, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.585, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.585, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.585, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2550ddb5c9302ac3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..e85b8aef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4e8f3b65b8fea9d8b52ff1dd0723f68879410c276f6d7da3fbd47512e6976d9c", + "qualification.json": "6a1a36add8ea15d8387fe52f3f9d6bcc6900c3abedc03419e0b23ad621e6b05e", + "specs.json": "ecc2c4def070620bd70ad5d412565a55c1be0d630bad1b47871d8a37ee5d81a8", + "target.spice": "430f7fa039d45a10973a7139d0cd12e0105fad48a1c566ddbe66aeaf18749643", + "target_lvs.spice": "72cdf37922774c72dbe0f2ac559243bc1087220eacc8c62f40cc4d563846d1e7", + "testbench.spice": "4acbb2f357e7ad1c33b04afc94cfa8d943dbac5c94f8ad6dbaac69511ad3f329" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..13e31abf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.585, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.585, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2550ddb5c9302ac3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.25516, + "ugf": 32728630.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.2, + "schematic_measures": { + "vout0": 0.6000003, + "idd": 2.414455e-05, + "vos": 0.002635176, + "gain_lf": 26.25516, + "ph_lf": 0.0151384, + "ugf": 32728630.0, + "ph_ugf": -90.22953, + "f3db": 1592089.0, + "pm": 89.7553316 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..a445ec75 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 26.25516, + "ugf": 32728630.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..7e520349 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=8u l=0.585u ng=16 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=8u l=0.585u ng=16 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=8u l=0.585u ng=16 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=4u l=0.585u ng=8 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=4u l=0.585u ng=8 m=1 +.ends C08_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..af08c28b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f12 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f13 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f14 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM1_f15 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f12 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f13 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f14 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM2_f15 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f12 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f13 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f14 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM3_f15 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.585u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f6 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM4_f7 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f6 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +XM5_f7 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.585u +.ends C08_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..d573eccb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.585u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..e2379eb6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW2_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C08_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7b7b8a8fb958c6e0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..9926fd9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "93af00aaea9278ae32649c8a215717e123b642d0e97fd305e252544b8fa3adad", + "qualification.json": "6a6442280e71d46bb68fefa28e65155e362a53dc0d58011fb7cd36b3633070e4", + "specs.json": "fa25137dc6d11a7754f1cf309bf65d8eba6c1044c28b20de9d2fdf66f7ccfefc", + "target.spice": "6bdb73676e54d1aca0da40a7e2ebfdb33d111edcaede0cf85912fd59b730371b", + "target_lvs.spice": "69492ac98d501e1a78cb31c7dced6eee2099369286ba8d8beed530a3bf05dee4", + "testbench.spice": "8002355734fb255375ce93365e91dbef439051f42d38474bf0ba922a2d48eba1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..a02da53d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,124 @@ +{ + "case_id": "C08_ihp130_sW2_sL1", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7b7b8a8fb958c6e0", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=24.94 below floor 25" + ], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.94102, + "ugf": 32877000.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.6, + "schematic_measures": { + "vout0": 0.6000005, + "idd": 2.164491e-05, + "vos": 0.00488522, + "gain_lf": 24.94102, + "ph_lf": 0.01299105, + "ugf": 32877000.0, + "ph_ugf": -88.82285, + "f3db": 1859066.0, + "pm": 91.16415895 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..b5785ccf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 19730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.94102, + "ugf": 32877000.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..bf9756b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +.ends C08_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..23198972 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f6 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f7 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C08_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..eeb85260 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..7d5ba169 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_ihp130_sW2_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C08_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.78, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3095cdc2e3040032", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..bf6c5b09 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b6922bc0aa4f9b2986710edd3b4bfe427528b0ec7e61552aa35990b040dcb1cb", + "qualification.json": "5228ba868649f2857c99719ae37f4a4bb740b8e541fc56b47e496e6df3073b0f", + "specs.json": "09d923fb9e57f2d8c04924d066758a00d266ab757cde7bca497d6cb59ac9aab2", + "target.spice": "9f3eba2f751bfca8fcb60b1b19507c24041237c28302cae9e0796d8fa66a98f2", + "target_lvs.spice": "1967d0ccf3fdf07b9799fa29e7f8aeec6e0f1401c4b24738426d0dac3a4f37fd", + "testbench.spice": "5b853d0b5af5e65212f88a56089bb9b0784704a4d4abbe1391a3bed411654713" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..40d535ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_ihp130_sW2_sL2", + "circuit_id": "C08", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.39, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.39, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3095cdc2e3040032", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.15846, + "ugf": 31575720.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.5, + "schematic_measures": { + "vout0": 0.6000001, + "idd": 2.557596e-05, + "vos": 0.001060683, + "gain_lf": 27.15846, + "ph_lf": 0.01669001, + "ugf": 31575720.0, + "ph_ugf": -91.511, + "f3db": 1387941.0, + "pm": 88.47230999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..6bbb9b94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 18950000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.15846, + "ugf": 31575720.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..c4b9c89e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM3 net23 VB1 VSS VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM4 net22 net22 VDD VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM5 VOUT1 net22 VDD VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +.ends C08_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..277fe382 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f2 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f3 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f4 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f5 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f6 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f7 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f8 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f9 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f10 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f11 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f12 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f13 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f14 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f15 net22 VIN1 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f6 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f7 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f8 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f9 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f10 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f11 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f12 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f13 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f14 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f15 VOUT1 VIN2 net23 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f8 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f9 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f10 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f11 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f12 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f13 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f14 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f15 net23 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f1 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f2 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f3 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f4 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f5 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f6 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM4_f7 net22 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f0 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f1 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f2 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f3 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f4 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f5 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f6 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM5_f7 VOUT1 net22 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C08_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..e9bd6283 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.78u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..02fb8d18 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C08_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.45, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "13e2706a081f53ec", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..eea3053d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "05bdcd8516be9859c1549ae049cff8617188104e3be2e89147eecd2260406d4a", + "qualification.json": "eccf93f405b78c7d41d9dcbed27add2a6d1fe1ddd72b52bfd431c9e4753c6081", + "specs.json": "2f34efbb26870cd25385dbe36723edc69ea2e01ac0710716b90c7f343f15ea90", + "target.spice": "a5a767c94f527ab6dea8cc6261a9102b63add31c452dae73d298b10280f1cdeb", + "target_lvs.spice": "d89d03e7a0370c767654e89b78c89d9775dcf10396cdaba8c649a63bf91fd62f", + "testbench.spice": "fe51cb935677bc71d5652c54c7bab0505df4ef9d92c44ef47c37999f97ea09d4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..7a304b47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW0.5_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "13e2706a081f53ec", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.21 + }, + "ugf": { + "min": 11880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.21334, + "ugf": 19794020.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vout0": 0.8999993, + "idd": 2.218699e-05, + "vos": -0.0070443, + "gain_lf": 34.21334, + "ph_lf": 0.03329973, + "ugf": 19794020.0, + "ph_ugf": -89.51321, + "f3db": 384368.7, + "pm": 90.45349027 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..2d4d7b41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.21 + }, + "ugf": { + "min": 11880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.21334, + "ugf": 19794020.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..0487f99e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.45 nf=2 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.45 nf=2 +.ends C08_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..fe4a6a93 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C08_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..58f7db62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..7f9d8374 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C08_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.3, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "41f4def2270387c7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..3cdc86f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8b1abfe3bc5d51e486859d02b5531aeb6ffe612ffc4824d4bd96870c05661926", + "qualification.json": "62826d9b06c398e3b5c486fe6e5ebb67be05d6a0edaac586cff067d769e934a0", + "specs.json": "8ac87249b8d06096cde25b3e00051167ce614ea0fdaffd8f11ab8829359cdab2", + "target.spice": "f48658646944632a24fce4e186c18dd3a1e4e800eb360e3ebea5c828906a2b15", + "target_lvs.spice": "d44319c24299c1274a2e515460fc202c07bb563da7071eeedaa76f6162f4741a", + "testbench.spice": "bb5ce9ca616c305bb73288668ce9fbd47c078cc8e911b11add2cdca7b27c6b3f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..1aa01525 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW0.5_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "41f4def2270387c7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.33 + }, + "ugf": { + "min": 14540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.32883, + "ugf": 24225320.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.6, + "schematic_measures": { + "vout0": 0.8999993, + "idd": 2.464207e-05, + "vos": -0.00692929, + "gain_lf": 31.32883, + "ph_lf": 0.02563727, + "ugf": 24225320.0, + "ph_ugf": -88.88233, + "f3db": 655171.4, + "pm": 91.09203273 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..6da7d92b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.33 + }, + "ugf": { + "min": 14540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.32883, + "ugf": 24225320.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..9bfd3d45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.3 nf=2 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.3 nf=2 +.ends C08_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..eefadc60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C08_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..57128a0d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..58dd829a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C08_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M5": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cf5925c6135e65c7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..3ee07a5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7ea6edf41875fea73e35bf7cd017783c7ac6da5d8da084298b11d56a40d6e20a", + "qualification.json": "c73a4aa081e3d58023009b9b1b58f3827f960e1cffcfb0a938a3bcb8a494e79f", + "specs.json": "91bd3e67d5923f33749776c4f2fa5b507f906b640e1853372d35a89dfc4b1229", + "target.spice": "79d9a1e997cd86dff062edbfe59826282de8c7179ea1ff282e70690bbd5a569f", + "target_lvs.spice": "41c5ef274be5b584a2de7a5de82d064a9874b51369543cc14ce6b46dfd085d1a", + "testbench.spice": "b6d244d49eb431fabaf0fdcd384b3b20561fc3ac59ca9d0702e557396655d3ea" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..eecd7b96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW0.5_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cf5925c6135e65c7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 33.44 + }, + "ugf": { + "min": 9793000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.44027, + "ugf": 16321500.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vout0": 0.8999994, + "idd": 1.938649e-05, + "vos": -0.00648764, + "gain_lf": 36.44027, + "ph_lf": 0.03919215, + "ugf": 16321500.0, + "ph_ugf": -89.95196, + "f3db": 245052.1, + "pm": 90.00884785 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..4c5a1cee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 33.44 + }, + "ugf": { + "min": 9793000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.44027, + "ugf": 16321500.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..17ac8b1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.6 nf=2 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.6 nf=2 +.ends C08_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..edb9686c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C08_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C08_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..10aefd1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..90dfef77 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C08_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.45, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "66326fdadc4c0d0f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..e2bf811b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9ef410aac332b42215396b3a5c878fd2a467da724b9c434683a544cb66a83e56", + "qualification.json": "cfbc1ea92250f820d35544df6ff56b8e90279dbb635336fd6315ef212cf26b00", + "specs.json": "ee1f8cbf231bddd94dac7c75c4349975f261e56b0ce1751f9035a91c3d637c68", + "target.spice": "4709062daa64b3d4cbafddfcb1f874d93ec4fa8a5c80f3812da7a5ecb051d68b", + "target_lvs.spice": "7b5e252aa705d8c815b6bc0a119068cd22ce398ecd87da5e51457f6a85a65a97", + "testbench.spice": "d2dc57b7815e32b86a0e6c16aa6d5833962d3d442d5e8c9cb1b07c874cb1e674" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..55574407 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1.5_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "66326fdadc4c0d0f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.71 + }, + "ugf": { + "min": 20920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.70749, + "ugf": 34859820.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.5, + "schematic_measures": { + "vout0": 0.8999996, + "idd": 2.89816e-05, + "vos": -0.0035564, + "gain_lf": 35.70749, + "ph_lf": 0.04583744, + "ugf": 34859820.0, + "ph_ugf": -90.49729, + "f3db": 569871.5, + "pm": 89.45687256 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..6c85c998 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.71 + }, + "ugf": { + "min": 20920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.70749, + "ugf": 34859820.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..43ad09c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.45 nf=6 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.45 nf=6 +.ends C08_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..14d93b24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C08_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..aeecfb53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..f29f6d19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C08_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.3, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5265442c24e0e4a4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..eeb22bfb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5ca0ea9e60e6549eeaf92973b0a4969effdafd48ab2090eec07c1d43ba5b4c06", + "qualification.json": "0db1650a343e00b02eee248338e41701f69ffafba44966a592c27233c91e9d33", + "specs.json": "6aeb11dd22542fc90c31fe062ba132dfc2c427af5e17a54c59ecb5144819aeab", + "target.spice": "ae45edcd52161148302f36ad41572ba693f37952da2102586fc5c56e4876c7bf", + "target_lvs.spice": "3310796c5536ea5cc8c848eb56ad61bdd91b3bdbd6f6e9ab907816412f2102fb", + "testbench.spice": "cd24cf1475dcadb9c710e59a92afa23f2be54373606237e57d3a08411a788a44" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..bf1307ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1.5_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5265442c24e0e4a4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.94 + }, + "ugf": { + "min": 21880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.93944, + "ugf": 36474930.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.9, + "schematic_measures": { + "vout0": 0.8999997, + "idd": 2.808255e-05, + "vos": -0.00293878, + "gain_lf": 31.93944, + "ph_lf": 0.02994302, + "ugf": 36474930.0, + "ph_ugf": -89.51701, + "f3db": 919810.7, + "pm": 90.45304698 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..a25c1aed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.94 + }, + "ugf": { + "min": 21880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.93944, + "ugf": 36474930.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..d42d4679 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.3 nf=6 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.3 nf=6 +.ends C08_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..db9e6631 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C08_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..8cef0d9d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..6b09c28d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C08_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M4": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M5": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db7473d1d15a00a8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..d3a27aba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e2e8b9765e28da6ced165c41a3109a4ec68094da44844aa228a5499e67f25395", + "qualification.json": "57e27fc54638879874223c591b75188cec6fc579aec082a60d8b9e71ddedd610", + "specs.json": "9395dee0794e6136bfd39f88515bfcf4d6bdcb79b7db51672d7b20c21b95b0e1", + "target.spice": "74d4f5f86a5a1d8faaf6654d46322e8f343ff2e0fb348eee4f1e55b544256da8", + "target_lvs.spice": "413df2f269210d987227893367258f509130100c7563275c23204d6474456f5d", + "testbench.spice": "1e30d118e07079ef02569bb71e70c29050c5aed842879f131d6361dc43de3037" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..8696fd9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1.5_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db7473d1d15a00a8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.4 + }, + "ugf": { + "min": 19040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.4011, + "ugf": 31734200.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.5, + "schematic_measures": { + "vout0": 0.8999997, + "idd": 2.833459e-05, + "vos": -0.00337589, + "gain_lf": 38.4011, + "ph_lf": 0.06131791, + "ugf": 31734200.0, + "ph_ugf": -91.23838, + "f3db": 380782.5, + "pm": 88.70030209 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..82bbc1f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.4 + }, + "ugf": { + "min": 19040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.4011, + "ugf": 31734200.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..c36f7645 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.6 nf=6 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.6 nf=6 +.ends C08_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..525af6c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,50 @@ +.subckt C08_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C08_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..882bdaed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..2f4ab1eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C08_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a0bbab3b6fbfb727", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..bb28b5be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ec2011fd3313e263356a79e3f8fbee0e5aa72437d1ead08fc91a8cb7a1c52209", + "qualification.json": "9abde2b98e8425176b918320bafe197d1061b617f6d048b6ed0d33ce304e0c02", + "specs.json": "8dcd2f716b15ad4424acb23f0fb38f91f04334c0e757a6382c4320af1c492fd2", + "target.spice": "857d719fec6f8c15e29945aebf4974c441d316e485f88fe89bb9a4f30c483cad", + "target_lvs.spice": "3cfad1a1bf0b379f872c0d9e5fc20c128d2640ba5734e635f6e668d04f2f38f7", + "testbench.spice": "de633019d814f0fbc89a7f5d72186e52a966779316cdc2202e1941ef1bf588d0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..7305c37a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a0bbab3b6fbfb727", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.19 + }, + "ugf": { + "min": 18120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.18988, + "ugf": 30192960.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vout0": 0.8999995, + "idd": 2.827926e-05, + "vos": -0.00480091, + "gain_lf": 35.18988, + "ph_lf": 0.04204101, + "ugf": 30192960.0, + "ph_ugf": -90.08166, + "f3db": 523419.9, + "pm": 89.87629899 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..231bfa65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.19 + }, + "ugf": { + "min": 18120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.18988, + "ugf": 30192960.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..453dbcb9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +.ends C08_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..50bbfa5a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C08_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..0cf4ff2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..2571e289 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C08_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ecaff994d341081e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..e01727f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b1ab1f97ae79ae27b66ee7f381b8a6b799649e3aac407db9dfa63a391bda3d91", + "qualification.json": "39c903a30e0d669519632b4af900f63707edc5d76e684644964428b07a01c6b1", + "specs.json": "050929a0ee7492d2510188ec2a221e2506017071a62ad820c9e89d53e8e46538", + "target.spice": "1e590dc8886b1a103ca78184c79f1520b8d8134ab83a5f7ee2d1f9aa514d982c", + "target_lvs.spice": "ade244139b4efbf09a6a4ea243b2b8578e11a2cc611293a75b407f61ec8ed348", + "testbench.spice": "d682f8aef01a9853a9435704f59493494424a8e02c2ee8c0bad91094c7dc6896" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..4880bed9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ecaff994d341081e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.85 + }, + "ugf": { + "min": 20130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.8508, + "ugf": 33543780.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.1, + "schematic_measures": { + "vout0": 0.8999996, + "idd": 2.860214e-05, + "vos": -0.00434792, + "gain_lf": 31.8508, + "ph_lf": 0.02922916, + "ugf": 33543780.0, + "ph_ugf": -89.2572, + "f3db": 854083.7, + "pm": 90.71357084 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..a1a96f34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.85 + }, + "ugf": { + "min": 20130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.8508, + "ugf": 33543780.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..dd2d9c71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +.ends C08_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..1b218531 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C08_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..f7608d8c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..61ed1cee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW1_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C08_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c583133ebdaacaf3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..8dc3e37a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2d6aff5410d9b923937808b762a7ac382b9c27a52e581d20174e12ed9301275e", + "qualification.json": "95265c5213a3f90af113488a95f5e17d08385fa60b0d841ea4800187bc240cd1", + "specs.json": "dfe3dd666008af90d99e290d5a7db16ae5af2f3ee6eec5a587b6b6417567df26", + "target.spice": "4264b0bdac41360db84a7d759feb6573ac0709dceb4e93dcb6896b78ea5773bc", + "target_lvs.spice": "aa25a94c1294675729f8c7b536ad3dcff27451856918f2fe7a1719f8ab012247", + "testbench.spice": "c9b444b447cfcc3ec0684f23f04064ff8e39266cea8a168e4fe752c2cb685240" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..87d5483a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW1_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c583133ebdaacaf3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 34.65 + }, + "ugf": { + "min": 15750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.65402, + "ugf": 26256940.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.5, + "schematic_measures": { + "vout0": 0.8999996, + "idd": 2.636539e-05, + "vos": -0.00448632, + "gain_lf": 37.65402, + "ph_lf": 0.05390085, + "ugf": 26256940.0, + "ph_ugf": -90.68992, + "f3db": 342782.6, + "pm": 89.25617915 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..355ade28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 34.65 + }, + "ugf": { + "min": 15750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.65402, + "ugf": 26256940.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..bfb89157 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +.ends C08_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..b10fa31a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C08_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C08_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..12423ac4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..7fac764f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C08_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d84083be8ee54420", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..71edde2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f0af4597e2848912d66f6758365652ab8e66948a25522971df794c915420dfc8", + "qualification.json": "8d4ee4e52f50cba6d26397c4436dfca80fdf20c21b40d31f419969d14e8711eb", + "specs.json": "1eacd50cea247fcfc75587482a012ce111c911557775e7314ff6c40a72e383ae", + "target.spice": "842401d652ec43eaccacb7d255c6d0254c627027f1c80c06584f2678fcb964db", + "target_lvs.spice": "c4bffbeb95e6be179960865e194de644c8eb52c3954f86dab1cb2f0c99700e6b", + "testbench.spice": "482677b2e5aa56a5eb0f893b07af186629090ba647aeff38a5c9d6e76a3021c8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..fbe35587 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW2_sL1.5", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d84083be8ee54420", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.98 + }, + "ugf": { + "min": 21900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.98452, + "ugf": 36495360.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.3, + "schematic_measures": { + "vout0": 0.8999997, + "idd": 2.789256e-05, + "vos": -0.00276677, + "gain_lf": 35.98452, + "ph_lf": 0.04767376, + "ugf": 36495360.0, + "ph_ugf": -90.85866, + "f3db": 577797.6, + "pm": 89.09366624 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..888c7411 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.98 + }, + "ugf": { + "min": 21900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.98452, + "ugf": 36495360.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..2bdf4cad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +.ends C08_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f7952420 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f12 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f13 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f14 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f15 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f6 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f7 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C08_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..354bfdcd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..9dfb91c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW2_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C08_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5b4ca74c921b0f82", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..ecce4ba8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7a16aec9817b7a10846c3e205d7a034b9cdad47acb06fa9f7598aa066d6f15cf", + "qualification.json": "ba515e76e2b47073919a24033eb54e26cd9b4e91fcbf4172d831f0de9da9f2ca", + "specs.json": "2a4d43df8482ff298e44728373181d078af51c26c6c24cbe417b9004a37a5f8b", + "target.spice": "687164cabc16f9c4a484f9a23c756e9b6dd06839c567fc4f997ddb6e0fdce182", + "target_lvs.spice": "60422073e3f43499005de7fc009b6e9fe01bcc594020ec8ebcc4e5cf81d8cb7d", + "testbench.spice": "464c9d85aeb65652eda489fd18be8351b7a72e8fc80389f02de7d58b2d253c13" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..dd5a0e6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW2_sL1", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5b4ca74c921b0f82", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 28.88 + }, + "ugf": { + "min": 22290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.88189, + "ugf": 37147170.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.9, + "schematic_measures": { + "vout0": 0.8999998, + "idd": 2.680646e-05, + "vos": -0.00203215, + "gain_lf": 31.88189, + "ph_lf": 0.02981593, + "ugf": 37147170.0, + "ph_ugf": -89.73583, + "f3db": 942694.5, + "pm": 90.23435407 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..febb1562 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 28.88 + }, + "ugf": { + "min": 22290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.88189, + "ugf": 37147170.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..626c245e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +.ends C08_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..2c279b3d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f12 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f13 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f14 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f15 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f6 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f7 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C08_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..fdb7bb0b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..ee30a307 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/case.json @@ -0,0 +1,162 @@ +{ + "case_id": "C08_sky130_sW2_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C08_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d310cfc1bd5d7ae9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..0bdb4dc9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9612c296f99aa13dd0a9dc2403e335b01663cd132acda0ab93006fe31ad0d4eb", + "qualification.json": "aefe2ecacda9ad1f3cb24753796fd6112d2f9536502d3980d28cc1bdbe9962a1", + "specs.json": "5d768e75e0ba24407f181b3cf88c9a7db2b308a15dd4498702de16af2299fbd2", + "target.spice": "0d3f26f52471ec6668494000c5e0d3bd35f8cfdb8544435c9ba57733da2979dc", + "target_lvs.spice": "cf1b79204b85e861a7b8d67e137335a97db9c19860ea4f2ae1d07943409d00b3", + "testbench.spice": "951a00b8f212e284844f2057778befdae0bb7a0f4b94bf217d0d995d6b5f7809" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..c6afa629 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/qualification.json @@ -0,0 +1,122 @@ +{ + "case_id": "C08_sky130_sW2_sL2", + "circuit_id": "C08", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d310cfc1bd5d7ae9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.9 + }, + "ugf": { + "min": 20370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.9039, + "ugf": 33947460.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.7, + "schematic_measures": { + "vout0": 0.8999997, + "idd": 2.75585e-05, + "vos": -0.0026313, + "gain_lf": 38.9039, + "ph_lf": 0.06574798, + "ugf": 33947460.0, + "ph_ugf": -91.70478, + "f3db": 384031.3, + "pm": 88.22947202 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..c4e9d9a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.9 + }, + "ugf": { + "min": 20370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.9039, + "ugf": 33947460.0 + }, + "floors": { + "gain_lf": { + "min": 25.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..ff996a19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C08_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +.ends C08_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..026b8238 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C08_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 +XM1_f0 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 net22 VIN1 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 VOUT1 VIN2 net23 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f12 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f13 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f14 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f15 net23 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net22 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f4 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f5 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f6 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f7 VOUT1 net22 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C08_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..6be16c57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C08/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,36 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 C08_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..d9411c3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C09_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c932e6f486a55940", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..d587928e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d7e8d9d2fba1e38016d4633169b0f648139b7de8506b6c013cb9e1924a321b16", + "qualification.json": "b4fc5994accc73f029a344835e750d5544cb3e5868016f7bea6955a2cc54ba45", + "specs.json": "52be1993e1431412765d9ccb2a37c6b38951896c0f7cc2196e3327d10c2a6094", + "target.spice": "2e55f56c82fd61ab1ea10b3c528f8fd580a4b6ede390373bf1a6f53fc8eb5cd3", + "target_lvs.spice": "fa3e496ed8ecea9db2e46d2f904be2607336fc0f3f8e72d47a7beee758ff794e", + "testbench.spice": "8936747a43dfd7e9a3fbbc64b2ca76ca49d2162173b57e90d73bc0e578782cee" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..2a75fa0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,156 @@ +{ + "case_id": "C09_gf180_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c932e6f486a55940", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=-0.238433 target=1.485 (tol 0.066 V)", + "gain_lf=-26.09 below floor 35", + "ugf: not measurable in the schematic" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -26.08643, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": -0.238433, + "idd": 3.999998e-05, + "vos": -0.5, + "gain_lf": -26.08643, + "ph_lf": -0.00115706, + "f3db": 4465256.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..446a0f8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,20 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -26.08643, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..1c365c68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C09_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ffcc75d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C09_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C09_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d62b91db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=2u l=0.84u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..0ad98063 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C09_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a2c77bb7c2fdcb82", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..43a95f2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3003b5f26eb2b7c8c7ee70b5391aebc8e14b547b478a4c3c7ca2d5617d75a9d0", + "qualification.json": "ce95e1490192983c912826fda6997f599f8d858b70058fb84ea420cd0ec0d371", + "specs.json": "7f8b39ac0e5a76dbfbe368975a5c6751ed5792c62e00cad74b2eabd99a1e36f5", + "target.spice": "7ebd391154d3997f7de0194b7d2b87841c379cd0afd6fb7367b2f14f6db52ea9", + "target_lvs.spice": "93fa9b6013f60a1b6c369d33f5df700a31e6f3af3eba8a219105cf48dcde6ae5", + "testbench.spice": "c7f8fe0c723fec24262247cbf329b7fac37ea8cc2ad17c6a12248144717f37bd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..6ae4fff2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_gf180_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a2c77bb7c2fdcb82", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=33 below floor 35", + "ugf=1.153e+06 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.00468, + "ugf": 1152701.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.484969, + "idd": 4.000001e-05, + "vos": -0.277689, + "gain_lf": 33.00468, + "ph_lf": -0.08404525, + "ugf": 1152701.0, + "ph_ugf": -88.54876, + "f3db": 25707.47, + "pm": 91.53528525 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4858f5a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.00468, + "ugf": 1152701.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..86152a2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C09_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ef89d99b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C09_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C09_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..c3eab23e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=2u l=0.56u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..380a900d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C09_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c07b8735a7aa3336", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..e099760f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e61cc973f6afa9f23bc9058a678ae53268552422771848d882b6be540732f68d", + "qualification.json": "071aea308f003596a32cfcc25860f59f90ad9cd7e5b67b121ec72d3f62cb7f32", + "specs.json": "12b035c1a0c9aaa0b8bdb5ca87b342c6b1fda0e9b8a333a006775f12e769b846", + "target.spice": "6b92704fc7d28b1d48657b22f7dd0f471ae86dc5e495ac6eeb5dff2a054e2152", + "target_lvs.spice": "844c5b02598f8d9b8664843ca67a43aee50b9227cca72a43396d55b82755b954", + "testbench.spice": "8ad65dff4b30cdb3755ffdf0d680ddcdbc67bb96a2aa5036ff9d63c877384421" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..c0b81a2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,156 @@ +{ + "case_id": "C09_gf180_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c07b8735a7aa3336", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=-0.565526 target=1.485 (tol 0.066 V)", + "gain_lf=-37.12 below floor 35", + "ugf: not measurable in the schematic" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -37.11679, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": -0.565526, + "idd": 3.903016e-05, + "vos": -0.5, + "gain_lf": -37.11679, + "ph_lf": -0.000426523, + "f3db": 9797591.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..d00d2f55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,20 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -37.11679, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..19686ac8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C09_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..7e2ca339 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,34 @@ +.subckt C09_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C09_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..f23665e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=2u l=1.12u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..3ec2d895 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C09_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.84, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8f56e9e4010101fa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..cc6ec763 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4c3546e9d0575f4369c0df7a7ed1b13279b3960f098bd95b604ce56c4f6d839f", + "qualification.json": "05386f126569f0989a4ddc3eac31f0afc228e626e7c1183426aa9baf7055d844", + "specs.json": "0f3d05a9944b579b9a0ea4968e01a0cf690808a33c50bb451ce6a80960dce3cd", + "target.spice": "8a8cfa09ad437b8f779cc0b4af492f108fb038da23e8818477f5cd6689d43acf", + "target_lvs.spice": "0b5832d122bc36c3f295a01165237c5e4b778992ab97fb6fe1ae81f5886b0be9", + "testbench.spice": "bbd4f6599cc648a10fd468c090b8bf3cd6ad413c109b7457716315a063f4be5e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..1bd66f76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8f56e9e4010101fa", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 46.27 + }, + "ugf": { + "min": 5903000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.27492, + "ugf": 9838559.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.484999, + "idd": 4.000003e-05, + "vos": -0.00537861, + "gain_lf": 49.27492, + "ph_lf": 0.1095608, + "ugf": 9838559.0, + "ph_ugf": -92.82147, + "f3db": 33796.36, + "pm": 87.0689692 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..4ee807cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 46.27 + }, + "ugf": { + "min": 5903000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.27492, + "ugf": 9838559.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..de4e3205 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +.ends C09_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..af9e1349 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C09_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..97aa9e55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=6u l=0.84u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=6u l=0.84u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..9dc4916a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C09_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.56, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "718a3f2f9e21dbd6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..6d8b5b87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "025c77157ec2f372116cbf2c8ae0615b73e8ee24d8292a239b6212a1df0c2919", + "qualification.json": "554620ef2396a3273601f7302932bd58b0bd57ed1666cd4abe3117ce76950adb", + "specs.json": "ed61187e66e53caaf75733f9f1e14e92eaae57b638270409df8c0a5edb8d6d2a", + "target.spice": "a1b79f7055a4d7e30fdab4313d125f76a8d1ba607c20d78c7363918c5b9c959c", + "target_lvs.spice": "561ad6b99b9bd40e25c6057756c186bb9f4c6b7bde2eaeae39668ff9fed06b0c", + "testbench.spice": "f52e160c68364db3f3210e03e6b08a8516a5777b401d77246e106f8c77686348" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..9cf994cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "718a3f2f9e21dbd6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 45.31 + }, + "ugf": { + "min": 8305000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.30557, + "ugf": 13841910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.485, + "idd": 4.000004e-05, + "vos": -0.00340849, + "gain_lf": 48.30557, + "ph_lf": 0.1389248, + "ugf": 13841910.0, + "ph_ugf": -92.34326, + "f3db": 53115.2, + "pm": 87.5178152 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..4f51b71f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 45.31 + }, + "ugf": { + "min": 8305000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.30557, + "ugf": 13841910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..c867429e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +.ends C09_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..c8b8ca31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C09_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..464ade6e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=6u l=0.56u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=6u l=0.56u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..4cb064c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C09_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 1.12, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac4979c19963d71c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..cd9d036b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4d9e4701afcd24a2a261f113b73163a4bd288db965e9062fc5cc9b8fbbb8d6d5", + "qualification.json": "120761fd6978224c7da9d537b999e0adb28c469d033797467835ab420eb603be", + "specs.json": "d18dd598fb9263e1f0319fb92abd6eca8f57df38cef22733463edfc3bb29afea", + "target.spice": "40fa0d68cb53fdf0982b5d7ac943842e160b4d1c7bc6c58e8b3d0237fcfa433f", + "target_lvs.spice": "2ab24ee26402f4b1f5f0d5bd9b34e8c4217594a4110d7b70cc01b730fa22f99c", + "testbench.spice": "e013c59e59c17ecd7db782cb4228d987827366b9d0898e1aa76ddf411377a81c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..6f0a634e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac4979c19963d71c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 46.03 + }, + "ugf": { + "min": 2773000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.03029, + "ugf": 4621210.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 1.484996, + "idd": 4.000003e-05, + "vos": -0.0438883, + "gain_lf": 49.03029, + "ph_lf": 0.01109919, + "ugf": 4621210.0, + "ph_ugf": -90.71342, + "f3db": 16290.77, + "pm": 89.27548081 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..084dfefd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 46.03 + }, + "ugf": { + "min": 2773000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.03029, + "ugf": 4621210.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..ff4cf616 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +.ends C09_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c395805b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C09_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..e5500f44 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=6u l=1.12u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=6u l=1.12u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..cd21843e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C09_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "38178daef83b041b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..c77d9924 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3c09821c9b79f2f9608b4eeb9bcb76dd01bffd0a299190a52563c836b00393e2", + "qualification.json": "47cc1ce2edd13b10d864602ad517b2d5a442999275d452504c8bb02fd9fd3187", + "specs.json": "87a6b3b12b34792044326f53792416d636cac5dd06c729fddfbf80f9e1ac4147", + "target.spice": "5e7c239b7a597965ad085e7405e325f27de93a6130274f43f3c3bb3ba3d818fe", + "target_lvs.spice": "a28e29dbaaaeaed2524e13c18e96dc84ce74b5b38376d90b28a2959700bca75b", + "testbench.spice": "44367dbb0067ab9a6a0982a567fe8b8938d334ea5ffd2cd652593d514c0eefad" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..59f50055 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "38178daef83b041b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 42.89 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.88616, + "ugf": 3014986.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.48499, + "idd": 4.000002e-05, + "vos": -0.0960662, + "gain_lf": 45.88616, + "ph_lf": -0.02556657, + "ugf": 3014986.0, + "ph_ugf": -89.70507, + "f3db": 15249.72, + "pm": 90.32049656999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..c39e42fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 42.89 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.88616, + "ugf": 3014986.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..48a98a76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C09_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..45041bf1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C09_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C09_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..d3bfdd08 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=4u l=0.84u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..50b1d3c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C09_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9d6eb97d1f873d08", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..0e2ed012 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "51ac5b16d44b961dc89010a784dfafb530ed31069a86b34aee15f0ff134bd99a", + "qualification.json": "78e7940365bdd29bc5293d0c5c8b45774f1096f4348e1b88defb03abc96b7b2d", + "specs.json": "bc82202be3c92f96fcf12f6337ac15ce523c155da19527673fec59d4a38c617f", + "target.spice": "532afb94e39252eeab1c4cc07254cf89a7235c01267d1d889f92109e2657e526", + "target_lvs.spice": "f89c820673f1ffb3d6f685683e9a4b132342a170382151b1a11296271d9075e2", + "testbench.spice": "8817ef1298d2adae1fd3ba21ef4318ab1103729d9ecfea5f2e605a83a7b9deca" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..199ea1c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW1_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9d6eb97d1f873d08", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 42.52 + }, + "ugf": { + "min": 6008000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.52368, + "ugf": 10013880.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.484999, + "idd": 4.000002e-05, + "vos": -0.00707075, + "gain_lf": 45.52368, + "ph_lf": 0.07554511, + "ugf": 10013880.0, + "ph_ugf": -91.24582, + "f3db": 52922.97, + "pm": 88.67863489000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..5ddae9d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 42.52 + }, + "ugf": { + "min": 6008000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 45.52368, + "ugf": 10013880.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..921ff727 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C09_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..72cf77e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C09_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C09_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..301aca3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=4u l=0.56u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..1eb1a347 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW1_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C09_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1564b7b67504e34e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..ba54959c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bf3538650c8b50f043513c3638c58bf4f9267d18d6db3e872d98d1797678ab53", + "qualification.json": "aa2040313ccd8025d9266cbe489bab45214eef9db9926efe5b8bd0878d52fa70", + "specs.json": "77a626c61656167e95f5902c6425c5c1a870dcdfae020e521eb9c1f6a7b83fdd", + "target.spice": "ff50a45ec8ffb725bfb8b2515b72f43b7629c48087f1373e12f33f94558e7a88", + "target_lvs.spice": "2f5301fbc9cec8dcb8f2436b4c734f9b1133a49ea1e642453062fdf6fe0f5b16", + "testbench.spice": "a4aec56a38d16ae71b9705155412cec854ba7846e5927fac054522d6b41b5f8a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..20fcb6d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/qualification.json @@ -0,0 +1,160 @@ +{ + "case_id": "C09_gf180_sW1_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1564b7b67504e34e", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "ugf=7.508e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.77727, + "ugf": 750824.1 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.484953, + "idd": 4.000001e-05, + "vos": -0.367095, + "gain_lf": 35.77727, + "ph_lf": -0.2812141, + "ugf": 750824.1, + "ph_ugf": -88.33157, + "f3db": 12159.9, + "pm": 91.9496441 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..41dc33d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.77727, + "ugf": 750824.1 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..dda8e56a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C09_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..e16bda70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,66 @@ +.subckt C09_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C09_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..5366c5c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=4u l=1.12u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..43ea5e96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C09_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.84, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f25508dd5db37001", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..4a722c58 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9972465683243afa37837c073c4ba4b7154382cbf66fccef5d9d1e17d9654101", + "qualification.json": "954c40d08014eb7cc329cfdcf8f577b220d9d2c75aaedf4517d75ef2205153b0", + "specs.json": "7815d582a99eee4d1b300325a4b438bd5a4576c5630147529cce0976146c10ae", + "target.spice": "86321622aa9740fe03b284cc126e2b0e5728e2cf5413120de80ba4fc5426ebfa", + "target_lvs.spice": "72cf6b4bffc598be09794724da612b809d992f60084cebe50114a99ebcb85a7a", + "testbench.spice": "db16570e476d97674625c1e87b9cf2dfffe8e46e8b2dbc9a5c2910d931675752" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..0fec488e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f25508dd5db37001", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.16 + }, + "ugf": { + "min": 7397000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.15948, + "ugf": 12328900.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 1.485, + "idd": 4.000005e-05, + "vos": -0.00304527, + "gain_lf": 51.15948, + "ph_lf": 0.173299, + "ugf": 12328900.0, + "ph_ugf": -94.13874, + "f3db": 34166.46, + "pm": 85.687961 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..955d2e26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 48.16 + }, + "ugf": { + "min": 7397000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.15948, + "ugf": 12328900.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..81b41f45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +.ends C09_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..572cefcc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,130 @@ +.subckt C09_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f12 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f13 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f14 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f15 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f12 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f13 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f14 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f15 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f12 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f13 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f14 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f15 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f12 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f13 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f14 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f15 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f12 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f13 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f14 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f15 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f12 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f13 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f14 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f15 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C09_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..784bffac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.84u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=8u l=0.84u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=8u l=0.84u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..8b26fe59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW2_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C09_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.56, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "08da8cc09fe65eec", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..2550f3b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "deb50bfcc8dfa24bc74501460b4409ccbe590a64075149b288161684f20e7bcd", + "qualification.json": "036430b81719f8c4c2e0a74f3260b8b6ca3d76926958ab0f486df5dd847d3d6e", + "specs.json": "98e6e89ab4a4bc35390e7dafd7d754787c8c0a9e01f86c1c738ec15ee355cf3f", + "target.spice": "b1b501e242a9f8a35e45ccca4f961c1f02dbc5385b186d16e9c61984f5288484", + "target_lvs.spice": "d4e3fe71004b07964d29a66cb19ef1b0b027967ccc1db2a16e4ef3b9533603a8", + "testbench.spice": "2a23be530c3e6ebb0f8aa022450c6f8482b53628072b61ba3d4ce02e0c88c9b0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..dfb6215d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW2_sL1", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "08da8cc09fe65eec", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 47.26 + }, + "ugf": { + "min": 10270000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.26471, + "ugf": 17110230.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vout0": 1.485, + "idd": 4.000005e-05, + "vos": -0.00218438, + "gain_lf": 50.26471, + "ph_lf": 0.1969983, + "ugf": 17110230.0, + "ph_ugf": -93.43458, + "f3db": 52459.47, + "pm": 86.3684217 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..2245f9d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 47.26 + }, + "ugf": { + "min": 10270000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.26471, + "ugf": 17110230.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..db6f617c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +.ends C09_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..d1cc4705 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,130 @@ +.subckt C09_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f12 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f13 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f14 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f15 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f12 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f13 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f14 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f15 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f12 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f13 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f14 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f15 net04 net04 net019 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f12 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f13 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f14 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f15 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f12 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f13 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f14 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f15 net019 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f12 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f13 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f14 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f15 net017 net019 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C09_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..0d484590 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.56u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=8u l=0.56u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=8u l=0.56u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..122f8886 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_gf180_sW2_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C09_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 1.12, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "292c825afbb8df4d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 2e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..a39149b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e40e01d996e5a8e5c5d00c932ab1f1cc1b3c909dc28f67fc3417bad66ee766e6", + "qualification.json": "eceb2f5756b34bf7f83b9f12cb0c6a0ba402eecbf669b99b6684510f2ba75f66", + "specs.json": "60d18c2b567bda8fead8e84b843fe6c79fcab749a89849bc9d3094cecff764ea", + "target.spice": "121e20937ce18eb11a20ef6cb72eef1cb89588ec1b69975d5f22248c724d5fa3", + "target_lvs.spice": "059e1e6eb6a58bd6035fb24ecf991afda5096af1e73278dab3cf7345ca998936", + "testbench.spice": "b32eb0f9ba046b8f3a5c8e7452667f626eed421d5e95342d11944acd95a45407" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..7fe0ac39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_gf180_sW2_sL2", + "circuit_id": "C09", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "292c825afbb8df4d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.02 + }, + "ugf": { + "min": 5830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.01766, + "ugf": 9717255.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 1.485, + "idd": 4.000004e-05, + "vos": -0.00449277, + "gain_lf": 51.01766, + "ph_lf": 0.1294533, + "ugf": 9717255.0, + "ph_ugf": -94.75591, + "f3db": 27409.63, + "pm": 85.1146367 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..ad342d70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 48.02 + }, + "ugf": { + "min": 5830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.01766, + "ugf": 9717255.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..e97b600c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1 net018 VIN1 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 net016 VIN2 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net04 VB1 net018 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 VOUT1 VB1 net016 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM5 net04 net04 net019 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM6 VOUT1 net04 net017 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM7 net019 net019 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM8 net017 net019 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +.ends C09_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..e72fe0d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,130 @@ +.subckt C09_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +MM1_f0 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f12 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f13 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f14 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f15 net018 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 net016 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net04 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f8 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f9 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f10 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f11 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f12 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f13 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f14 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f15 VOUT1 VB1 net016 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f1 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f2 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f3 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f4 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f5 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f6 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f7 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f8 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f9 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f10 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f11 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f12 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f13 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f14 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f15 net04 net04 net019 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f12 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f13 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f14 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f15 VOUT1 net04 net017 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f0 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f12 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f13 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f14 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f15 net019 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f8 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f9 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f10 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f11 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f12 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f13 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f14 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f15 net017 net019 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C09_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..c5d546db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=1.12u +IB_VB1 VDDB VB1 8e-05 +MB_GS_M3 GS_M3 GS_M3 VSS VSS nfet_03v3 w=8u l=1.12u +IB_GS_M3 VDDB GS_M3 2e-05 +MB_GS_M1 GS_M1 GS_M1 VSS VSS nfet_03v3 w=8u l=1.12u +IB_GS_M1 VDDB GS_M1 2e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.485 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..a8d6224f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C09_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.39, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e09ec1f3c2822a3b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..038b68b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "441b5eda19432d9ed4b05bedb233c0076841a9030807220dd74ffaadb94fddd6", + "qualification.json": "372ba435c0484a0c0adca778305648f7ea9d6f0f5eb1417a532dc53b0234ec8d", + "specs.json": "fbc0619a0d98810a6ce4f4036460d1fdf2b1e84137ea2845eb59f0f7b24659da", + "target.spice": "1e3331b83341df5a2991ab6adcea2e43be4628576bd90dd0a57fcad232fa8117", + "target_lvs.spice": "9a869c4bbc3f8331687233274427ae092d51f803b3f8b56d6b7c6b920b5a6268", + "testbench.spice": "eca31db71c0b6f3166b9a921f6dfab2ed5c9c33191ee29a96f9a458f1eff5338" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..b6be504d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e09ec1f3c2822a3b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.47 + }, + "ugf": { + "min": 12430000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.4675, + "ugf": 20708420.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.6, + "schematic_measures": { + "vout0": 0.5399997, + "idd": 2e-05, + "vos": -0.00253795, + "gain_lf": 44.4675, + "ph_lf": 0.1142998, + "ugf": 20708420.0, + "ph_ugf": -93.60535, + "f3db": 123797.1, + "pm": 86.2803502 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4cb75f2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.47 + }, + "ugf": { + "min": 12430000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.4675, + "ugf": 20708420.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..a2a6c6d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +.ends C09_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f6288271 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C09_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..721e8980 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..38c6eeeb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C09_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.26, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4a112fc40a3fe2cb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..ca065027 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cbb767a9dc28ff9f2f14ba0f0cd30f0bb3f465563db6ddb18e893ac7edc3b04d", + "qualification.json": "211e5a85e3cc1b1363553d6c745e4a1fda54e2191c45d6702549ec499d8739d7", + "specs.json": "520504e1d39393c0ef9f8cc00342f19090114f0ca458e7a9d96412e872cbdbe9", + "target.spice": "efbac1c84d78e5413acbc9821e345a88227dbf8e586e57860d873dfd02c998c4", + "target_lvs.spice": "0491b0b1e4b383263c9c8449050f9aca02fcabe3d614a55813eef069789ad7d5", + "testbench.spice": "dffc910da73f91b29a52a5fc1a97fcac14ed93c2a17f6ae89abb2ec97f4887b2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..d3ab0a3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4a112fc40a3fe2cb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 40.68 + }, + "ugf": { + "min": 13640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.67905, + "ugf": 22738910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.3, + "schematic_measures": { + "vout0": 0.5399997, + "idd": 2e-05, + "vos": -0.00252386, + "gain_lf": 43.67905, + "ph_lf": 0.1062832, + "ugf": 22738910.0, + "ph_ugf": -92.50618, + "f3db": 148695.9, + "pm": 87.3875368 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..75198ca7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 40.68 + }, + "ugf": { + "min": 13640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.67905, + "ugf": 22738910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..4328e238 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +.ends C09_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..265604da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C09_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..0af759a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..aa153a10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C09_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.52, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c928b5ccafcda93a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..f74c36a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0fc41c9a6a1b2fbd1b0f3db71351fba8fb59ccc9fc4005d2d0475bd51cd5acca", + "qualification.json": "09c9ba8ef4d193e98a19b46aaa934936c8eb868f0da10cf90bf1ff05ccd96c02", + "specs.json": "71f451d7c28bc0a1a65ec65810161bd1a684c74326e5ba91832ae60a11abb761", + "target.spice": "52c09c20198b8d7fcd58a4ce16baaf6e64e7da78948abd2c778eed0ae8fa41dc", + "target_lvs.spice": "ce4748cb627f71f2ecb4c8e9798b5068a953f26d93e3e53ccd44b4dc9c273e0b", + "testbench.spice": "45eb53516802ddb601ff176704d4ec456687c9db1ab8879f7c0ed96dfa3587fb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..f1bc3fd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c928b5ccafcda93a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 40.91 + }, + "ugf": { + "min": 10990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.90615, + "ugf": 18316470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.0, + "schematic_measures": { + "vout0": 0.5399997, + "idd": 1.999999e-05, + "vos": -0.0030973, + "gain_lf": 43.90615, + "ph_lf": 0.104474, + "ugf": 18316470.0, + "ph_ugf": -94.50707, + "f3db": 117070.6, + "pm": 85.388456 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..fd3a2771 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 40.91 + }, + "ugf": { + "min": 10990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 43.90615, + "ugf": 18316470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..59a9fab9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +.ends C09_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..3e75466b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C09_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..22f5bbdd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..2fe6e65a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C09_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.39, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.39, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.39, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.39, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.39, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.39, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.39, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.39, + "nf": 48 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a03b66ce86a207f2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..ab605b30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "765e5a19961f64cb9ddfdac41e8e28c00a5994d6d0e3db85a737768277f8fe19", + "qualification.json": "68cf116b2c2c81689e33304a3ade7266480657fc24d2eb41094d7b7343a21b18", + "specs.json": "6a7bb4095c93d846befeca79295b9cd420171df9dafa701ba5c6875bce91a04c", + "target.spice": "985b45b4391b16c5f5f780f3be8cf0d70c8c372d163ecb8f6f5ad96f19b30b34", + "target_lvs.spice": "f00580dddcd45bc638165d5271bc9ac4b1b43b660f35f794d1b47423e0107bc2", + "testbench.spice": "8310c3e3de41f36c515208d01fa00f065acd9b1257a06bfd79c5956dc26e5ccf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..2cc69858 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a03b66ce86a207f2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 47.12 + }, + "ugf": { + "min": 17850000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.12015, + "ugf": 29755190.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 14.9, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.00068188, + "gain_lf": 50.12015, + "ph_lf": 0.2350669, + "ugf": 29755190.0, + "ph_ugf": -100.001, + "f3db": 94823.1, + "pm": 79.76393309999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..37ff4598 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 47.12 + }, + "ugf": { + "min": 17850000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.12015, + "ugf": 29755190.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..0f5d249b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=12u l=0.39u ng=24 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=12u l=0.39u ng=24 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=12u l=0.39u ng=24 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=12u l=0.39u ng=24 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=24u l=0.39u ng=48 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=24u l=0.39u ng=48 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=24u l=0.39u ng=48 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=24u l=0.39u ng=48 m=1 +.ends C09_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..491108fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,290 @@ +.subckt C09_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C09_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..1ffc2d02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=12u l=0.39u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=12u l=0.39u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=12u l=0.39u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..541e7602 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C09_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.26, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.26, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.26, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.26, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.26, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.26, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.26, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.26, + "nf": 48 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1c8b504905907c72", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..22864c38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "31bb56aaa670e989100db5b680b66e29b7cddf0481491e097131a97935efa4eb", + "qualification.json": "dee901e78ea22bec1f11eae77be76d199cd7fed55e6ffc0a1b738c7944abca56", + "specs.json": "8308c34e8319c11e8853c79d6b88f36b1e019947444b9cd67e8e6b213fd9a5be", + "target.spice": "5105744c6c1e3f588d5d43b65e9fe009d906c8299b1e313cd9db57aadbb42332", + "target_lvs.spice": "2cd4fad41781c79c7b4787888653112e10bb2844906c95394ac3f65afc2d193b", + "testbench.spice": "778817f9b7e6441b3e67a7834e8efdb4e5385d1ad1174ca4419881218c40887a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..3f222f84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1c8b504905907c72", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 45.18 + }, + "ugf": { + "min": 18610000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.18118, + "ugf": 31024640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 16.9, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.00082002, + "gain_lf": 48.18118, + "ph_lf": 0.1892039, + "ugf": 31024640.0, + "ph_ugf": -97.45121, + "f3db": 122268.6, + "pm": 82.3595861 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..b2a03dde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 45.18 + }, + "ugf": { + "min": 18610000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.18118, + "ugf": 31024640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..1a3c3ed0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=12u l=0.26u ng=24 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=12u l=0.26u ng=24 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=12u l=0.26u ng=24 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=12u l=0.26u ng=24 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=24u l=0.26u ng=48 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=24u l=0.26u ng=48 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=24u l=0.26u ng=48 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=24u l=0.26u ng=48 m=1 +.ends C09_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3524f764 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,290 @@ +.subckt C09_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C09_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..329b99d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=12u l=0.26u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=12u l=0.26u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=12u l=0.26u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..692601f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C09_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.52, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.52, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.52, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.52, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.52, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.52, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.52, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.52, + "nf": 48 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b468f8cab3fa3e1e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..c14f974f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c26392c46ec7a11021446ff4c0869b9fef3d6531b9f4c0d9ce58c543769afa91", + "qualification.json": "df7b20568245f76d11ad9d7401410bd5b3eb6f3e1a95acde360836f74fb5ce36", + "specs.json": "b137b047bcd04e24bbdf8b35b77dbb63b6a4161a2209c0796f42a1ff4fa1870e", + "target.spice": "7db1b963e4624ca32dab54e02dbda1382e317f62b470084688f455ccda760421", + "target_lvs.spice": "6ffbc4d8af1d41c06dbc2851bcc56d79b6c426c67aa8b87d38ccc5446e857768", + "testbench.spice": "cbfc936c8ecfa26c5a4deda604ab3facef00661d2925d34b3bd236ded085a860" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..968ae0e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b468f8cab3fa3e1e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 47.73 + }, + "ugf": { + "min": 16740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.73498, + "ugf": 27896820.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 13.3, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 1.999999e-05, + "vos": -0.000680615, + "gain_lf": 50.73498, + "ph_lf": 0.2498229, + "ugf": 27896820.0, + "ph_ugf": -102.4383, + "f3db": 84102.49, + "pm": 77.3118771 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..c174dce4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 47.73 + }, + "ugf": { + "min": 16740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.73498, + "ugf": 27896820.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..18e6d19b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=12u l=0.52u ng=24 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=12u l=0.52u ng=24 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=12u l=0.52u ng=24 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=12u l=0.52u ng=24 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=24u l=0.52u ng=48 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=24u l=0.52u ng=48 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=24u l=0.52u ng=48 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=24u l=0.52u ng=48 m=1 +.ends C09_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..9c65e240 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,290 @@ +.subckt C09_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C09_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..9dea3996 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=12u l=0.52u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=12u l=0.52u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=12u l=0.52u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..b37e4882 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C09_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.39, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2773afcd095b5522", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..0b365f89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b26a8969b4af9cf51c430c612bc5a41223d4d15292750cb00eec69d01421ebee", + "qualification.json": "bbecd02c77b6a19903939e276e19a612055e5454f27643ee0217d4131d9a18f5", + "specs.json": "2d33a7b229b7c3840948c5aa247c2441d018ef224100c1a980df7930c924d6a3", + "target.spice": "3a46a2557518a32d1bd4675000462a30af36ac2ab74011caa1538809c2707690", + "target_lvs.spice": "74624f451b4099c53beb94c18758a79e6eb1dced7908281878e51e6513fba917", + "testbench.spice": "f15c6a7aa0cce15bd976ca8a4e21516462bc04e89255b08d0e0fc34967001deb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..454fc0af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2773afcd095b5522", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 45.42 + }, + "ugf": { + "min": 16230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.41935, + "ugf": 27051630.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.1, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.00106018, + "gain_lf": 48.41935, + "ph_lf": 0.1895577, + "ugf": 27051630.0, + "ph_ugf": -97.19938, + "f3db": 103583.1, + "pm": 82.6110623 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..9b4c492d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 45.42 + }, + "ugf": { + "min": 16230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.41935, + "ugf": 27051630.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..68c4fac5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +.ends C09_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ce5c122a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C09_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..4eecf3ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.39u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=8u l=0.39u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=8u l=0.39u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..9ec231f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C09_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.26, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "07fe9430f41bc598", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..270f8453 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "74d17796af77b04fd522e08bc7f48816b5fa1922eb759640d129c878155e2884", + "qualification.json": "b2d39d19c76cb9e44b54f4c2d9042fb3bdcc7340b3f9c4747f1951375e14d981", + "specs.json": "0fb3e7bed14eb80f59ba8add454b77677d4cf2cf42b7a55c7c596f3e7995ab9c", + "target.spice": "55f1a3ca78294e103c266a660eb589383ee7e420637e9133d937ec755e241550", + "target_lvs.spice": "2aed63126250dea5a95b52d33074f7347252762d0e24f43cbbbdf01c8753d6a3", + "testbench.spice": "d359e40c7e5b899c103788a02ea314e22d3cd35befcd5d0cddc80701855613b7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..2192f884 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "07fe9430f41bc598", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 43.79 + }, + "ugf": { + "min": 17120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.79468, + "ugf": 28533340.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.00121206, + "gain_lf": 46.79468, + "ph_lf": 0.1587416, + "ugf": 28533340.0, + "ph_ugf": -95.19714, + "f3db": 131028.6, + "pm": 84.6441184 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..6c73bc7a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 43.79 + }, + "ugf": { + "min": 17120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.79468, + "ugf": 28533340.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..86ddf796 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +.ends C09_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..4d1c5232 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C09_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..fa3783a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.26u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=8u l=0.26u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=8u l=0.26u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..075b8a75 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW1_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C09_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.52, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4f835db8a1834f5b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..767aa741 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1fb7e6e953fbe1efaffc4810307f2e3147faba685b4f97b74f4e8a68cabd6e21", + "qualification.json": "04b2d0dc9a621b33317abbffc9dbecf4004d2c9c93f62f9a05aaa662820fc5f1", + "specs.json": "55ee0665d91547b620ab9ef0c33ba8e53c9a7ca908e8e73bcd2e33eef925b5a7", + "target.spice": "b38beda2622393d86a8a83061ff0a3f90c142714cd9c6a02a90624adcc02fe4c", + "target_lvs.spice": "2348434756355cd863bafefeea6a482a7cf10068ba8baed63577c64363828230", + "testbench.spice": "2adaeafd3be1614412c9b81503cc5e34a5dfeffe1c8333c8a19d587dc44d5b33" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..f938aec9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW1_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4f835db8a1834f5b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 45.68 + }, + "ugf": { + "min": 15040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.6813, + "ugf": 25073620.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 1.999999e-05, + "vos": -0.0011112, + "gain_lf": 48.6813, + "ph_lf": 0.1926998, + "ugf": 25073620.0, + "ph_ugf": -99.08496, + "f3db": 94007.78, + "pm": 80.7223402 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..f8f49fca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 45.68 + }, + "ugf": { + "min": 15040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.6813, + "ugf": 25073620.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..4dd1db59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +.ends C09_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..17149af7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C09_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..406e581c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..c8673c26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C09_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.39, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.39, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.39, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.39, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "893e19d18b5b4777", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..e2cf6568 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "90d581dad3bc10dca89b472f171b292c37fc6daca3fd1920b079d02f5b53c86d", + "qualification.json": "d7c47f4233d56b0e75a0105975d0619684411d22194c0314f30450f8d81089bb", + "specs.json": "8796ca6dc1a5683403b70db07d491acf009ecb34f89fd558a4db799072d4bf83", + "target.spice": "cd7ea475b0ca10d70ecee967456a9a0cf18a1eab92b9e53ec8f6d275af23fba4", + "target_lvs.spice": "d13fe3b1726ef00dc7eaaff2ba8d128a003d8e0827524840c4171fb0d726e830", + "testbench.spice": "c0ef3988989b804290a3628c1ba7921ac1226a9939ccde2a260f003eba02e737" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..f90191cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "893e19d18b5b4777", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.11 + }, + "ugf": { + "min": 18620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.11291, + "ugf": 31038840.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.2, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.000504572, + "gain_lf": 51.11291, + "ph_lf": 0.2661535, + "ugf": 31038840.0, + "ph_ugf": -102.3014, + "f3db": 89504.81, + "pm": 77.4324465 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..7bdc3fd1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 48.11 + }, + "ugf": { + "min": 18620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.11291, + "ugf": 31038840.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..d513098e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +.ends C09_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2e2681a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,386 @@ +.subckt C09_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f24 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f25 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f26 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f27 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f28 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f29 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f30 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f31 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f24 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f25 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f26 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f27 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f28 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f29 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f30 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f31 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f24 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f25 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f26 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f27 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f28 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f29 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f30 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f31 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f24 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f25 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f26 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f27 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f28 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f29 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f30 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f31 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f48 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f49 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f50 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f51 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f52 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f53 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f54 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f55 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f56 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f57 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f58 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f59 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f60 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f61 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f62 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f63 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f48 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f49 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f50 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f51 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f52 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f53 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f54 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f55 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f56 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f57 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f58 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f59 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f60 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f61 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f62 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f63 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f48 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f49 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f50 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f51 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f52 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f53 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f54 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f55 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f56 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f57 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f58 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f59 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f60 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f61 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f62 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f63 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f48 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f49 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f50 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f51 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f52 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f53 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f54 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f55 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f56 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f57 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f58 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f59 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f60 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f61 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f62 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f63 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C09_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..f60c7f23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=16u l=0.39u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=16u l=0.39u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=16u l=0.39u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..7e897444 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW2_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C09_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.26, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.26, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.26, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.26, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c11cce1d9fae50fc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..e2d14c2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a096664bd67cadd2a0e5c3ed9d3485eadaadda13f81598cc2c0ea19dfaea69f9", + "qualification.json": "30ab26b0884f4670a934204e869a803db4176957e984f5405334afedef0a40c5", + "specs.json": "c3324a6c4383eb9414ab4ab0027680e410d5169701512de88929a9433f5b5afe", + "target.spice": "6aba3988cd1c0b5d5744e310b69c38698ada17cba64c1379ce50ff3e12ec8e63", + "target_lvs.spice": "85c538516bc0b8c37c549ddbf0be9f03fc1158aec3953c162774337f96bab94a", + "testbench.spice": "9568e2faa4b64c93704dee97ea8a711f2c83db0f54a005a2a73c5273a93cc35e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..05bb4796 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW2_sL1", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c11cce1d9fae50fc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 46.0 + }, + "ugf": { + "min": 19340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.00288, + "ugf": 32225140.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 20.3, + "schematic_measures": { + "vout0": 0.5399999, + "idd": 2e-05, + "vos": -0.000623098, + "gain_lf": 49.00288, + "ph_lf": 0.2096117, + "ugf": 32225140.0, + "ph_ugf": -99.42526, + "f3db": 116519.7, + "pm": 80.36512830000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..96c6dd2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 46.0 + }, + "ugf": { + "min": 19340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.00288, + "ugf": 32225140.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..75db7f7b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +.ends C09_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..ce17e3b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,386 @@ +.subckt C09_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f24 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f25 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f26 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f27 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f28 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f29 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f30 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f31 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f24 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f25 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f26 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f27 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f28 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f29 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f30 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f31 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f24 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f25 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f26 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f27 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f28 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f29 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f30 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f31 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f24 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f25 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f26 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f27 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f28 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f29 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f30 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f31 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f48 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f49 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f50 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f51 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f52 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f53 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f54 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f55 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f56 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f57 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f58 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f59 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f60 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f61 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f62 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f63 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f48 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f49 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f50 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f51 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f52 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f53 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f54 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f55 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f56 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f57 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f58 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f59 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f60 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f61 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f62 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f63 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f48 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f49 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f50 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f51 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f52 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f53 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f54 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f55 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f56 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f57 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f58 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f59 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f60 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f61 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f62 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f63 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f48 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f49 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f50 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f51 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f52 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f53 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f54 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f55 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f56 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f57 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f58 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f59 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f60 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f61 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f62 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f63 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C09_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..7628fb5e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=16u l=0.26u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=16u l=0.26u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=16u l=0.26u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..048fae93 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_ihp130_sW2_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C09_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.52, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.52, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.52, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.52, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "59f0815772422d47", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..cca3cc24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "43661607a5900a8aca729428242b736593b3167dc6489b2524ca13d303cda0b2", + "qualification.json": "6f3c43418b574e3dd261595e9f7240b4f0fef22686f6559b92f9e576db813a03", + "specs.json": "1e205aea252257f74b2c2b54b11384b1dbdab4f0923a9e03c047ea8732270cfc", + "target.spice": "7a14b472b6c618383e43091234a4d412e632c6baf28b5852f77e4b0f21b536e4", + "target_lvs.spice": "59d73fe13fe96f0035aef5fe1b507b588bc2d632e64295a77c0adfb55c03217a", + "testbench.spice": "1c8a119c84d657ca3677061dd0ae2a3fd86cbcb6a4b67544261ffe7079b5d1e0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..3063b903 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_ihp130_sW2_sL2", + "circuit_id": "C09", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "59f0815772422d47", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.92 + }, + "ugf": { + "min": 17550000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.92119, + "ugf": 29256470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.5, + "schematic_measures": { + "vout0": 0.54, + "idd": 1.999999e-05, + "vos": -0.00049106, + "gain_lf": 51.92119, + "ph_lf": 0.2898429, + "ugf": 29256470.0, + "ph_ugf": -105.043, + "f3db": 78417.83, + "pm": 74.6671571 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..0ff87d35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 48.92 + }, + "ugf": { + "min": 17550000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.92119, + "ugf": 29256470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..fa04e5fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM2 net016 VIN2 IB1 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM3 net04 VB1 net018 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM5 net04 net04 net019 VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +XM6 VOUT1 net04 net017 VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +XM7 net019 net019 VDD VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +XM8 net017 net019 VDD VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +.ends C09_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..5d7c2a89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,386 @@ +.subckt C09_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f16 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f17 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f18 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f19 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f20 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f21 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f22 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f23 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f24 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f25 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f26 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f27 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f28 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f29 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f30 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f31 net018 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f16 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f17 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f18 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f19 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f20 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f21 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f22 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f23 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f24 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f25 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f26 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f27 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f28 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f29 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f30 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f31 net016 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f16 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f17 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f18 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f19 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f20 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f21 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f22 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f23 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f24 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f25 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f26 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f27 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f28 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f29 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f30 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f31 net04 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f8 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f9 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f10 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f11 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f12 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f13 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f14 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f15 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f16 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f17 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f18 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f19 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f20 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f21 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f22 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f23 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f24 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f25 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f26 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f27 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f28 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f29 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f30 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f31 VOUT1 VB1 net016 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f1 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f2 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f3 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f4 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f5 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f6 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f7 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f8 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f9 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f10 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f11 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f12 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f13 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f14 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f15 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f16 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f17 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f18 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f19 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f20 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f21 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f22 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f23 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f24 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f25 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f26 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f27 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f28 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f29 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f30 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f31 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f32 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f33 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f34 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f35 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f36 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f37 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f38 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f39 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f40 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f41 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f42 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f43 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f44 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f45 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f46 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f47 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f48 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f49 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f50 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f51 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f52 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f53 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f54 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f55 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f56 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f57 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f58 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f59 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f60 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f61 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f62 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f63 net04 net04 net019 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f0 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f32 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f33 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f34 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f35 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f36 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f37 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f38 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f39 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f40 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f41 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f42 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f43 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f44 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f45 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f46 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f47 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f48 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f49 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f50 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f51 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f52 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f53 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f54 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f55 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f56 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f57 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f58 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f59 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f60 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f61 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f62 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f63 VOUT1 net04 net017 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f0 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f16 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f17 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f18 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f19 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f20 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f21 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f22 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f23 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f24 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f25 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f26 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f27 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f28 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f29 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f30 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f31 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f32 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f33 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f34 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f35 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f36 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f37 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f38 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f39 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f40 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f41 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f42 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f43 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f44 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f45 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f46 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f47 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f48 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f49 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f50 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f51 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f52 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f53 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f54 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f55 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f56 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f57 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f58 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f59 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f60 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f61 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f62 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f63 net019 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f12 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f13 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f14 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f15 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f16 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f17 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f18 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f19 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f20 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f21 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f22 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f23 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f24 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f25 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f26 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f27 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f28 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f29 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f30 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f31 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f32 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f33 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f34 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f35 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f36 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f37 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f38 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f39 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f40 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f41 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f42 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f43 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f44 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f45 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f46 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f47 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f48 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f49 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f50 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f51 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f52 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f53 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f54 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f55 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f56 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f57 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f58 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f59 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f60 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f61 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f62 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f63 net017 net019 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C09_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..901410a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=16u l=0.52u +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sg13_lv_nmos w=16u l=0.52u +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sg13_lv_nmos w=16u l=0.52u +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.54 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..2f746174 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C09_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.45, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "19df375125cff68f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..8188e76b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f9db1ab256d3d6636c0ac68edff01e7f7301904ef1f4be3b5d4f85b4183f0c80", + "qualification.json": "2c25e7df214b21831a9c6860768d6195a4b04d82bf2f68057af7e39facb1d453", + "specs.json": "086000ac4ff7bc7dc03ae3b048940144fc3017dafd9b9fc5efd16e9ee6ae558a", + "target.spice": "65526aefa6c81acce4c93bfdc6f0478436d8dbb0b39c6ba753718422bd24806e", + "target_lvs.spice": "687908f9136ccd2a153c44876a1fb3d3e1b041aa4309509cef54765cccc3574b", + "testbench.spice": "11aa7588a6639c0b55ac516cc9cc462b05d4e9fa18f0f6b990be43de606aa0bc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..7a966f5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW0.5_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "19df375125cff68f", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=8.451 below floor 35", + "ugf=2.38e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.450714, + "ugf": 237980.3 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vout0": 0.8099353, + "idd": 1.998931e-05, + "vos": -0.430166, + "gain_lf": 8.450714, + "ph_lf": -0.03354311, + "ugf": 237980.3, + "ph_ugf": -67.36812, + "f3db": 96809.53, + "pm": 112.66542310999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4cb576ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.450714, + "ugf": 237980.3 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..ed54f716 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +.ends C09_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ca6e949b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f6 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f7 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f0 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f1 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f2 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f3 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f4 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f6 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f7 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f8 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f9 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f10 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f11 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f12 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f13 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f14 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f15 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f0 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f1 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f2 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f3 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f4 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C09_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d0bc92d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..b2f33023 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C09_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.3, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c5f1c2be5c408f29", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..b4592ade --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cd5ebfababe985f261225af868ca04dcd1bd4470efac2c30d21febf56764eed4", + "qualification.json": "bbd43b21c6e9a1dc57fd948c5612bcd152e9cc4dd039b042e2dc6fe985f08667", + "specs.json": "29cb5acc3d1db9e997ab9bece8903fa63a37100b3fb7913c5ebe03d28bc75cc2", + "target.spice": "6bcccc2f9c4a19258fbfdbc01d6c6670174a306c9c8295dc8a09ffffe35baf71", + "target_lvs.spice": "e993cf2728c93e89d205db0cb5a2bbb983daa44b15599c825763ddd7df049e07", + "testbench.spice": "1ac994d009d358a73db17b19433cef3e48786caa7341fa2f9d5d0b457f1599f5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..3e889312 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW0.5_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c5f1c2be5c408f29", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=22.39 below floor 35", + "ugf=8.161e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 22.38777, + "ugf": 816125.7 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.6, + "schematic_measures": { + "vout0": 0.8099784, + "idd": 1.999994e-05, + "vos": -0.203514, + "gain_lf": 22.38777, + "ph_lf": 0.04722269, + "ugf": 816125.7, + "ph_ugf": -85.36469, + "f3db": 61954.29, + "pm": 94.58808731 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..a81d0822 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 22.38777, + "ugf": 816125.7 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..945bf1c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +.ends C09_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b6c0601e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f0 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f2 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f3 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f4 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f6 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f7 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f8 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f9 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f10 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f11 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f12 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f13 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f14 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f15 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f0 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f1 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f2 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f3 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f4 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C09_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..3162929a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..0f8f4b87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C09_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.6, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ccb734ca7f830377", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..d2e67d91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "29e812a909a4320259d8b9631afdbf00d4efae0a4b940864a9eb6cc0bf8c15c9", + "qualification.json": "1929263713cdec845b975dfcbc5604a6f24671d2cd8f0245b78127fa20961b45", + "specs.json": "a133de319dd86ae7abe6bafe7d96c6a46813ce623331e279757e519935574550", + "target.spice": "f98079b3d139157a4f309b08e514345b9ea838eb197e6cab1f5b9955dd5a7853", + "target_lvs.spice": "002c3e2b094fe0518b726a17cb2a4b4c104cd7bda5da8e1467b4cfc50485b1da", + "testbench.spice": "2892e81ff292b17a57c380385b979e74e1bdaeccc61a9f377991778ee0295e24" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..770aa2f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,156 @@ +{ + "case_id": "C09_sky130_sW0.5_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ccb734ca7f830377", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=-0.378581 target=0.81 (tol 0.036 V)", + "gain_lf=-32.29 below floor 35", + "ugf: not measurable in the schematic" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -32.28633, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.8, + "schematic_measures": { + "vout0": -0.378581, + "idd": 1.979847e-05, + "vos": -0.5, + "gain_lf": -32.28633, + "ph_lf": -0.0004297137, + "f3db": 9692172.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..86f8ed04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,20 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": -32.28633, + "ugf": null + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..b12984f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +.ends C09_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..3d35d2f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,98 @@ +.subckt C09_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f2 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f3 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f4 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f6 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f7 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f8 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f9 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f10 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f11 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f12 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f13 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f14 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f15 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f0 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C09_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..4bc0e273 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..de7ade94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C09_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.45, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.45, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.45, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.45, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.45, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.45, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.45, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.45, + "nf": 48 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bdc2f7fa87756349", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..61771804 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d4117e10e6c151e8e4b6610b822002a8b02ceaf3051c67c989207c3affe3bdbb", + "qualification.json": "9bae3cd587ebd88864293793bd317813f51aaa6aba2ef31444955120a61edb4c", + "specs.json": "d7cfb24e4a5c5077976d3903581045d0e673f4bc959506e326c14f581824a069", + "target.spice": "faf33c2b16fcc0d47c7a29fd0549ffda67895be2fb61ea11a0f512187f2eeec9", + "target_lvs.spice": "4aeeb4ac9a1135d1c2bd56cf9955817d17a32e1fdc8db0d7e8bc0072015a99a7", + "testbench.spice": "d95fc129323276f468deb012db81a39be7a155ae3e59afd3c218d7aaa109e233" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..f8fa88d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW1.5_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "bdc2f7fa87756349", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=32.13 below floor 35", + "ugf=8.883e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.1333, + "ugf": 888255.2 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.1, + "schematic_measures": { + "vout0": 0.8099819, + "idd": 1.99998e-05, + "vos": -0.173456, + "gain_lf": 32.1333, + "ph_lf": 0.2317307, + "ugf": 888255.2, + "ph_ugf": -87.46472, + "f3db": 21917.11, + "pm": 92.3035493 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..b316f236 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 32.1333, + "ugf": 888255.2 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..f9876c9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 nf=24 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 nf=24 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 nf=24 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 nf=24 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.45 nf=48 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.45 nf=48 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.45 nf=48 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.45 nf=48 +.ends C09_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..b72bb2df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,290 @@ +.subckt C09_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f16 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f17 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f18 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f19 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f20 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f21 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f22 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f23 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f16 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f17 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f18 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f19 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f20 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f21 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f22 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f23 net016 VIN2 IB1 VSS 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net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C09_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..5f2b6608 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..ab98842b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C09_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.3, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.3, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.3, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.3, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.3, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.3, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.3, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.3, + "nf": 48 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c62225e8e02aeb09", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..03a0e2cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "93ae4da6aa9578e2e3b0084050c45dc8a6b37125820a04675645cda37617712a", + "qualification.json": "c94b33ce4836fb9e187cefb8f52339d84133d505adc2bf421c820bbe0b012a66", + "specs.json": "5f148b6990ff22598d46c92278bf52c9fa907a2d10b2a13c3406c338ceb7e4d8", + "target.spice": "e468bde7e9bd560feb017b9aa249cc72b0fcbda09b2e85ab4ffffe6c03932dac", + "target_lvs.spice": "6713be2349e261b1817afe9e986629711a20629b16d90be9f0053255246538b3", + "testbench.spice": "0b08da3a5ffaf7595e8448ade1f489cbb414f4ac70347411f63797b4ddd6f9ec" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..b708e23d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_sky130_sW1.5_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c62225e8e02aeb09", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 49.4 + }, + "ugf": { + "min": 7808000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.40228, + "ugf": 13012700.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vout0": 0.8099983, + "idd": 2.000002e-05, + "vos": -0.0168035, + "gain_lf": 52.40228, + "ph_lf": 0.4020045, + "ugf": 13012700.0, + "ph_ugf": -91.89919, + "f3db": 31157.06, + "pm": 87.69880549999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..a9a68007 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 49.4 + }, + "ugf": { + "min": 7808000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.40228, + "ugf": 13012700.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..a515d9e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 nf=24 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 nf=24 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 nf=24 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 nf=24 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.3 nf=48 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.3 nf=48 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.3 nf=48 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.3 nf=48 +.ends C09_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b744201d --- 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net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f16 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f17 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f18 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f19 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f20 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f21 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f22 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f23 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f24 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f25 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f26 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f27 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f28 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f29 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f30 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f31 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f32 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f33 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f34 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f35 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f36 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f37 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f38 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f39 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f40 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f41 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f42 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f43 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f44 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f45 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f46 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f47 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f16 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f17 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f18 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f19 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f20 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f21 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f22 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f23 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f24 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f25 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f26 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f27 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f28 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f29 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f30 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f31 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f32 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f33 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f34 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f35 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f36 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f37 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f38 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f39 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f40 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f41 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f42 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f43 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f44 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f45 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f46 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C09_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..be1c249a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..8c875c90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C09_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 12.0, + "l": 0.6, + "nf": 24 + }, + "M2": { + "w": 12.0, + "l": 0.6, + "nf": 24 + }, + "M3": { + "w": 12.0, + "l": 0.6, + "nf": 24 + }, + "M4": { + "w": 12.0, + "l": 0.6, + "nf": 24 + }, + "M5": { + "w": 24.0, + "l": 0.6, + "nf": 48 + }, + "M6": { + "w": 24.0, + "l": 0.6, + "nf": 48 + }, + "M7": { + "w": 24.0, + "l": 0.6, + "nf": 48 + }, + "M8": { + "w": 24.0, + "l": 0.6, + "nf": 48 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 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"VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..e7113c60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4a0ed352874fb1db55209903be0d67da09feb311b3b0b0725a6a0b9b95549595", + "qualification.json": "44303b42ecd17dc90f79ed49ccd563bb2444b84dc64b086df2445096df34cc58", + "specs.json": "7d21572f531a677f65aef90d6e282788ed070e09d0a2687b873aafbb5f4e6286", + "target.spice": "e70b132b921dea9fee4ac6517b088e6a6dc2cee194c329c112b24137f58ed115", + "target_lvs.spice": "bcf67e5563bcc9dd0f3d332eb87a162ccf267152ac3222e9bf11cf2bf4885e24", + "testbench.spice": "9b175bb5bc368dc397069f081d40c683b5fbab659f9b92305af65eb2673bcf6f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..240c788c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW1.5_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.6, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.6, + 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"schematic_measures": { + "vout0": 0.8099682, + "idd": 1.999741e-05, + "vos": -0.280805, + "gain_lf": 20.24485, + "ph_lf": 0.05648142, + "ugf": 381238.9, + "ph_ugf": -82.89011, + "f3db": 37081.1, + "pm": 97.05340858 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..b7a80b57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 20.24485, + "ugf": 381238.9 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..929e6d40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 nf=24 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 nf=24 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 nf=24 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 nf=24 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.6 nf=48 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.6 nf=48 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.6 nf=48 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=24 l=0.6 nf=48 +.ends C09_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..162c7a7e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,290 @@ +.subckt C09_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f16 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f17 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f18 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f19 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f20 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f21 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f22 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f23 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f16 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f17 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f18 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f19 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f20 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f21 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f22 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f23 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net04 VB1 net018 VSS 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VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f42 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f43 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f44 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f45 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f46 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C09_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..79284cb6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=12 l=0.6 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..eed0eec9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C09_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.45, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "067b1a039bcdf28a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..8e507207 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6f9618a5b3c5371a82965c7600e682e022e8c4c23f3faf2fa5460f877611e4f8", + "qualification.json": "35a8116820382c1faced31582b97c9823ba1ecb2f651a9d7e2ed0798c4e254f7", + "specs.json": "e0ba36b5de6641e6e55cd62009a13ad69a18988c67260d3821a948d27d4b642f", + "target.spice": "192448c4d13254c171ccb707456f7e100ebef729e25d2ef2f08a7dba259a8a81", + "target_lvs.spice": "d7a0f4fb2bdcc2e6827cdce7e1b28f5c4443009290fb3696e254da373d4556a9", + "testbench.spice": "7c654b6836f81209f47e201247dc2d86aadb322c8c2fa630190a5e7b3a2c0570" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..e8f4a1a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW1_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "067b1a039bcdf28a", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=19.7 below floor 35", + "ugf=4.845e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 19.69825, + "ugf": 484494.6 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.8, + "schematic_measures": { + "vout0": 0.8099714, + "idd": 1.999924e-05, + "vos": -0.258346, + "gain_lf": 19.69825, + "ph_lf": 0.05073495, + "ugf": 484494.6, + "ph_ugf": -83.25803, + "f3db": 50240.21, + "pm": 96.69123504999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..7118705e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 19.69825, + "ugf": 484494.6 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..633685ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +.ends C09_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c7db3000 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net016 VIN2 IB1 VSS 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sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C09_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..2d4bb770 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..74736560 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C09_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.3, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cd1ed5967a96f430", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..0ac11edc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c7abecf8aeb571dcca634c431e73186c94a282ce679b91cadd49eea060e84059", + "qualification.json": "8fa6c2eaf592cc83ab88cc7b4587823a7c1be5a2d5f639b60ebe51f8f7fc54ac", + "specs.json": "c8b3bbdedbc48ae530c86ecb7d6491269ae81eecb23f9de01e120ffe71dda213", + "target.spice": "d39ba6d9a1c5a023853075cab4f35796aab8d91ba76796e3b78a8fdf386e480c", + "target_lvs.spice": "f8f8221ace254ee2fa24e5638f8d35d6d93f09e7102a164dee9013aa2e6b5131", + "testbench.spice": "bf170026ff3e743d54dd043f269808f16745189282d99cb9ce50a3e7df94458f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..2de2b289 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_sky130_sW1_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cd1ed5967a96f430", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.68 + }, + "ugf": { + "min": 2480000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.68225, + "ugf": 4133133.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.4, + "schematic_measures": { + "vout0": 0.8099937, + "idd": 2e-05, + "vos": -0.0626237, + "gain_lf": 44.68225, + "ph_lf": 0.3094196, + "ugf": 4133133.0, + "ph_ugf": -89.45495, + "f3db": 24016.61, + "pm": 90.2356304 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..92271a78 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.68 + }, + "ugf": { + "min": 2480000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.68225, + "ugf": 4133133.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..71e10d92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +.ends C09_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..6b62314f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f12 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f13 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f14 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f15 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f6 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f7 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f8 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f9 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f10 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f11 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f12 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f13 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f14 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f15 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f0 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f1 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f2 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f3 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f4 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f6 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f7 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f8 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f9 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f10 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f11 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f12 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f13 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f14 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f15 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f16 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f17 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f18 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f19 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f20 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f21 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f22 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f23 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f24 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f25 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f26 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f27 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f28 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f29 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f30 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f31 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f0 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f1 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f2 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f3 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f4 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f16 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f17 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f18 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f19 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f20 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f21 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f22 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f23 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f24 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f25 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f26 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f27 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f28 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f29 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f30 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f31 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f16 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f17 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f18 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f19 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f20 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f21 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f22 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f23 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f24 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f25 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f26 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f27 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f28 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f29 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f30 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f31 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C09_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..33151d28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..d3e63635 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW1_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C09_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.6, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c6bdd644af3634d8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..c83dc337 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7fa578541f6e74fb379c5e6b70bdf687df9811e5c9779e7bf582b941887eb653", + "qualification.json": "c579c0122f68aa94af28453185f01ecadfb9622b7e4afeea1bae6b8bdaef41ee", + "specs.json": "ecf824ecc89034480e07e081abce3dfb94657d892c3db4808981c9fb2eb7bfc7", + "target.spice": "18dae169cd13e180f4ca47c8ea6444197021b43b972f7f0ff5bc33bd61998eb0", + "target_lvs.spice": "9c2e5e057c9b196fb69112253b4cd8c79cd0af36d74332af3fb994e323b3cc5f", + "testbench.spice": "5d382c9aa7fefa4ae3e3aed7fe42f52792b7e76c915d7e851f986945e2408883" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..25023930 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW1_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c6bdd644af3634d8", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=13.57 below floor 35", + "ugf=2.635e+05 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.5663, + "ugf": 263476.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.1, + "schematic_measures": { + "vout0": 0.8099517, + "idd": 1.998939e-05, + "vos": -0.373543, + "gain_lf": 13.5663, + "ph_lf": -0.01904386, + "ugf": 263476.0, + "ph_ugf": -76.84406, + "f3db": 56293.05, + "pm": 103.17498386 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..8878f3be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.5663, + "ugf": 263476.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..4816c9d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +.ends C09_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..18b35bcd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,194 @@ +.subckt C09_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f12 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f13 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f14 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f15 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f8 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f9 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f10 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f11 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f12 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f13 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f14 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f15 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f1 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f2 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f3 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f4 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f6 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f7 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f8 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f9 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f10 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f11 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f12 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f13 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f14 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f15 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f16 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f17 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f18 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f19 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f20 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f21 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f22 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f23 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f24 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f25 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f26 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f27 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f28 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f29 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f30 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f31 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f0 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f16 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f17 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f18 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f19 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f20 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f21 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f22 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f23 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f24 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f25 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f26 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f27 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f28 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f29 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f30 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f31 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f0 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f16 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f17 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f18 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f19 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f20 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f21 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f22 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f23 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f24 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f25 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f26 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f27 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f28 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f29 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f30 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f31 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C09_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..8f4c9482 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..159c5554 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C09_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.45, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.45, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.45, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.45, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "be4570c009a3d202", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..06eee8ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "586927c79c3355cd9b95ddc3f281526ca61efe7276626f3bd0f4e1ef7b3c37ec", + "qualification.json": "881b6e5069eec4d93cf13fb28f6bab8eb2fd0c357cfde331c40c6b5981beb8f6", + "specs.json": "733056094b821364a41e7a6f05d11c446a66361045c5742e20354e70a9033912", + "target.spice": "4b90eba14015978afa7e157ba935be59cefac46d65e6ba6458c64326659e2ca3", + "target_lvs.spice": "caf318aec0ae3657c6db070108813c0815004c022cd6d995b0f1edb58125da9c", + "testbench.spice": "188cbb98885dce7d8adc7e19ce2c83b89c27acf9b4bff20fec5a8aa393150897" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..95e6cb48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,160 @@ +{ + "case_id": "C09_sky130_sW2_sL1.5", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "be4570c009a3d202", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "ugf=1.549e+06 below floor 2e+06" + ], + "spec": { + "gain_lf": { + "min": 38.61 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.61467, + "ugf": 1548783.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.5, + "schematic_measures": { + "vout0": 0.8099876, + "idd": 1.999992e-05, + "vos": -0.121526, + "gain_lf": 41.61467, + "ph_lf": 0.5103991, + "ugf": 1548783.0, + "ph_ugf": -88.16643, + "f3db": 12812.55, + "pm": 91.3231709 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..43f00921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.61 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.61467, + "ugf": 1548783.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..c79202d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +.ends C09_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6fcd3848 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,386 @@ +.subckt C09_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f16 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f17 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f18 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f19 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f20 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f21 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f22 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f23 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f24 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f25 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f26 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f27 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f28 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f29 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f30 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f31 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f16 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f17 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f18 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f19 net016 VIN2 IB1 VSS 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l=0.45 +XM7_f1 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f4 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f5 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f6 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f8 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f9 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f10 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f11 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f12 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f13 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f14 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f15 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f16 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f17 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f18 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f19 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f20 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f21 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f22 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f23 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f24 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f25 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f26 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f27 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f28 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f29 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f30 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f31 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f32 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f33 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f34 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f35 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f36 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f37 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f38 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f39 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f40 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f41 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f42 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f43 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f44 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f45 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f46 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f48 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f49 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f50 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f51 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f52 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f53 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f54 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f55 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f56 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f57 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f58 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f59 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f60 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f61 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f62 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f63 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f48 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f49 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f50 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f51 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f52 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f53 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f54 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f55 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f56 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f57 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f58 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f59 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f60 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f61 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f62 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f63 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C09_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..96ac31b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..55f0ab4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW2_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C09_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.3, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.3, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.3, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.3, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + 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b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..cdcb0d85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9a1300323eb3763b961d9e7bb3b075e9a3cc9a98fd7d797c214305a4580e5e2f", + "qualification.json": "5c7033476ac58523b11ebbf3d0cb1d120ce8c097c9fe8ec736d63b0ba80c9de0", + "specs.json": "90c1643eacd8054f0437ddc1d7fbc4e012e0d6c6ec6d525bdd5421cc16f9af8d", + "target.spice": "2a221ffe553e13cf815c1a49178dd1566204a910bac3c02c615d4bd8158edfb3", + "target_lvs.spice": "d05cf2f860b494926b4c7d51e36f19a165efab6eb70e2f4a7c4ba6a108a5ac69", + "testbench.spice": "ba5ec90d17359430a18ddde2bc8c5b9e15a36ed8dba3ba19ac7b479badc375b3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..7a0e654b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/qualification.json @@ -0,0 +1,158 @@ +{ + "case_id": "C09_sky130_sW2_sL1", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 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"floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.7, + "schematic_measures": { + "vout0": 0.8099995, + "idd": 2.000003e-05, + "vos": -0.00532868, + "gain_lf": 55.20624, + "ph_lf": 0.450439, + "ugf": 21980900.0, + "ph_ugf": -96.9943, + "f3db": 38654.91, + "pm": 82.555261 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..c3def46d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 52.21 + }, + "ugf": { + "min": 13190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 55.20624, + "ugf": 21980900.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..a228e049 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM3 net04 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM4 VOUT1 VB1 net016 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM5 net04 net04 net019 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +XM6 VOUT1 net04 net017 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +XM7 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +XM8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +.ends C09_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..d6032f2b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,386 @@ +.subckt C09_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 +XM1_f0 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f16 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f17 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f18 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f19 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f20 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f21 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f22 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f23 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f24 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f25 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f26 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f27 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f28 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f29 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f30 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f31 net018 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f16 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f17 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f18 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f19 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f20 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f21 net016 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f22 net016 VIN2 IB1 VSS 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VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f22 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f23 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f24 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f25 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f26 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f27 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f28 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f29 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f30 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f31 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f32 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f33 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f34 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f35 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f36 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f37 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f38 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f39 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f40 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f41 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f42 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f43 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f44 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f45 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f46 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f48 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f49 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f50 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f51 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f52 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f53 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f54 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f55 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f56 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f57 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f58 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f59 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f60 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f61 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f62 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f63 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f48 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f49 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f50 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f51 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f52 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f53 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f54 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f55 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f56 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f57 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f58 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f59 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f60 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f61 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f62 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f63 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C09_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..fdda5d65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..3924d054 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/case.json @@ -0,0 +1,235 @@ +{ + "case_id": "C09_sky130_sW2_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C09_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VB1", + "IB1" + ], + "sizing": { + "M1": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M2": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M3": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M4": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M5": { + "w": 32.0, + "l": 0.6, + "nf": 64 + }, + "M6": { + "w": 32.0, + "l": 0.6, + "nf": 64 + }, + "M7": { + "w": 32.0, + "l": 0.6, + "nf": 64 + }, + "M8": { + "w": 32.0, + "l": 0.6, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "category": "ota", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44fe5f1a66fe9b30", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 1e-05, + "variant": "cascode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..94aacf25 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b51d164cc261ddac0ddeb86b244ccbae03eddb5319e394a43c3b96a9e743619e", + "qualification.json": "e7717543d1890c90cd2582e41e3c66db967f7b41872cf77a94b3c7bff2fb979f", + "specs.json": "0f0cdcf565b1ff1319725bf90b06e0528dee315fe8e6d8ac7021f75c598b8058", + "target.spice": "c783de48614460b840c75970501db778dee251733679a9da8fb0e26ca9bce9f4", + "target_lvs.spice": "6abcafe8547baa41521e8481831dafe16156a05020ae55e3ffc0649fd9538820", + "testbench.spice": "aa89361bf8dc818e00340798dd06ab6612685a652766a7cf49e0348f19ccb9d0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..90d9c414 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/qualification.json @@ -0,0 +1,161 @@ +{ + "case_id": "C09_sky130_sW2_sL2", + "circuit_id": "C09", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 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of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..ba831e7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.55868, + "ugf": 532603.2 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 2000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..28f83232 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/target.spice @@ -0,0 +1,10 @@ +.subckt C09_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 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VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f44 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f45 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f46 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f47 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f48 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f49 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f50 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f51 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f52 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f53 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f54 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f55 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f56 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f57 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f58 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f59 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f60 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f61 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f62 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f63 net019 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f12 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f13 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f14 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f15 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f16 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f17 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f18 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f19 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f20 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f21 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f22 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f23 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f24 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f25 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f26 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f27 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f28 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f29 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f30 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f31 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f32 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f33 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f34 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f35 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f36 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f37 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f38 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f39 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f40 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f41 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f42 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f43 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f44 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f45 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f46 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f47 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f48 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f49 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f50 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f51 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f52 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f53 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f54 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f55 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f56 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f57 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f58 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f59 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f60 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f61 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f62 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f63 net017 net019 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C09_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..843b1521 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C09/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,42 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VB1 IB1 C09_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.6 +IB_VB1 VDDB VB1 4e-05 +XB_GS_M3 GS_M3 GS_M3 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.6 +IB_GS_M3 VDDB GS_M3 1e-05 +XB_GS_M1 GS_M1 GS_M1 VSS VSS sky130_fd_pr__nfet_01v8 w=16 l=0.6 +IB_GS_M1 VDDB GS_M1 1e-05 +B_VCM VCM 0 V = v(VB1) - v(GS_M3) + v(GS_M1) - 0.1 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.81 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN2 VCM VINT 0 1 +EIN VIN1 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN2) - v(VIN1) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..d4464bbc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C10_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0b47d0bba5d70315", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..d5c16585 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5b16faaef60631971062edd4fed1056abea1792df6853faeb905f03bab0c4db1", + "qualification.json": "a2d429169b1c9f22c662d9f6d0b43ef18b5e2638938a12401c1b3680835eecc1", + "specs.json": "f58bfcf641bb8253cc956a9bd58b42fb69c4438b24a42fb5a1943d2a2b094e51", + "target.spice": "44278b927f0990f82be70b2aab057f6bea1e577f547ff6ad5ad60f0ffceeb890", + "target_lvs.spice": "861229b03e77240f2dc3a5a36e688a4b682270b317b6eff2c73bfa3f80311d05", + "testbench.spice": "70255b4bcd6fc5e46d01de4f011d393ad4f7fb9accee0c1bd45f383a7680cb78" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..25f46fae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0b47d0bba5d70315", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 41.19 + }, + "ugf": { + "min": 8907000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.18703, + "ugf": 14845750.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650454, + "vo2": 1.650454, + "idd": 8.02609e-05, + "vos_in": -7.27596e-12, + "gain_lf": 44.18703, + "ugf": 14845750.0, + "f3db": 91314.97 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..adfb63bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 41.19 + }, + "ugf": { + "min": 8907000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 44.18703, + "ugf": 14845750.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..22c45669 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C10_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..91e62d06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C10_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..c5f33f22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..1cf47897 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C10_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f8150c9844f1b633", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..e1fea4b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "247df28df85738f54b3bd67442bb5379515701db963ef7ad9cf6c1ea2e6803db", + "qualification.json": "ef7d50412d360cbbaaa2274fca7f41036cb4f56f724c86274a52c4b2191ea1eb", + "specs.json": "c1223bc59e96e7e5b37c899178ae537749ff7c63c17c216f056adfe1df887326", + "target.spice": "0a407a3f9b1cebc773736e42cd5bf5fa1cb8314c8822c3bc0155857751ac288d", + "target_lvs.spice": "90fe4599c52331aec4bd3e7c51d89b14a3b5694ca9cd16c1af1f35bdcf3dcb7e", + "testbench.spice": "56834af8e830a6fe6e029e57959725a7ca2888434c2abc92d0c2c86f2832bca6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..7c50eb3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f8150c9844f1b633", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 52.01 + }, + "ugf": { + "min": 11340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 55.00841, + "ugf": 18895170.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.649936, + "vo2": 1.649936, + "idd": 8.00532e-05, + "vos_in": 0.0, + "gain_lf": 55.00841, + "ugf": 18895170.0, + "f3db": 33435.54 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..37db5439 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 52.01 + }, + "ugf": { + "min": 11340000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 55.00841, + "ugf": 18895170.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..3f6acd83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C10_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..6205c515 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C10_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..c8337dca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..0e4b0cf3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C10_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "19c99fdac3b5d49f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..a671c0ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "758d5465aedea444d5f20adddf7cb4742b38b1e67f967ddd24a39c3186cb1dc3", + "qualification.json": "2a66b8bb3269c47f47884e4c95b4e14d682b4b22f4cc4887933796a9ac35f5e9", + "specs.json": "35b2e45e78a9ef9141fc046ea7f2aff54c256dd421bc12ae43fb55aa5a034b53", + "target.spice": "a66803cc7eef4971f1c861d38dcffdd0b0ebe13ba56769c38dae6ef5f2858ff0", + "target_lvs.spice": "784a62c8c58675b98afff56c0970d134fa819ae22539d7580bc05f36b5be80a6", + "testbench.spice": "95cf1a3f0c6b679c8d1c26c86393d7d7963c70940b98204edf382a4f1a8f99a0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..9f07ffec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "19c99fdac3b5d49f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 39.36 + }, + "ugf": { + "min": 7541000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.36428, + "ugf": 12568580.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650831, + "vo2": 1.650831, + "idd": 8.050033e-05, + "vos_in": -3.63798e-12, + "gain_lf": 42.36428, + "ugf": 12568580.0, + "f3db": 95502.18 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..6268dc16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.36 + }, + "ugf": { + "min": 7541000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.36428, + "ugf": 12568580.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..eab4f250 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C10_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..f9e50e64 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C10_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..9d3624f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..402793c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C10_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.84, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "24c456bcb054a1a9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..82c7959f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "13995da7cbe2e684e0c46eb491f3fcb5d794ee9aaf8a21e6f683a9fd2c399ff9", + "qualification.json": "0bf1d7291e3bc71bfcae6d260593e87e4b571807c4df9e3aada03d484e55cbcd", + "specs.json": "4d0852fb9f186f3a2ffd7ff1085e83be0a64bd5d814a0a0720233c37216cb72e", + "target.spice": "6968ac2c82987cd5221604a148eef8c75dd5ab1b261e141a0c8766696e362e91", + "target_lvs.spice": "dc1a5af95086fa8020a1478b91a75ab6ff93bceac2d889c3e174bb5e4d81afbe", + "testbench.spice": "d747c3ccaa376e425ffefbcb3d4899727da78e00848a3c2c3d4400c32dfed60a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..cb2b1ae2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "24c456bcb054a1a9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 66.04 + }, + "ugf": { + "min": 15900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 69.04331, + "ugf": 26497430.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650297, + "vo2": 1.650297, + "idd": 7.965916e-05, + "vos_in": 0.0, + "gain_lf": 69.04331, + "ugf": 26497430.0, + "f3db": 9329.025 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..8e07393c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 66.04 + }, + "ugf": { + "min": 15900000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 69.04331, + "ugf": 26497430.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..adfa8ceb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +.ends C10_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..500eaa59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C10_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d9beca79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.84u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=6u l=0.84u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..ef0d6b4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C10_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.56, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a57bf2de4e1e77d3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..9114082d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0b1a13e42ae8e34b116afdc09719040e7cba75049b08896ff3160078e519d0f4", + "qualification.json": "1552c5429bdf8a6a1203bb0a08dbc66b3719eeefa944e6f37102c781f7a5ca46", + "specs.json": "194687be97cd7872629982e4fd3ce008976f639ecb6ac6c3b23a9d9f63c64741", + "target.spice": "5cfa02c8646f38554ca8062d1960fb518fe5e9b36c6da031656b2c2ee2134129", + "target_lvs.spice": "3e1e0b908aab6e487f0dc294c0c951fb7e34e6341a5595b00ee2bdb82df6ec2c", + "testbench.spice": "fdbc9ac8145d3238ee232af3fb116f14059e9e80ed7df0cc37e5d6bf1460b0a1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..c88d133c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a57bf2de4e1e77d3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 59.85 + }, + "ugf": { + "min": 19880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.84618, + "ugf": 33128080.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.649799, + "vo2": 1.649799, + "idd": 8.059775e-05, + "vos_in": 1.091394e-11, + "gain_lf": 62.84618, + "ugf": 33128080.0, + "f3db": 23787.08 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..7d7ad817 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 59.85 + }, + "ugf": { + "min": 19880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.84618, + "ugf": 33128080.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..f37e8f3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +.ends C10_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..7c7a8ae4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C10_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..c875d8d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.56u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=6u l=0.56u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..bbad17c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C10_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 1.12, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44ad043904d485b6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..355707d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d73bc9db003b38b9d88f1da1fb126df5f698c8aa8e076e799bcbf03469a7ddba", + "qualification.json": "d97a4462f67385495b7dbe1e6172bfc6c9c1fed6bf665f947a866e3400f2ccf2", + "specs.json": "af4aafb581158c0ecdc06fb2396062bfb5dd222233b284aa4824fc7d2737a7b1", + "target.spice": "393ee7afcd5188c471a3bd5ae6a38c05b6cf5af2d4895485ae5f2df42560e03e", + "target_lvs.spice": "8b12c5bc442d8494e83e71e7e563b7f64856bfe308137f11a1e9b1bb4961db1b", + "testbench.spice": "04422b16bc43e1692dc8932a618c26b0e098f7beca605eaf44df8c1f7f6e6130" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..bf47b3e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44ad043904d485b6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 69.23 + }, + "ugf": { + "min": 13670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 72.2261, + "ugf": 22776580.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650689, + "vo2": 1.650689, + "idd": 7.953871e-05, + "vos_in": -2.21917e-10, + "gain_lf": 72.2261, + "ugf": 22776580.0, + "f3db": 5569.856 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..f8315218 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 69.23 + }, + "ugf": { + "min": 13670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 72.2261, + "ugf": 22776580.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..2dee6902 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +.ends C10_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0e091768 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C10_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..b9e557a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=1.12u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=6u l=1.12u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..a1c52107 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C10_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f8bf9d5f97abbb01", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..2cde796c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "941b530a2e1a08c367048db85010fe043a57bd75dd210a13fd1d1d0270b0e04d", + "qualification.json": "2779fdee9742278b85d03271be60e50b7102ab2b01d62d6df82ef59dd08efd64", + "specs.json": "df8308173fae8cca854f446523e3b2f0270ce444fb6fcb65dd63eaabe7c7fc6a", + "target.spice": "2d3c8e3b5d6ac8f300c0003bb30bd5902719ba95d61fcc48509d256c323560c0", + "target_lvs.spice": "0a28eb6cd02e65d469371f50ab76dcde4d94b5fa0ee05c67822528bb0c8b8c42", + "testbench.spice": "93937e73d06ed517a5461e25c72e89f08929c2f53fd38705c9fd4859108e7f13" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..843236ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f8bf9d5f97abbb01", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 65.34 + }, + "ugf": { + "min": 13000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.34192, + "ugf": 21665870.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650431, + "vo2": 1.650431, + "idd": 7.966196e-05, + "vos_in": 1.091394e-11, + "gain_lf": 68.34192, + "ugf": 21665870.0, + "f3db": 8269.995 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..284fe82f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 65.34 + }, + "ugf": { + "min": 13000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.34192, + "ugf": 21665870.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..8bd32416 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C10_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ed6b619d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C10_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..bc5f13c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..e095c6e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C10_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d66d7444939df7ce", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..75cd8632 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3aba5253fbea73dea8ddd59cdc1ef6e74707f08d907cc0aaef46c7ab9dc2f714", + "qualification.json": "a8cd7bb52aeca8ceefa62bbe3304f892243a3600e7fe2fc9e8ffe3bcea050525", + "specs.json": "59e4015cff8b05ab072ff3c7007c72f166dcad08a3ac1929cbc6c3e5aeabe801", + "target.spice": "323778a0a9a87af4258e221e1a4460a423e02e9ed2632e95be620d195da37890", + "target_lvs.spice": "4ba7f23da652175f60e359ad600bcdfa19696a55e2da41ab7c07c8566d9fdae2", + "testbench.spice": "2c5f619e785da0bbc27f8597a428ff97d793d5b6b542dc2eb6c180cf75888eaf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..c28b9d1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d66d7444939df7ce", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 59.87 + }, + "ugf": { + "min": 16310000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.87385, + "ugf": 27175880.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.649878, + "vo2": 1.649878, + "idd": 8.003606e-05, + "vos_in": -3.63798e-12, + "gain_lf": 62.87385, + "ugf": 27175880.0, + "f3db": 19452.04 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..05777d42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 59.87 + }, + "ugf": { + "min": 16310000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.87385, + "ugf": 27175880.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..1c9dd827 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C10_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..4935242f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C10_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..73080e28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..210c7dd1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW1_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C10_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a424ad6b4c28d155", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..e54aae98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bfc9f793fc5ecda4ddfc9a021ffd601d137b754a7b993a714d91fe1519c2546c", + "qualification.json": "c1a66c83049e07dc3df7c016724c994a33fe7b7027be3dd7eef8ec3ce79e3132", + "specs.json": "3bff0583244bb841c445ad4aa3e4c2e395ab4a1b9204cadbb817fdc9c3a64a61", + "target.spice": "bb7d33d77ae35d7e984ee1945e26493db249ed0fa0805a5bee0eedd74b2708c3", + "target_lvs.spice": "7170fc184b36010bbd9ebc7f47d302dd8c9223110e77be443ad2739c3f46d274", + "testbench.spice": "43a2321cfb8843330caffee0f7dfca36df7f2b16cd9ed571882d9c06569ce6da" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..641828ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW1_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a424ad6b4c28d155", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 64.24 + }, + "ugf": { + "min": 11110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.23655, + "ugf": 18515360.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 1.650858, + "vo2": 1.650858, + "idd": 7.976098e-05, + "vos_in": -1.45519e-11, + "gain_lf": 67.23655, + "ugf": 18515360.0, + "f3db": 8023.884 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..ed18d3cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 64.24 + }, + "ugf": { + "min": 11110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.23655, + "ugf": 18515360.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..e028aac0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C10_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..3ac15872 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C10_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..b77ae6bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..b5b1a657 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C10_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.84, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fe5158b497bc63fc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..6850b3bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6d5bf15a37a0e5ce272df96149f18ae9335430666a7df82590833f5831d5b987", + "qualification.json": "c3d56e6fb7a3f924c7660481336cf866b95ec3c0a234981104f2b2d1163e1e99", + "specs.json": "20bf51015bfb1ddba9444f46561b5eebd851782cc18c018154960b3c58eaecff", + "target.spice": "3709e99da68c91c8f566e7cfad8d9ac0565133770271179fd6654c6f34f9e776", + "target_lvs.spice": "6976c54c39f7aa37515081650acd6fa2a79256b070b7a02251c6f58791214293", + "testbench.spice": "f73f6540591b34ef17e2da00d3c0a2cb115a484f7b1c74480a8c2399cac5a4b4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..cc8a3dae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fe5158b497bc63fc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 65.88 + }, + "ugf": { + "min": 18210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.87529, + "ugf": 30356750.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650197, + "vo2": 1.650197, + "idd": 7.982058e-05, + "vos_in": -7.27596e-12, + "gain_lf": 68.87529, + "ugf": 30356750.0, + "f3db": 10898.23 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..bb2cbda7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 65.88 + }, + "ugf": { + "min": 18210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.87529, + "ugf": 30356750.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..d394ae88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +.ends C10_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6dff79f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f12 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f13 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f14 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM1_f15 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f12 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f13 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f14 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM2_f15 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f12 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f13 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f14 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f15 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f12 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f13 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f14 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f15 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f12 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f13 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f14 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f15 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f12 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f13 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f14 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM7_f15 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f12 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f13 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f14 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM8_f15 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.84u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f12 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f13 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f14 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM9_f15 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f12 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f13 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f14 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM10_f15 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C10_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..c8eeca47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.84u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=8u l=0.84u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..bb6e2384 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW2_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C10_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.56, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2b37eb1bddd0a71f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..67b3078b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7b47e294fd52d1f07ef0b83ed48c445ab274a9d4b3250b5df2abbef3f7499da5", + "qualification.json": "61f4d821105231f90814c140e395051a10e3a37f0834dbd2357dd9fea1d32d0b", + "specs.json": "b1059ddd34fcafb81fb6ec9890a2b028ba2791a283750292e030eb72b5a4e746", + "target.spice": "da51f2e768c91249988c4d6bef3ac2202fd14b911d585f928fdacd1139b7bf90", + "target_lvs.spice": "fad05b8a33d82112e24f614ab5324ac45de972f7d81fd8bb83b2b79e96742bf5", + "testbench.spice": "88d35f8983511db98b95124bbaedf398067d9c08fc00f11c18912ee8d5c24866" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..9a04dcd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW2_sL1", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2b37eb1bddd0a71f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 59.56 + }, + "ugf": { + "min": 22670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.56124, + "ugf": 37786640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.649748, + "vo2": 1.649748, + "idd": 8.122218e-05, + "vos_in": 3.637979e-12, + "gain_lf": 62.56124, + "ugf": 37786640.0, + "f3db": 28038.02 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..2fe7448a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 59.56 + }, + "ugf": { + "min": 22670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 62.56124, + "ugf": 37786640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..6cb400fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +.ends C10_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..9fb63424 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f12 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f13 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f14 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM1_f15 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f12 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f13 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f14 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM2_f15 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f12 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f13 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f14 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f15 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f12 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f13 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f14 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f15 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f12 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f13 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f14 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f15 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f12 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f13 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f14 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM7_f15 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f12 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f13 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f14 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM8_f15 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=0.56u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f12 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f13 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f14 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM9_f15 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f12 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f13 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f14 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM10_f15 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C10_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..fb0d829b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.56u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=8u l=0.56u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..2f87b957 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_gf180_sW2_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C10_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 1.12, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f2098ffbf1d166a7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..3027fc31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "faf5bb15fddb9f05e97efa6317c201a86ebcd2337e28ea5377b17011b76edf47", + "qualification.json": "df62717f9a2e21b8040f6b52062c47ae13dfbee66e074cabcfbef06ec8a58bf0", + "specs.json": "5285e6a3897ff26d04f96636085f29f384711029d734c3e091444e3ecc3abbfc", + "target.spice": "0763329743187e1109fd26c9d12d79cac9c3a600573ebe0c7437f3ded7778f77", + "target_lvs.spice": "6ed0c9d117340da55c0fb780c0bc194b3e6faf8d91be960ae803b10ebcebf44f", + "testbench.spice": "073d132bddc518e3d41cb65bc7560de76f16ec5fcd4b4799e43ac11e9b69317a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..fba0a30f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_gf180_sW2_sL2", + "circuit_id": "C10", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f2098ffbf1d166a7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 69.25 + }, + "ugf": { + "min": 15630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 72.24854, + "ugf": 26051210.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.650557, + "vo2": 1.650557, + "idd": 7.950629e-05, + "vos_in": 3.637979e-12, + "gain_lf": 72.24854, + "ugf": 26051210.0, + "f3db": 6351.242 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..732ca26e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 69.25 + }, + "ugf": { + "min": 15630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 72.24854, + "ugf": 26051210.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..075b3af0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1 net022 VIN1 IB1 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 net018 VIN2 IB1 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net022 VB4 VSS VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 net018 VB4 VSS VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM5 VOUT1 VB1 net022 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM6 VOUT2 VB1 net018 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM7 VOUT1 VB2 net023 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM8 VOUT2 VB2 net021 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM9 net023 VB3 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM10 net021 VB3 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +.ends C10_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..9440bb20 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +MM1_f0 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f8 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f9 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f10 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f11 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f12 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f13 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f14 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM1_f15 net022 VIN1 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f12 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f13 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f14 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM2_f15 net018 VIN2 IB1 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net022 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f8 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f9 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f10 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f11 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f12 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f13 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f14 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f15 net018 VB4 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f12 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f13 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f14 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f15 VOUT1 VB1 net022 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f4 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f5 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f6 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f7 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f8 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f9 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f10 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f11 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f12 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f13 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f14 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f15 VOUT2 VB1 net018 VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f12 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f13 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f14 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM7_f15 VOUT1 VB2 net023 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f8 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f9 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f10 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f11 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f12 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f13 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f14 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM8_f15 VOUT2 VB2 net021 VDD pfet_03v3 w=0.5u l=1.12u +MM9_f0 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f1 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f2 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f3 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f4 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f5 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f6 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f7 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f8 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f9 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f10 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f11 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f12 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f13 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f14 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM9_f15 net023 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f0 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f1 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f2 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f3 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f4 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f5 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f6 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f7 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f8 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f9 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f10 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f11 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f12 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f13 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f14 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM10_f15 net021 VB3 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C10_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..7ec32ae9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.99 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=1.12u +IB_VB1 VDDB VB1 0.00018 +MB_VB2 VB2 VB2 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB2 VB2 VSS 0.00018 +MB_VB3 VB3 VB3 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB3 VB3 VSS 2e-05 +MB_VB4n VB4n VB4n VSS VSS nfet_03v3 w=8u l=1.12u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 1.65) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..91d977cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C10_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.78, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "15af3e252f0102f6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..602ef859 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "325598f1fd9ad25e592f72ae0b1b2933f2e0383d861ecf7da5a9f45071d06b88", + "qualification.json": "e0958c397eb49662738378bb02692b2ee8332e665e431165707c2e118659b8e3", + "specs.json": "f93216ccdeadcd4c580c96e384fa53228b7cdcc7ef376f25390121257512f8a6", + "target.spice": "6c43c3cabbe67e333b2b7d6d6940d3e74ee878c684483bd44298108f5fbce0a0", + "target_lvs.spice": "09f7d4b1d65c1ae00d1323a2b4689651f27899fe572bb0f5a8b10a9371d8c4f5", + "testbench.spice": "3af45f13decbadc9494627db478c71d982d4a0bed75508c462a497f75ca1b434" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..9b9964c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "15af3e252f0102f6", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=27.28 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 16330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.28475, + "ugf": 27211820.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vo1": 0.6013167, + "vo2": 0.6013167, + "idd": 8.423659e-05, + "vos_in": 4.547474e-12, + "gain_lf": 27.28475, + "ugf": 27211820.0, + "f3db": 1172969.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..c1658251 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 16330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 27.28475, + "ugf": 27211820.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..70b46c13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=2u l=0.78u ng=4 m=1 +.ends C10_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..745a0e6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C10_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..f212bde9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.78u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=0.78u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=0.78u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=2u l=0.78u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..081be765 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C10_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "3c17ac99e063492f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..88b4ae52 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "099573ab51a0b8ff357241298ffb13c0d2aeff97535cd6d27ae7b882b5f4efc1", + "qualification.json": "87214d4c38aaa7e949a934647b00af65bd14ad573baeea2580406c40751d0668", + "specs.json": "9c2f090c54f603a34bc2f4ea4879891621d18593fd85526858041b605c37afba", + "target.spice": "9ebee905280b7fdf5e5c7c30af53d4e71bbbac53336ccc744098028277feb928", + "target_lvs.spice": "56788be11e510c2657c5d41605f6e13c6b6d55f049635906992cf9f27e88183d", + "testbench.spice": "7a6ccfb632dc008523fa6bff94e37f9eab4dba318d684c9646520f42c0a374a0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..001cc7b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "3c17ac99e063492f", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=30.08 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 19710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.0802, + "ugf": 32857060.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "vo1": 0.6014065, + "vo2": 0.6014065, + "idd": 8.360509e-05, + "vos_in": 9.094947e-13, + "gain_lf": 30.0802, + "ugf": 32857060.0, + "f3db": 1026079.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..bb598685 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 19710000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.0802, + "ugf": 32857060.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..b5b0a5b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +.ends C10_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..f1ea1328 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C10_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..e02d6c29 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=2u l=0.52u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..bab12718 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C10_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5b68becc522af8b2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..45599061 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "53773df5b6402ef94f2227eec38e5db2f3f4a571aec1a0a822ad2fe8fead722c", + "qualification.json": "2b128a0621a6ff0e59ee5d01793da480230c7e5bbeeb60fab66f3dfc9871e3ea", + "specs.json": "dae12c934e45f00b24cc08a93618947eac4b3b8534af77faacb42c089a78d61f", + "target.spice": "7b4402bb9e668044e55aa902961528432dcd064e8fffda7def3b511fcac511c3", + "target_lvs.spice": "ec188974a5c4b07650ce53b94fc3169fcd65f79ed15148af678f0e12f478cb35", + "testbench.spice": "eda02ce08d619fbecdfe9c1abfa9dff0b3681cd8830f6a741a7ff149db916e0d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..049095e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_ihp130_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5b68becc522af8b2", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=21.41 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 13890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 21.40682, + "ugf": 23152470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vo1": 0.6012868, + "vo2": 0.6012868, + "idd": 8.429907e-05, + "vos_in": 0.0, + "gain_lf": 21.40682, + "ugf": 23152470.0, + "f3db": 1968790.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..c4c77467 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 13890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 21.40682, + "ugf": 23152470.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a955c357 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=2u l=1.04u ng=4 m=1 +.ends C10_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..860d8903 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +.ends C10_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..867bd899 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=1.04u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=2u l=1.04u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=2u l=1.04u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=2u l=1.04u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..451de5f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C10_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.78, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.78, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9e8226f5d66e075f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..84b442e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f2ad3b4e72d1095527b837c92085f64bb8b522aebb5cd09de310e05b8c3aa0be", + "qualification.json": "dc76f466dfba9a7052c7da3ab847e4ecdabfe63eeca90d0ead0224e47a220fa5", + "specs.json": "12131826dedebb732e787fc22e681f804d9ee5d6fcb77d35d7f599870477399d", + "target.spice": "784957df572c45585cd13207ac2322512596b2ebec48d659f838b6c580d1c93f", + "target_lvs.spice": "922b6b2cd25c00ccd149a93bf48a2f3828271bb2ecddcc77d8eec255916284bd", + "testbench.spice": "25052094cc1d982f10edeee19229912ede4f3a0c4f0ecaba0b3f490b5892dfc4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..25a28e09 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.78, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9e8226f5d66e075f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 25850000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.46391, + "ugf": 43086990.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.1, + "schematic_measures": { + "vo1": 0.6022738, + "vo2": 0.6022738, + "idd": 8.728037e-05, + "vos_in": -2.54659e-11, + "gain_lf": 37.46391, + "ugf": 43086990.0, + "f3db": 574821.5 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..09656a6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 25850000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.46391, + "ugf": 43086990.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..bed623e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=6u l=0.78u ng=12 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=6u l=0.78u ng=12 m=1 +.ends C10_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..0be0f5ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C10_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..9dfbdeab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.78u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=0.78u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=0.78u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=6u l=0.78u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..f1ef6f03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C10_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.52, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6c93bbbca6a8632f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..75eb1a3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1fd6d09bf97ebb4450543f8b0c63a7351b10173b997535d8ff24796731c4c365", + "qualification.json": "8d47f679f38c4b4e9f7b7e28605ab9b8dbe17f50857dd75e1c0ece291268909c", + "specs.json": "94d44bc7e560e3022e840524059b5489ffcd4b6adb033689b9d583826d13f621", + "target.spice": "a28817ed3e331564d39f06b0bdda417fa326cacca80df64c5e7a846adfb11d10", + "target_lvs.spice": "7e0c0f40d7f04644497408762796253a0059d55b7715cf3f15fe7b6df3774d1f", + "testbench.spice": "9d8e71ac92557914847f835cabef08ea6b5ac0ce0fb7f1dac9588e15506df778" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..68abefaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6c93bbbca6a8632f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.99 + }, + "ugf": { + "min": 31020000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.99394, + "ugf": 51696740.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.4, + "schematic_measures": { + "vo1": 0.6023343, + "vo2": 0.6023343, + "idd": 8.566161e-05, + "vos_in": -1.09139e-11, + "gain_lf": 38.99394, + "ugf": 51696740.0, + "f3db": 578425.3 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..8249a6e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.99 + }, + "ugf": { + "min": 31020000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.99394, + "ugf": 51696740.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..865297ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +.ends C10_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..13434152 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C10_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..82d0c054 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.52u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=6u l=0.52u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..eff648ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C10_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 1.04, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 1.04, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5586335ab17c4366", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..782f2d31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e74892f1356e405c38e5216b2f89df076060b52027cc6f58401f4d5572f23526", + "qualification.json": "010b8e0dd8532a4a9ce0db15505c6c3203bc9411125c9963024ddfdb0a2d3c90", + "specs.json": "f845ece228bad5aeaa04137d9fd928a44fa24a05cfd442742a1509d73e3d69f7", + "target.spice": "6e5b064461f400e2419688de2b231725bc3526bb6300bd309f06235eb6423e62", + "target_lvs.spice": "16134be29b7cb5588b399f38841e35b76ce96a4d409dacfab8ffd6e33e1df943", + "testbench.spice": "32dad2c5ff9ebab26f12e8d0d18193ef9d727b60e2574ac3da20524ed9bd1960" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..3d8b7aee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.04, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5586335ab17c4366", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 21870000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.16087, + "ugf": 36451150.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.3, + "schematic_measures": { + "vo1": 0.6022597, + "vo2": 0.6022597, + "idd": 8.7871e-05, + "vos_in": 1.546141e-11, + "gain_lf": 36.16087, + "ugf": 36451150.0, + "f3db": 565070.4 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..c1983ac5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 21870000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.16087, + "ugf": 36451150.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..c4c2ba38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=6u l=1.04u ng=12 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=6u l=1.04u ng=12 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=6u l=1.04u ng=12 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=6u l=1.04u ng=12 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=6u l=1.04u ng=12 m=1 +.ends C10_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c691092d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +.ends C10_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..f95285d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=1.04u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=6u l=1.04u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=6u l=1.04u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=6u l=1.04u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..a46c8747 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C10_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.78, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c8041ee9ebc99c29", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..83a34915 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e7d0a0fb8967d3a05d5fae307f6780468d4b2f9384e92b9d1ea5e71e2dc6e476", + "qualification.json": "71b1ac4c04b57819287ad7dc226befb54da983ba7ea9267e6cd1e7383c2f5085", + "specs.json": "6713fdffed86734fe952cd8b6726edf8f3c98893af7532eec52de36ef79c8e4c", + "target.spice": "a983f3f8ebae63b003894fdf417e61888c108fa986af99129ef09ba63473ba03", + "target_lvs.spice": "35d80ebda84b641c17dbfee39704bac99970e8d11e0c7f152ffa4d72d9306515", + "testbench.spice": "1671b7b2bdc09336767c4691b968ae88c4b1e236752922f50d09b3f5744ce9cd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..0102b850 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_ihp130_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c8041ee9ebc99c29", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=34.19 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 21860000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.18552, + "ugf": 36435230.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.6, + "schematic_measures": { + "vo1": 0.6018909, + "vo2": 0.6018909, + "idd": 8.644131e-05, + "vos_in": 1.818989e-12, + "gain_lf": 34.18552, + "ugf": 36435230.0, + "f3db": 709232.2 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..61439a6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 21860000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.18552, + "ugf": 36435230.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..792c08c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=4u l=0.78u ng=8 m=1 +.ends C10_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..387e4d90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C10_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..1d35def4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.78u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=0.78u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=0.78u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=4u l=0.78u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..7cdb8e41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C10_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "11509295a52bdb08", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..3d7a2677 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "77cd9b3a918a79e06761d17cee0f751aafa5b28aec860e4493f531b893125141", + "qualification.json": "3fb0d41a43216f4fedc5777084fb5b316497b9e32e477fbe1dfc31ff953fe14a", + "specs.json": "5ed65edc406ce2d2a05fdf88b0891332aa1b283bf7ace1324c9698148c9b135b", + "target.spice": "77d6a04077f80a48e76b98ac48aa511a6bf86e229c347db17c6075f9119efa46", + "target_lvs.spice": "393b91676075193bbbc501a4b357360caa6c7743d63c6f452a80e6faf73cb65d", + "testbench.spice": "ae94f7503d7f1507e42c629a48f9d4873d32c357f08539c05eb4b8c226a18a5a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..8d2557e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW1_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "11509295a52bdb08", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 26400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.03274, + "ugf": 43998640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.4, + "schematic_measures": { + "vo1": 0.6019595, + "vo2": 0.6019595, + "idd": 8.52423e-05, + "vos_in": 1.818989e-12, + "gain_lf": 36.03274, + "ugf": 43998640.0, + "f3db": 692621.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..85e8dde3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 26400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 36.03274, + "ugf": 43998640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..e02f005b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +.ends C10_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..6b2e55c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C10_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..5cd57576 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..14985302 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW1_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C10_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 1.04, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8b6f51e6560bffce", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..87b17526 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "64795e82a9d3ef554f171879692ff94a939c87747790a62ad4ee274953fc600c", + "qualification.json": "f3ba9f8f9cf154acfe88c818be32f27339aadd60867507650da56b9487c4ec26", + "specs.json": "5ae72b25355176d41d71ad36ce4034aee1e312a279500f722c2d78ee02e75efc", + "target.spice": "8e835234c26426790a68caebe993a0cd92b0629b202748ab1c0a298c0faf4372", + "target_lvs.spice": "ea284d928097b0559c755851aeba0f72b16eb81c2a2d5bb6a9358ed86912e87f", + "testbench.spice": "4285c800cd38eff9d188abebc26027df913e55ddea473841b272588b5d889da7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..d5ae5437 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_ihp130_sW1_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8b6f51e6560bffce", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=33.42 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 18830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.41973, + "ugf": 31377570.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.5, + "schematic_measures": { + "vo1": 0.6018748, + "vo2": 0.6018748, + "idd": 8.686533e-05, + "vos_in": 0.0, + "gain_lf": 33.41973, + "ugf": 31377570.0, + "f3db": 667546.7 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..ee2a73f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 18830000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.41973, + "ugf": 31377570.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..ebbc5f13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=4u l=1.04u ng=8 m=1 +.ends C10_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..ef0f023f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +.ends C10_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..00af5a02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=1.04u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=4u l=1.04u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=4u l=1.04u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=4u l=1.04u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..06acbffd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C10_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.78, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.78, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0ea063e7887a656d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..0fb2fe65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "229d139fcd8a13577ef176cf1ac51927a77449232556959acfd21e414998f512", + "qualification.json": "4fc2960ffbc434bfecc238d849151e6e434cfa1d76ba047e78f2d2829912a04e", + "specs.json": "1ca06c2c0c09bacdaf735acda3dd09338a0840b7edbbc633c613a717e6160690", + "target.spice": "caf75fad400950d7482a86fc0e0292927f7d5ca2f8f5f1cec7114cb7839bd72c", + "target_lvs.spice": "118e9196b8ab8deb06081a840877a92f7fecebf67f324f492536996ae42162dc", + "testbench.spice": "6f0898995ecb13aa159439760d9126477a73b3bbca83f1fb7eefb4db4daaa303" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..d1097692 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.78, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0ea063e7887a656d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.56 + }, + "ugf": { + "min": 29300000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.55606, + "ugf": 48839540.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.9, + "schematic_measures": { + "vo1": 0.602577, + "vo2": 0.602577, + "idd": 8.765805e-05, + "vos_in": 2.091838e-11, + "gain_lf": 39.55606, + "ugf": 48839540.0, + "f3db": 512234.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..e7159f3e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.56 + }, + "ugf": { + "min": 29300000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.55606, + "ugf": 48839540.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..e064c76c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=8u l=0.78u ng=16 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=8u l=0.78u ng=16 m=1 +.ends C10_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c05caca4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f12 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f13 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f14 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM1_f15 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f12 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f13 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f14 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM2_f15 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.78u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f12 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f13 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f14 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f15 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f12 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f13 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f14 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f15 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f12 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f13 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f14 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f15 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f12 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f13 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f14 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM6_f15 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.78u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f12 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f13 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f14 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM7_f15 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f12 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f13 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f14 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM8_f15 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f12 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f13 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f14 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM9_f15 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f12 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f13 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f14 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +XM10_f15 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.78u +.ends C10_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..717d302b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.78u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=0.78u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=0.78u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=8u l=0.78u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..f4503223 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW2_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C10_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.52, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "05a65252be3caf9c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..2c279332 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "499926b5a88c6aff416b983794ed8d50342edc4cf3b0f8f998e736718fe49bf6", + "qualification.json": "8ba67335a4101f8b4cc0e0aaa9ec112046e18d6e26632674accb014ddd7f9b3d", + "specs.json": "c56c34bc985c4a043eb627553fb4a9d1a3e57abc90ccbda498cbb89b7ee6b41d", + "target.spice": "62190fc9a8e979e8b78ab78166444de230700d8fd7c26a0230feec1a2f92a1dc", + "target_lvs.spice": "2db9daa36bbe6795c069ee0270db6dc333aaab11fdb95dc6f5badd672255c23a", + "testbench.spice": "cce90279557b04f17cf683945a5711b8b735848d578450faf0aac04af37fb272" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..6998a22e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW2_sL1", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "05a65252be3caf9c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.51 + }, + "ugf": { + "min": 33870000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.50789, + "ugf": 56447740.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.9, + "schematic_measures": { + "vo1": 0.6026398, + "vo2": 0.6026398, + "idd": 8.581298e-05, + "vos_in": 0.0, + "gain_lf": 38.50789, + "ugf": 56447740.0, + "f3db": 668684.3 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..b8e2a54b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.51 + }, + "ugf": { + "min": 33870000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.50789, + "ugf": 56447740.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..54cec55e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +.ends C10_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..5498cbf7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f12 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f13 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f14 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f15 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f12 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f13 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f14 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f15 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f12 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f13 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f14 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f15 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f12 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f13 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f14 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f15 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f12 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f13 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f14 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f15 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f12 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f13 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f14 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f15 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f12 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f13 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f14 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM9_f15 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f12 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f13 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f14 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM10_f15 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C10_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..c84aaf5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..0151670f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_ihp130_sW2_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C10_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 1.04, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 1.04, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3d8989a11cd4e825", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..ee276045 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d56a032bef846447256e0dbeb078ce27104c046026881550d2452b093a3c85de", + "qualification.json": "f97f797a17f1e47493fef82dbc675b91e5816c7203982b28c53f19d87e27f2f9", + "specs.json": "15bc48e113ba3b9d78bd05aaf826deaf9b43b34fb343d68ebfa375fae8570e6e", + "target.spice": "434f0b7de135f015687579d91d831d7b0b97770228086d6040002d6fd237a87c", + "target_lvs.spice": "7cb6d1327360478d2a2ba07c72d5387639131e606d2b67e175618f1dcd59adae", + "testbench.spice": "0deb2f3b0ddf4e58d0c18b12250a8c007a01ab5592c87522164f2d7b17787275" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..e697d211 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_ihp130_sW2_sL2", + "circuit_id": "C10", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.52, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.04, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3d8989a11cd4e825", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.14 + }, + "ugf": { + "min": 24650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.13594, + "ugf": 41078900.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.5, + "schematic_measures": { + "vo1": 0.6025637, + "vo2": 0.6025637, + "idd": 8.841174e-05, + "vos_in": -9.09495e-13, + "gain_lf": 38.13594, + "ugf": 41078900.0, + "f3db": 507139.7 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..a32df4f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.14 + }, + "ugf": { + "min": 24650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.13594, + "ugf": 41078900.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..e70ba095 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +XM2 net018 VIN2 IB1 VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +XM3 net022 VB4 VSS VSS sg13_lv_nmos w=8u l=1.04u ng=16 m=1 +XM4 net018 VB4 VSS VSS sg13_lv_nmos w=8u l=1.04u ng=16 m=1 +XM5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=8u l=1.04u ng=16 m=1 +XM6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=8u l=1.04u ng=16 m=1 +XM7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +XM8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +XM9 net023 VB3 VDD VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +XM10 net021 VB3 VDD VDD sg13_lv_pmos w=8u l=1.04u ng=16 m=1 +.ends C10_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..0b090615 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f1 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f2 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f3 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f4 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f5 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f6 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f7 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f8 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f9 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f10 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f11 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f12 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f13 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f14 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM1_f15 net022 VIN1 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f0 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f1 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f2 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f3 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f4 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f5 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f6 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f7 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f8 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f9 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f10 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f11 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f12 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f13 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f14 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM2_f15 net018 VIN2 IB1 VDD sg13_lv_pmos w=0.5u l=1.04u +XM3_f0 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f6 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f7 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f8 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f9 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f10 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f11 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f12 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f13 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f14 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f15 net022 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f8 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f9 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f10 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f11 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f12 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f13 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f14 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f15 net018 VB4 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f4 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f5 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f6 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f7 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f8 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f9 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f10 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f11 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f12 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f13 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f14 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f15 VOUT1 VB1 net022 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f0 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f1 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f2 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f3 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f4 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f5 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f6 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f7 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f8 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f9 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f10 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f11 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f12 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f13 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f14 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM6_f15 VOUT2 VB1 net018 VSS sg13_lv_nmos w=0.5u l=1.04u +XM7_f0 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f1 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f2 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f3 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f4 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f5 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f6 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f7 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f8 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f9 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f10 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f11 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f12 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f13 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f14 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM7_f15 VOUT1 VB2 net023 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f0 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f1 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f2 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f3 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f4 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f5 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f6 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f7 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f8 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f9 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f10 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f11 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f12 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f13 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f14 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM8_f15 VOUT2 VB2 net021 VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f0 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f1 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f2 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f3 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f4 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f5 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f6 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f7 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f8 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f9 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f10 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f11 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f12 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f13 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f14 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM9_f15 net023 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f0 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f1 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f2 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f3 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f4 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f5 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f6 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f7 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f8 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f9 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f10 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f11 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f12 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f13 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f14 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +XM10_f15 net021 VB3 VDD VDD sg13_lv_pmos w=0.5u l=1.04u +.ends C10_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..66c3b825 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.36 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=1.04u +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sg13_lv_pmos w=8u l=1.04u +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sg13_lv_pmos w=8u l=1.04u +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sg13_lv_nmos w=8u l=1.04u +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.6) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..1bad990b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C10_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.9, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e2db45bf4d49b061", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..6c4498b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fdce4b323abbf627f9b1a2b78218627acaf1773bb8b1ed288c0b6776660f0c5b", + "qualification.json": "27e5cf500e79f473dbe82f0a83b3e942a6da37862c0f7aa7786a761ed8e04cfc", + "specs.json": "579f4970918a608dab5937bc09523057e9e5e9c8b5e912452f433acd070d9e52", + "target.spice": "a047cfebdf55a1f97c322823b08cce432f070d75b097d248d0fe4c65f9ce3746", + "target_lvs.spice": "f6060d5067dac89eefd43f8612d68ebe0b4236ec693a3488b7392d496938a2a7", + "testbench.spice": "5a728298e95fd3ff5c328c09f18cf91ff3a6cb109c6e545039fde0fd18bdb83f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..8906edbe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_sky130_sW0.5_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e2db45bf4d49b061", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=28.3 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 13000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.30011, + "ugf": 21671540.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.4, + "schematic_measures": { + "vo1": 0.9038703, + "vo2": 0.9038703, + "idd": 9.247186e-05, + "vos_in": 0.0, + "gain_lf": 28.30011, + "ugf": 21671540.0, + "f3db": 830977.5 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..6627153a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 13000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.30011, + "ugf": 21671540.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..f56d414b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.9 nf=4 +.ends C10_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a2698567 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +.ends C10_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..128467ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.9 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.9 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..e063c0de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C10_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ae35d796e7f3ce5a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..f7f38df3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9501f7528b7cc5ea56dfd2aea3e73031782b9fca17d9539b1eb2e8c5cb190453", + "qualification.json": "73f9fc919c7d9d91f6b2689afdbc6fbcdc71c81312ace194a542ef62e54962a3", + "specs.json": "2903d62825512e900b84bd930548fdb14ac78fde3863694d72705e790d361748", + "target.spice": "ddfa11ae615bc7433b177eff0e54d296272cebccea8809cd8737038f5dc26a65", + "target_lvs.spice": "de6922472be4a008019d18a2ccc990aabedd58dc6e50be191dcef6e68e12f2cf", + "testbench.spice": "5d6dc841eef4e316ca702b5436f25385b0b573d0574d57828e47d7259f7ff6d3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..94f2c1f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_sky130_sW0.5_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ae35d796e7f3ce5a", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=31.79 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 15880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.7936, + "ugf": 26458940.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.6, + "schematic_measures": { + "vo1": 0.9031849, + "vo2": 0.9031849, + "idd": 9.346657e-05, + "vos_in": 3.637979e-12, + "gain_lf": 31.7936, + "ugf": 26458940.0, + "f3db": 678087.9 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..d8f4a656 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 15880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 31.7936, + "ugf": 26458940.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..239778eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +.ends C10_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b68dcf65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C10_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..6bc71401 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..27d66940 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C10_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M7": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M9": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M10": { + "w": 2.0, + "l": 1.2, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c5068b3c22cce6c8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..3938eb34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fe759de3bb149443a9014350b319848f12dfd72ab9eb1c055afba6886c4dcc95", + "qualification.json": "226628d2f8ec0f5a3a44a5931d0704a688bff2f2075b20bfd57d8a189da9ff1c", + "specs.json": "899807e5df97eb4607dcf1a6e4a144f699598e577eabf7283cb4af27cafa4aa3", + "target.spice": "500823283e98e62ae12d6d006859cf3a59ba2d5d1807d822c558ff2e6020229a", + "target_lvs.spice": "7fe11a65f81211059cffe7a767ad36715695f641641178bc547e0418d42365cf", + "testbench.spice": "a3c209d3d8a41426d88d13cce8346ab454ef29b2ed369bd14d404dde71dbdeea" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..9612a992 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_sky130_sW0.5_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c5068b3c22cce6c8", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=24.99 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 11200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.98593, + "ugf": 18659840.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vo1": 0.903966, + "vo2": 0.903966, + "idd": 9.122761e-05, + "vos_in": -1.81899e-12, + "gain_lf": 24.98593, + "ugf": 18659840.0, + "f3db": 1048510.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..52f53abf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 11200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 24.98593, + "ugf": 18659840.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..5cffe803 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=1.2 nf=4 +.ends C10_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c0a3ab30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C10_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +.ends C10_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..e7220dec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=1.2 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=1.2 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..231026e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C10_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.9, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.9, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.9, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e77df1bf272837ab", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..d5268f54 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "85fcc7aa1a40b027bb2d12354d8d59cc085519372afcb993325cf10ec13effac", + "qualification.json": "47812c91925f82b8a1b1236477718cb886bbc2f37619e1943e36da2e0195bc7c", + "specs.json": "38b620c102e48f3324678339429b0b2a49a9997e61f371370e80573996902416", + "target.spice": "b8c289e871da82ee0cff5354b20b8a39733e655a0630665ff4f963cde62492d1", + "target_lvs.spice": "330b2fb0fdb5151aa29e751b84438a90044338383b35247ab05f9f1b27ad31d6", + "testbench.spice": "5416819f5c3b908c0c6a4890b11a968e586757e2f29d2530fbecc1a97af3c497" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..ae39c3d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW1.5_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.5, 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"min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..ab4a5567 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 nf=12 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 nf=12 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 nf=12 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 nf=12 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.9 nf=12 +.ends C10_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..195aa6fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 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VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f9 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f10 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f11 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f8 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f9 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f10 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f11 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +.ends C10_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..671756b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.9 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.9 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.9 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..be47d29f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C10_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 0.6, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5a570e4dc6968024", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..ec33bc2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e3bc3ecdf4a1fbc95bbc22944de72dc4e1e95fce2a6555139395018794cf09ee", + "qualification.json": "ac78897b53bc5925718cffad873227ce00bfa2de1277465b514a3e317330f36f", + "specs.json": "8e3d39047701d1bc9e8a37201eb23be3401cb4690c7567ac885c4af5743b04fb", + "target.spice": "4487198e27a36a6b073e6dc283ba4fe92b9f0bd7219594e5f8d6035e070e00a0", + "target_lvs.spice": "1865c85b5d61a05a93a340f4d246c48c633bb81ccc0eb26b512d78c3da904b62", + "testbench.spice": "6265f19b2f37b918e00c651f35fb9116128ee0cfa24a8794c5b4b02eeb4bc4ed" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..a264238e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW1.5_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5a570e4dc6968024", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.24 + }, + "ugf": { + "min": 22370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.24251, + "ugf": 37287640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.6, + "schematic_measures": { + "vo1": 0.9041499, + "vo2": 0.9041499, + "idd": 0.0001118322, + "vos_in": 0.0, + "gain_lf": 41.24251, + "ugf": 37287640.0, + "f3db": 321902.3 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..8a093e51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.24 + }, + "ugf": { + "min": 22370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.24251, + "ugf": 37287640.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..19c1f41b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +.ends C10_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b6c1d8ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f8 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f9 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f10 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f11 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f8 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f9 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f10 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f11 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f8 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f9 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f10 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f11 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f8 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f9 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f10 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f11 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C10_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..af7db11d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..0092d6ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C10_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M5": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M6": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M7": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M9": { + "w": 6.0, + "l": 1.2, + "nf": 12 + }, + "M10": { + "w": 6.0, + "l": 1.2, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 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}, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..b1873757 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "35ba95b759c4c3758b35adaa71e3500ac1b9231a8ed88db8e563255d081da170", + "qualification.json": "792224f0a2e9ae5c7d6a94dfb1c923f4c2492aad3d5ad12321efc985f0c3a906", + "specs.json": "162b878192867ccc75cb37a65a25c2891f0c95e9b269a4d7143b6bcde99b8c5b", + "target.spice": "a1af3bc82ac629b9df6223efea83f42342ba0e35e40a52e933bca6a42274f023", + "target_lvs.spice": "810c212a35edac45301cc88728d503ccfaaf85803a29562a9957b3331e4428a0", + "testbench.spice": "bfb12f6c4e90a41ea7d50497b5ea449530ce65ba97ddb5c6f1d740d655de0ff2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..665249dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW1.5_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.2, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3c07779a6f1822cc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 16980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.05462, + "ugf": 28302730.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vo1": 0.9046205, + "vo2": 0.9046205, + "idd": 0.0001059207, + "vos_in": -3.63798e-12, + "gain_lf": 37.05462, + "ugf": 28302730.0, + "f3db": 396235.1 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..9b6058e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 16980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 37.05462, + "ugf": 28302730.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..df16d057 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 nf=12 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=1.2 nf=12 +.ends C10_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..06bdf5ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,122 @@ +.subckt C10_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f8 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f9 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f10 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f11 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f8 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f9 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f10 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f11 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 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w=0.5 l=1.2 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f8 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f9 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f10 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f11 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f8 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f9 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f10 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f11 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f8 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f9 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f10 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f11 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f8 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f9 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f10 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f11 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +.ends C10_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..77c6b180 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=1.2 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=1.2 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=1.2 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..f18c3e73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C10_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.9, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "016bed964adb8f5a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..9e8d0e1a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "93987e2c5ee7b374bc6ff959fda9b2002b6858150fd6e170ff4d4eb2b94ec91f", + "qualification.json": "6f32c97e670404c74467f8839e1bad8fe4d4febbf8710a0a38404e5cd3f73376", + "specs.json": "a66e8770b3b57afc96d4fc5c0734e036fcfdf97317bd523bc8d09aa180c192c4", + "target.spice": "75629d115571fa0802700331a9ea40be02cbd84ad1cb0a029e33c1cf1dbacfbf", + "target_lvs.spice": "09cb90f55948bf097aa8fd930e3b9373b61d6834af836046c35589aef6f56632", + "testbench.spice": "1044c77e3d9a266f65807abe957701e0480ba337b31c5ac8e3e0e4a71cf856e5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..ef149c68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW1_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "016bed964adb8f5a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 17280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.65616, + "ugf": 28796160.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.7, + "schematic_measures": { + "vo1": 0.9039441, + "vo2": 0.9039441, + "idd": 0.0001006574, + "vos_in": -1.81899e-12, + "gain_lf": 35.65616, + "ugf": 28796160.0, + "f3db": 473269.6 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..4c41ee99 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 17280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.65616, + "ugf": 28796160.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..2e45d4c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.9 nf=8 +.ends C10_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..b2476343 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f4 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f5 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f6 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f7 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f5 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +.ends C10_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..5b0d446f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.9 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.9 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..e539f6d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C10_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + 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source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..f6d837f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c98aca59fab807f9300238faa1131db6ef630bdb2b648095e9ddc8f277604219", + "qualification.json": "93c56b379608765a86b6c23ae8d9b73059e775c2d730b97bce6635e1d44e5005", + "specs.json": "11f81092ff1e3b344abe1b015e50a2ee35d62eb72b5af3217e06f5a52ddf3d80", + "target.spice": "5cd31e3a4c609ee6e591d81e57afe693482b4fc16b1eec47780e0e048e7814fb", + "target_lvs.spice": "e4ec8ec8644a4c6e49e21f3f17307c71c7e898ac6af44fb7575dc77e5c2714a0", + "testbench.spice": "79f7bb031d0fc220f5dad96d325ff8dad682a53be252aa860aefcab893e768fb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..c6060024 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW1_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + 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"testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..827b59c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.92 + }, + "ugf": { + "min": 20810000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.92104, + "ugf": 34675090.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..cf69d297 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +.ends C10_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..fd29a382 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C10_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..d7adfeba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..dbe3d9c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW1_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C10_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 1.2, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "554daf197d6a22ee", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..57c738c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c8a40648f5aa465976a3bb53ddff242678ac753cf8368af891e433441d4a5cff", + "qualification.json": "82ecfd8d05f1cce4199d9c7b7c284bfb76ecd460fba7f2898d6ec8ad680f61f5", + "specs.json": "22391bb2d456c697dd9760027f8ff70c6f258ce7374468c2ca337ed430019a20", + "target.spice": "3e63d0d7a9a8a4db98195d054e1971d7e25fb9cf1328ec48317dff9f91f84dc0", + "target_lvs.spice": "8a1c122b19c7e221a22ab39c11965e828d62eb4bd17058c57b6abf83e2a8ae43", + "testbench.spice": "f90a799224e8b9ddabe2d79a502390a453961ac5b0631496d23ecb5d122fbc78" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..009cd5e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/qualification.json @@ -0,0 +1,182 @@ +{ + "case_id": "C10_sky130_sW1_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "554daf197d6a22ee", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=33.8 below floor 35" + ], + "spec": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 14790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.80061, + "ugf": 24651180.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.5, + "schematic_measures": { + "vo1": 0.9041324, + "vo2": 0.9041324, + "idd": 9.880095e-05, + "vos_in": 1.818989e-12, + "gain_lf": 33.80061, + "ugf": 24651180.0, + "f3db": 501697.7 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..cccb16b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 14790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 33.80061, + "ugf": 24651180.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..93ba1f45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=1.2 nf=8 +.ends C10_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..74167dcd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C10_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f4 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f5 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f6 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f7 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f5 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +.ends C10_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..8f2f575b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=1.2 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=1.2 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..7af1e9d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C10_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.9, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.9, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "db5926e088d11aed", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..6df55539 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "32cbdfc1870082c29129249ada700d77e33e2f1e2f07b30ccd9ee24d4f07e2e1", + "qualification.json": "a8d1528d1b221bf06d0885d922728f47b8c76e4574cedef2e94b13a73d8c394f", + "specs.json": "f7ee2c3a581e6243246cd0f3f3c62996b8a8e9aac62ae8f64de184370a11db99", + "target.spice": "705f24be49763488e429d6e6853a3d59e35b2ff337d75b3592c37e85ce9731a0", + "target_lvs.spice": "d3c2f5dd913569703e6174b71761263fbb1471b4b5ee67d33d956b41dcf7e7c2", + "testbench.spice": "f0ccf693e3878c2896be61b0413bf80ee325de50ddc5a98c36b0fdd50600cbc4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..023f8bd5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW2_sL1.5", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.9, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "db5926e088d11aed", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.21 + }, + "ugf": { + "min": 20400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.21398, + "ugf": 33994410.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.4, + "schematic_measures": { + "vo1": 0.9051101, + "vo2": 0.9051101, + "idd": 0.0001152521, + "vos_in": -3.63798e-12, + "gain_lf": 39.21398, + "ugf": 33994410.0, + "f3db": 370679.4 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..95847d04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.21 + }, + "ugf": { + "min": 20400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.21398, + "ugf": 33994410.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..8e1502d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 nf=16 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 nf=16 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 nf=16 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 nf=16 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.9 nf=16 +.ends C10_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..c7ae2c05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 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sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f8 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f9 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f10 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f11 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f12 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f13 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f14 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM7_f15 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f12 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f13 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f14 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM8_f15 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f12 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f13 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f14 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM9_f15 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f12 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f13 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f14 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +XM10_f15 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.9 +.ends C10_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..bc9ae448 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.9 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.9 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.9 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..3ebaff1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW2_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C10_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 0.6, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7e08dbb075cd10c8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..bc4dcf6e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f9fcd5c748ea27f89959b5d8fd543514afe95d084658c469af43fa9ea3a584af", + "qualification.json": "3e567fcdd67a11c603b233c0d0cd6fd131c4f2ad6e299a7bc3761e018dadda92", + "specs.json": "3e2cb60001b7bbabd2b947c601413e970bd6391a07a9db06e1c32fe9a2b130e8", + "target.spice": "bbc867e42583aeeb444f38027915f1a31640f2e4db720a88eb20a43ffa6ad2f5", + "target_lvs.spice": "2d6d8cce7a79656231d0263606374e23062e90fb2aa046bb43822da112c919aa", + "testbench.spice": "30f6edc3b02481b276f30ecc1dc9d6e1bf9ca2de0aba26f02b7f6aefcd4345e2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..ddf80ec9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW2_sL1", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7e08dbb075cd10c8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.78 + }, + "ugf": { + "min": 22660000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.78135, + "ugf": 37772910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.8, + "schematic_measures": { + "vo1": 0.9049236, + "vo2": 0.9049236, + "idd": 0.0001190659, + "vos_in": -1.81899e-12, + "gain_lf": 38.78135, + "ugf": 37772910.0, + "f3db": 432885.8 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..e5c8cdba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.78 + }, + "ugf": { + "min": 22660000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.78135, + "ugf": 37772910.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..a2fe6376 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +.ends C10_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..7100aeb0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f8 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f9 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f10 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f11 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f12 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f13 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f14 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f15 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 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sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f12 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f13 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f14 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f15 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f12 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f13 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f14 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM9_f15 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f12 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f13 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f14 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM10_f15 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C10_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..7ee6b98c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..b9e5cde7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/case.json @@ -0,0 +1,303 @@ +{ + "case_id": "C10_sky130_sW2_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C10_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1", + "VB2", + "VB3", + "VB4", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M6": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M7": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M9": { + "w": 8.0, + "l": 1.2, + "nf": 16 + }, + "M10": { + "w": 8.0, + "l": 1.2, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "category": "ota_fd", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8aa0b696ebfac126", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M5", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB2", + "replica_of": "M7", + "current_A": 2e-05, + "variant": "cascode3" + }, + { + "kind": "replica_bias", + "port": "VB3", + "replica_of": "M9", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "replica_bias", + "port": "VB4", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VDD" + }, + { + "kind": "testbench_element", + "what": "ideal common-mode feedback on VB4" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "M9", + "M10" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..444d12d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4f1f2da238b76af765497d9b0b5f0ffa15c58ae97055d51813bdf31a10268e99", + "qualification.json": "343c1d129d81abf70f5883b2462a46ad7ad210335b2a3a6cb528120daf23af55", + "specs.json": "0590d9ea9e1451fbaa9682d101f683e4308ef29ac6056c56c59cb41f131ff744", + "target.spice": "845914b4b3d4291b37930490bd52d8ddd9a9f604177861ee03af3f00f5784aca", + "target_lvs.spice": "ec26076f21b5fd3ca98cb1e6ba7ac72957d76069be6533d64b202c24603cfb6f", + "testbench.spice": "50355bafe27b5e7a8aaab169c333c8bc02eab6ffe2778a03f89dc60a40cfe7c7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..fd0e3d42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/qualification.json @@ -0,0 +1,180 @@ +{ + "case_id": "C10_sky130_sW2_sL2", + "circuit_id": "C10", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "ota_fd", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M9": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M10": { + "w0": 4.0, + "l0": 0.6, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.2, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8aa0b696ebfac126", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 35.86 + }, + "ugf": { + "min": 18450000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.86216, + "ugf": 30752370.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.3, + "schematic_measures": { + "vo1": 0.9052035, + "vo2": 0.9052035, + "idd": 0.0001121763, + "vos_in": 3.637979e-12, + "gain_lf": 38.86216, + "ugf": 30752370.0, + "f3db": 349260.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..89f8d732 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 35.86 + }, + "ugf": { + "min": 18450000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 38.86216, + "ugf": 30752370.0 + }, + "floors": { + "gain_lf": { + "min": 35.0 + }, + "ugf": { + "min": 5000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..f782e3a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C10_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +XM2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +XM3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 nf=16 +XM7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +XM8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +XM9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +XM10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=1.2 nf=16 +.ends C10_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..1e44f374 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,162 @@ +.subckt C10_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 +XM1_f0 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f1 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f2 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f3 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f4 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f5 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f6 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f7 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f8 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f9 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f10 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f11 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f12 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f13 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f14 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM1_f15 net022 VIN1 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f0 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f1 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f2 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f3 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f4 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f5 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f6 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f7 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f8 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f9 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f10 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f11 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f12 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f13 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f14 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM2_f15 net018 VIN2 IB1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM3_f0 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f4 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f5 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f6 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f7 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f8 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f9 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f10 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f11 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f12 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f13 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f14 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f15 net022 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f4 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f5 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f6 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f7 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f8 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f9 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f10 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f11 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f12 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f13 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f14 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f15 net018 VB4 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f0 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f1 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f2 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f3 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f4 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f5 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f6 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f7 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f8 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f9 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f10 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f11 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f12 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f13 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f14 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM5_f15 VOUT1 VB1 net022 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f0 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f1 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f2 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f3 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f4 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f5 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f6 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f7 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f8 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f9 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f10 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f11 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f12 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f13 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f14 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM6_f15 VOUT2 VB1 net018 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM7_f0 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f1 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f2 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f3 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f4 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f5 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f6 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f7 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f8 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f9 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f10 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f11 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f12 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f13 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f14 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM7_f15 VOUT1 VB2 net023 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f0 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f1 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f2 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f3 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f4 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f5 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f6 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f7 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f8 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f9 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f10 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f11 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f12 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f13 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f14 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM8_f15 VOUT2 VB2 net021 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f0 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f1 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f2 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f3 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f4 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f5 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f6 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f7 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f8 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f9 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f10 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f11 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f12 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f13 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f14 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM9_f15 net023 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f0 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f1 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f2 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f3 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f4 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f5 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f6 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f7 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f8 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f9 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f10 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f11 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f12 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f13 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f14 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +XM10_f15 net021 VB3 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=1.2 +.ends C10_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..2a3b0dcc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C10/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,48 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 VB2 VB3 VB4 IB1 C10_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 VDD IB1 4e-05 +.nodeset v(IB1)=0.54 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 +IB_VB1 VDDB VB1 0.00018 +XB_VB2 VB2 VB2 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=1.2 +IB_VB2 VB2 VSS 0.00018 +XB_VB3 VB3 VB3 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=1.2 +IB_VB3 VB3 VSS 2e-05 +XB_VB4n VB4n VB4n VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=1.2 +IB_VB4n VDDB VB4n 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 5e-13 +CL2 VOUT2 0 5e-13 +BCMFB VB4 0 V = v(VB4n) + 20*((v(VOUT1)+v(VOUT2))/2 - 0.9) +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +meas ac ugf when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..9bba558f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C11_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "30a2cf3b9ee09c6e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..1603ccf7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9eeab4e76b6301282bfa9fdad44a2c4b4e5a3ceaa5185fbec1350eaa022d3658", + "qualification.json": "27e6fbf769e4de3bd79f39c80187196891a5555bc3e1619240ce362eb4d6afcb", + "specs.json": "1a13b3867a270554a7ca498c92f8f98060eb966cc0d694fbbead78ac858fc99f", + "target.spice": "81d29bb394d53687905696750bd29774dac6a38529ff90671c82be6ed14ec75b", + "target_lvs.spice": "de90d0f744b61c6a2df64d74287cdfefd43c872bad88ede79f785dabd31c4894", + "testbench.spice": "8e99eafe9793235ba67abdcf785e656de6bc6e895e601cdcda272d3965f8f60b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..7529a983 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "30a2cf3b9ee09c6e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 70.86 + }, + "ugf": { + "min": 3684000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.86129, + "ugf": 6139199.0, + "pm": 63.546246409999995 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 8.74172e-05, + "vos": 0.001506027, + "gain_lf": 73.86129, + "ph_lf": -0.01194641, + "ugf": 6139199.0, + "ph_ugf": -116.4657, + "f3db": 1278.467, + "pm": 63.546246409999995 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..e2ee1d66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 70.86 + }, + "ugf": { + "min": 3684000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.86129, + "ugf": 6139199.0, + "pm": 63.546246409999995 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..e59fcc79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..e1f704fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..83d1c853 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..5ce150a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C11_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "53f95ae2cd8a5d4a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..d098a129 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1e2c7f7118fea9c37848788d680808e993b7cb81b37d3a6ac81efcc4b62d2176", + "qualification.json": "627c71449806493a58e8597fffa3b2e3246a3bf7619760be577603365d59106b", + "specs.json": "e401b51bb4628fe52e47b41be5000c78a2e12b646675c4b4640af8b672d29072", + "target.spice": "c9df9462b255b6f5d9412965b1996850040131b47a995ac61bb2290780d06bd8", + "target_lvs.spice": "825957f24e7bc69600ff080b7354a5cc995a4aba5996672f584786bb2884906f", + "testbench.spice": "de093c8ac0af609a6f97b5a1c28cbf4bb2a1b227cf64ed655cfa24ef88909821" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..b0de0091 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "53f95ae2cd8a5d4a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 65.48 + }, + "ugf": { + "min": 4984000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.48272, + "ugf": 8307234.0, + "pm": 62.6064719 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.347894e-05, + "vos": 0.0008384993, + "gain_lf": 68.48272, + "ph_lf": 0.6402281, + "ugf": 8307234.0, + "ph_ugf": -116.7533, + "f3db": 3225.827, + "pm": 62.6064719 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..bc5ca718 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 65.48 + }, + "ugf": { + "min": 4984000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.48272, + "ugf": 8307234.0, + "pm": 62.6064719 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..8cac2e7c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..e513c58b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..c7c41030 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..cf591c1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C11_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8c0111900cefe3a9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..912b8077 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f10648a219ec4190ce2124b3c6cb20c1f3b8eae1785b7e8a2037f5a92e69939d", + "qualification.json": "cbf145abb4cdede709a79fcdf53e228972c49a7bb8b243eda51eb8beb59dc907", + "specs.json": "e90d033674776ef2f5cd8c8baa68974b1fdf12dce32fc1d1e5d4c047afa6640b", + "target.spice": "1f48e06e8160cc85f9174f038fc57060279140ab56fad165e1013bbcc4ce0521", + "target_lvs.spice": "ea015ed3f101330ea076d0a120a55229d3ce8bb176772da92bfb13a16013efb6", + "testbench.spice": "113ae46b5ca3caf284b7ab07ed09babc879937e6a1b3d9198a87ae17aa8dc624" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..5b5d7e61 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8c0111900cefe3a9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 73.58 + }, + "ugf": { + "min": 2935000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 76.58088, + "ugf": 4891370.0, + "pm": 66.238562 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 1.65, + "idd": 8.309113e-05, + "vos": 0.001951382, + "gain_lf": 76.58088, + "ph_lf": -1.626862, + "ugf": 4891370.0, + "ph_ugf": -115.3883, + "f3db": 10.46153, + "pm": 66.238562 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..deefe4af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 73.58 + }, + "ugf": { + "min": 2935000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 76.58088, + "ugf": 4891370.0, + "pm": 66.238562 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..17b13001 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e71420cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..2a44c217 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..7c6f6c5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C11_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "374a28d6ec0f1425", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..e7427bbb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "10e22fe2a487334f88022ad463f8b8ca0eb2c6a512ae337f2a00c333e99b7171", + "qualification.json": "dc69c2cfda3e04f20c0203bda0a82a2a592b9c76745f843ce1487a48a4b869a6", + "specs.json": "02f3598cdd38da05d8307f224f587f39376a19ad33a9ae93d3e4a5eee1621a96", + "target.spice": "26d6fbabfb2d00ff9b104cea696dea8847c7a366189fa6018caffc42a66cbba7", + "target_lvs.spice": "6878724b55340c53416371db3925c68d362086218b144a1de819a28bae04d410", + "testbench.spice": "55defad97130cfa44276c765e55870512e689c4813e68a03736dcd0d9b45b3d5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..fbc66008 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "374a28d6ec0f1425", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 78.27 + }, + "ugf": { + "min": 7628000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 81.26861, + "ugf": 12712850.0, + "pm": 59.506123 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.88841e-05, + "vos": 3.760084e-05, + "gain_lf": 81.26861, + "ph_lf": 5.590777, + "ugf": 12712850.0, + "ph_ugf": -114.9031, + "f3db": 18.11987, + "pm": 59.506123 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..be219195 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 78.27 + }, + "ugf": { + "min": 7628000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 81.26861, + "ugf": 12712850.0, + "pm": 59.506123 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..f2936309 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=3u l=0.84u nf=6 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..0cf1b0e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a2d0003b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..b12d8903 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C11_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a8a036a8bd0a1d5a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..158476cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0c7e678c5b66889ca40cb3ca76cdcea8f53327e44dd7fb7248e7cb7773f27047", + "qualification.json": "55422b56a41007431d8f85f9dc674629c6a22031395e9db8990e94280597f678", + "specs.json": "aeba66a86cdd15e4ac02ac43aabcfc88671e74dddeb2eadee07bd30eceb7cd0f", + "target.spice": "49280663629de5ec093c5bb553dbd6618b68f8ffc235eac7874c6eb3a94714a7", + "target_lvs.spice": "8b6a3fa9e78e41072f5773b64f733285152888eb59bac750d92bcdcb4e56ba9c", + "testbench.spice": "987e68e285a455e6a9ccaa74e4c216912361fa59237a65402d0fa726ba91a0bc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..b06e6c8c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a8a036a8bd0a1d5a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 72.66 + }, + "ugf": { + "min": 9590000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 75.65867, + "ugf": 15982530.0, + "pm": 65.109734 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.935793e-05, + "vos": 1.32633e-05, + "gain_lf": 75.65867, + "ph_lf": 3.469366, + "ugf": 15982530.0, + "ph_ugf": -111.4209, + "f3db": 2784.256, + "pm": 65.109734 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..dcdea6b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 72.66 + }, + "ugf": { + "min": 9590000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 75.65867, + "ugf": 15982530.0, + "pm": 65.109734 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..e2e95bd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=3u l=0.56u nf=6 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ea10ad71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..0fb426d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..3d95b47a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C11_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "593f571f82dba8c2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..00753bc3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f85d836d76a88574c4670f0d1a975ed0a7952d7694d136ea83c628735ef5a447", + "qualification.json": "95061b94251a037b187813465281169a6c456a1c84de23b214c98938bf794c98", + "specs.json": "79460521e1bd05748074136cdc304705561215aecb7bf16b311cdebbec5f16f5", + "target.spice": "70fe4230b7813279958669b46b85e22f7d82d7bfff320e487c5299a6c39588ab", + "target_lvs.spice": "2c1171b0fc1357cd96c17af59bc887245dff0575e3997f065650bd7e7e05f7c3", + "testbench.spice": "39e4aa991d9820be3320bf1d9857c00aa6b6c9738d63adf6fadfe8721b3b89b9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..d57c1e42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "593f571f82dba8c2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 80.9 + }, + "ugf": { + "min": 6471000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 83.90365, + "ugf": 10785700.0, + "pm": 56.909099 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.793855e-05, + "vos": 8.268192e-05, + "gain_lf": 83.90365, + "ph_lf": 6.323901, + "ugf": 10785700.0, + "ph_ugf": -116.767, + "f3db": 24.11151, + "pm": 56.909099 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..8df69887 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 80.9 + }, + "ugf": { + "min": 6471000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 83.90365, + "ugf": 10785700.0, + "pm": 56.909099 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..df1b4308 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b50374ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..08a6c444 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..51535aff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C11_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "70a5e2c282688cde", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..74c2e643 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6ada1e8f5a862f6154446353e9f83c413fb0073f0bdbe11f03fe6917530c968b", + "qualification.json": "3145b2c89abf376c7361dffc91ee899bec2aa29c57e601c17f670f4da229af01", + "specs.json": "aeb1b518ee25b62cf829db831ef0a8dc3c504fbda21054fc065f67d91357d9ed", + "target.spice": "267cba317352fe970b70da7a9d6cc261eb1c52b46b60ee31d6b48621bbe74ab0", + "target_lvs.spice": "55970a8f472be56868bd7cb63c4dc5acecd388ed9eebf6203861910d1b51c698", + "testbench.spice": "3b05d7ef100c6ef1e3c9e1aaec6e71da9b48ac99cbfad63ef990d2783342205c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..b1186cb0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "70a5e2c282688cde", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 75.59 + }, + "ugf": { + "min": 6033000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 78.59393, + "ugf": 10055800.0, + "pm": 60.540797 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.683367e-05, + "vos": 0.0001905323, + "gain_lf": 78.59393, + "ph_lf": 3.096203, + "ugf": 10055800.0, + "ph_ugf": -116.363, + "f3db": 13.43361, + "pm": 60.540797 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..a6bbd4bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 75.59 + }, + "ugf": { + "min": 6033000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 78.59393, + "ugf": 10055800.0, + "pm": 60.540797 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..a31e8d2b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..0c85c4da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..23b97693 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..f2202119 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C11_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8b4b65717367801b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..3f6c0189 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f00c153d993550ab6e2f5944d72334de508ddd23718d9dfc3ed595940314d3dd", + "qualification.json": "c85ee2b8f3aced5c06fe724c1d3b5eeabb9595283e6c72fe74326772e7bf9f92", + "specs.json": "1eb582e201079d2b094d4b24c5d68f5245a4659b8cd091862be61e357efdf29e", + "target.spice": "751ac652330c12dabd718b14217431ed58b6e278241c72a64ae4eeb8efa881cb", + "target_lvs.spice": "4ab49ff7ffce578df04db695e1845f613197211d20b5e2890c48f9ba87c09248", + "testbench.spice": "7024c7f939214aa9eb0dddabfd191033fc0b808e6062c40176e936df1c1321f3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..7ba830c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8b4b65717367801b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 70.18 + }, + "ugf": { + "min": 7692000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.18377, + "ugf": 12819770.0, + "pm": 63.88807100000001 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.862901e-05, + "vos": 6.958778e-05, + "gain_lf": 73.18377, + "ph_lf": 2.213129, + "ugf": 12819770.0, + "ph_ugf": -113.8988, + "f3db": 2946.208, + "pm": 63.88807100000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..989e52a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 70.18 + }, + "ugf": { + "min": 7692000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.18377, + "ugf": 12819770.0, + "pm": 63.88807100000001 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..a1b04f8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..a6e21533 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..6b2b79d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..9b95d78e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW1_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C11_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7c4a5bbbb66c5162", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..b439f0a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ee8a563ac6133b59254ab8ccd3f5e5d53d852b7df47b04a1fb04e25031397f0d", + "qualification.json": "b7b7dd035240321924ed6f7dbf6b32627ffda2d9e4e5ee01a34dc173118b6628", + "specs.json": "5a570e5303d96ab3fb1ef64b097f5e474dfa4d214bc7cb4c51330628d9149fc0", + "target.spice": "d7ad406688e38f6fd77c0498560a44558924b978549de227945b794a1d9dbc9a", + "target_lvs.spice": "9d1710ba9c11a5448a1624a3c496fbed014bd092e828d8ab81bc9f179a5c3359", + "testbench.spice": "c148960d023d12c15716bd64ca45eeefacb48874c70d99953b2e423f882cb9cc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..5235c360 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW1_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7c4a5bbbb66c5162", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 78.41 + }, + "ugf": { + "min": 4980000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 81.40751, + "ugf": 8300766.0, + "pm": 60.156407 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.360237e-05, + "vos": 0.0004053435, + "gain_lf": 81.40751, + "ph_lf": 2.854793, + "ugf": 8300766.0, + "ph_ugf": -116.9888, + "f3db": 18.29642, + "pm": 60.156407 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..878a883c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 78.41 + }, + "ugf": { + "min": 4980000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 81.40751, + "ugf": 8300766.0, + "pm": 60.156407 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..e4eed142 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..aa8fc8a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..6b676b5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..f7521fe8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C11_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c8c4c93e8c03f24a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..64a588dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "090a94343bb98ab9e6d7ccf6ff90792e0a8688fb29a70f50e3966c690bf7f800", + "qualification.json": "0654fbe7d9d4b39d775c5c23cdd56726fee4adaa986a92473d0eadd720e5e9d9", + "specs.json": "b88575f9c00ee52528d90ba71b385e032a241c753b46d989934215e745aa4fa4", + "target.spice": "ef2ecef0716d265b1724302c21b8ca22c097835bd43f461aff2e7ae5c7c6ec52", + "target_lvs.spice": "21c9606b8503c3a558fa8ca0288f8e343fc32d6b189bbdb9ac4b33cafbca0627", + "testbench.spice": "63b94310f53d66bfaa7589ce3cdabe485ed9ab35d3ad5bb035f797ede6fb49cc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..3e877c1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c8c4c93e8c03f24a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 80.03 + }, + "ugf": { + "min": 8890000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 83.02858, + "ugf": 14815990.0, + "pm": 58.66306 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.933259e-05, + "vos": 1.36988e-05, + "gain_lf": 83.02858, + "ph_lf": 7.74254, + "ugf": 14815990.0, + "ph_ugf": -113.5944, + "f3db": 22.00551, + "pm": 58.66306 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..05470585 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 80.03 + }, + "ugf": { + "min": 8890000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 83.02858, + "ugf": 14815990.0, + "pm": 58.66306 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..80b8c5aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..54a4236a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f6 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM1_f7 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f12 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f13 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f14 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f15 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f12 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f13 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f14 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM3_f15 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f6 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM6_f7 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f12 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f13 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f14 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM7_f15 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f12 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f13 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f14 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM8_f15 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..2839f924 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..8279a6f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW2_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C11_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c1b2b26fcf3b72e6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..da176c58 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "108dc5de7ce60acd3882197c9535692253fe90b817d264bbb43565094f1cc6dd", + "qualification.json": "90dc561a948f7fc274d593afa573ee07bd40986959f97aa8670bc7fb2c53fc53", + "specs.json": "e8c5d67222c6cfaf2aaa32bc225f8a24a6e6af9a40a2631dbc3547f57b8645a2", + "target.spice": "a041eb6b9a9c6e0796fa480af418339e8255639f0e6794e9cb231578bc22b74c", + "target_lvs.spice": "d64984de073eb31c73b4ce11f6460215b5370ad419c38d58e3a06c7aa2fce51a", + "testbench.spice": "89862bcc88f8db0d61bda33203c817911d5ad7c923a5f33af06c1c6323c46a92" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..010c4025 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW2_sL1", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c1b2b26fcf3b72e6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 74.19 + }, + "ugf": { + "min": 11160000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 77.19261, + "ugf": 18596840.0, + "pm": 65.895181 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.97155e-05, + "vos": -4.51224e-06, + "gain_lf": 77.19261, + "ph_lf": 4.491219, + "ugf": 18596840.0, + "ph_ugf": -109.6136, + "f3db": 11.48645, + "pm": 65.895181 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..67cb90f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 74.19 + }, + "ugf": { + "min": 11160000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 77.19261, + "ugf": 18596840.0, + "pm": 65.895181 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..9dc8f89f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..8422330a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f6 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM1_f7 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f12 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f13 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f14 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f15 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f12 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f13 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f14 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM3_f15 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 net014 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f6 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM6_f7 net016 net014 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f12 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f13 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f14 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM7_f15 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f12 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f13 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f14 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM8_f15 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..83549c6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..2b1cd507 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_gf180_sW2_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C11_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f8af15a1bc1ae4d7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..81831579 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cd8d54f85e430cc16fc443acb2c3ce571314ab31018762e850f0cabd1360ceda", + "qualification.json": "b6624f81ab6544aef9c5d9a5634370321039f50da5f79a0ffdbee01a733e37b8", + "specs.json": "2783337f98354b6977ed00f087622d98c7fd7a516f03bbcba43479ac8161d01b", + "target.spice": "c7033999cbe2416eb32cde66e1755bf1330d6b47aed8da27e437e87d8b510d32", + "target_lvs.spice": "c49a6a2c371334b95bb217a54e18614141cfa18fbf68b4bec16bef1cd39a973a", + "testbench.spice": "865460d1d9c7a2476b5bf01f766e80e9da4557bb4cd3a0f4571ef0b7881501ac" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..ef9d3e75 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_gf180_sW2_sL2", + "circuit_id": "C11", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f8af15a1bc1ae4d7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 82.63 + }, + "ugf": { + "min": 7580000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 85.63474, + "ugf": 12633350.0, + "pm": 54.78100499999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "vout0": 1.65, + "idd": 9.905801e-05, + "vos": 2.397089e-05, + "gain_lf": 85.63474, + "ph_lf": 9.230995, + "ugf": 12633350.0, + "ph_ugf": -115.988, + "f3db": 29.00301, + "pm": 54.78100499999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..774248ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 82.63 + }, + "ugf": { + "min": 7580000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 85.63474, + "ugf": 12633350.0, + "pm": 54.78100499999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..895d61ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1 IB1 IB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net97 IB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net014 VIN1 net97 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 net016 VIN2 net97 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM5 net014 net014 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM6 net016 net014 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM7 VOUT1 IB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM8 VOUT1 net016 VSS VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +XRR1 net016 net022 VSS ppolyf_u r_width=1u r_length=7.795u +XCC1 net022 VOUT1 cap_mim_2f0fF c_width=22.365u c_length=22.365u +.ends C11_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..3969029b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +MM1_f0 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f2 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f3 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f4 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f5 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f6 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM1_f7 IB1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f0 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f12 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f13 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f14 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f15 net97 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f1 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f2 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f3 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f4 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f5 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f6 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f7 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f8 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f9 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f10 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f11 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f12 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f13 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f14 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM3_f15 net014 VIN1 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f0 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 net016 VIN2 net97 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 net014 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f1 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f2 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f3 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f4 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f5 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f6 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM6_f7 net016 net014 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM7_f0 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f1 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f2 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f3 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f4 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f5 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f6 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f7 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f8 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f9 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f10 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f11 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f12 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f13 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f14 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM7_f15 VOUT1 IB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM8_f0 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f1 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f2 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f3 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f4 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f5 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f6 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f7 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f8 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f9 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f10 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f11 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f12 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f13 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f14 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM8_f15 VOUT1 net016 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 net016 net022 VSS ppolyf_u L=7.795u W=1u +CC1 net022 VOUT1 cap_mim_2f0_m4m5_noshield W=22.365u L=22.365u +.ends C11_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..a93083a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.32 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 1.65 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..22146b16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C11_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "68fe1c7fac0a4350", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..4390d100 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5a4951c90d78ce862f841d943fb5d1434818d95a39dd28887bcb825ef4e18385", + "qualification.json": "481719e6132bd06be8e20bd762c26ad03346cb04098ec08570e57a3fab39de6a", + "specs.json": "5c14bd0157a174a23c2fbd8a187b16b9f2d051bcb0a7d10d25507242ec48ed91", + "target.spice": "0182b18c6bc4efb6a092087d87217fa65be7e4548d20d6f2eadeb1ab50ee5d00", + "target_lvs.spice": "3916f326d6ab2576810e0e6ebe7a35387790aa22648594b7d6cfea3cdd281552", + "testbench.spice": "0e7b32afa6c423618cf9280bd8f2021570eb059bbaf990031f7c85ede48044a8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..6bfbb991 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "68fe1c7fac0a4350", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 45.57 + }, + "ugf": { + "min": 7661000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.57331, + "ugf": 12767720.0, + "pm": 75.3038516 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "vout0": 0.6000004, + "idd": 8.059249e-05, + "vos": 0.004174753, + "gain_lf": 48.57331, + "ph_lf": 0.1230484, + "ugf": 12767720.0, + "ph_ugf": -104.5731, + "f3db": 48756.62, + "pm": 75.3038516 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..1b27a952 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 45.57 + }, + "ugf": { + "min": 7661000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 48.57331, + "ugf": 12767720.0, + "pm": 75.3038516 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..efe86672 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=1u l=0.39u ng=2 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..fd9b2d9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..db258f3d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..8f999308 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C11_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "88ea587afaa71a38", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..e364d0b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8b0e55f9d5b3a1de4eee040498025ad58058838b30614d1562728990b2194c00", + "qualification.json": "749c48c461ef0c0ebfb80312b5b1236ef41f5fe9c4f1b1fc8b428a61e5ac2999", + "specs.json": "77fadfd97205c8cbda3d0334c65cb053e47de3bba8dfce9f504c93ef3145ab47", + "target.spice": "debef5f378172a1a77757e2a4f662ba42a3e3c9673dc0b3421207a1dfb338b07", + "target_lvs.spice": "e4ad1dd748fbb5da26854447f9721793d98f52970c261f406d4f0fc7ba678a27", + "testbench.spice": "5039ff4eed2f9cd399e4e3bd5ce9b3370a381e5e4df8afd64bf54aca8f6aaf6a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..cbbfd9bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "88ea587afaa71a38", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 43.16 + }, + "ugf": { + "min": 9294000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.16096, + "ugf": 15490510.0, + "pm": 76.337805 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "vout0": 0.6000003, + "idd": 8.361483e-05, + "vos": 0.003398534, + "gain_lf": 46.16096, + "ph_lf": 0.108995, + "ugf": 15490510.0, + "ph_ugf": -103.5532, + "f3db": 78375.89, + "pm": 76.337805 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..b958de7b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 43.16 + }, + "ugf": { + "min": 9294000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 46.16096, + "ugf": 15490510.0, + "pm": 76.337805 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..874e4628 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=1u l=0.26u ng=2 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ac78f279 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..cb4bc721 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..83c2c88e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C11_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "412ec07f00f7c402", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..171efabc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a54d9fee0bca8c0ea07a33ff059aa64ba2ff819983a3e184423dccb480365204", + "qualification.json": "26946ce7fc99a42a4ffda44ca5bf7ec0c470e9405320b51e72d2b6793105d9e6", + "specs.json": "b8f90b714cbfcf7062fae2f2cd42a5d2bdce14bc8070e1b14cee6b6cecb9c630", + "target.spice": "1cbf09f5e4ec278934dbc68e1df021051370de40380489526d0e2d97fc09759f", + "target_lvs.spice": "792d90860bd6047305d1332cd92159ec3680a926f415fcc09d710d022980f508", + "testbench.spice": "e48fc6837286f45397f590fc61923b69fedb800a73b279df2199c8d86ac600f4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..fb021a0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "412ec07f00f7c402", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 46.82 + }, + "ugf": { + "min": 6467000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.81679, + "ugf": 10778910.0, + "pm": 74.81895320000001 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "vout0": 0.6000005, + "idd": 7.789472e-05, + "vos": 0.005019453, + "gain_lf": 49.81679, + "ph_lf": 0.1165468, + "ugf": 10778910.0, + "ph_ugf": -105.0645, + "f3db": 35507.67, + "pm": 74.81895320000001 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..ab9f0cfc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 46.82 + }, + "ugf": { + "min": 6467000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.81679, + "ugf": 10778910.0, + "pm": 74.81895320000001 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..e3acfb63 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=1u l=0.52u ng=2 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4c3afdf4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..bb214a5a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..2284c4c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C11_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0ff76684b29ba066", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..7c34aabd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dff7dc06c95f53e6d1ff254eacc0e52d29156b8206751569425f1a09363b2a71", + "qualification.json": "ddec490aaa5475b39134735cf060032eafe690158445bc1fb31ef6044bdc903e", + "specs.json": "464368c88b4c197d3f2ab9e4404e39eb5eb17911aea04cbaba8b04e97521b1ac", + "target.spice": "ab1861a7b54afeca5c8b4c6b8e338824ffdeaee5b406816ae2663c9c742b562a", + "target_lvs.spice": "87b15ae0b741d4324361e64e54d1b148409f6c3e2e82e3f2317d5f1e441aff40", + "testbench.spice": "25e3d8e84e74cff46d3cc7d068459a2ebef2c8ebd36b3eeb2a5e05da8c951951" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..b878846c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0ff76684b29ba066", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 47.28 + }, + "ugf": { + "min": 15540000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.28308, + "ugf": 25892190.0, + "pm": 79.2430392 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.8, + "schematic_measures": { + "vout0": 0.6, + "idd": 9.418466e-05, + "vos": 0.0003122778, + "gain_lf": 50.28308, + "ph_lf": 0.2261608, + "ugf": 25892190.0, + "ph_ugf": -100.5308, + "f3db": 81807.34, + "pm": 79.2430392 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..fbd4c95c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 47.28 + }, + "ugf": { + "min": 15540000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.28308, + "ugf": 25892190.0, + "pm": 79.2430392 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..123f4056 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=3u l=0.39u ng=6 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..bebf223a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4692df0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..19b0d991 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C11_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "414c659d5ec3491e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..e3b14930 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "077f000c8267510df4df9ee49c940ca70f12edce019b5cf9ab774d5e64e3b9eb", + "qualification.json": "adee4e43655cb37c8872d89f57e96427ec8382debf672108f2703823c6202d2e", + "specs.json": "e610fda0adca521e32a8616d1b28f5dab76bc43a94c62671a31167667f855e73", + "target.spice": "a7fb881731033e034a579a62c2773a3cd05f03cd1a4cf4448b11038a00ba50d6", + "target_lvs.spice": "38ab0c2a97c8535feccb04bcbd353d7911ac777c2881f778095b6ffc23029664", + "testbench.spice": "3472c3b7587536afc435e80e4b095290a36c4114d9fcbc4880c877fd24ac7331" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..50f1d72b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "414c659d5ec3491e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 44.49 + }, + "ugf": { + "min": 17400000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.49291, + "ugf": 29004360.0, + "pm": 82.2825251 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.8, + "schematic_measures": { + "vout0": 0.6, + "idd": 9.458112e-05, + "vos": 0.0002541931, + "gain_lf": 47.49291, + "ph_lf": 0.1694349, + "ugf": 29004360.0, + "ph_ugf": -97.54804, + "f3db": 125441.4, + "pm": 82.2825251 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..1bf84741 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 44.49 + }, + "ugf": { + "min": 17400000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.49291, + "ugf": 29004360.0, + "pm": 82.2825251 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..7bf7be9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=3u l=0.26u ng=6 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..378c2cb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..15017b42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..d78e860b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C11_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1ba3764d535990c7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..cdb9431c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bc37ba570710ca990b908c31ef71281fd63ebd8aeff3d7679d17eb04614c12c3", + "qualification.json": "04ca035aa3f5794d51d642ab76677839897ae325e4a518649f667b0162630955", + "specs.json": "89f20c0ac2d6b3c99f35923d50eee41e2b497e4c9e88e389840e51ee333f200d", + "target.spice": "fb06d9f54fba5db2559a0a4ea330befd80de64cc62502c9be52970f5c6bbb787", + "target_lvs.spice": "39f489b0100f7ebcc19e961f565a6b29815b32579a678fc4c3b4480a6dcb8baa", + "testbench.spice": "f035d56a1316bf0b2f7545e021a21704a86a51473be91f7095f4892d9582eb21" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..0e827fe9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1ba3764d535990c7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.97 + }, + "ugf": { + "min": 13890000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.96874, + "ugf": 23157510.0, + "pm": 76.86364549999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.5, + "schematic_measures": { + "vout0": 0.6000001, + "idd": 9.285203e-05, + "vos": 0.0005491362, + "gain_lf": 51.96874, + "ph_lf": 0.2641545, + "ugf": 23157510.0, + "ph_ugf": -102.8722, + "f3db": 60434.27, + "pm": 76.86364549999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..94a54d74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 48.97 + }, + "ugf": { + "min": 13890000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.96874, + "ugf": 23157510.0, + "pm": 76.86364549999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..df6aa667 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=3u l=0.52u ng=6 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4095ba0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..bf0c388a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..c79c684e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C11_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "70ea72afbd6a2557", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..1a3d54c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ee5f9e9c4663bc12bd888552ef82c19074cc09cae4d9e89f734774afe50d50b9", + "qualification.json": "2e03d371167cc6e9fe311d2bf55aef38175e2adccbb259bb64c60b68587b45e6", + "specs.json": "e378837f6eb1037b47ee096f30935192aa6a17953e71064ade8e2751c57fc0db", + "target.spice": "3d46942edee91a52d9963a8e41e0c5159ea64c5fece49439af73a1eeee9f7c6b", + "target_lvs.spice": "f9d12edee6492fd8b511da0c2e2ae5fc1edc13dd75724a5be66aa77d9d9b2e1b", + "testbench.spice": "7e3fd7b0ecffc8b1872c9ec03058d53bcc989d0a1899f985e69dc09f0443c2bd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..1ffe8050 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "70ea72afbd6a2557", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 46.84 + }, + "ugf": { + "min": 12340000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.84097, + "ugf": 20571200.0, + "pm": 77.0407355 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.5, + "schematic_measures": { + "vout0": 0.6000001, + "idd": 9.010908e-05, + "vos": 0.001164414, + "gain_lf": 49.84097, + "ph_lf": 0.1964645, + "ugf": 20571200.0, + "ph_ugf": -102.7628, + "f3db": 68519.9, + "pm": 77.0407355 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..bb1d179a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 46.84 + }, + "ugf": { + "min": 12340000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 49.84097, + "ugf": 20571200.0, + "pm": 77.0407355 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..8bb0b153 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..4dfe7efc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..742b6a11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..d857d0ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C11_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e756b93b17af3c2f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..361a8b40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "013d3ad3c5b00f441ba99a03e529b2fe7119f2b8ac247686602e6b28fc79bce5", + "qualification.json": "314957ce1e3063c76ad6cc3038837461aa8467d7569d53e59d685ebda6bf9688", + "specs.json": "652f8766f124db2f10c5f51b00e3759aa82092d5d9a8a907c24d51732cacc1c3", + "target.spice": "c060088afa632f67f71f8500680abc1407f1479d69cb8f270e63212f408b7186", + "target_lvs.spice": "ab0b6243e2fce1cc03eb82cba8323a718814a6d4a58bbd475ba9b64bf629673e", + "testbench.spice": "0bc743e391d288a13f15ac086d53780e42d00c20925c5cfe6670b1e3f3b845d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..aa7b79ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e756b93b17af3c2f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 44.12 + }, + "ugf": { + "min": 14200000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.12022, + "ugf": 23668180.0, + "pm": 79.4408445 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.8, + "schematic_measures": { + "vout0": 0.6000001, + "idd": 9.172873e-05, + "vos": 0.0008903594, + "gain_lf": 47.12022, + "ph_lf": 0.1519555, + "ugf": 23668180.0, + "ph_ugf": -100.4072, + "f3db": 107608.4, + "pm": 79.4408445 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..509b2b7d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 44.12 + }, + "ugf": { + "min": 14200000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.12022, + "ugf": 23668180.0, + "pm": 79.4408445 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..a04b11be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..c961ee38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..e3bda52c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..8a30cccd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW1_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C11_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "68af9296ffd48da9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..15bcbdee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "44e7df00ec58924a92e23745f5f5d5ac9818addfaa074ab5dcc058b1f6a03d98", + "qualification.json": "2206002b481d2425a3dceea1e439c0d2fe417eff5803542a6c1657eec9131893", + "specs.json": "16d7f67073afd0f3e62d6d5abe0772a6e05550dc979be35895ab03406e1565d3", + "target.spice": "2e0776725168ce3c08f4a35cb90a8b74e0d8824d1febb307923681458fdac989", + "target_lvs.spice": "ef2b2736e374fdef8564e8c139bc63adc2a8d3242ad23fee56dbd39af572fed7", + "testbench.spice": "36a726265c7b4ec9dd2039530e26a94f32a668a010c4a8a1f8bbe7d4ff085be1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..cedc5803 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW1_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "68af9296ffd48da9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 48.48 + }, + "ugf": { + "min": 10780000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.47979, + "ugf": 17958840.0, + "pm": 75.4006569 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.9, + "schematic_measures": { + "vout0": 0.6000002, + "idd": 8.774862e-05, + "vos": 0.001640854, + "gain_lf": 51.47979, + "ph_lf": 0.2220431, + "ugf": 17958840.0, + "ph_ugf": -104.3773, + "f3db": 49508.27, + "pm": 75.4006569 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..1aff1b9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 48.48 + }, + "ugf": { + "min": 10780000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 51.47979, + "ugf": 17958840.0, + "pm": 75.4006569 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..deae6e34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..1adb99ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..bd03f8bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..d85cbd2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C11_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6223827e0f779bdd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..f2e6ab51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dbda0a6530cb6b6cb7b4688da6ec01349fa558bf9cbfcb7f48bec6515a607cba", + "qualification.json": "bd5c02fb6ff869337f68ff4fa413dfd8836f6f7083e9557cbee159a36e89914d", + "specs.json": "22e886b7eff2de56de4e0a324f1980a917f3fd3a41abeea7402e1a585fe23819", + "target.spice": "d1b87ede52f8bd74ed1e5fd3b4178c405c51b9094d8616ae80d292059077bb36", + "target_lvs.spice": "ad4a0096575f23ce69ae055f2ae1775117f6073f8a112602a062e0f6c554bfbc", + "testbench.spice": "71ce0b6a7bc52caffd1d9bab945ca9fe90dd351e7a3f06c239eaf2baa05b696f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..715d3171 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6223827e0f779bdd", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 47.57 + }, + "ugf": { + "min": 17950000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.5663, + "ugf": 29909400.0, + "pm": 81.1490187 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.0, + "schematic_measures": { + "vout0": 0.6, + "idd": 9.596058e-05, + "vos": -3.77671e-06, + "gain_lf": 50.5663, + "ph_lf": 0.2437113, + "ugf": 29909400.0, + "ph_ugf": -98.60727, + "f3db": 90802.36, + "pm": 81.1490187 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..d4edb15c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 47.57 + }, + "ugf": { + "min": 17950000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 50.5663, + "ugf": 29909400.0, + "pm": 81.1490187 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..fe5217d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..bfe3c961 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f6 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM1_f7 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f12 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f13 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f14 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f15 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f12 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f13 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f14 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f15 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f6 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f7 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f6 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f7 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f12 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f13 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f14 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM7_f15 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f12 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f13 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f14 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM8_f15 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..bcf1ee08 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..d1451f4a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW2_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C11_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2673c12ef849322d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..6b142d17 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d258e2057d7c097ec16e0c3d85fceeb0a53c5bbea80f6ae6f4f9ea9805b3ff54", + "qualification.json": "26f6f2262576f087212e044559152f30824cdf06ed3389a62c6769c880183d7f", + "specs.json": "40f9c168a069b224af918422bb7d7532c29183987b102a52ce8f8621e1da7eca", + "target.spice": "6a436230d4cca872b1863673059db3585632bd850e0b473b8777dc5f1c6f628a", + "target_lvs.spice": "d5bb0c8259ce379bd2a3e85c3fab49b496776d51d9847bf5e08a676e4d00ef9f", + "testbench.spice": "c230533d5e9b4f1562bc727f4c4fc06e33e37d71f67714e6ebce7078f21ac40d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..0dc32f62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW2_sL1", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "2673c12ef849322d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 44.74 + }, + "ugf": { + "min": 19870000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.74041, + "ugf": 33122360.0, + "pm": 84.5240709 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 4.3, + "schematic_measures": { + "vout0": 0.6, + "idd": 9.586525e-05, + "vos": -6.08798e-08, + "gain_lf": 47.74041, + "ph_lf": 0.1800691, + "ugf": 33122360.0, + "ph_ugf": -95.29586, + "f3db": 137634.3, + "pm": 84.5240709 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..afdfc74f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 44.74 + }, + "ugf": { + "min": 19870000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 47.74041, + "ugf": 33122360.0, + "pm": 84.5240709 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..73f42fed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..184c3bde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f6 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM1_f7 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f12 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f13 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f14 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f15 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f12 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f13 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f14 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f15 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f6 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f7 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f6 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f7 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f12 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f13 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f14 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM7_f15 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f12 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f13 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f14 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM8_f15 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..ab78f69d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..650811ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_ihp130_sW2_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C11_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9afe5b647cc2e80b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..ce461a54 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e677ba31875ee8d5ae336377cbfc76b20812a12081ff1e1be8f9332231c1a34c", + "qualification.json": "163e4f62fc1eb998ce2bcab9180631968c8df44ea780138419a54aef7a8121d1", + "specs.json": "d1e3fea698ef06557e66a0e91650f94037e79522de6c2afa351e72e827287610", + "target.spice": "3cda494a06e7241626f4c83e2911ce6de696e49a431a1eeae26d27e7d94a84cb", + "target_lvs.spice": "d8b8a36afb93626f4e5af38cdf2eee84be4f1ee358bba2f2eaa4b8dad8e75351", + "testbench.spice": "310bdf79260a6fb095f8d273e4a1553c2ee7ed68d0570ce0bb62ddd75ceea4c1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..d8a49d88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_ihp130_sW2_sL2", + "circuit_id": "C11", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9afe5b647cc2e80b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 49.26 + }, + "ugf": { + "min": 16250000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.26004, + "ugf": 27091400.0, + "pm": 78.3270603 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.9, + "schematic_measures": { + "vout0": 0.6, + "idd": 9.536886e-05, + "vos": 0.0001160888, + "gain_lf": 52.26004, + "ph_lf": 0.2883397, + "ugf": 27091400.0, + "ph_ugf": -101.3846, + "f3db": 68141.79, + "pm": 78.3270603 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..ebec6816 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 49.26 + }, + "ugf": { + "min": 16250000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 52.26004, + "ugf": 27091400.0, + "pm": 78.3270603 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..b64b75e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM2 net97 IB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM3 net014 VIN1 net97 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM4 net016 VIN2 net97 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM5 net014 net014 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM6 net016 net014 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM8 VOUT1 net016 VSS VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..e6363bdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f1 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f2 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f3 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f4 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f5 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f6 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM1_f7 IB1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f0 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f12 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f13 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f14 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f15 net97 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f1 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f2 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f3 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f4 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f5 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f6 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f7 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f8 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f9 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f10 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f11 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f12 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f13 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f14 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f15 net014 VIN1 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f0 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 net016 VIN2 net97 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 net014 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f1 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f2 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f3 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f4 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f5 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f6 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f7 net016 net014 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM7_f0 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f1 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f2 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f3 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f4 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f5 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f6 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f7 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f8 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f9 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f10 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f11 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f12 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f13 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f14 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM7_f15 VOUT1 IB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM8_f0 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f1 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f2 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f3 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f4 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f5 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f6 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f7 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f8 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f9 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f10 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f11 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f12 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f13 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f14 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM8_f15 VOUT1 net016 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 net016 net022 rppd w=1u l=11.38u m=1 +XCC1 net022 VOUT1 cap_cmim w=25.82u l=25.82u +.ends C11_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..2c9394b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.48 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.6 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..e975bd46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C11_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f2fd6a3c14b5b945", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..be9b5e1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "13b7c491586b9ad08e6eb4a1c00ad833a709b5d1b686bd0400eacd2951e745ff", + "qualification.json": "3e9f5c25ad008bc6f721259b93ec31cb1a431a0c58b2dbd13938703c770efbaf", + "specs.json": "be6a31806a43fff9979d2cc4a33b32e2febcf21ce90e4c90ba25b78d90e8f435", + "target.spice": "bf7c9097b8d1fa509b0a16fb0bbe1162fff5b5e3a69dc75beaf001d403f4b8a2", + "target_lvs.spice": "e6e4c8bc2dd31b0e8dba9644c9a0864277aa3904b9c9f08e1b709dda17342fb3", + "testbench.spice": "224c2212a2aeec19e1fc1992b312ef8f68cd7d04907904735392cb1501d56a1f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..4673efc1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW0.5_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f2fd6a3c14b5b945", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 60.47 + }, + "ugf": { + "min": 3706000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 63.46528, + "ugf": 6177062.0, + "pm": 80.00739835 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.1, + "schematic_measures": { + "vout0": 0.9000004, + "idd": 6.628901e-05, + "vos": 0.003838643, + "gain_lf": 63.46528, + "ph_lf": -0.01879835, + "ugf": 6177062.0, + "ph_ugf": -100.0114, + "f3db": 4176.243, + "pm": 80.00739835 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..7c87a96e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 60.47 + }, + "ugf": { + "min": 3706000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 63.46528, + "ugf": 6177062.0, + "pm": 80.00739835 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..2cdf7e40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.45 nf=2 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..e6853953 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..2ec6d58f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..2a4731a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C11_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b28cc014c5ff4795", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..ceb28d27 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f276a291c77be86a17e080149929c18ed1c36177465f67f6a2b0c8c7ccd1c433", + "qualification.json": "3cf18044eb957bff947ab29871304a69087d968fbeb5c5e4a6b19324a5b22d48", + "specs.json": "1dc84c946f65f384f1687b5063c7651968c6f048f136f54e7262d43c9b23b9f1", + "target.spice": "d3b7b08648aac25214418197cf7d2ad28ecc8df832c725675bce53c4540bfce4", + "target_lvs.spice": "2eb127eedccf82a5f8a2e5f39cfc6b4e4f1bf357189bec86aeeffe42e3f9e3e5", + "testbench.spice": "b3f1a08b61dc5bd5d4227b85f4dd724531b554bec235749f1c49109194665235" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..01e358da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW0.5_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b28cc014c5ff4795", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 54.71 + }, + "ugf": { + "min": 5518000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.71389, + "ugf": 9196623.0, + "pm": 79.91076799999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.6, + "schematic_measures": { + "vout0": 0.9000004, + "idd": 7.08425e-05, + "vos": 0.003997836, + "gain_lf": 57.71389, + "ph_lf": 0.221512, + "ugf": 9196623.0, + "ph_ugf": -99.86772, + "f3db": 12107.36, + "pm": 79.91076799999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..7b9d3ce7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 54.71 + }, + "ugf": { + "min": 5518000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 57.71389, + "ugf": 9196623.0, + "pm": 79.91076799999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..eec00b04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.3 nf=2 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..76d7e1b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..1b2ce41b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..ba3bf28e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C11_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M5": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M6": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M7": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M8": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4264c4edf25c1d71", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..81aa2bc7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6fd10590c936a432fd26fc9b15080be898221e7d9e63d1f29f8ba2e9ae5cb2a3", + "qualification.json": "e37f2bf674cf73f41d25f53b7111e70d35668f73c6b17e420a076902db61c298", + "specs.json": "103cc08c9b290278b03157df589ee7f9f979ce5178a1a5f897fa29ee240ac515", + "target.spice": "92e9943b3b186ee7a3a86ae83fa806bba6e257458a24043d4751c6eafe8c0625", + "target_lvs.spice": "78b07ef6a779ecde4c516e13346ef6fe4967144d53a38604937873ab7225fc59", + "testbench.spice": "cb9547bbc340a1e773224e3d812f8b4a891a8a06e6bc094a8e6f0e8e72326446" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..61bf9982 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW0.5_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4264c4edf25c1d71", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 64.47 + }, + "ugf": { + "min": 2792000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.46989, + "ugf": 4653428.0, + "pm": 80.8851173 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.9, + "schematic_measures": { + "vout0": 0.9000003, + "idd": 6.430267e-05, + "vos": 0.003289089, + "gain_lf": 67.46989, + "ph_lf": -0.7426173, + "ugf": 4653428.0, + "ph_ugf": -99.8575, + "f3db": 1980.305, + "pm": 80.8851173 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..2664720d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 64.47 + }, + "ugf": { + "min": 2792000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.46989, + "ugf": 4653428.0, + "pm": 80.8851173 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..33b4d6e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=1 l=0.6 nf=2 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e21ac1ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C11_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..04ebcbea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..43af85d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C11_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ffa3ae67729e74b2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..c824134c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b5bdb42fc3a2fb98ff222269e237f993816d10d19f989a9a57cafc4d3bb1b534", + "qualification.json": "2d22197cb6b80800fb3514ae9c0b2823c293e77d361784948d77523ce3233f7c", + "specs.json": "94a7b75decdc552461981b2ca0abffff8c33b0067bb96efb5b83e7da3e410e30", + "target.spice": "be352effe3880b14ace33bc6842986b5d0d86ab37bfb8f951ede0f0d02c4fb90", + "target_lvs.spice": "e251ce9363a2676af00fa661c7819a084424449428eca4fc6c64a0b273d4def2", + "testbench.spice": "e8012a27e0427b0e7acc0b3870fdfac3c07857893462f1ec4828aae5a0854989" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..9612806e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1.5_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ffa3ae67729e74b2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 64.58 + }, + "ugf": { + "min": 8902000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.57983, + "ugf": 14836950.0, + "pm": 81.356473 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.7, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 7.584572e-05, + "vos": 0.001411123, + "gain_lf": 67.57983, + "ph_lf": 1.258137, + "ugf": 14836950.0, + "ph_ugf": -97.38539, + "f3db": 6281.387, + "pm": 81.356473 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..cc1a61a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 64.58 + }, + "ugf": { + "min": 8902000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 67.57983, + "ugf": 14836950.0, + "pm": 81.356473 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..6f5e23cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.45 nf=6 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..12448e21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..63b690cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..c28d3536 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C11_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dc7a3013f5e26714", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..b679660d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "14ff2cc934f05d1c2e37db99c6752b8479b52fff8ded7bb79a083df62b29ab41", + "qualification.json": "3938edfaa0ad57e41dc01eb419028e604386423ade0286db9a2a527aeab2fabb", + "specs.json": "c4e22894169482f17af626761e15bd7fd0c92a257dd0b25326fc378fe3760022", + "target.spice": "4a9451daeb81f398ccc629f75394ac91cfceb39c0e382c6269291bcdce6a673e", + "target_lvs.spice": "2e1ad1e9a4bc56f516b3de0337cc158b66a14b7ab5b411c2254db6cc6af5d2dd", + "testbench.spice": "69e1febdafc6634f1dd54ca3da368f9801eee6279a179fce6ddd9b05de072c99" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..8ce5df36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1.5_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dc7a3013f5e26714", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 57.29 + }, + "ugf": { + "min": 12250000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 60.28898, + "ugf": 20415820.0, + "pm": 84.0980606 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.4, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 8.303241e-05, + "vos": 0.001193754, + "gain_lf": 60.28898, + "ph_lf": 0.6498294, + "ugf": 20415820.0, + "ph_ugf": -95.25211, + "f3db": 19992.76, + "pm": 84.0980606 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..3a2dcb21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 57.29 + }, + "ugf": { + "min": 12250000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 60.28898, + "ugf": 20415820.0, + "pm": 84.0980606 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..147eaa03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.3 nf=6 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..3f30f9c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..0d55c47f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..31e1a711 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C11_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M4": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M5": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M6": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M7": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M8": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "04830be76542c849", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..767e2e90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "10c3c50a82fe3778504aef135cc413c79b4960b723db6d96332779f27f0ce185", + "qualification.json": "700d99c8fe7ca5b0d0e4540a4df33780bd095fb553d94b6b4feb1a36ff88bcec", + "specs.json": "bda53321ca9099a50ed95567d81ae835c83c84834a82de231915536d7dce40e7", + "target.spice": "cb0ed389d5278c668d7560292881bdbd33ce3ef8a53e4034987fb60b11e25caf", + "target_lvs.spice": "864a7ca865af31a9b522eea17580628c8e6b6c275f2a922ff832471258dee408", + "testbench.spice": "afcfdf3fef9b0bdd055501c1d0c8633af86aef5fc96693eef081f7e5be504561" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..58fe63e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1.5_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "04830be76542c849", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 70.23 + }, + "ugf": { + "min": 6970000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.23297, + "ugf": 11617010.0, + "pm": 79.454114 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.8, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 7.204728e-05, + "vos": 0.00132239, + "gain_lf": 73.23297, + "ph_lf": 1.933746, + "ugf": 11617010.0, + "ph_ugf": -98.61214, + "f3db": 2568.78, + "pm": 79.454114 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..298d1298 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 70.23 + }, + "ugf": { + "min": 6970000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 73.23297, + "ugf": 11617010.0, + "pm": 79.454114 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..032de3bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=3 l=0.6 nf=6 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..6d1315ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,82 @@ +.subckt C11_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..2d56ddba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..eea9d567 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C11_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2d7b224f2eca0675", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..ed909493 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4314885db44e91d48c4e60df496094e14ebf398518dd1f1e60b69c0e749c8ad4", + "qualification.json": "7b1e802c83a9163e3ce905524da3f5ec9820dc089abb7fc5734274c2ac31d033", + "specs.json": "e980ec32b756d19fba2e0c84c5c5184d09b7efe41d701f4180183230100bfa23", + "target.spice": "4a6211b883b9079b9803200abec3f6efed5def50dd8a655c5965bc990d806b96", + "target_lvs.spice": "efba59fd420cda24f6cad9e2470cc4caa3af329529cb4cd779aa9725c0c99c8d", + "testbench.spice": "fcbd7f9ba938e32fd66f4011be4c1dd556b03fc9870207f10453dee730be5a7b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..feb12c33 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "2d7b224f2eca0675", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 63.38 + }, + "ugf": { + "min": 6534000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 66.38135, + "ugf": 10889710.0, + "pm": 80.4318989 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.7, + "schematic_measures": { + "vout0": 0.9000002, + "idd": 7.1761e-05, + "vos": 0.002102033, + "gain_lf": 66.38135, + "ph_lf": 0.8071111, + "ugf": 10889710.0, + "ph_ugf": -98.76099, + "f3db": 5288.982, + "pm": 80.4318989 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..6ba20d29 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 63.38 + }, + "ugf": { + "min": 6534000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 66.38135, + "ugf": 10889710.0, + "pm": 80.4318989 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..428de3e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3856740e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..dd525a83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..1eb60a79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C11_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "aa6df86bf40f1e84", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..a2654c7a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "990425fb2a1806ab99156899c963ed99abbe316a80137b010eac190dcaf57e40", + "qualification.json": "7d3c04f457710d863a50577b604cde9fc341635e6fd2b76629aeb7cf6ae53f90", + "specs.json": "0f0efff214196c6b2dd437d09a8eb1cc9fae5b95491fc282dfca437e084dcdc6", + "target.spice": "a9eec135586e1b8a89a790f66139d4c6bb8a092beda0a37e83533c395ac96716", + "target_lvs.spice": "64368b66f18470ed4a994ad7036717924c84860e10e9fd7ac409b61bf2322e31", + "testbench.spice": "dc63de854cca3e27a51daa85a4093c8b7747e16508309dbb85d01011a2bc0120" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..e0956913 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "aa6df86bf40f1e84", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 56.62 + }, + "ugf": { + "min": 9313000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 59.62107, + "ugf": 15521590.0, + "pm": 82.0995872 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.9, + "schematic_measures": { + "vout0": 0.9000002, + "idd": 7.821191e-05, + "vos": 0.001955459, + "gain_lf": 59.62107, + "ph_lf": 0.5179528, + "ugf": 15521590.0, + "ph_ugf": -97.38246, + "f3db": 16466.22, + "pm": 82.0995872 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..394d3f32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 56.62 + }, + "ugf": { + "min": 9313000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 59.62107, + "ugf": 15521590.0, + "pm": 82.0995872 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..4db45b01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..084bb34d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..936aff4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..14656ad1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW1_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C11_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9354e6f133edc4c0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..9bfa64d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5dcb9a8552eb3c162b3e9798d3f4628c0ab157ca6de7b1ee65cf7723139803a6", + "qualification.json": "2ebf6b750d342bc65c2e9526555e634098517c6cd7b8faf0fdfa41b9ae49d5c0", + "specs.json": "472c751cd413fddd5679033bfe5b7607613fdf20a22677a3b8a83261c56a9b51", + "target.spice": "8c980d6c2566017bf3b085af3c0b7000eb5986f1f5472389e48ca7078276795a", + "target_lvs.spice": "2341aa1fb4539345ee1a46c7dbb0efb8490dcc18b6554322d540dbf8b2578c00", + "testbench.spice": "1f3cb286d18f425f6c3e045777ea2725462e9c547b4a252a84ab67d21a6bd5bb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..51d0e77c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW1_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9354e6f133edc4c0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 68.48 + }, + "ugf": { + "min": 5037000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 71.48478, + "ugf": 8395595.0, + "pm": 79.7019255 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.9000002, + "idd": 6.866944e-05, + "vos": 0.001888361, + "gain_lf": 71.48478, + "ph_lf": 0.8750745, + "ugf": 8395595.0, + "ph_ugf": -99.423, + "f3db": 2263.368, + "pm": 79.7019255 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..e73da8c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 68.48 + }, + "ugf": { + "min": 5037000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 71.48478, + "ugf": 8395595.0, + "pm": 79.7019255 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..3133c1b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..c921c356 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,56 @@ +.subckt C11_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..de3726ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..5ff3366b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C11_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "571b9207288eaf32", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..cd36c25c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2798ffd1fc4032df1c19d934d81d407154727374e9145f4cfbc414edda8d471f", + "qualification.json": "18bd231565826c2c16b4d4ed1e4085d5878bb080835674bac10ac02f6b4aa109", + "specs.json": "00b1d0378c57d39ec542612e98aa5c122de600ab9a0eafe30f01dd797a45b540", + "target.spice": "9ce6ff8e5bc6f2943e7f4dbf34d12c6d452802eb76db97261681f83078450173", + "target_lvs.spice": "14bad3e9fe8883b2cafb391c9bfeb755885b3ce8eaadceed33bd20913e378104", + "testbench.spice": "b610ae8fd50419e45013e94c411e69a51c3b19e5f14e43577ad3654989ef169f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..840c79b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW2_sL1.5", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "571b9207288eaf32", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 65.25 + }, + "ugf": { + "min": 10950000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.24719, + "ugf": 18256050.0, + "pm": 82.302631 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 7.911434e-05, + "vos": 0.001030174, + "gain_lf": 68.24719, + "ph_lf": 1.542879, + "ugf": 18256050.0, + "ph_ugf": -96.15449, + "f3db": 7148.059, + "pm": 82.302631 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..d6e6a1f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 65.25 + }, + "ugf": { + "min": 10950000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 68.24719, + "ugf": 18256050.0, + "pm": 82.302631 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..af81d109 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..eafc3c14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f6 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM1_f7 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f12 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f13 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f14 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f15 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f12 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f13 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f14 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f15 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f12 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f13 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f14 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f15 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f6 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f7 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f7 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f12 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f13 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f14 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM7_f15 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f12 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f13 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f14 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM8_f15 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..97f37e99 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..8833faad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW2_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C11_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1c4c341f77f8a3c6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..a8e52996 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "27a761cca40befa749d01fd5cea0458d0cab6d46cd70f08d2d66255a5847c6cf", + "qualification.json": "8f8dd0c4aedce44ed3159a75586d5489c03e2a4fd3ef860f55926bd4af5fe45a", + "specs.json": "46733eae3896928e5b667b198c4c664e84b71d54cc7fe6c7ae0279eee7612385", + "target.spice": "df38e9935fb3f3c10e49ef21290d468513f8c9aa135ca9ad35f26477faf16dca", + "target_lvs.spice": "923a2d1ab0e70cada251d9c499b6045dbff5ebc78421dfb78c3a3f4c41e75cd8", + "testbench.spice": "60493dc256f9c0f17ea3f01e6d5e812ae68b8777fa29604e88d9a25691ca8ec5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..a4802dd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW2_sL1", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1c4c341f77f8a3c6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 57.59 + }, + "ugf": { + "min": 14590000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 60.59334, + "ugf": 24313470.0, + "pm": 85.74901139999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.3, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 8.632783e-05, + "vos": 0.0008089348, + "gain_lf": 60.59334, + "ph_lf": 0.7202986, + "ugf": 24313470.0, + "ph_ugf": -93.53069, + "f3db": 22841.22, + "pm": 85.74901139999999 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..eb0bd3b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 57.59 + }, + "ugf": { + "min": 14590000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 60.59334, + "ugf": 24313470.0, + "pm": 85.74901139999999 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..425abeb9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..f64d6d78 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f6 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM1_f7 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f12 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f13 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f14 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f15 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f12 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f13 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f14 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f15 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f12 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f13 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f14 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f15 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f6 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f7 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f7 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f12 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f13 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f14 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM7_f15 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f12 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f13 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f14 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM8_f15 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..8264caea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..6bd49386 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/case.json @@ -0,0 +1,230 @@ +{ + "case_id": "C11_sky130_sW2_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C11_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M5": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M7": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M8": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "category": "twostage", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6826f554f16982db", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo setting V_out,dc" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6", + "M7", + "M8", + "R1", + "C1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..12294580 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4d98336257792678be7bb2c5b68d50a331543654d8cf659a936dc6c69d523800", + "qualification.json": "60d3ed88f352765bd6c453015198b910cc86ccc58a7b994261ecb908599b516c", + "specs.json": "509cf0ae85a967e969f487d74ed62825ae8ffc9a69f822c06c5357448333ed85", + "target.spice": "7e2447ee3eb636060c64341facd0a0eded244b80513ab4fe35ae9e9e50285075", + "target_lvs.spice": "b94c12070c1c4d8bf4a13383cbd1ae0d27e63085a5e805eb241be57b2de75abc", + "testbench.spice": "16a79611721c1ca07bf4a5a3f229dc1d2bec28950bc3331d75d272eef842be14" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..a0b6e95d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/qualification.json @@ -0,0 +1,165 @@ +{ + "case_id": "C11_sky130_sW2_sL2", + "circuit_id": "C11", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "twostage", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M7": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M8": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6826f554f16982db", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 71.25 + }, + "ugf": { + "min": 8693000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 74.24809, + "ugf": 14488170.0, + "pm": 79.503574 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.0, + "schematic_measures": { + "vout0": 0.9000001, + "idd": 7.486715e-05, + "vos": 0.001005018, + "gain_lf": 74.24809, + "ph_lf": 2.672396, + "ugf": 14488170.0, + "ph_ugf": -97.82403, + "f3db": 2852.949, + "pm": 79.503574 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..5d0e38ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/specs.json @@ -0,0 +1,30 @@ +{ + "gain_lf": { + "min": 71.25 + }, + "ugf": { + "min": 8693000.0 + }, + "pm": { + "min": 45.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 74.24809, + "ugf": 14488170.0, + "pm": 79.503574 + }, + "floors": { + "gain_lf": { + "min": 40.0 + }, + "ugf": { + "min": 2000000.0 + }, + "pm": { + "min": 45.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..a42e1c09 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target.spice @@ -0,0 +1,12 @@ +.subckt C11_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..fdd32bb8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,108 @@ +.subckt C11_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 IB1 +XM1_f0 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f2 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f3 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f4 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f5 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f6 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM1_f7 IB1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f0 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f12 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f13 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f14 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f15 net97 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f1 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f2 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f3 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f4 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f5 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f6 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f7 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f8 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f9 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f10 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f11 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f12 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f13 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f14 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f15 net014 VIN1 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f0 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f12 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f13 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f14 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f15 net016 VIN2 net97 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 net014 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f1 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f2 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f3 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f4 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f5 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f6 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f7 net016 net014 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM7_f0 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f1 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f2 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f3 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f4 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f5 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f6 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f7 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f8 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f9 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f10 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f11 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f12 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f13 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f14 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM7_f15 VOUT1 IB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM8_f0 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f1 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f2 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f3 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f4 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f5 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f6 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f7 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f8 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f9 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f10 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f11 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f12 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f13 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f14 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM8_f15 VOUT1 net016 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 net016 net022 VSS sky130_fd_pr__res_high_po_0p35 l=2.155 mult=1 +XCC1 net022 VOUT1 sky130_fd_pr__cap_mim_m3_1 w=22.365 l=22.365 +.ends C11_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..7ba18ab9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C11/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,37 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 IB1 C11_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 2e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.72 +* DC servo (disclosed): VINT = 0.5 tanh(2e4 (VOUT1 - VT)) (bounded to +-0.5 V), low-passed at 0.16 uHz, sets the inverting input DC level +VT VT 0 0.9 +BSRV VSRV 0 V = 0.5*tanh(2e4*(v(VOUT1)-v(VT))) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EINV VIN1 VCM VINT 0 1 +EIN VIN2 VCM VD 0 1 +VD VD 0 dc 0 ac 1 +CL VOUT1 0 1e-12 +.control +op +let vout0 = v(VOUT1) +let idd = -i(VDD) +let vos = v(VIN1) - v(VIN2) +print vout0 idd vos +print v(VCM) +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +let ph = cph(v(VOUT1))*180/pi +meas ac gain_lf find gdb at=100 +meas ac ph_lf find ph at=100 +meas ac ugf when gdb=0 cross=1 +meas ac ph_ugf find ph when gdb=0 cross=1 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..b0dc45c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C12_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "952a17028df62d86", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..61bfacf6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5e573e2d5224a041c22af41e7987bb1ec25c15a6ba055139c190bce021e6da66", + "qualification.json": "ec799e740f4725d0749064ddfb8cf85e4bb1e4763b2c6568e304120330a0be6a", + "specs.json": "78fff68667678591f7d27671eff14d4bec2672040c3f8dd150582fcc7a0b0969", + "target.spice": "927c4c9135c2aaf9742a43e2cbce78f7e18a7945b3545c0d35035400dc7fd721", + "target_lvs.spice": "411eb8907aa39721272004882f76616e706783d154822a4469f3a2267910c531", + "testbench.spice": "b9a83087c1369509d810c9a33b7724603788d4bf5bc1382d97161c4e83826c0e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..5f7ebc81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "952a17028df62d86", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 1515000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 2525533.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.439152, + "vin0": 1.439152, + "idd": 3.874439e-05, + "gain_lf": 39.26713, + "f3db": 2525533.0, + "ugf": 233119300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..ce0741ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 1515000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 2525533.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..72b6140b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C12_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7211716c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C12_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..0ef7c5a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..1e52af31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C12_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9114ae9a7093c8a0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..49656da5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dac5031bf14f89635fbbc16e19ceef4b6b66330b049609a8c8fc5f17999ae617", + "qualification.json": "f4b64e61d39359f16db4d8f771035532e901aed50e09db1f4c214fb020c0f7fb", + "specs.json": "f37b8f611c81aeb381d73b4aacd44b22ff3e78691fe5292653cb62f652db6c04", + "target.spice": "bde0204d7a89c298ddbf4863b7b4baf79712234d81a7f1b3fc1de25656ccf351", + "target_lvs.spice": "d21c319e744831d03bf0795d09473796a5daef55f2a0f9e62f4c8d194f4f5dda", + "testbench.spice": "dde2f092343c752a15f069c16f4224c04f04495602811dcfdc80e6b708a8e12f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..e3832cdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9114ae9a7093c8a0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 3603000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 6005391.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.458836, + "vin0": 1.458836, + "idd": 5.888605e-05, + "gain_lf": 34.89966, + "f3db": 6005391.0, + "ugf": 335213900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..fef89b02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 3603000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 6005391.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..48196b90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C12_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..1aef026d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C12_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..81d0181b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..3b77725f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C12_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "595a10478c8a74e5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..91d81f73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3366476520f6d646250790babe07774a9624ab65e430ff634d988c9855355a1f", + "qualification.json": "b2fcd049d03121ce338514f3668ee4fa1c339f4d46d7ab6c41a5a351e33d5c8a", + "specs.json": "b62eb46457d1ba8ba421cd2c5f20c0bd13c726460aab2d9828398892e3c99890", + "target.spice": "fbafabcb6bc60d40c09cce388b688aca9005ba0059adc5cba8aec79c0c025315", + "target_lvs.spice": "b0fe163c007593b4c7a092ce789777bddd6487f3c1c7799d338b1dcd55d84c5e", + "testbench.spice": "47fb9ced680f298d92e73e1541019fd6ac50d7439730066c9fc28d073a7c9e65" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..6b395146 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "595a10478c8a74e5", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96165, + "f3db": 1425042.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.429767, + "vin0": 1.429767, + "idd": 2.897452e-05, + "gain_lf": 41.96165, + "f3db": 1425042.0, + "ugf": 179247500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..b2d1282b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96165, + "f3db": 1425042.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..682b6653 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C12_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4b3bf709 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C12_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..90597d42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..f2a994df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C12_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fa0a5700f898e6e5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..3947277a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0391116b0bbe4246f3b4525d443513927cbda1a9b72552ffaa8c29eef2fdaa85", + "qualification.json": "c032d0ec00b1529b4e877468224d54ed91e36bf20dd825b2b2a8937c8f3ea3cd", + "specs.json": "0bb76e34c794372e0310edc64eea58010f10219886b585827a1c9603e6ca129a", + "target.spice": "6f6b3398f87d6f02b72cf5be30aea9739817814490b2a30a1f9c7fc455f72aea", + "target_lvs.spice": "0ffc33bf290eacdb146be6285055d11eb496e54368fa12031df602fabda488b8", + "testbench.spice": "8e79c369c3bbd975da0317d125ca44123d7c22b7b2d5da0bbf7086807971d083" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..64081962 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "fa0a5700f898e6e5", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 4284000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 7139193.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.439152, + "vin0": 1.439152, + "idd": 0.0001162332, + "gain_lf": 39.26713, + "f3db": 7139193.0, + "ugf": 661342500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..f7ba9662 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 4284000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 7139193.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..3a2b733e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +.ends C12_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d486674c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C12_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..64387f05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..6486b7a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C12_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f80f5b1cea29bcf6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..b8072b49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f8f47dca23e1d9ad95d8f0830031a03b33c1db59f8178eab7a0a411bb7453e09", + "qualification.json": "a7ca44a96bcad1725ac07f0ab911419e2c73957735a1e59165bf6be4d24d91b3", + "specs.json": "284a1d258e4dbdf10796e551dc310c4b414beaf75123f0409522639b544354d0", + "target.spice": "04f228b116a175a8269803308f7c1b455416e9de97fc12089b4ebd138f373a2a", + "target_lvs.spice": "162445599f141e0b114eaf6da9475e63569dde624255fe2ccc999439483303fc", + "testbench.spice": "82fdde748b91e35118a5cc3d534f589a7cbae5f1f3f35d9b27b0cea22f271ebe" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..81770efa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f80f5b1cea29bcf6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 10190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 16976400.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.458836, + "vin0": 1.458836, + "idd": 0.0001766581, + "gain_lf": 34.89966, + "f3db": 16976400.0, + "ugf": 949313500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..c5e5a4dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 10190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 16976400.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..9c0926a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +.ends C12_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..6d18d243 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C12_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..07c217c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..8c8713e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C12_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0c0161a185d1abcc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..683d9f53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1f56be1b20c98fc58509c1437b252dbd749cbed1d414e06408e05f46e59172f3", + "qualification.json": "279eacf48673fd7b61d2c31c1b68c168b55fdeaf4a786268df2ad7aa3bd728f6", + "specs.json": "f6b76cb7fb422db3e5c4400a55644b603164840ffa57cd9e37961286587c9f80", + "target.spice": "2935a4e6d81bc480f9625b3fe9dec4da41217c1151a7a4a3cbf68ef9430922a2", + "target_lvs.spice": "7e0b76d3fb007c8dd777a86b8477dc4345e5dde0cad92790e074fed597f48969", + "testbench.spice": "34dbb0ebf066526a0d850abd28ce9778b5afb9cfe4a02e01742c161e10461576" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..b9d976e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0c0161a185d1abcc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 2417000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 4028244.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.429767, + "vin0": 1.429767, + "idd": 8.692357e-05, + "gain_lf": 41.96166, + "f3db": 4028244.0, + "ugf": 509785600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..7a41b3ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 2417000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 4028244.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..c7962c73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +.ends C12_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..d0bee31e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C12_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..07740e7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..4c85f9e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C12_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3aeb1033e3b42900", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..4b89111b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8280083095e0cea120b7bce77c5980dba1d83c8b85ee485967782aa1e63870ed", + "qualification.json": "f7778b23760242dd3721a0755a6dae52adb22579cdbf5981878345531bffcee1", + "specs.json": "d27f18a3f4e3ab133f55380c69b7e5d7245828130672887c4cbfbcaf5aca27cc", + "target.spice": "e5a993bb1ff4a524339e20f03eadbc1387c6221a34b01d2fea0bfcf1f1daa408", + "target_lvs.spice": "9973837a2e30e152f5076735aafa2209b905588dfaefa3a0331980affe3a3849", + "testbench.spice": "4c583d70224f1c3e5e629aef37ed278ffd3076b536f8fe71529d25b11a2e3a42" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..65c5e2ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "3aeb1033e3b42900", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 2940000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 4900743.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.439152, + "vin0": 1.439152, + "idd": 7.748878e-05, + "gain_lf": 39.26713, + "f3db": 4900743.0, + "ugf": 452619200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..b5472dde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 2940000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 4900743.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..67488a14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C12_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..aced7d47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C12_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..a4d5de5f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..3ee121f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C12_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f4454974ddde722", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..e296e8ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "98267b3709800931c68a948f4d5c1ff763e458b643bfea0c1b1228ea6ef56589", + "qualification.json": "304942887a67c8e44fc2475d498a004f120c1befc1bf1d3b980ceb54d8625e95", + "specs.json": "6555ee0afec197bf2f56074ea6a43c17618ae738933a9b66ce68a0f5c7856b9d", + "target.spice": "6c7650887f86e9bb1f3b3c208e567c5df1fcfa329ff56a3ac990eb58893bcde6", + "target_lvs.spice": "0dc25775d3f9f292368c1ddb005e1b79d8cb5bf990a779cf2be549f3081d0cc2", + "testbench.spice": "bafa2185b8bf8baa2abccf6711d226e94a9d2fb0ca2cd6518450b56ccb1a4c25" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..6d9d800c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f4454974ddde722", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 6993000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 11654240.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.458836, + "vin0": 1.458836, + "idd": 0.0001177721, + "gain_lf": 34.89966, + "f3db": 11654240.0, + "ugf": 650733700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..6d21d68d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 6993000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 11654240.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..a7d86ec5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C12_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..7d2c4a7e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C12_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..9411d1c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..b9a52209 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW1_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C12_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cfc6b4eb7d64c5fc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..5fd2a2a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5fb8da7b98d52642f15304d4653642051ebea3cba574714f095427ab5d16b5fa", + "qualification.json": "f00f25e24a14ac7af0fecbc700ccd09d5ad6e8062d42fc21768b61df5a711c60", + "specs.json": "285a8cbcc0ef0c7c52df50f4fd4b118b948a1ba2d0da36bab9feedeeccf77894", + "target.spice": "58b143ce302cf3ca9c403858a5bfbac5c7d96c8e1d40edb853b61bbb28e6191a", + "target_lvs.spice": "5f09a9cf93deecf92c1c5e826cfd349e92a50da86c105e93375a18691cc91633", + "testbench.spice": "98216fb8677749f3964fdda7d1a289d02ebcb22b5b9472c141cecfdac48a2349" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..788adb0b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW1_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cfc6b4eb7d64c5fc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 1659000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 2765227.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.429767, + "vin0": 1.429767, + "idd": 5.794905e-05, + "gain_lf": 41.96166, + "f3db": 2765227.0, + "ugf": 348768500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..62d18ec6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 1659000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 2765227.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..62ecdd12 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C12_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..5fe7c17a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C12_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..5c48e853 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..47f796bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C12_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "470c01e3f59602bd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..79c20f06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d5d7486af5469e43bfe0a32d253ccf1b488ec20912e15ab42aa01d617a731baa", + "qualification.json": "2dd4972c24cc67b500845cff855f0850edc453b3ee6ee6bf7bd377d8df0e94bb", + "specs.json": "34f10736a9560d749b27014a5cc749458f4b6281a643bd118bd84fe9d8cf47ab", + "target.spice": "f375b0671f0f41885071180978d5fb8908b8f84cbe4f8649446e0a289743aa42", + "target_lvs.spice": "d562a1a33b33e62d592272b90f85cd32c50a4ab3bb2f02ed05a1062c9bcbb039", + "testbench.spice": "c96d6fc2878940bf80b37a31cead86adb951e1f117a2382cea357d332872eae5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..f9b11aa6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "470c01e3f59602bd", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 5551000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 9251873.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.439152, + "vin0": 1.439152, + "idd": 0.0001549776, + "gain_lf": 39.26713, + "f3db": 9251873.0, + "ugf": 859253500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..1173a4db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.27 + }, + "f3db": { + "min": 5551000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.26713, + "f3db": 9251873.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..e9f42b2a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +.ends C12_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8f2766aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f12 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f13 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f14 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f15 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.84u +.ends C12_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..ecf9b809 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..6614ffd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW2_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C12_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cb080639ead3a44c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..2872f33a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cf2c39fb20dcb86350f8bcf991ba6157062355c5c309cd2b46fa7207cf0b44c0", + "qualification.json": "dadf2924e318b59a381826faf45c69cd504e7659a5e578b446375532e74cfb61", + "specs.json": "7e9221f19679d666f4a3456646a41c71b4c9956fcec99078b8e0754cac5ab2ce", + "target.spice": "6e8a66ab6ed7fa00baeeee15518a3ca1cc220ee770b0aae6569f7e1b97021b05", + "target_lvs.spice": "265c1b74674156c2fe8e39b05cdeecbebe500a22d1f8e9c6449ee0fee51fe459", + "testbench.spice": "a9c7159df064c5f007ebaa48e18aed6fb895f1317aef76993cd4ad67aab15bdb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..bbdd2f65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW2_sL1", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cb080639ead3a44c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 13200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 22000180.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.458836, + "vin0": 1.458836, + "idd": 0.0002355442, + "gain_lf": 34.89966, + "f3db": 22000180.0, + "ugf": 1231243000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..0c477325 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 31.9 + }, + "f3db": { + "min": 13200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 34.89966, + "f3db": 22000180.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..26edb999 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +.ends C12_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..6b235665 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f12 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f13 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f14 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f15 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=0.56u +.ends C12_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..3edde611 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..7af72459 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_gf180_sW2_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C12_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11b233d9c6c48603", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..65a0e991 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a1db0e47a91d9472a310dc411167377f2d25ad21493ee05d4e7ecb4cb57e9df5", + "qualification.json": "2f0736eabf4298046ba8c69f08a0e00f827b2bdfca2a690ddc6e610ad8016622", + "specs.json": "97a4edd01cc06b17beed0a5305de4c31a33284e2569ef47cfd507d79dde30711", + "target.spice": "714d7fa922e225e34342652cbf945f0321a22ec4c82310eaeaf81fc139595cae", + "target_lvs.spice": "be0c3cf4f35928eb5ea2cad53c7abbb848593231136815562b3653fe09cd15a2", + "testbench.spice": "547f00a208c9f96840a7b7c5b54b15ea0c50929d119a86f852bdd30e6c05b804" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..364d2969 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_gf180_sW2_sL2", + "circuit_id": "C12", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "11b233d9c6c48603", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 3132000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 5220240.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.429767, + "vin0": 1.429767, + "idd": 0.0001158981, + "gain_lf": 41.96166, + "f3db": 5220240.0, + "ugf": 664154000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..7ca87f84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 38.96 + }, + "f3db": { + "min": 3132000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 41.96166, + "f3db": 5220240.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..db67aec6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT1 VIN1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +.ends C12_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..763ac6c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f12 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f13 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f14 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f15 VOUT1 VIN1 VDD VDD pfet_03v3 w=0.5u l=1.12u +.ends C12_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..b808fa32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..6c0750c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C12_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "89a697c8a44e7f68", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..20bb7a06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "64ebd6d7769466f795f2769d44c45fde0e786825dac2a778902e2c033332b1fe", + "qualification.json": "55f88302d8a0d4000b1cc72f0370c865d8d4ce69fe83e28e5292879217f517ef", + "specs.json": "93cb910d4c073dadeaff15d239c000a366782b66b7f3df396d88348b4a386759", + "target.spice": "2772f9b585c98a6f8f51643b8df77fe3c844d50f87f23f77b48ec3924a0f0c82", + "target_lvs.spice": "4234dd953aeb9a6b85ac922c78da86a98f4ff471e45e0792908446e8d3117dd7", + "testbench.spice": "cd703e650998bd557c19c94ac33e42e83ef2e5a7520c6b02be1885d36013db80" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..12de0379 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "89a697c8a44e7f68", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 8479000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 14131660.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.536533, + "vin0": 0.536533, + "idd": 2.035058e-05, + "gain_lf": 30.08356, + "f3db": 14131660.0, + "ugf": 452762300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..41f07e88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 8479000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 14131660.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..2e983d42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +.ends C12_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8a8c768d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C12_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..9b8b82ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..d4b9d80c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C12_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a03b17113367c3f7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..9bdadf7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "556b561130526ff38ff2c096a1b836d8892b76219a6fd47d2fcb8429c348eae4", + "qualification.json": "f5e1fe8bcbdf0ed0e7f848967927d7ec23ff95fe033a5d8d970e2e3303ad7efe", + "specs.json": "2c5816471488f905f5e233014f5da6c4463b901509abd6d391949e5ece4d649b", + "target.spice": "d13240254f44d112a77c36a93dd6573b80876e27be01a79f300b95ef9d3541d8", + "target_lvs.spice": "1407ccb77d74e66ee20fa377bdf127154ac8c97a10a45309341b0d1fb08f04b8", + "testbench.spice": "aa8d6fedb6e2b052ec52af92b5ccba8291af83c567fd10c94c210e9641ec22e8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..2b914ba0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a03b17113367c3f7", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 12110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 20185360.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5543392, + "vin0": 0.5543392, + "idd": 2.299929e-05, + "gain_lf": 28.78626, + "f3db": 20185360.0, + "ugf": 556581500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..b6611d66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 12110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 20185360.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..c3eaa931 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +.ends C12_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..0f63a37e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C12_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..e91de72d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..dc3e5ed4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C12_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "09cbc581b674ed48", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..421cc25a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9088126c3989addc66591af7b14c4936432c4c16b9ba78399ade81ef9a6c0ea0", + "qualification.json": "30edf565291e7ba07f0fa5bd477f647ebf94626241b1218e0bd625cd0e02d20a", + "specs.json": "7705568bd7c235ccb4b4e2dc85e39cb0f46180128997f828ddada71d1ec0ca99", + "target.spice": "00ca1fafdab68caa37415e49a3184fb158407fc6e15e62128d511bd001200911", + "target_lvs.spice": "c5b433161b862602c28687c7625ccbe49f89b003260fe72c69fc0f37b9220163", + "testbench.spice": "9b076a2ab10b168f80a1be1dce5d6b9d9dc0554fad2c467a950b966e311c0355" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..3de0d7c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "09cbc581b674ed48", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 6334000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94605, + "f3db": 10557420.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5279493, + "vin0": 0.5279493, + "idd": 1.751375e-05, + "gain_lf": 30.94605, + "f3db": 10557420.0, + "ugf": 374160700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..520a1dbb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 6334000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94605, + "f3db": 10557420.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..63e7a637 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +.ends C12_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0381837d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C12_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..3504d8ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..bc2acac5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C12_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "47c566519aff0867", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..56e8a924 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c0cdcc285c775fd138d58246f53181c9c3cf98df377af8510961709af2a790f2", + "qualification.json": "8b7a9fe4c44cd009b24eb787cebb232f0a5484b9d972690889c2e6458034d560", + "specs.json": "1408308ae7e5e1f41531f351e5e046e52a25d3f9515847cd695241e0c10b3070", + "target.spice": "c8483302283d274f1a8852ff05526a67b9eaef4b7e4d5fdcd38a2116e9e9477d", + "target_lvs.spice": "3de74d52e03e0e6bffc84f04ca30e5a02ba3342c1c5401cf6864720f473b0730", + "testbench.spice": "1e9084bcc14aa368aaa6c6fbccd858711db6370db951608f3cf55b915f98aa4d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..81cf336d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "47c566519aff0867", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 24200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 40334740.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.536533, + "vin0": 0.536533, + "idd": 6.105175e-05, + "gain_lf": 30.08356, + "f3db": 40334740.0, + "ugf": 1301497000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..54d9e4d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 24200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 40334740.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..8af13855 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +.ends C12_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a3863017 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C12_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a9215b6e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..28d39226 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C12_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b8a8396df71d5d77", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..83f8ba62 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "97c2420f6df011cd268de83c1dae6a1ca8ffb2fc9de943b3285760e5081eeeaf", + "qualification.json": "e51d3486239ad646480233a62957169b790984ce40debb6b9bacb99258c807ed", + "specs.json": "4569b0124db98c13cbbe9d08f4b55299d15d6fa9e791c506b7cf9ca81067d9b4", + "target.spice": "637e13ec741e9b917751661fd54694153d30c0bbdcad9453b7cd239f67c23ebe", + "target_lvs.spice": "92051af35df435d8b868997a12c3f29052d7f3edf50a1a866800c737b1d01d00", + "testbench.spice": "ca7bd1fcb682afea2df100b0c15ff9f2ead0922f19e47804af263b33aab29151" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..29348942 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b8a8396df71d5d77", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 34570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 57621230.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5543392, + "vin0": 0.5543392, + "idd": 6.899786e-05, + "gain_lf": 28.78626, + "f3db": 57621230.0, + "ugf": 1593823000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..d839f370 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 34570000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 57621230.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..40f9ca47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +.ends C12_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ba08d1bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C12_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..2f2c2b3e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..af7284a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C12_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e7a468f5c301824d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..723c8f98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2f1455f74288121c826a39cf98553225229065f504f1619cbf6177e301ba2569", + "qualification.json": "81f0fe509a29d1137c571f3fe71a5a0c556672a2bb5ecab8fe1e4d7d95991376", + "specs.json": "ae9030f10a37d372bad40e0f5cfefab0ab640e964f92c21d44e93edec4126bde", + "target.spice": "9291732b4a227b2702692d31cc609c4436b102e5c6ed19319277820f1efacb46", + "target_lvs.spice": "93e2d81a39c664495863fb1651771f509761809ab1e98928e68e1d214ba04e99", + "testbench.spice": "0c8ac091356e26698f74796afd9d922b6fc836e72a187a7e1f5377523a72c82e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..913802cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e7a468f5c301824d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 18080000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 30129050.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5279493, + "vin0": 0.5279493, + "idd": 5.254126e-05, + "gain_lf": 30.94606, + "f3db": 30129050.0, + "ugf": 1078875000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..e4854adf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 18080000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 30129050.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..ea05615b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +.ends C12_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c6b5d69d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C12_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..6eb36414 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..0ca39c77 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C12_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "42d505e7cd3febc6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..1667e072 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b1cb022ec5875f97e1af8ec87ad9e361626bdb1bfcb841c77cc16bb09e881c45", + "qualification.json": "1d0db88047627fc8bda96e231053196c1038c2888c37db7d22681291f45a1e54", + "specs.json": "7c8e8d1505e4e8c29eff61b2e982a851fa30f0d01161896508fc831db8d0d897", + "target.spice": "86db6d8ef778d11b28eb2ae5455eb09d6e5de859d1880437edfae25eb07cd110", + "target_lvs.spice": "8b58e8689830aee1d172423ed249412bc389c0a6782302bb6dbfbccdcd11dda2", + "testbench.spice": "d754f2ee026747f0429f83fbe49e6fa501fc718c80b0885ce8cc487715d446bb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..7d66d32f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "42d505e7cd3febc6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 16540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 27558440.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.536533, + "vin0": 0.536533, + "idd": 4.070117e-05, + "gain_lf": 30.08356, + "f3db": 27558440.0, + "ugf": 884930600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..2d9ce672 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 16540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 27558440.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..d297ede8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +.ends C12_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..81b64d6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C12_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..7abcb55a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..67cd95d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C12_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "48ee1a2627474a85", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..8b28fdf3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6695a0897a2a6d6f01bd69992cf66234d8f309c6c6b05622072fde4fb8da5886", + "qualification.json": "ae4269ff787c64fa1d195582593ecdabbc51d3120db6cd8dc3351ec19e7a07ad", + "specs.json": "6d64193173e2ef8207948bf462396ead3a892867905098e72d14b62fd3d16ab1", + "target.spice": "39707f948806ee3eff9b7e28208dc76b50884162be6f34d3df195bb2f0863863", + "target_lvs.spice": "c7527a657d0a08a1869feb31c4d88303ba56163ac305961a108b9f2c42b188ad", + "testbench.spice": "81e838aaa876df47714d35c8e7772f25f7695c7bc556beb48b094776cdfa663f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..fa353570 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "48ee1a2627474a85", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 23620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 39366570.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5543392, + "vin0": 0.5543392, + "idd": 4.599857e-05, + "gain_lf": 28.78626, + "f3db": 39366570.0, + "ugf": 1087796000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..ecf32bd9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 23620000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 39366570.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..1f879ed0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +.ends C12_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..44912493 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C12_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..b8371229 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..ce64e7bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW1_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C12_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4eb2f9a567fcf389", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..d505b830 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "db02b0a722f1b7ffa4e4980ed193087b12d8fb010a91a869c17cf598f00e3b9e", + "qualification.json": "a4a1912dd89b27fd058c5e3385809e380ea7cbf5f2ee087d6a34484cefb62663", + "specs.json": "4f12f44b3ad0d20c79a13ab3045627330e8c9962252f3e90e4a3793c0e63e5bb", + "target.spice": "e4b4440d2500e119115cd4a0576b5456138a565188f8124fbffb0435ffafbab3", + "target_lvs.spice": "5b13346f1f46005d20c5e9131a8396a52c6a43723c974796f317b85b9fd60387", + "testbench.spice": "c284c095e025052d33341e95b6fe6812a5e0206478b9fa3caec18f29b6cd5757" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..26ba5ac3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW1_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4eb2f9a567fcf389", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 12350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 20588090.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5279493, + "vin0": 0.5279493, + "idd": 3.502751e-05, + "gain_lf": 30.94606, + "f3db": 20588090.0, + "ugf": 732416700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..de6b70d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 12350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 20588090.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..6e4eb4a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +.ends C12_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..310ea854 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C12_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..5a7e47f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..97c68e3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C12_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0f43b765ca2619dc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..f1a15ff7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "47e5623f1c4943236fa6a1e4bf7020b8139b69c3f3cc7150e964ebe4233aea33", + "qualification.json": "221b73a848a5badac4b6e91b221deeb7a5b114abcd2d1458470713fc41ac03db", + "specs.json": "d16ec984cc46f48fd3c644c60dfac309e387ed6a882ae3ca65f463f7ea233fc5", + "target.spice": "38bb9cdde9a04f17e51ef2b0335b9a71f545916cc2ce0088335b4114483986ff", + "target_lvs.spice": "e7857ff1ec9bc62d85405527ea12a293695c51d407b890a7f5432f81db671b58", + "testbench.spice": "cad14209c509568f95c4d70c06cbbbc2db8a7e0cb2625604e0dfc589987e43a6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..191c6beb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0f43b765ca2619dc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 31500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 52503150.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.536533, + "vin0": 0.536533, + "idd": 8.140233e-05, + "gain_lf": 30.08356, + "f3db": 52503150.0, + "ugf": 1703299000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..9faf9a6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.08 + }, + "f3db": { + "min": 31500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.08356, + "f3db": 52503150.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..5f84f4ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +.ends C12_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..74d9ba26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f12 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f13 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f14 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f15 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C12_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..87118327 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..dd1b5eef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW2_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C12_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f7e4b7e71115c2a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..c2883ed5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "55ac39c2757e30b542cce085bc495ce72557aba49e4c3291332258a1f37c59df", + "qualification.json": "02db435b18e7a876e98d8c3ad58a86a999fcc515fea1e3df46136ee878c94b5d", + "specs.json": "435398b90f2cd6baa2b487a5838139fdaf7c25fffd3df7436d0ab6e124778435", + "target.spice": "e46b87008f6b2a6d4a4768cc1bd8bfeb5e50de24c5bc75a6b026b541396fb463", + "target_lvs.spice": "b00cd4eb1e844b097812239798d117a1b31d3a46407ecb39ea9c011f618b9e28", + "testbench.spice": "9517b40e6ce8c2b56c912d27f75bb5ce1112c2619df2df7f34c522d4b5d80423" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..7f8fe482 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW2_sL1", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1f7e4b7e71115c2a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 45010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 75008680.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5543392, + "vin0": 0.5543392, + "idd": 9.199715e-05, + "gain_lf": 28.78626, + "f3db": 75008680.0, + "ugf": 2083083000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..06ff7449 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 25.79 + }, + "f3db": { + "min": 45010000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 28.78626, + "f3db": 75008680.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..49c51e34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +.ends C12_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..2418f9e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f12 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f13 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f14 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f15 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C12_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..f12fb31c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..7872b7e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_ihp130_sW2_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C12_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b5142b752376cb2d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..c347a6aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d6174b65b3eb64382f820c1d6d0d46214b65fd02fc4910d22648c18e29821190", + "qualification.json": "a5e45d6250b21b6ed4e11e7521640315446d11cbd2f8ba7499978e11ebb39ebe", + "specs.json": "ab19fe7bb68b90452bd10409ae8b14631bbb55348b966837c7c84d4cb8f2fed8", + "target.spice": "5136538995f02c8328a463716a49fb6b51084f6fd76cc25f28c79c0a817c55fd", + "target_lvs.spice": "766538a4a555c2d8c61bb0c6b7101ea995331d15e0872c2c14629d9d10945d84", + "testbench.spice": "b1d1f1f25568ade7f1fc477ee0fa2dca75a141c0c55fe027a009c243de8d66e1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..cdbe7c3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_ihp130_sW2_sL2", + "circuit_id": "C12", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b5142b752376cb2d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 23530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 39216800.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vout0": 0.5279493, + "vin0": 0.5279493, + "idd": 7.005501e-05, + "gain_lf": 30.94606, + "f3db": 39216800.0, + "ugf": 1414007000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..32bf4441 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 27.95 + }, + "f3db": { + "min": 23530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 30.94606, + "f3db": 39216800.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..2643c6d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +.ends C12_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..984fe958 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f12 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f13 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f14 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f15 VOUT1 VIN1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C12_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..89073b03 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..52690d22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C12_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "477f67efba7c179c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..9584673e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "23ef75ad61da8a86a428f1dbba3276e6dc9e66b8885081d32ef8a1f0c5a2db07", + "qualification.json": "02ba5288b43a6e072097273077aeadb23c7a2e146b20f1118e8d4462750bf81f", + "specs.json": "67b00ef91511d8aeef967b8b9f88bf1f09e3a9040b34a97537a223359a5705fe", + "target.spice": "a8ced4cd9bfa5c8c1b97321638a18a142d4e0b66fb7be511e6566bcac3e015f2", + "target_lvs.spice": "230caaac60e51cb6e481f09d431f1a6ab310894aa0fd2d8f5407e9e9e6553435", + "testbench.spice": "51521728bd8e6d91e62155153f7bc6c2eba5d19f498917175fa89ae0af773f8d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..d40b140e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW0.5_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "477f67efba7c179c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 1162000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41067, + "f3db": 1937173.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.9, + "schematic_measures": { + "vout0": 0.7583221, + "vin0": 0.7583221, + "idd": 5.345944e-06, + "gain_lf": 39.41067, + "f3db": 1937173.0, + "ugf": 181679400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..356717f3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 1162000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41067, + "f3db": 1937173.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..f39994d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +.ends C12_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2a8c3933 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C12_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..8bc28d81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..eb9a234c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C12_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "69bc89667e478184", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..fde7ae16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "53bee54cfe39873de0b11ee2d9fff139e7ad38ec78c6706ffea8abcf7cd18454", + "qualification.json": "81cc400281f7ca027f1459539003c52116697be69f88072c28747d534606f72e", + "specs.json": "f06ca0281318b3519da8f6e697a27bb03247dfe8e4ed887f5a90b0c58e966840", + "target.spice": "f71edcfe1467cf7fbe6bde76505617bd56e1b43a6b26a8998322fbb38215affc", + "target_lvs.spice": "ae657a409676aed9b51852fbfce62d8812cf984091864349840bf4ab06763f2a", + "testbench.spice": "ac75f1e22d307bdd995814586e19c1448d84155c4be622a66e302a983806fcee" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..9ffd4d2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW0.5_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "69bc89667e478184", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 2876000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 4792647.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.2, + "schematic_measures": { + "vout0": 0.7891508, + "vin0": 0.7891508, + "idd": 8.966682e-06, + "gain_lf": 35.44454, + "f3db": 4792647.0, + "ugf": 284493400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..16839454 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 2876000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 4792647.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..010165bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +.ends C12_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..bc24f8a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C12_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..86da511b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..3f934cbd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C12_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95e90493eaf4b295", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..4956ec42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a2f9633c0f60571c2322215377aa7cfc461ab3d9fd8847dd64e53aca744fbf3a", + "qualification.json": "5f314db5919be71d7a259e249080efb884b376af25d3acae0916b8e0deea3416", + "specs.json": "341333526e13143bdc648312ba22e4ea6bc8ad76156228f82a4debe2617b221a", + "target.spice": "9dd7fed7c17220736b567bf93c20c1539f46560a66e8139c855d0ba274f7a903", + "target_lvs.spice": "c5d830a257eee8edc828b35e7b0fc4ea6e4501d585bf04c741ebf358cc0b694d", + "testbench.spice": "13695ccbe6c8a712d4dfd972a37fb5f2bdc53d6bbe345ab3f58031fc267878bb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..fd9b1466 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,85 @@ +{ + "case_id": "C12_sky130_sW0.5_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95e90493eaf4b295", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "f3db=9.794e+05 below floor 1e+06" + ], + "spec": { + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68887, + "f3db": 979391.6 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.6, + "schematic_measures": { + "vout0": 0.7451755, + "vin0": 0.7451755, + "idd": 3.834826e-06, + "gain_lf": 42.68887, + "f3db": 979391.6, + "ugf": 134090900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..a1fa27ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1000000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68887, + "f3db": 979391.6 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..c108b6f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +.ends C12_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..8228188b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,8 @@ +.subckt C12_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C12_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..f17f1035 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..9aba75dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C12_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "26177c318efa256b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..9731a6fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d2578ca31084e4fe8137085f05d42a82783799a49636abe5e9de96d8e6910e73", + "qualification.json": "47384392e855ab21c9bdb77eb6bc56e0a170a37ee20fa2cf6fb5aab785644d33", + "specs.json": "f60fd43715f79ba5541ae480a0a1dd99241f7d3219efaf9f10d1483a398cc175", + "target.spice": "fedbfaf50c89c89ecc4a04b801b4db413748d91295b7c9ce0f5ba247e69f839b", + "target_lvs.spice": "89c118330827811f48d61fd9ff0ec7a38fb297216ee1217c231a9f192d5996ce", + "testbench.spice": "8b0649d03d5f78fbac794ce2d27af07ca4dc5581b177da07ed48e37e9a8c463b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..1e56a979 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1.5_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "26177c318efa256b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 3431000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 5718338.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.5, + "schematic_measures": { + "vout0": 0.7583221, + "vin0": 0.7583221, + "idd": 1.603783e-05, + "gain_lf": 39.41068, + "f3db": 5718338.0, + "ugf": 538082900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..2bdbd480 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 3431000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 5718338.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..0af9883b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +.ends C12_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3927c77a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C12_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..21790989 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..c143e3fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C12_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "95ec4a0ec29b0a19", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..5de4f83a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "82f82c411df5d76d5e2df6841af1ce76d3c539f16853c9494e3c4c6dfc9b1837", + "qualification.json": "9b34bf78fc3cf5d380726cb529e8f96900ab77597ac13c3c842647e73be9898a", + "specs.json": "3e238a91203d4a45b2c20ed436fae528886e91707bc9c6a14514db054eb68dc0", + "target.spice": "7c639ee28ab4f7987972413dbcfe1d9e924c182707aa1915ac284af1de0c4573", + "target_lvs.spice": "537a0c88efa3bc8426a5a62b611804cdba4a92c477dc8222c1cda1c8659234dd", + "testbench.spice": "73e5a5bef71f6cc1f81e522882d47735bdfee16d8be141f270fcefa02c9056f6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..9ebe2a69 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1.5_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "95ec4a0ec29b0a19", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 8488000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 14146020.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.7, + "schematic_measures": { + "vout0": 0.7891508, + "vin0": 0.7891508, + "idd": 2.690005e-05, + "gain_lf": 35.44454, + "f3db": 14146020.0, + "ugf": 841905800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..7ae5797f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 8488000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 14146020.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..56ab145f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +.ends C12_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ae669d46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C12_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..6afecbc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..316e0d73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C12_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95016f3292bec7d2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..d213cc6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "664734ace9cd37e340088d78ea5838dcc548c2bca2b6a1605423ff5ad5906d7f", + "qualification.json": "5a8fe20323a2bd44c2f3eb3afa3bf731d007fb9680a87871e28b7fa591759d6c", + "specs.json": "a521384b0ed8db1f283a0fa562b6ac338ab226f9ffc23e3d9ca837ef5d1654fc", + "target.spice": "ccb47331428e72a092c308188e678e3303734fb763a5a5875129eba830d10869", + "target_lvs.spice": "09c028901ae8301fffe37b5d47b8edc8cc58c6c9aaa5fde2be6db0bfd971f40e", + "testbench.spice": "8a98fdc83da695d7893cbc516e617483b43bfd62e25f73e40f001f2fd9877cd4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..7e3c1fb2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1.5_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "95016f3292bec7d2", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1735000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 2890836.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vout0": 0.7451755, + "vin0": 0.7451755, + "idd": 1.150448e-05, + "gain_lf": 42.68889, + "f3db": 2890836.0, + "ugf": 396986800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..f11e4216 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1735000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 2890836.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..ce66d5e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 +.ends C12_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..f71b28fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C12_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C12_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..6be93d79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..edabca97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C12_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a7f0b2f2b39cf7bc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..6174a5fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0548d2437bf9283fb47ba33cdaa60b3408b30976918414d879ddbba4a1e89957", + "qualification.json": "fb47521e0d3ae7c1ea150983b6d16700f6cfe786a1ac7da5b9a740d2fa775ef6", + "specs.json": "238ed258a737512faf37e4f2ba389e056671c2ef3f2b462d9581feaf6eed226f", + "target.spice": "e009e02c582794f822ea53a2e1e54fcd667e71a4670ac9db7863183ca2340670", + "target_lvs.spice": "10544efe1015f3be3f7e8ba6621efabc677dfece4457099ab74bd9e97ecb24f5", + "testbench.spice": "f90638d7bd1c39ad99e3dc4c2afd97831f15a39df40891cf54f9f1970c686a9f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..9d4a12b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a7f0b2f2b39cf7bc", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 2306000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 3842948.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vout0": 0.7583221, + "vin0": 0.7583221, + "idd": 1.069189e-05, + "gain_lf": 39.41068, + "f3db": 3842948.0, + "ugf": 360726400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..e90e7930 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 2306000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 3842948.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..200315dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +.ends C12_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..bbc624ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C12_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..7186501f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..2002afe0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C12_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bde578a4c1c724f3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..f525de12 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3a358cc5d79d4cfc8f6be02e800904c83e345800f6a8463ec9684bbe27a5a21c", + "qualification.json": "190e2d47d04cfeef089e47482602a9525a873d2913396ede12f73cfaa4004a8b", + "specs.json": "e9f31a7706ca22bf0bcd9327e453ab664efc0910b4679d47558621e490a90c7a", + "target.spice": "85b876e5bae65428d52177d5e9833a0e599d2b15ba11313b06ce292d8834cd12", + "target_lvs.spice": "00553f15f9fa4c1329b328255a772ff3340f8da8d64fa6d7736f7d94f8dcc0b2", + "testbench.spice": "9be34dc59c1dc03e2072ffb652b3e5417d30e76841cd8963f630ec2672e8403a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..82b228a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bde578a4c1c724f3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 5704000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 9507317.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.0, + "schematic_measures": { + "vout0": 0.7891508, + "vin0": 0.7891508, + "idd": 1.793336e-05, + "gain_lf": 35.44454, + "f3db": 9507317.0, + "ugf": 564509400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..f0e8ad40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 5704000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 9507317.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..97564905 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +.ends C12_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..f910a292 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C12_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..cf7ef9fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..a83b4ac6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW1_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C12_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c715dce9369810b6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..bfa003df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f8bd2304242f9f000ab9a54954996ef3ffbcb08e85b1ebd3954e777e5f2e4c06", + "qualification.json": "cc42ae0e1a3f7631b7b726b827f3ca7d3688e4ee48f80ebbd8c577f8458752e0", + "specs.json": "b3b67bd4cd5b1efccaea019a63ee8a8b0c249e5c0888d00ed4f5f209fcf57361", + "target.spice": "27264bb50156ae0707da03416a6a64da05990dc7dd6cb41e8dcc7964834aadb9", + "target_lvs.spice": "3c3e22e59c0186122009a5b7300ccce096d0f636b945e65e897ce751da90daae", + "testbench.spice": "90e325a0b386b449b929c66cbc594c41377e3ff724a550ad246a3e742730c3b9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..c66e49f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW1_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c715dce9369810b6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1166000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 1942822.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vout0": 0.7451755, + "vin0": 0.7451755, + "idd": 7.669652e-06, + "gain_lf": 42.68889, + "f3db": 1942822.0, + "ugf": 266463300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..5fb27f6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 1166000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 1942822.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..05b6cb14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +.ends C12_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..76cbb8ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,14 @@ +.subckt C12_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C12_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..208dfd8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..25803ef7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C12_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b36759efdec0cc84", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..32a3b731 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1b7e6a414b9cd6a0467e33ba2b73d31232dd13eb3f79a7cea3fb3bc272afe295", + "qualification.json": "079cdc0d6064d52133746ebde50a0389a0ad6c875754d7bd9166d6ec879fd5fe", + "specs.json": "3d66a8e2fd58b047d413f360d10bb213d7c6f070835b7415e9e64bba83148b47", + "target.spice": "a2259b2961c62a70fd4fb376988d29835f7947dfca6c87a9e516b0fb016a3cfe", + "target_lvs.spice": "002924a1e5b8a4f91d1b7c862cc7c9f1d986c6e8c159ac83d5e4ff97aff466b6", + "testbench.spice": "c450f83a7c1e8d224fc4c38e38c20a2c9b8376c12389891e70b036a2154b5c27" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..971f3bd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW2_sL1.5", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b36759efdec0cc84", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 4538000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 7563395.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.7583221, + "vin0": 0.7583221, + "idd": 2.138378e-05, + "gain_lf": 39.41068, + "f3db": 7563395.0, + "ugf": 712515700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..b4ce78be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 36.41 + }, + "f3db": { + "min": 4538000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 39.41068, + "f3db": 7563395.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..3ac17382 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +.ends C12_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f54e1d5e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f12 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f13 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f14 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f15 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C12_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..944963d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..ba79589b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW2_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C12_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "618985fdfbbd2dd0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..4db8ee16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "156a22ab38d8087b1e0c55412bb393919cf69a91a1a3c003aaec8c2f6fc7b21d", + "qualification.json": "526346d11626330f12554727138e877e1d10accd58fd7dcc6e9dad9f4eec758d", + "specs.json": "aab382829ce0de95ec0d23afbc93652a93d9a42d61eb30c07f812f97576432ef", + "target.spice": "391f5f61456d86cd863de362f52956b049b6b8d919bd06116780ec1dd8e4830f", + "target_lvs.spice": "e264ee4bc97c9c428c9bdfe1c353a595aab8a9e6c027121c579e04feb8ef88a4", + "testbench.spice": "4a40d682d4ca04bdf8d199a7ce1e41704efdec420072f3bf8c49f88b738f13a9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..8d93487d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW2_sL1", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "618985fdfbbd2dd0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 11230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 18710300.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.6, + "schematic_measures": { + "vout0": 0.7891508, + "vin0": 0.7891508, + "idd": 3.586673e-05, + "gain_lf": 35.44454, + "f3db": 18710300.0, + "ugf": 1113531000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..9c1fb00f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 32.44 + }, + "f3db": { + "min": 11230000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 35.44454, + "f3db": 18710300.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..433259e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +.ends C12_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..9f7e4e37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f12 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f13 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f14 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f15 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C12_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..d0d0716b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..a2003be9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/case.json @@ -0,0 +1,88 @@ +{ + "case_id": "C12_sky130_sW2_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C12_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b9b7f63f683b8ad1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "M2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..bd4c221d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "517ca83f27558040856baa754f7163530a83222f840810e3afa0b33e5fa911c0", + "qualification.json": "3e01854a1d7a20f1623c547642811c4b431c5e84589dd02479c0a8f09a438fcc", + "specs.json": "7c8673ce260cf88fa1c4ec20ac9b801d5ec423132580e75c153df8c83671af23", + "target.spice": "fc55589f93620ecb9534969284e10a47394a211adee70c9debe4646ebf2267c3", + "target_lvs.spice": "8da050ed6e753989bc34a16e4c5f18faa8cea231eb551acdfd2eff570af031d8", + "testbench.spice": "6aa8b5b30e3d7a9e92f3a660bfc35382d0da5c43d1a98af222456531e4acfdc1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..f319e59e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/qualification.json @@ -0,0 +1,83 @@ +{ + "case_id": "C12_sky130_sW2_sL2", + "circuit_id": "C12", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b9b7f63f683b8ad1", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 2294000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 3823403.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.3, + "schematic_measures": { + "vout0": 0.7451755, + "vin0": 0.7451755, + "idd": 1.53393e-05, + "gain_lf": 42.68889, + "f3db": 3823403.0, + "ugf": 527922900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..a15f36b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 39.69 + }, + "f3db": { + "min": 2294000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 42.68889, + "f3db": 3823403.0 + }, + "floors": { + "gain_lf": { + "min": 15.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..ee017319 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C12_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +.ends C12_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..dea4b606 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,26 @@ +.subckt C12_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f12 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f13 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f14 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f15 VOUT1 VIN1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C12_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..ff0ac888 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C12/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C12_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..57969cf6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C13_gf180_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.84, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.86 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.84, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8b11bd64855278aa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..6083f180 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c19b5dc5c44ee12afa720b9c1438e24520646170b0d2ed1740ec6febbdbf762e", + "qualification.json": "14765af96afee26244b44e758ca7b60bd76f9b63cb537ffe1c57ff57f0ab2b27", + "specs.json": "b04b1fe5f505c140f224ae4b53708798e779f4ecefe85c3b96d47972c61ffa75", + "target.spice": "2c101c4f556ad20d2f4da51a08f363a136aa8ced0dfdb478995598f7dced0cb1", + "target_lvs.spice": "27065f283ab9f7aac1fcc9e7f0235dc7ca5c50b825fb74e7e92348e28470cd48", + "testbench.spice": "3612bc1388bbfd574d2f4eb7426b9b9183020e597908bd8fb599357b71734fe4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..82677ce8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.84, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8b11bd64855278aa", + "mirror_pass1": { + "vmin": 0.4243952, + "status": "passed", + "vout_test": 1.86 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5244 + }, + "_frozen_from": { + "schematic": { + "err": 0.0032835, + "vmin": 0.4243952 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.006567e-05, + "err": 0.0032835, + "vmin": 0.4243952, + "dev_at_vdd": 0.01314676, + "gout_t": 5.70892e-08, + "rout_t": 17516480.0, + "vout_test": 1.86, + "rout_nom": 17516480.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..eaef486a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5244 + }, + "_frozen_from": { + "schematic": { + "err": 0.0032835, + "vmin": 0.4243952 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..77dde585 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=0.84u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=3u l=0.84u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=3u l=0.84u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=4 m=1 +.ends C13_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..dcd9657e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.84u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.84u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.84u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.84u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.84u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.84u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.84u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.84u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.84u +.ends C13_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d8c4332c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.86 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.86 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.86 +echo vout_test = 1.86 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..079a5417 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C13_gf180_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.56, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.56, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7c3b860a1fe73745", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..3c48630a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "50bfa53b4b493d7754fa77fea49c876f6a77aeb7c7e71084a8b99baee187facb", + "qualification.json": "33ccf08e870024843d2207424a8a7730c2aef03c13d039f738dd92ee829506ab", + "specs.json": "f7f09c7844d29883a4b591d8634aa44af53cb3ca5477d9095c52f1e1670870f9", + "target.spice": "fda69d884e07c096d6c9c64d4484e7209e1eafa30631f6959e7a8cece05709ac", + "target_lvs.spice": "244345cbae8cfd7bdef895adf014a1c6c1e30e367def787e6a55251aebb1b88d", + "testbench.spice": "71f365bcc8c8e8a9102b5992c1c290c711a79d95313afc42a05540952184dd6d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..946f9a68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.56, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7c3b860a1fe73745", + "mirror_pass1": { + "vmin": 0.3788226, + "status": "passed", + "vout_test": 1.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4788 + }, + "_frozen_from": { + "schematic": { + "err": 0.007247, + "vmin": 0.3788226 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.014494e-05, + "err": 0.007247, + "vmin": 0.3788226, + "dev_at_vdd": 0.02427484, + "gout_t": 1.244677e-07, + "rout_t": 8034213.0, + "vout_test": 1.84, + "rout_nom": 8034213.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..c61f05a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4788 + }, + "_frozen_from": { + "schematic": { + "err": 0.007247, + "vmin": 0.3788226 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..68040d3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=0.56u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=3u l=0.56u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=3u l=0.56u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=4 m=1 +.ends C13_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..c76bdc3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.56u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.56u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.56u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=0.56u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.56u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.56u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.56u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=0.56u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=0.56u +.ends C13_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..a81b7f4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.84 +echo vout_test = 1.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..d6cff297 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C13_gf180_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 1.12, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 1.12, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f3065378e1dba6f9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..c8d8c580 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e5fd4f65911e196ccb2ec037a6c795c806f05d87f2aa1e55d17f0a2a1a31aefb", + "qualification.json": "1e6f106a897abae265edd32f60ece87bf01c97712275698d6f5d104fa203c8e2", + "specs.json": "073dfa9120f438432105c62417fd6010ead1b71b8d9eaf2312e2fb148356a797", + "target.spice": "03de50b8db2a81c048b0ae578c3804895a5ac47e943c42250c61247878ed7a12", + "target_lvs.spice": "754203563918dc7bb3c2e6f50e52fbd2bde5fdd76a552953af4a48771a355c69", + "testbench.spice": "03a2b1c819849cbc44139eefbf43f514996542dcee91218ad575a29601590a40" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..ff1da71b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 1.12, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f3065378e1dba6f9", + "mirror_pass1": { + "vmin": 0.4696164, + "status": "passed", + "vout_test": 1.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5696 + }, + "_frozen_from": { + "schematic": { + "err": 0.002052, + "vmin": 0.4696164 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.004104e-05, + "err": 0.002052, + "vmin": 0.4696164, + "dev_at_vdd": 0.00840051, + "gout_t": 3.678481e-08, + "rout_t": 27185160.0, + "vout_test": 1.88, + "rout_nom": 27185160.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..e72653e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5696 + }, + "_frozen_from": { + "schematic": { + "err": 0.002052, + "vmin": 0.4696164 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..9ebd38dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=1.12u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=3u l=1.12u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=3u l=1.12u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=4 m=1 +.ends C13_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..0e849e2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=1.12u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=1.12u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=1.12u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.75u l=1.12u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=1.12u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=1.12u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=1.12u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.75u l=1.12u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.75u l=1.12u +.ends C13_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..2fdbd261 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.88 +echo vout_test = 1.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..add9f58d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C13_gf180_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.84, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.84, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.91 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.84, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d0c61bf69907be03", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..16aa47df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a147bd3f7921642644e387fe9e7e0f512bec44f42d6a7e7c842df0c282266ffd", + "qualification.json": "a322fe31baaa7d59f6e51d9a049c9592f6eff3f636a20716f3dc9bd27ba80f1e", + "specs.json": "60521a7dd24634a49c87f92365415d5509a5de55b75a77c9596916cd3ce91bb5", + "target.spice": "ff3186b38999453afbee0fb6f4a6c5409d967b17922bc51d08bdc87940cf5f51", + "target_lvs.spice": "158598eff07e80e1f89bd421f946229f022ee40165f241bd096bb7064db53a77", + "testbench.spice": "a293cfb77bb58d7d5603a1247be62025b3e862acf54ba0004a6ba0b2b025dfc9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..3a9e53d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.84, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d0c61bf69907be03", + "mirror_pass1": { + "vmin": 0.514447, + "status": "passed", + "vout_test": 1.91 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6144 + }, + "_frozen_from": { + "schematic": { + "err": 0.0026085, + "vmin": 0.514447 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.005217e-05, + "err": 0.0026085, + "vmin": 0.514447, + "dev_at_vdd": 0.009134582, + "gout_t": 4.323265e-08, + "rout_t": 23130740.0, + "vout_test": 1.91, + "rout_nom": 23130740.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..b9d6edc3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6144 + }, + "_frozen_from": { + "schematic": { + "err": 0.0026085, + "vmin": 0.514447 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..9eb45d3d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.84u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +.ends C13_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..edba15b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C13_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..c7c8370a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.91 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.91 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.91 +echo vout_test = 1.91 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..22ba7f3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C13_gf180_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.56, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.56, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c3220a42e3e2e956", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..e23dfb91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "32dbc9e9bd046a6da5a7863715e1a8cc59e647d3bce0130bf6c254197bfef82c", + "qualification.json": "6d46a0a56b24f85353186db786ee76d0d44a891e184c3136b7100ce56a687d3b", + "specs.json": "074cfb2bc7f6cacccc5062dd364dfb5494061d068326678ec7a06d450127dd1c", + "target.spice": "db967eeaf377f7881d4e254a401bee6e9780d46c976758114ff0960fd483ccfe", + "target_lvs.spice": "539cfa3d5cd4986fc795d9e11bf28faede54d2ec4388dc58b2926338aa5407e4", + "testbench.spice": "f2a41b7ca81c1d5bd3a4b0f6cc5cc344c3155f15db64beff1da38960ce0f102c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..4c48258c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.56, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c3220a42e3e2e956", + "mirror_pass1": { + "vmin": 0.4546396, + "status": "passed", + "vout_test": 1.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5546 + }, + "_frozen_from": { + "schematic": { + "err": 0.00595, + "vmin": 0.4546396 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.0119e-05, + "err": 0.00595, + "vmin": 0.4546396, + "dev_at_vdd": 0.01859027, + "gout_t": 9.758502e-08, + "rout_t": 10247480.0, + "vout_test": 1.88, + "rout_nom": 10247480.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..b6964cf0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5546 + }, + "_frozen_from": { + "schematic": { + "err": 0.00595, + "vmin": 0.4546396 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..7b3409ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1_sL1 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.56u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +.ends C13_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..6fe9cf6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1_sL1 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C13_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..8445676d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.88 +echo vout_test = 1.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..1ccf447b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW1_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C13_gf180_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 1.12, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.94 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 1.12, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "83ab95de4bd1df51", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..38d5528f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f9ed3b9ee6c662a9c28d27921ce4f588765c668acd969c343c8c7726492482f8", + "qualification.json": "548bea22d30c39d2178b55c9808967857ca357b58a42f41a1f71fa43df495e0d", + "specs.json": "ec0ce58aa325b62b348aff498daa8dd5c5966e290ee5c839b11c1512856a15bc", + "target.spice": "f8c3a4a4a281c586f2f03333304d803ac926504b4cf7ab94d34595e4cffd3e2b", + "target_lvs.spice": "c4ecab53011eb3ff777eb727dd317d3ae7fcfa3bbfcf51b579a87bef874c2d97", + "testbench.spice": "a19bd3b8dcd3b9d4c9327765b78ceccc1681cc90e1e3662ae54430c7dd3fdb41" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..fc500b72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW1_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 1.12, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "83ab95de4bd1df51", + "mirror_pass1": { + "vmin": 0.5713862, + "status": "passed", + "vout_test": 1.94 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6714 + }, + "_frozen_from": { + "schematic": { + "err": 0.0016055, + "vmin": 0.5713862 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.003211e-05, + "err": 0.0016055, + "vmin": 0.5713862, + "dev_at_vdd": 0.005457576, + "gout_t": 2.738518e-08, + "rout_t": 36516170.0, + "vout_test": 1.94, + "rout_nom": 36516170.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..80c5334c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6714 + }, + "_frozen_from": { + "schematic": { + "err": 0.0016055, + "vmin": 0.5713862 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..886e0b55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW1_sL2 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u nf=1 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C13_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..ca8f5dbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_gf180_sW1_sL2 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C13_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..3bd344d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.94 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.94 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.94 +echo vout_test = 1.94 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..1ebc063a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C13_gf180_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.84, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "247be6bcb62f3bd4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..178b8ea4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "48b93535f43ecc918954e3854fcbe84c81de3fe1bb8931477009acb7ee07e49e", + "qualification.json": "cbfeef37112cf85f8e1cb8223d73d32f5ee73cf9375dd34894fb5a19011ccdc9", + "specs.json": "b7bba9ac6a76c4b582392bb22d2a52ca020742d4ca5fff001569968f473c9bc5", + "target.spice": "d3fc3c282b6ebfe7e15f5ccf4ac523132b53edd583087f3cfe98b903da4d85f5", + "target_lvs.spice": "6dd0e2625f4c9d6218b17330ced8a8ae379784f5784d979e458f32dc834602ae", + "testbench.spice": "35fc09dbbcceb2e540d418ffa828828ddeef88616e51cf37e1136f4ab53debce" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..108140c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "247be6bcb62f3bd4", + "mirror_pass1": { + "vmin": 0.3754779, + "status": "passed", + "vout_test": 1.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4755 + }, + "_frozen_from": { + "schematic": { + "err": 0.0040535, + "vmin": 0.3754779 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.008107e-05, + "err": 0.0040535, + "vmin": 0.3754779, + "dev_at_vdd": 0.01609027, + "gout_t": 6.94235e-08, + "rout_t": 14404350.0, + "vout_test": 1.84, + "rout_nom": 14404350.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..6c458697 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4755 + }, + "_frozen_from": { + "schematic": { + "err": 0.0040535, + "vmin": 0.3754779 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..56eaf911 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +.ends C13_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..0a30374c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_gf180_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f4 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f5 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f6 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f7 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +.ends C13_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..a17a13cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.84 +echo vout_test = 1.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..f9d03611 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW2_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C13_gf180_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.82 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a061c1e243689d8a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..33ae8c5a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "208d96b0e9a6a93f30c3c42dafbf912f88e6b413c65caecf164e807d682c1a16", + "qualification.json": "f6b1c88648488d7f30af9d0b5f39f556686727fcaf24d83236e0008e673ab28d", + "specs.json": "c9e52c9776d699938d8691b05858ea2be7cc69da6028dd639596a22d6358c9a6", + "target.spice": "93ccf18578ec85e55360ac3cf55cdb9e4f20e644425e87b711b6c5a23ff326c8", + "target_lvs.spice": "644c135d0d5253fe33453586a2c35778e6cbb65c75af70acd14d8db71ce5d450", + "testbench.spice": "91ee8ba87bb9b3e6c15a92d8e103479c2d094d2fb0bf589f22359105f6cec8a0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..5fd86ac6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW2_sL1", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a061c1e243689d8a", + "mirror_pass1": { + "vmin": 0.3391952, + "status": "passed", + "vout_test": 1.82 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4392 + }, + "_frozen_from": { + "schematic": { + "err": 0.008924, + "vmin": 0.3391952 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 2.017848e-05, + "err": 0.008924, + "vmin": 0.3391952, + "dev_at_vdd": 0.02969435, + "gout_t": 1.510911e-07, + "rout_t": 6618531.0, + "vout_test": 1.82, + "rout_nom": 6618531.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..b194c150 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4392 + }, + "_frozen_from": { + "schematic": { + "err": 0.008924, + "vmin": 0.3391952 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..c286bb9e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW2_sL1 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +.ends C13_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..52fa5ec3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_gf180_sW2_sL1 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f4 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f5 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f6 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f7 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +.ends C13_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..53c2e4e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.82 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.82 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.82 +echo vout_test = 1.82 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..bf505679 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_gf180_sW2_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C13_gf180_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03, + "vout_test": 1.86 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf140597675567a1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..bd557a1b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "95ada34e78da102a877a7c54d7199629474c20cb6555cf70f5fa16a5800d2324", + "qualification.json": "6c47b21a92059a3db3dba30f39befc847de6a498e989276d099d38b65b534496", + "specs.json": "9c5c715366e9f90b12c24e9d43a3de8b9171f03242fafd9ed731c7bd510e87e1", + "target.spice": "9980874a2c354e31c32378bb846639abb6e99ade53a5ef588e3dabcb56622a71", + "target_lvs.spice": "8179a17be4c38aca2db6865b67f1f29b638fd0b3248d708c8b3a4b0242c5359f", + "testbench.spice": "64b6821dc98d66f645ccbe499e9e328285ea429bd426f517b3e69572d30c9217" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..60757093 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_gf180_sW2_sL2", + "circuit_id": "C13", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.56, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bf140597675567a1", + "mirror_pass1": { + "vmin": 0.41394, + "status": "passed", + "vout_test": 1.86 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5139 + }, + "_frozen_from": { + "schematic": { + "err": 0.002549, + "vmin": 0.41394 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 2.005098e-05, + "err": 0.002549, + "vmin": 0.41394, + "dev_at_vdd": 0.01042855, + "gout_t": 4.486788e-08, + "rout_t": 22287690.0, + "vout_test": 1.86, + "rout_nom": 22287690.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..05114e08 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5139 + }, + "_frozen_from": { + "schematic": { + "err": 0.002549, + "vmin": 0.41394 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.32 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..709d6a28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_gf180_sW2_sL2 VSS IIN1 IOUT1 IB1 +MM1 IB1 IB1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 IIN1 IB1 net15 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net15 IIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 IOUT1 IB1 net14 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM5 net14 IIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C13_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..d3036099 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_gf180_sW2_sL2 VSS IIN1 IOUT1 IB1 +MM1_f0 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IB1 IB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 IIN1 IB1 net15 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net15 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 IOUT1 IB1 net14 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f0 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 net14 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +.ends C13_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..f3c45fbe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.99 v(IB1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.86 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.86 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.86 +echo vout_test = 1.86 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..dc665540 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C13_ihp130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.78, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.78, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.78, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.78, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.78, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.73 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.78, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f941650ac44f4d6f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..fe6b12e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "42a4e54a4553e4b656e6e99a219494f8c13ecee3076b679c47a69c76d6856900", + "qualification.json": "603ee2c483525252ee04cf11ea19882b0b0c64674e4526164cb0cea3ff57c6b7", + "specs.json": "4fe0aa117fb127a2e97d2024c75f112051c48dd9a4bf58051ec24f1a3821f207", + "target.spice": "1535aecb07df43d8359b4fcddad93f132dc2d1ed177599f8b85548d5f537639d", + "target_lvs.spice": "06f12863d04ad38f14ea5084917cb05cb0041714a35ff3a2d1ecb1021018ef31", + "testbench.spice": "ea85e25f18febf79a0d5ffb1e72086d0fd14f0e00190925fae839b58c9817416" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..f7bb2dcb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.78, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.78, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f941650ac44f4d6f", + "mirror_pass1": { + "vmin": 0.269955, + "status": "passed", + "vout_test": 0.73 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.37 + }, + "_frozen_from": { + "schematic": { + "err": 0.013075, + "vmin": 0.269955 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 2.02615e-05, + "err": 0.013075, + "vmin": 0.269955, + "dev_at_vdd": 0.02656023, + "gout_t": 7.633454e-07, + "rout_t": 1310028.0, + "vout_test": 0.73, + "rout_nom": 1310028.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..82055dc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.37 + }, + "_frozen_from": { + "schematic": { + "err": 0.013075, + "vmin": 0.269955 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..b0802fef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=3u l=0.78u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=3u l=0.78u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=3u l=0.78u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=3u l=0.78u ng=4 m=1 +.ends C13_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..1c16cea1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.78u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.78u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.78u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.78u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.78u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.78u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.78u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.78u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.78u +.ends C13_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4167b8af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.73 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.73 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.73 +echo vout_test = 0.73 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..86da42c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C13_ihp130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.52, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.52, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.73 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.52, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "34e3b673916c0cb0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..3ad8169c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1136fcfadcd3d47aa64c49ddd2394a14ac62bf6b91c935461232d072d7b1dfd0", + "qualification.json": "7a1e2ff3f7ac53ba962461b7d14b0fa1801a296df15e328ec1b4504c7e95e8c9", + "specs.json": "a63303f7c76fdbdb9ff97e4e8b3138ce86ca96c7c49cf83c9adc506b91010191", + "target.spice": "f9402dc63c00d30f57380815571649f26e302a9f0450cc6e3a3632ddd6030c21", + "target_lvs.spice": "5972758903ee112cf227fbe4fdd8b9bbfce0be8b0c32c799d0444450d93853e2", + "testbench.spice": "8d2553dbdf777e116166312f0441ac1709ac9282d413f419cdd9e773d4134b9a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..c32ebba8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.52, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "34e3b673916c0cb0", + "mirror_pass1": { + "vmin": 0.2513401, + "status": "passed", + "vout_test": 0.73 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3513 + }, + "_frozen_from": { + "schematic": { + "err": 0.0188565, + "vmin": 0.2513401 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "iout_t": 2.037713e-05, + "err": 0.0188565, + "vmin": 0.2513401, + "dev_at_vdd": 0.03790745, + "gout_t": 1.069849e-06, + "rout_t": 934715.0, + "vout_test": 0.73, + "rout_nom": 934715.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..3a166a86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3513 + }, + "_frozen_from": { + "schematic": { + "err": 0.0188565, + "vmin": 0.2513401 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..a27b7510 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=3u l=0.52u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=3u l=0.52u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=4 m=1 +.ends C13_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..1e7d77f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.52u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.52u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.52u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=0.52u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.52u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.52u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.52u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=0.52u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=0.52u +.ends C13_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..ce31cfb2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.73 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.73 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.73 +echo vout_test = 0.73 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..4ef2ddb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C13_ihp130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 1.04, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 1.04, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 1.04, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.75 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 1.04, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f14cb069a03f1fd1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..16d97728 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "81f58b85ec458c6b17ae5b9df689bf23d1fb2291d9167df5197624453251521a", + "qualification.json": "021436875327d1dc4ebab3f7cb2cc251174be544841c11b6c24b782ea54ed577", + "specs.json": "81a300697956f53e3a5b73fb89b3c13779fb196b36ca62bfb66995abef678f08", + "target.spice": "af6e5b13fe4119fab66ecd36f57ac5133fd30982611b3d1b2c7724d7b36054ad", + "target_lvs.spice": "1f811155d9db21e98d020e72c69c8ce0938b910268a7f62f67bbed095eb35ea6", + "testbench.spice": "768228f81392f867385e4d8e5b339eed8f2b05da3173bde250134bba66444fb7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..29d8c0ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 1.04, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f14cb069a03f1fd1", + "mirror_pass1": { + "vmin": 0.2927887, + "status": "passed", + "vout_test": 0.75 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3928 + }, + "_frozen_from": { + "schematic": { + "err": 0.010306, + "vmin": 0.2927887 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "iout_t": 2.020612e-05, + "err": 0.010306, + "vmin": 0.2927887, + "dev_at_vdd": 0.02019321, + "gout_t": 5.809266e-07, + "rout_t": 1721388.0, + "vout_test": 0.75, + "rout_nom": 1721388.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..7bedfa4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3928 + }, + "_frozen_from": { + "schematic": { + "err": 0.010306, + "vmin": 0.2927887 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..039b9f06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=3u l=1.04u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=3u l=1.04u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=4 m=1 +.ends C13_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..99fcbe48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=1.04u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=1.04u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=1.04u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.75u l=1.04u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=1.04u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=1.04u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=1.04u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.75u l=1.04u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.75u l=1.04u +.ends C13_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..a7e50432 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.75 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.75 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.75 +echo vout_test = 0.75 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..e8929595 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C13_ihp130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.78, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.78, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.78, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.76 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.78, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4f4a9ce82de22f07", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..5c3048cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4b188e6cd046f5b1165f10a37d0aeac38ee476a385308a148128369902195afc", + "qualification.json": "ddd4467cb509e91daa05e50bd39081884e0d1eb1bc24c1149c28645455d830f7", + "specs.json": "b7a01c66666d5d061df7abfee5a4b4e008ecee00eea3341bb7ce3ff2b1910129", + "target.spice": "214829b8ce58d92fcb1c4c042699c5f4ca6b007ff0b03ffa4ddc8445b72b90c9", + "target_lvs.spice": "4602c5f8cfe4cdcb94d03cbaa81259d5f2fc0303b4fe55178c9f62151c135b10", + "testbench.spice": "b3d3ed36b8dcf3acf22313c3d95149fde69dd9ab45d72469b56eb5ee10e6808f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..9b465569 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.78, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.78, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4f4a9ce82de22f07", + "mirror_pass1": { + "vmin": 0.3111346, + "status": "passed", + "vout_test": 0.76 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4111 + }, + "_frozen_from": { + "schematic": { + "err": 0.0096275, + "vmin": 0.3111346 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "iout_t": 2.019255e-05, + "err": 0.0096275, + "vmin": 0.3111346, + "dev_at_vdd": 0.01941545, + "gout_t": 5.859922e-07, + "rout_t": 1706515.0, + "vout_test": 0.76, + "rout_nom": 1706515.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..f5f30769 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4111 + }, + "_frozen_from": { + "schematic": { + "err": 0.0096275, + "vmin": 0.3111346 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..35d1c3ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=2u l=0.78u ng=4 m=1 +.ends C13_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..31fc8ffe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C13_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..c553e36c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.76 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.76 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.76 +echo vout_test = 0.76 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..22e92f31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C13_ihp130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.52, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.74 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.52, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1e3699f2b75dcc6b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..72facf4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f6339de07e980c134be61fc69cae5d3ffed96955159c137c860e8696b8db1eef", + "qualification.json": "25e15435e7506221c8d26bfdac90c01921072fc7656556ea8a80ce2dbf654be6", + "specs.json": "11853bf9a8a9357c1d5915e11bab46985dc5f1d3b22e4d75f13deb1f6dafec08", + "target.spice": "03112b22ea169ae29edfc048d9e8fb1d40a555144d9b093733308a620b4b85ac", + "target_lvs.spice": "db38a38710ec043d1dd48c28fe51bf820498b3ecc2a59ca29a0f9897e9951eb4", + "testbench.spice": "0986f50815a37c797c5cf4241c76ffc15168326a9ac5ac9b90b5e32e69d09ce3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..17adaf02 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.52, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1e3699f2b75dcc6b", + "mirror_pass1": { + "vmin": 0.2824946, + "status": "passed", + "vout_test": 0.74 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3825 + }, + "_frozen_from": { + "schematic": { + "err": 0.013431, + "vmin": 0.2824946 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "iout_t": 2.026862e-05, + "err": 0.013431, + "vmin": 0.2824946, + "dev_at_vdd": 0.02833661, + "gout_t": 8.5428e-07, + "rout_t": 1170581.0, + "vout_test": 0.74, + "rout_nom": 1170581.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..20ade76e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3825 + }, + "_frozen_from": { + "schematic": { + "err": 0.013431, + "vmin": 0.2824946 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..90998917 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +.ends C13_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..0da5635c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C13_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..9b385ce5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.74 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.74 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.74 +echo vout_test = 0.74 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..b0520172 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW1_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C13_ihp130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 1.04, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.77 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 1.04, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "870f690a2828127d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..301f8503 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e692f8e0d56ff1b15799f04d5a15de197d613913c44afaf5ae4b1110e5c6ae84", + "qualification.json": "b233f1b3a0bb38c7374bf2f744ffe6e4c5cb73059d56bb27e54a719c80541516", + "specs.json": "1a14d5d0d8510001e340020b5d92f19a630e46b7d69eb19a1801a8d5d2c3dbee", + "target.spice": "52f2b685a6556f7d205ee080c5e26fbddf19ad651da682214adfefdb9292b346", + "target_lvs.spice": "0937a9c3ac140936f0ea158e40a5e3e6e895b65ea672c222e44f8c9fba35ada3", + "testbench.spice": "395a24a2bb3cb2ef8ed5334c878f81f03ff39d6522b5e1a8b6e07a768afdd05a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..0fc1c334 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW1_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 1.04, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "870f690a2828127d", + "mirror_pass1": { + "vmin": 0.341118, + "status": "passed", + "vout_test": 0.77 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4411 + }, + "_frozen_from": { + "schematic": { + "err": 0.007254, + "vmin": 0.341118 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 2.014508e-05, + "err": 0.007254, + "vmin": 0.341118, + "dev_at_vdd": 0.01455954, + "gout_t": 4.498607e-07, + "rout_t": 2222921.0, + "vout_test": 0.77, + "rout_nom": 2222921.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..6689cf0b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4411 + }, + "_frozen_from": { + "schematic": { + "err": 0.007254, + "vmin": 0.341118 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..46fbc8d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW1_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u ng=1 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +.ends C13_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..f872749e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_ihp130_sW1_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C13_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..fb93d2e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.77 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.77 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.77 +echo vout_test = 0.77 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..2bf99daa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C13_ihp130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.78, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.78, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.78, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.72 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d595e7d146a31041", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..95dde5bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0e7ed4d238b4fb3edae427a2d6458f11b6d5a913010ce3f264df5378f0c2e5e8", + "qualification.json": "e68d049cc811b3187d1b01579176a86752a624146dad0a07de090d79d508ea2e", + "specs.json": "25fa53a13518e54bed053231a1ce9a36155d69953dfccb0a07c17213d844abca", + "target.spice": "30246df5c3f14d252e922b02f518df316288e62eb6349866aa8b2ff81fda2c25", + "target_lvs.spice": "f8dbe3d724c864c46f40f2825a53cd1da8f77cdd987180b0aa5d7b41622e3052", + "testbench.spice": "1150df4f568b58e9e7f36e64115cfa115a82d3265dd3103f37c2b6a2d9a75068" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..a94f0a23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.78, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.78, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d595e7d146a31041", + "mirror_pass1": { + "vmin": 0.2463465, + "status": "passed", + "vout_test": 0.72 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3463 + }, + "_frozen_from": { + "schematic": { + "err": 0.015422, + "vmin": 0.2463465 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.2, + "schematic_measures": { + "iout_t": 2.030844e-05, + "err": 0.015422, + "vmin": 0.2463465, + "dev_at_vdd": 0.03041006, + "gout_t": 8.35527e-07, + "rout_t": 1196849.0, + "vout_test": 0.72, + "rout_nom": 1196849.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..203c7e38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3463 + }, + "_frozen_from": { + "schematic": { + "err": 0.015422, + "vmin": 0.2463465 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..3f1e5e13 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=0.78u ng=2 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=4u l=0.78u ng=8 m=1 +.ends C13_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..22d4de4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f4 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f5 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f6 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM2_f7 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f4 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f5 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f6 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM3_f7 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f5 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f6 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM4_f7 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f4 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f5 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f6 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +XM5_f7 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.78u +.ends C13_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..97dfc286 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.72 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.72 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.72 +echo vout_test = 0.72 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..a9c62588 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW2_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C13_ihp130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.72 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "89f5efd015f5dcc6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..07c3937c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "df6ce5a5ca38489f99e3410db4eadcc9b48f06b49a32f73ac99f109c23684fe8", + "qualification.json": "161f97c098f8df27b103bb49fa941703cb104790b4d47592fa8a51fb5481ec88", + "specs.json": "57b609cfd38b944d9004689ba4ae33eb72cb93475e6a11aadcef3cea56c52abc", + "target.spice": "4afa41223e3c9e03a3bc2c0d16674c83fa863a826df1a56ea81869994e9fc88b", + "target_lvs.spice": "489b322c01952f3de96460a4f8ee6d2f404fa978f29c4fccf69b7e214e8d0bd2", + "testbench.spice": "d102ed96b287f0b7e1aaa69ff0bdf184f8c131ec9b56cb0c9586c50f5565eb68" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..05aa54e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW2_sL1", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "89f5efd015f5dcc6", + "mirror_pass1": { + "vmin": 0.2329467, + "status": "passed", + "vout_test": 0.72 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3329 + }, + "_frozen_from": { + "schematic": { + "err": 0.0216245, + "vmin": 0.2329467 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.2, + "schematic_measures": { + "iout_t": 2.043249e-05, + "err": 0.0216245, + "vmin": 0.2329467, + "dev_at_vdd": 0.04239439, + "gout_t": 1.153404e-06, + "rout_t": 866998.8, + "vout_test": 0.72, + "rout_nom": 866998.8, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..2aef3ffd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3329 + }, + "_frozen_from": { + "schematic": { + "err": 0.0216245, + "vmin": 0.2329467 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..6e1b1b90 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW2_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +.ends C13_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..2853cc47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_ihp130_sW2_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f5 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f6 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f7 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +.ends C13_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..cbbf2944 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.72 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.72 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.72 +echo vout_test = 0.72 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..c2a4e12d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_ihp130_sW2_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C13_ihp130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 1.04, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03, + "vout_test": 0.73 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db11b7917011c8fb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..52e7f623 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e195689c0bf261edd14793c7a67469f25ad80c972bd2891cb31f6c386b2e845f", + "qualification.json": "47062e0a19f8ad7d047f3014588b2e00e7237f676be86eb78bf2277395326dc5", + "specs.json": "be373b28f0f1647f417306410f95dfd9111c780f7d966c91d60e02b5ea3a0873", + "target.spice": "4c9272bb3167b1e61818535f04f03f2cea85b53a93704e2ef6a0fbf57d452ba5", + "target_lvs.spice": "f560394f3b7afe413ae2bb7ab93fd166f0c8014842db1cec8e9cbe8788f1c1d8", + "testbench.spice": "b2ced9458a6cd69cd2325cc909e7914fc36dfbf9d0d3f3a2ed2b6edbb8c03630" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..02d9f7a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_ihp130_sW2_sL2", + "circuit_id": "C13", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.52, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.52, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "db11b7917011c8fb", + "mirror_pass1": { + "vmin": 0.2651642, + "status": "passed", + "vout_test": 0.73 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3652 + }, + "_frozen_from": { + "schematic": { + "err": 0.01204, + "vmin": 0.2651642 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.3, + "schematic_measures": { + "iout_t": 2.02408e-05, + "err": 0.01204, + "vmin": 0.2651642, + "dev_at_vdd": 0.02349678, + "gout_t": 6.50998e-07, + "rout_t": 1536109.0, + "vout_test": 0.73, + "rout_nom": 1536109.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..779b270a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3652 + }, + "_frozen_from": { + "schematic": { + "err": 0.01204, + "vmin": 0.2651642 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.48 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..56113e69 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_ihp130_sW2_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM2 IIN1 IB1 net15 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM3 net15 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM5 net14 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +.ends C13_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..68dcf110 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_ihp130_sW2_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IB1 IB1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f6 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f7 IIN1 IB1 net15 VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f4 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f5 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f6 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f7 net15 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 IOUT1 IB1 net14 VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f0 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f1 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f2 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f3 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f4 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f5 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f6 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM5_f7 net14 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C13_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..67f796ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.36 v(IB1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.73 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.73 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.73 +echo vout_test = 0.73 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..0516211a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C13_sky130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.45, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.45, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.04 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.45, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d1ed7a2f3f1633f3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..2f480350 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "58532f27fe888c641167bda3fb0653f3ed4e58d1669b8ca3ff7dedfa8114296e", + "qualification.json": "5cb97f84ccaf806d4c2fc109f4a218c2d452aa43ede7f814a223d664c2be896e", + "specs.json": "0acd976872343193bdeda9570de3a91974152d289091cab977389645e6cdec5c", + "target.spice": "683803b3f5f1aa7dbeeeae95e44fa45731c1b9e66a8199dc2f4bbb9ccecb3a93", + "target_lvs.spice": "af7079c8b21bc1563208ed57e89e3335f8c5ba2446dfdb4c98e86f0e6eb09dff", + "testbench.spice": "448975e079c84616f7e5bcbb093c6c56e67b21eded8eebea9e296b4eae42c3cb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..f7c59412 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1.5_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.45, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "d1ed7a2f3f1633f3", + "mirror_pass1": { + "vmin": 0.2886881, + "status": "passed", + "vout_test": 1.04 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3887 + }, + "_frozen_from": { + "schematic": { + "err": 0.005341, + "vmin": 0.2886881 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.8, + "schematic_measures": { + "iout_t": 2.010682e-05, + "err": 0.005341, + "vmin": 0.2886881, + "dev_at_vdd": 0.01758996, + "gout_t": 3.827309e-07, + "rout_t": 2612804.0, + "vout_test": 1.04, + "rout_nom": 2612804.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..0ec826c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3887 + }, + "_frozen_from": { + "schematic": { + "err": 0.005341, + "vmin": 0.2886881 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..2e553152 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=4 +.ends C13_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..aa07010e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.45 +.ends C13_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..61e8ece3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.04 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.04 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.04 +echo vout_test = 1.04 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..ef752824 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C13_sky130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.3, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.05 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.3, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bcf4ecc14cdef995", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..a00ff44e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2899f1e6435390a4476f8665657feefbcd49f9b1390d48ed8819a678be04b0c5", + "qualification.json": "514eb720ea3dde0985c0e3f3cea84492e10b4f94626a29e5ca17cdd67186d725", + "specs.json": "78d726935f14db5c99deae969b9974c8cb39228c0ef77156d6006ca21c01646a", + "target.spice": "922d6d4026b01c6ac83e341506b222ab93261719f14dad8a9d62076c79764425", + "target_lvs.spice": "3759c158f4ca05ac33bea87d6bfbec23ad360a6af06ab948571e4c57f3c6a8af", + "testbench.spice": "ebfc278a4b4baaf8bbe68365c96691b1d9ce1e795f1490acbc131758fde90c3d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..827058fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1.5_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.3, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bcf4ecc14cdef995", + "mirror_pass1": { + "vmin": 0.2971104, + "status": "passed", + "vout_test": 1.05 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3971 + }, + "_frozen_from": { + "schematic": { + "err": 0.0093025, + "vmin": 0.2971104 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 16.9, + "schematic_measures": { + "iout_t": 2.018605e-05, + "err": 0.0093025, + "vmin": 0.2971104, + "dev_at_vdd": 0.03041712, + "gout_t": 6.419703e-07, + "rout_t": 1557706.0, + "vout_test": 1.05, + "rout_nom": 1557706.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..94d38e1b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3971 + }, + "_frozen_from": { + "schematic": { + "err": 0.0093025, + "vmin": 0.2971104 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..73de5732 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=4 +.ends C13_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ef56990b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1.5_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.3 +.ends C13_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..ae193db7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.05 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.05 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.05 +echo vout_test = 1.05 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..9961fd95 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C13_sky130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.75, + "l": 0.6, + "nf": 1 + }, + "M2": { + "w": 3.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 3.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 3.0, + "l": 0.6, + "nf": 4 + }, + "M5": { + "w": 3.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.06 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.6, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8a5a90fb89a67ff2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..05bc31f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "39ccc3e85a0f0fe08efa24cd4f0be1270539b7c88c74719ddf5837c2d85e5721", + "qualification.json": "b95d8627cad43135aba7c671ddf7d6ee260c48b6004147d669675a8fd551bbd3", + "specs.json": "9f57300dc2833863929c7a10b35fb9c83afd17e9bf3f0e5e9419eb77295c97d5", + "target.spice": "70f846f1ceb8f1e4612e358786f5f5a013f9ca86e23e9869bf1cbbb148fa0645", + "target_lvs.spice": "6b47804758933d95a13feacfcbd28ace52606edab25fa5e60b175a8ee02d62ce", + "testbench.spice": "2dab3dab6ef270bf326c0c57e6f51572cf7afe6b9b410be0e584f0d1a091c1df" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..09771e9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1.5_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "unit width scaled (nf kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.75, + "l": 0.6, + "nf": 1, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 4, + "uw": 0.75, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8a5a90fb89a67ff2", + "mirror_pass1": { + "vmin": 0.3102468, + "status": "passed", + "vout_test": 1.06 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4102 + }, + "_frozen_from": { + "schematic": { + "err": 0.0035335, + "vmin": 0.3102468 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 16.6, + "schematic_measures": { + "iout_t": 2.007067e-05, + "err": 0.0035335, + "vmin": 0.3102468, + "dev_at_vdd": 0.01072303, + "gout_t": 2.426725e-07, + "rout_t": 4120797.0, + "vout_test": 1.06, + "rout_nom": 4120797.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..d47e554a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4102 + }, + "_frozen_from": { + "schematic": { + "err": 0.0035335, + "vmin": 0.3102468 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..bf808e6d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=4 +.ends C13_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e9d4a7d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1.5_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.75 l=0.6 +.ends C13_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..24e6768d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.06 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.06 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.06 +echo vout_test = 1.06 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..571a934a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C13_sky130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.45, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.45, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.07 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.45, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c59d2c767e881918", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..06c9bc28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "93a7ed953d0ca516f76c283628e798c8aff0d2a9af5b37f3db4d0be6c65e340c", + "qualification.json": "3c15c3a302a15d45c9f66f6f1fa7ac3206eaf11729a97d3fa2f6021a0cd2025c", + "specs.json": "2e4d2ed164b22ec00712227bb74280e32bd6b2fad7b6f5510d99b1466370d85a", + "target.spice": "964ce70a2b9496d8874de9bbf0a67828966bdf17fa8ca29744cda81a8485767d", + "target_lvs.spice": "74a667e7996fe65c4d638662aeee6f8976f5f8743f6a2b0a8c8564180f564ed2", + "testbench.spice": "6c0890a28ef4cac23f04115fadaafd849b1cb4f2f9a93968491ba03c015c415d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..030950e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.45, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c59d2c767e881918", + "mirror_pass1": { + "vmin": 0.3394912, + "status": "passed", + "vout_test": 1.07 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4395 + }, + "_frozen_from": { + "schematic": { + "err": 0.0040145, + "vmin": 0.3394912 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.0, + "schematic_measures": { + "iout_t": 2.008029e-05, + "err": 0.0040145, + "vmin": 0.3394912, + "dev_at_vdd": 0.01329274, + "gout_t": 3.114416e-07, + "rout_t": 3210882.0, + "vout_test": 1.07, + "rout_nom": 3210882.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..fa01dff4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4395 + }, + "_frozen_from": { + "schematic": { + "err": 0.0040145, + "vmin": 0.3394912 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..8e719231 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +.ends C13_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d447e5e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C13_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..1ab4f115 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.07 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.07 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.07 +echo vout_test = 1.07 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..6cd08bf8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C13_sky130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.3, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.06 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.3, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8e41465834e6a761", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..be8159bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "13f6f50e5ca85b5dcc8c457cebcc6cfba10ec90b0f7f629a51ce70d77dbf73d2", + "qualification.json": "e9e6d1af31dad10244b2c83acfa31788edb923bfb67b9ecdbb0ca38167ccadc8", + "specs.json": "eb6b69d195af696971458f364f42c68e3ebdf4d73891431123da7674c1c186f0", + "target.spice": "69199642dfe4bef0f9094c1b0f3bae6fc9c80549a7306bf76438315aa3920caa", + "target_lvs.spice": "bfdd88e8084a9db03d131a0229faa662240fd090f61050e79fc0b8e596558c06", + "testbench.spice": "f4723968361449938cad47045495fc3be8115a1cd31c963a9beb25b85cefd3e6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..45fcc130 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.3, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8e41465834e6a761", + "mirror_pass1": { + "vmin": 0.3184171, + "status": "passed", + "vout_test": 1.06 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4184 + }, + "_frozen_from": { + "schematic": { + "err": 0.006713, + "vmin": 0.3184171 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.0, + "schematic_measures": { + "iout_t": 2.013426e-05, + "err": 0.006713, + "vmin": 0.3184171, + "dev_at_vdd": 0.02351458, + "gout_t": 5.268826e-07, + "rout_t": 1897959.0, + "vout_test": 1.06, + "rout_nom": 1897959.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..09debb96 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4184 + }, + "_frozen_from": { + "schematic": { + "err": 0.006713, + "vmin": 0.3184171 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..3b27e447 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +.ends C13_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..e07296b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C13_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..b229e300 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.06 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.06 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.06 +echo vout_test = 1.06 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..d924a230 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW1_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C13_sky130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 0.5, + "l": 0.6, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.08 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.6, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "34d9b48425c961ba", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..ba0f0faa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4a8563336d61fb5dc3dc59781d5971350477eebbff07d569bb9b318b9eb9e791", + "qualification.json": "12d80b99336237328a4cf5701c224a87a7eb5685cbc1e3fbf26ddb7d31e5b3fb", + "specs.json": "1eb5bf1121f8ab446f1002dd674847b04888d1fc6888afde6a417daa6aa37d03", + "target.spice": "055abbe20a2c3f21c3d19d24b866f63c7c7b4223b670a2717b1fef03c361e3a3", + "target_lvs.spice": "446a5939c122f297d1841f3b7026e5ba468535f7d6efda9165be07dca8170d20", + "testbench.spice": "fe701e4cb9a450ba76ead6e8a55552d33892a7d4d5dd80ea872f2dd043c79abc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..6f819ca2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW1_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 0.5, + "l": 0.6, + "nf": 1, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "34d9b48425c961ba", + "mirror_pass1": { + "vmin": 0.3698112, + "status": "passed", + "vout_test": 1.08 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4698 + }, + "_frozen_from": { + "schematic": { + "err": 0.002608, + "vmin": 0.3698112 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 17.9, + "schematic_measures": { + "iout_t": 2.005216e-05, + "err": 0.002608, + "vmin": 0.3698112, + "dev_at_vdd": 0.00812611, + "gout_t": 2.04396e-07, + "rout_t": 4892465.0, + "vout_test": 1.08, + "rout_nom": 4892465.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..f79bf1aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4698 + }, + "_frozen_from": { + "schematic": { + "err": 0.002608, + "vmin": 0.3698112 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..282dc85b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW1_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 nf=1 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C13_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..2d058e21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,19 @@ +.subckt C13_sky130_sW1_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C13_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..78603182 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.08 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.08 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.08 +echo vout_test = 1.08 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..b0e2dfbf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C13_sky130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.45, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.04 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e301942eaaf247c4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..fbb9623d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "886a45bccd3c428f4a434b54a40e019aac90d18022d30cf7744d8618ed0f1ad3", + "qualification.json": "c2ab32dcba0c3bfbe83db7ab20465f338f208d74efe0c4e4b58c625c03d62676", + "specs.json": "7e6db8696e82c1bea7af954b793c4dc400659f9692427059c56b53374558334d", + "target.spice": "83886241d1c8a51a22e9eace56d99f1f18c77eed254ab9491460d59ec0877313", + "target_lvs.spice": "eeced37a9b693099b548b119211253e92fd76d691d94174ddd0390f51238f8d4", + "testbench.spice": "2dca32c816f0c607150758238927f0cc07813f253dbd1e43ab0f1a08f3236292" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..a5815c39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW2_sL1.5", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e301942eaaf247c4", + "mirror_pass1": { + "vmin": 0.2747151, + "status": "passed", + "vout_test": 1.04 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3747 + }, + "_frozen_from": { + "schematic": { + "err": 0.0062795, + "vmin": 0.2747151 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.5, + "schematic_measures": { + "iout_t": 2.012559e-05, + "err": 0.0062795, + "vmin": 0.2747151, + "dev_at_vdd": 0.0201392, + "gout_t": 4.284173e-07, + "rout_t": 2334174.0, + "vout_test": 1.04, + "rout_nom": 2334174.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..c6d39508 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3747 + }, + "_frozen_from": { + "schematic": { + "err": 0.0062795, + "vmin": 0.2747151 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..6f9ddff8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +.ends C13_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..21bc2630 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_sky130_sW2_sL1.5 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f5 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f6 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f7 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f4 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f6 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f7 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +.ends C13_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..2874d521 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.04 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.04 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.04 +echo vout_test = 1.04 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..a4309719 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW2_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C13_sky130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.05 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e36dae11343dafcd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..5c106f42 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "189f00d31c27b3127f46f4bc0c6df3b9eedb225dfa2caa1db526e3ce13cb4bc2", + "qualification.json": "65d4a56e4d7dbf33e519865fbfa57fb41d4e9dc76d3e1bb47ca8cd3ea5a25b0d", + "specs.json": "296c9a116faddfa3d744940047ebe3ac03207af668e0105aaf872d1da04375f0", + "target.spice": "ad98f66fc120f0042aaeac94fe785744c442a5dd22559f408c97e8ceacbee356", + "target_lvs.spice": "a4b3479eec2c2595485c0e578c7e0614c0bdff0455317752bfab3664b8068de0", + "testbench.spice": "99d33ab62e1be3bbd10b84615b41047a2bb05c0509952538d01c3bebaf0d2ec2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..2da68956 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW2_sL1", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e36dae11343dafcd", + "mirror_pass1": { + "vmin": 0.2975041, + "status": "passed", + "vout_test": 1.05 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3975 + }, + "_frozen_from": { + "schematic": { + "err": 0.010947, + "vmin": 0.2975041 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.6, + "schematic_measures": { + "iout_t": 2.021894e-05, + "err": 0.010947, + "vmin": 0.2975041, + "dev_at_vdd": 0.03467514, + "gout_t": 7.184159e-07, + "rout_t": 1391953.0, + "vout_test": 1.05, + "rout_nom": 1391953.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..f69a033b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3975 + }, + "_frozen_from": { + "schematic": { + "err": 0.010947, + "vmin": 0.2975041 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..e4c79e40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW2_sL1 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +.ends C13_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..795d1a2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_sky130_sW2_sL1 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f5 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f6 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f7 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f4 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f6 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f7 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +.ends C13_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..33aa0533 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.05 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.05 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.05 +echo vout_test = 1.05 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..d1f3e02b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/case.json @@ -0,0 +1,170 @@ +{ + "case_id": "C13_sky130_sW2_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C13_sky130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03, + "vout_test": 1.04 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ea2079e4099fc136", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..fcb65c30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3e280f62f7f2cec7b7008b103a0354643ebddfab2de57fba7402cd101be519d5", + "qualification.json": "19c8a9eec525694de37a23ffc11e45e4ce44031daf6c3aad8d399e2dd3842414", + "specs.json": "15315d05d13f7626d82b4f758ad85135da1e62f25916ed8aa2667b4f0789b227", + "target.spice": "e31fe92bb9698d8d48f5f5689a1891fad619eff15f90ef17482de994ab2fed78", + "target_lvs.spice": "bf1d42c3a529af930636023baac4606375432e0d25dcb0dbdc843e733cc2e21b", + "testbench.spice": "ab65997dd2ae341e0621fc525a8ba5ba8e561fb143c6a0591bab2fbf52966143" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..071af647 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/qualification.json @@ -0,0 +1,127 @@ +{ + "case_id": "C13_sky130_sW2_sL2", + "circuit_id": "C13", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 0.5, + "l0": 0.3, + "nf0": 1, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ea2079e4099fc136", + "mirror_pass1": { + "vmin": 0.2858051, + "status": "passed", + "vout_test": 1.04 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3858 + }, + "_frozen_from": { + "schematic": { + "err": 0.0038505, + "vmin": 0.2858051 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.2, + "schematic_measures": { + "iout_t": 2.007701e-05, + "err": 0.0038505, + "vmin": 0.2858051, + "dev_at_vdd": 0.0118518, + "gout_t": 2.654067e-07, + "rout_t": 3767809.0, + "vout_test": 1.04, + "rout_nom": 3767809.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..48a8ec70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.3858 + }, + "_frozen_from": { + "schematic": { + "err": 0.0038505, + "vmin": 0.2858051 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7200000000000001 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..092f7944 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target.spice @@ -0,0 +1,7 @@ +.subckt C13_sky130_sW2_sL2 VSS IIN1 IOUT1 IB1 +XM1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C13_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..b0e8cae0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C13_sky130_sW2_sL2 VSS IIN1 IOUT1 IB1 +XM1_f0 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IB1 IB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 IIN1 IB1 net15 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net15 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 IOUT1 IB1 net14 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f0 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 net14 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C13_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..c48d8938 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C13/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IB1 C13_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIB1 VDDB IB1 2e-05 +.nodeset v(IIN1)=0.54 v(IB1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.04 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.04 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.04 +echo vout_test = 1.04 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..cb16c977 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C14_gf180_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.68, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.68, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 1.68, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 1.68, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.04 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.68, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ade2c7d0fafd684f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..2d9e347f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f5c79e9f144144c5def391e788c4fc5bff793b4ce045f207277caccf2a6592ef", + "qualification.json": "3f2c3efe5193827f6ec4b953ace81b4605f9a70601e81092d13d841ac9b58003", + "specs.json": "b48ced2d30b64f88c09ad4677249f3a4869f19660208c7cdb6b507d7b1fffbde", + "target.spice": "5d652982960c3b2fbb6684e1b94c308ff1117e8f8f04d72c1204c9c0dcd2890b", + "target_lvs.spice": "0eb542115bcf290ea324d26785b1f87c42e11eecbe845bf01537258657e9c498", + "testbench.spice": "5a2f790c2b4f0e1c562ebb72ada9534be7edaffeb3f5349bda617bfe876db6dc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..3bd8adb8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.68, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ade2c7d0fafd684f", + "mirror_pass1": { + "vmin": 0.7763944, + "status": "passed", + "vout_test": 2.04 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8764 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033225, + "vmin": 0.7763944 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.993355e-05, + "err": -0.0033225, + "vmin": 0.7763944, + "dev_at_vdd": 0.003317149, + "gout_t": 5.946231e-11, + "rout_t": 16824180000.0, + "vout_test": 2.04, + "rout_nom": 16824180000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..35cfbbc4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8764 + }, + "_frozen_from": { + "schematic": { + "err": -0.0033225, + "vmin": 0.7763944 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..f211ab46 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u nf=1 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +.ends C14_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6efcad0d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_gf180_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +.ends C14_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..0cb6501e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.04 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.04 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.04 +echo vout_test = 2.04 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..ce90405a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C14_gf180_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 1.12, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 1.12, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.0 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.12, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4905de285a7cb6e7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..e04ca059 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8a998c8a2069c52582bf82266b2e32380e4b801ce67f02231a68718c4e13bdbe", + "qualification.json": "517c5d46088d3fb5c6d084649f61350746ef87a58cbf64d9aca71fa8027fab37", + "specs.json": "36ddcf9a2a3ee2cc44771cb0b3817d35cec521cdedac405cbe1f75e4df247817", + "target.spice": "2d3f2c86cadbd16ddfa871fea26cb055a1095a888f8d6a61c7e8c10bd2098e26", + "target_lvs.spice": "1b3e24ab1e28644dc183c891a0ac54bede19c4f3304e03edd36a9a24eb896f20", + "testbench.spice": "b6f730fcbaa6e91241baaf0808f2f74a136096405e26885915b7f6be6ccedd9b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..903259e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.12, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4905de285a7cb6e7", + "mirror_pass1": { + "vmin": 0.7094948, + "status": "passed", + "vout_test": 2.0 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8095 + }, + "_frozen_from": { + "schematic": { + "err": -0.0043175, + "vmin": 0.7094948 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.991365e-05, + "err": -0.0043175, + "vmin": 0.7094948, + "dev_at_vdd": 0.004299304, + "gout_t": 2.39829e-11, + "rout_t": 41699820000.0, + "vout_test": 2.0, + "rout_nom": 41699820000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..60a76e6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8095 + }, + "_frozen_from": { + "schematic": { + "err": -0.0043175, + "vmin": 0.7094948 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..fd47b00c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u nf=1 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +.ends C14_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..63d10666 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_gf180_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +.ends C14_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..c26e95f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2 +echo vout_test = 2 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..8d995458 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C14_gf180_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 2.24, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 2.24, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 2.24, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 2.24, + "nf": 2 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.08 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 2.24, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3047c5f4031e8aa1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..a1e10a81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bb2f93c503473f4bfc61f5f2229331454f6df54c06c1139fcd236f499b41ba70", + "qualification.json": "b21b0cf14ab7294e791080a15f5f3d185b421c6b21572b4535a45add14d0f9b8", + "specs.json": "285fe31f12dd2c800f439629850cdaef56618e89259235e39760606179464580", + "target.spice": "0c556bbc2df3587f6852374befa77ef209d60cf5018412bc801e600b0103eccb", + "target_lvs.spice": "c577da043b9b4e37cde18beb5b6c676e450f7c75d62ba0db5bbe41818c346c46", + "testbench.spice": "1d3c55120ecf93f8a749480441b423fb73817cf4a34c2acc0e840be451d71da5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..1250cbc4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 2.24, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3047c5f4031e8aa1", + "mirror_pass1": { + "vmin": 0.8593138, + "status": "passed", + "vout_test": 2.08 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.9593 + }, + "_frozen_from": { + "schematic": { + "err": -0.002807, + "vmin": 0.8593138 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.994386e-05, + "err": -0.002807, + "vmin": 0.8593138, + "dev_at_vdd": 0.002804686, + "gout_t": 2.856617e-10, + "rout_t": 3505060000.0, + "vout_test": 2.08, + "rout_nom": 3505060000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..cafb399c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.9593 + }, + "_frozen_from": { + "schematic": { + "err": -0.002807, + "vmin": 0.8593138 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..62977798 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u nf=1 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +.ends C14_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..8c468243 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_gf180_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +.ends C14_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..d80766c1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2.08 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2.08 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2.08 +echo vout_test = 2.08 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..6c5a6921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C14_gf180_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.68, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.68, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 1.68, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 1.68, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.94 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.68, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6970d3dc60c2448f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..eb6f1c1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f77f62385b6244e51b36e4be7c4081d4c407b3f5a51146e164e50ce1dfb59f11", + "qualification.json": "d17aad04a38a2cac269a4136a85b00392c8d236c7e20932efe89061dc64edc77", + "specs.json": "246aaf6253c681a02a58557261e14462df9d08b73e3dc64c94a9ee91cdea5952", + "target.spice": "fa0312ff1d35014aa5ef824c0b8a4aa8443d79cf930ddd02ddbdc08d3bf5655f", + "target_lvs.spice": "3e1c4751354b491cf9c36bdfb7d698c98a42aa91276d627af145924db4e35dfd", + "testbench.spice": "f00c353741feca2c2958d8667ba1c2c732c043534a8742fd704614cbb137bc46" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..848b7784 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.68, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.68, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "6970d3dc60c2448f", + "mirror_pass1": { + "vmin": 0.5855717, + "status": "passed", + "vout_test": 1.94 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6856 + }, + "_frozen_from": { + "schematic": { + "err": -0.0023405, + "vmin": 0.5855717 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.995319e-05, + "err": -0.0023405, + "vmin": 0.5855717, + "dev_at_vdd": 0.00196495, + "gout_t": 9.850565e-12, + "rout_t": 101517200000.0, + "vout_test": 1.94, + "rout_nom": 101517200000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..e8761ba4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6856 + }, + "_frozen_from": { + "schematic": { + "err": -0.0023405, + "vmin": 0.5855717 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..a1d9edba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=3u l=1.68u nf=6 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=3u l=1.68u nf=6 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1.5u l=1.68u nf=3 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=3u l=1.68u nf=6 m=1 +.ends C14_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a386ee59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_gf180_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +.ends C14_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..872f9a07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.94 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.94 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.94 +echo vout_test = 1.94 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..7deb1504 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C14_gf180_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 1.12, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 1.12, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.92 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.12, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "860f9f227b5e4ca4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..002eb401 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "095d87ce7414aaa53ce3f305ddcbde7a3a15127e7c5c8bae9d0670b66ee68332", + "qualification.json": "421a8b6c38095c64a18f42529a02e297b6f5e51c27e5773ef34cbdbbb2f58e19", + "specs.json": "4ad82858efcb2473bbad4ee981833653e2bbc69cd01358acfc2ffedd358054f2", + "target.spice": "4ab105f2b62dbb2f456fc8dc22f6ec7559c536315b1c1c8b59ed569672e03d91", + "target_lvs.spice": "cd89cfdd7592ef68b08ebe3129d18daf8407fdbdc772591ffceb43d025bf95ce", + "testbench.spice": "cecd79aca33a8ddcca766baa4ccd7488ef226c23a45060260ed7cfdb7f39d611" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..4e507e94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.12, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "860f9f227b5e4ca4", + "mirror_pass1": { + "vmin": 0.5361322, + "status": "passed", + "vout_test": 1.92 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6361 + }, + "_frozen_from": { + "schematic": { + "err": -0.0030695, + "vmin": 0.5361322 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.993861e-05, + "err": -0.0030695, + "vmin": 0.5361322, + "dev_at_vdd": 0.002771026, + "gout_t": 1.299068e-11, + "rout_t": 76978480000.0, + "vout_test": 1.92, + "rout_nom": 76978480000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..e485de66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6361 + }, + "_frozen_from": { + "schematic": { + "err": -0.0030695, + "vmin": 0.5361322 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..9279c3e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1.5u l=1.12u nf=3 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +.ends C14_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..535ee8cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_gf180_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +.ends C14_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..b5b58f85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.92 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.92 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.92 +echo vout_test = 1.92 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..564e6907 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C14_gf180_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 2.24, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 2.24, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 2.24, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 2.24, + "nf": 6 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.96 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 2.24, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6cd1b2cee7c1f8fd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..a8f88ebd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c99f775da0a5f7d2e7b81e173fa028df482b5927fb966504e4612d8ffba9dea0", + "qualification.json": "f60e44306377a620cab0f03f659bfb0f838046d06f9738e78352c53a7c9cc0c9", + "specs.json": "e3e99ed04fb04974c62c55b41eeaf2e2811b1c7225ab30816e3b4ce41f8c069e", + "target.spice": "dc3a8ea0b60eadcd5dcde93104789e34a5ecc6a4b5f4041fd19ae80364a6295d", + "target_lvs.spice": "4e27cb4adc3da8d42e47d76ca820b2c57306fb9f824c63e3d13da242576eaa87", + "testbench.spice": "4e9d79676c54ceafc7f85723554659c37e2e5696e39b0398d7a51a79f5348017" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..f639b6b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 2.24, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.24, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6cd1b2cee7c1f8fd", + "mirror_pass1": { + "vmin": 0.6268137, + "status": "passed", + "vout_test": 1.96 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7268 + }, + "_frozen_from": { + "schematic": { + "err": -0.001958, + "vmin": 0.6268137 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.996084e-05, + "err": -0.001958, + "vmin": 0.6268137, + "dev_at_vdd": 0.001807008, + "gout_t": 8.866212e-12, + "rout_t": 112788100000.0, + "vout_test": 1.96, + "rout_nom": 112788100000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..2aa1829a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7268 + }, + "_frozen_from": { + "schematic": { + "err": -0.001958, + "vmin": 0.6268137 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..51c44f24 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=3u l=2.24u nf=6 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=3u l=2.24u nf=6 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1.5u l=2.24u nf=3 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=3u l=2.24u nf=6 m=1 +.ends C14_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..374f61d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_gf180_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +.ends C14_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..507487ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.96 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.96 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.96 +echo vout_test = 1.96 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..94f6757d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C14_gf180_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.68, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.68, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.68, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.68, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.97 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "66fb7161948868f1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..d036b0dc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4d4f377e5cdf829b019e29a26cbc9d453b253fc8db48e5541ef273d7242d14fc", + "qualification.json": "1d2621cc2bce8e7fedd478b18549607d4b91d8c632df6742e753f23ccb4ea690", + "specs.json": "ff2fc86d6c1c720a13d6975066526112fc32aff24feb50efd8879a51b66caba8", + "target.spice": "65d3808744f79c36c89b05e6e04180097b6ca287a4a04f40f667a033fb9c2be3", + "target_lvs.spice": "fdb8cc77227a07fc41ca668b7c9bd28b77a6068713f53e634bf43fd5ec20489e", + "testbench.spice": "0d4dd5287a19be606c529aaef99032f4ce472b7428105b98481a267f7a3225c3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..d5fbc78f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.68, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "66fb7161948868f1", + "mirror_pass1": { + "vmin": 0.6433773, + "status": "passed", + "vout_test": 1.97 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7434 + }, + "_frozen_from": { + "schematic": { + "err": -0.002634, + "vmin": 0.6433773 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.994732e-05, + "err": -0.002634, + "vmin": 0.6433773, + "dev_at_vdd": 0.002509207, + "gout_t": 1.08626e-11, + "rout_t": 92060170000.0, + "vout_test": 1.97, + "rout_nom": 92060170000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..22f73643 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7434 + }, + "_frozen_from": { + "schematic": { + "err": -0.002634, + "vmin": 0.6433773 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..3aaf7ca5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1u l=1.68u nf=2 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +.ends C14_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ff2f1838 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_gf180_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +.ends C14_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..470f22ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.97 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.97 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.97 +echo vout_test = 1.97 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..5744f1a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C14_gf180_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.95 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb0d615f654305b0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..36c269e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "830f254340390ed86c566278dcf9ec3c6879ceb977e4858275ff3317d58bd5e9", + "qualification.json": "74ef673a5a1dbfeb76c0e0a25a3d95b6901e6c8a2eff5707745ca6d2a24b6442", + "specs.json": "003edfe3a956abf7852233f6e0ca254a04ed7cae4800119059a722eb327289a8", + "target.spice": "c396f9c7613aeff70a94119b7ac100a4d42891a29eac9d93a6961429bdf16a73", + "target_lvs.spice": "e369bf4dd67bb75cf5fb2127e5574a9759924af39bf7972716b8368f8adfe5e6", + "testbench.spice": "c9a6b3b694176f85b3cd3826a0cb94b44db3c2ab4529877728bdde4abb35475f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..6ca16e64 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "eb0d615f654305b0", + "mirror_pass1": { + "vmin": 0.5939181, + "status": "passed", + "vout_test": 1.95 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6939 + }, + "_frozen_from": { + "schematic": { + "err": -0.003444, + "vmin": 0.5939181 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.993112e-05, + "err": -0.003444, + "vmin": 0.5939181, + "dev_at_vdd": 0.003301525, + "gout_t": 1.294508e-11, + "rout_t": 77250220000.0, + "vout_test": 1.95, + "rout_nom": 77250220000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..6f9883d3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6939 + }, + "_frozen_from": { + "schematic": { + "err": -0.003444, + "vmin": 0.5939181 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..8f9271b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1_sL1 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +.ends C14_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..452ba627 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_gf180_sW1_sL1 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +.ends C14_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..087b41db --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.95 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.95 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.95 +echo vout_test = 1.95 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..09982a4e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW1_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C14_gf180_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 2.24, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 2.24, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 2.0 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "be9d26616d20ba9f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..0efa094c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6efd686b9765c1b846f6e2779d7c1bc8c2440b5bfc90f856967f56806327fcde", + "qualification.json": "f237f3d77d15209aa3d17c671ae4bdc26cc2c1af16efda3715c0dd4ed145b3dd", + "specs.json": "6de23aebe67b593e491ba5f6d5f2766a3f07e0c2c07fded9a663a4a27e7adcd8", + "target.spice": "b893974d52c0d53257d21b307e7cc6af4479e208393c7918fb3acd08c582f64d", + "target_lvs.spice": "a4eb9a5f462e108e0c309680c32fd1a7f0cb76bb09fb47a044e409533ff7f001", + "testbench.spice": "b93f88fb7c6494a4163ab619bcb293cadede127d5ff4f8a48de9e5cae4bc0478" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..74d76a49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW1_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 2.24, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "be9d26616d20ba9f", + "mirror_pass1": { + "vmin": 0.7010976, + "status": "passed", + "vout_test": 2.0 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8011 + }, + "_frozen_from": { + "schematic": { + "err": -0.002207, + "vmin": 0.7010976 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "iout_t": 1.995586e-05, + "err": -0.002207, + "vmin": 0.7010976, + "dev_at_vdd": 0.002173331, + "gout_t": 1.070011e-11, + "rout_t": 93460290000.0, + "vout_test": 2.0, + "rout_nom": 93460290000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..35109b5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8011 + }, + "_frozen_from": { + "schematic": { + "err": -0.002207, + "vmin": 0.7010976 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..3b347fa7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW1_sL2 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=1u l=2.24u nf=2 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +.ends C14_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..d02db2b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_gf180_sW1_sL2 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +.ends C14_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..5890a8cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=2 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=2 +let rout_v = 1/gout +meas dc rout_t find rout_v at=2 +echo vout_test = 2 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..8dce7376 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C14_gf180_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.68, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.68, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.68, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 1.68, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.92 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "50e268d6bfb195a2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..63af15e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ce40ca36a0f3de35e728eb3420c403216e7f414c0726ed41a73b200758f7fa6a", + "qualification.json": "5e3f058dae9aea04a396c8a1560fd46f32468787c940d8c244cb44f7439b83a6", + "specs.json": "ae10d5393a8827471211454cc8275a379f4152ecbd840fe84f69575d05bafca2", + "target.spice": "4d29d1622c7cfcb04d480c14e23d12ff8d06cad9d60d4bbc13374a56b184856e", + "target_lvs.spice": "233cc05641a02ffce21a443f378b0841b760f6072cab0e2a256fc97908b3c517", + "testbench.spice": "319d70668fb89962a605df9dcce235bd2783e214845200193247c7f0d30cfb01" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..4c5ba30a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.68, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.68, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "50e268d6bfb195a2", + "mirror_pass1": { + "vmin": 0.5442732, + "status": "passed", + "vout_test": 1.92 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6443 + }, + "_frozen_from": { + "schematic": { + "err": -0.0021705, + "vmin": 0.5442732 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.995659e-05, + "err": -0.0021705, + "vmin": 0.5442732, + "dev_at_vdd": 0.001501267, + "gout_t": 1.099459e-11, + "rout_t": 90953880000.0, + "vout_test": 1.92, + "rout_nom": 90953880000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..f03a6219 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6443 + }, + "_frozen_from": { + "schematic": { + "err": -0.0021705, + "vmin": 0.5442732 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..3ca37b71 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=4u l=1.68u nf=8 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=4u l=1.68u nf=8 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=2u l=1.68u nf=4 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=4u l=1.68u nf=8 m=1 +.ends C14_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..21e76d9e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_gf180_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f6 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM1_f7 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f6 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM2_f7 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM3_f3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.68u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f6 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +MM4_f7 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.68u +.ends C14_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..0ccfae55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.92 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.92 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.92 +echo vout_test = 1.92 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..ede87b48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW2_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C14_gf180_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 1.12, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.9 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5fb7a92c99701474", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..25d5e7f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f611217e4ffa7f45e410bb3357c7521918f337ed46b9de4a416b05d95509a812", + "qualification.json": "9b5eefbe84a9ee017ac48cdbacd6bb2f66d4cf63b07a686b9eceaba8561d0335", + "specs.json": "e9bfce1059bf1cd0b17d3475a17053fc4d88ec1e6648ca871d9fb9461f22a984", + "target.spice": "25ecafe3cc7203213c4144c77da529196772e3338a9a11a061060c12f081f288", + "target_lvs.spice": "6ca94b8beb9e19746f6a3358a575974800459a1599c6088346672959899bed23", + "testbench.spice": "0f7614db6b2c80112817eaba5bbd46ab814d827fcdcc9a3e87197fdc4624fd87" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..4f621515 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW2_sL1", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5fb7a92c99701474", + "mirror_pass1": { + "vmin": 0.5030476, + "status": "passed", + "vout_test": 1.9 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.603 + }, + "_frozen_from": { + "schematic": { + "err": -0.0028555, + "vmin": 0.5030476 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.994289e-05, + "err": -0.0028555, + "vmin": 0.5030476, + "dev_at_vdd": 0.002409741, + "gout_t": 1.426431e-11, + "rout_t": 70105130000.0, + "vout_test": 1.9, + "rout_nom": 70105130000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..8f44a9f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.603 + }, + "_frozen_from": { + "schematic": { + "err": -0.0028555, + "vmin": 0.5030476 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..0dd59dc3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW2_sL1 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +.ends C14_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..694d8ade --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_gf180_sW2_sL1 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f6 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f7 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=1.12u +.ends C14_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..fb69a5f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.9 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.9 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.9 +echo vout_test = 1.9 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..88b12adc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_gf180_sW2_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C14_gf180_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 2.24, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 2.24, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03, + "vout_test": 1.94 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e2ab2475e07a8df1", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..b548cf3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3df461a2f72371b27826005e72d7b3390de7ddf1a2453cd9d2582e75bf315c4c", + "qualification.json": "5915268599359b95d2f9d74474bafd654bc06a5a1242b25c0c14c31f4f6dfc55", + "specs.json": "59548061a26b1de9d0be34c86808c86469dd2d08b852fc31ae50b9ad7ae740f3", + "target.spice": "ac5b07fd2be5190aad7b3f403718a1c22cd340fd97d3165ec18a17e0b35c4398", + "target_lvs.spice": "65ccef923ca373625bf763468cf4984b7b93582ed97ef14669296721109da699", + "testbench.spice": "bf2915c52b1ff7e105fdc4b3c575b35071f2239a875e802a94b23b27bc7533fc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..91265d01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_gf180_sW2_sL2", + "circuit_id": "C14", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.12, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 2.24, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.12, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.24, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e2ab2475e07a8df1", + "mirror_pass1": { + "vmin": 0.5855146, + "status": "passed", + "vout_test": 1.94 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6855 + }, + "_frozen_from": { + "schematic": { + "err": -0.0018125, + "vmin": 0.5855146 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "iout_t": 1.996375e-05, + "err": -0.0018125, + "vmin": 0.5855146, + "dev_at_vdd": 0.001489803, + "gout_t": 9.950808e-12, + "rout_t": 100494400000.0, + "vout_test": 1.94, + "rout_nom": 100494400000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..45293dfe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6855 + }, + "_frozen_from": { + "schematic": { + "err": -0.0018125, + "vmin": 0.5855146 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.9799999999999998 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..0f2b1960 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_gf180_sW2_sL2 VSS IIN1 IOUT1 IREF1 +MM1 IIN1 IIN1 VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +MM2 net11 IIN1 VSS VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +MM3 IREF1 net11 VSS VSS nfet_03v3 w=2u l=2.24u nf=4 m=1 +MM4 IOUT1 IREF1 net11 VSS nfet_03v3 w=4u l=2.24u nf=8 m=1 +.ends C14_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..aa789fbd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_gf180_sW2_sL2 VSS IIN1 IOUT1 IREF1 +MM1_f0 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f1 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f2 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f3 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f4 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f5 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f6 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM1_f7 IIN1 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f0 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f1 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f2 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f3 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f4 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f5 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f6 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM2_f7 net11 IIN1 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f0 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f1 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f2 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM3_f3 IREF1 net11 VSS VSS nfet_03v3 w=0.5u l=2.24u +MM4_f0 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f1 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f2 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f3 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f4 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f5 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f6 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +MM4_f7 IOUT1 IREF1 net11 VSS nfet_03v3 w=0.5u l=2.24u +.ends C14_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..61c41bd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.99 v(IREF1)=0.99 + +VOUT IOUT1 0 3.3 +.control +dc VOUT 3.3 0 -0.00825 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.94 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=3.2835 +let gout = deriv(iout) +meas dc gout_t find gout at=1.94 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.94 +echo vout_test = 1.94 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..57b835fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C14_ihp130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.56, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.56, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 1.56, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 1.56, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.88 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.56, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "07e83c784eedc38a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..7e846827 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5c210ea71ddb6b5a6bb6b252576d8969e84a30f4c78c5ae51be8fbd59097a2ad", + "qualification.json": "7e3029de5fcb17855a762edc3d79f455d32a4d4f077ef30970d93e9eec55fc1d", + "specs.json": "1299babee7fb795be07737f15b8207e473d32145bf93698d6040a5e68e1e8148", + "target.spice": "e37a7fb86de9dee582442faeca2b96dfa3ff644781ad493c121173841bc5869f", + "target_lvs.spice": "164504047e96da04a0c1544cc13a54c4cd666da6aee9c4f10bb8aadb93503797", + "testbench.spice": "ee3b452948db621c83d9f794c36ad38d54013feeff4b3d51c0ce8d20ccaa9f9e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..e29d398a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.56, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "07e83c784eedc38a", + "mirror_pass1": { + "vmin": 0.5686029, + "status": "passed", + "vout_test": 0.88 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6686 + }, + "_frozen_from": { + "schematic": { + "err": -0.0212725, + "vmin": 0.5686029 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.957455e-05, + "err": -0.0212725, + "vmin": 0.5686029, + "dev_at_vdd": 0.02122927, + "gout_t": 7.647966e-09, + "rout_t": 130816600.0, + "vout_test": 0.88, + "rout_nom": 130816600.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..6b395686 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6686 + }, + "_frozen_from": { + "schematic": { + "err": -0.0212725, + "vmin": 0.5686029 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..15129082 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u ng=1 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +.ends C14_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..81a7a89b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_ihp130_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C14_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..4c9259a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.88 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.88 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.88 +echo vout_test = 0.88 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..55e42dc4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C14_ihp130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 1.04, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 1.04, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.86 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.04, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5d3b293e01331d85", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..91d92923 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6ef1c132418bc3bdd5bc1d45a02bcc9735cb1a0c657369ed3e6f826731cfa1cf", + "qualification.json": "0eb5e0f9a0a8b3217d3023bc9fd44a9e6373931f051125c89ffd240a0ef96f1f", + "specs.json": "36b8391ef195ee7db6b9e3cd3224641754fdc8b93eb84cbe966158c33a17fff4", + "target.spice": "b8e9aba4ec89cd28f463690f93f9b998a87d129bae2f255e6324693118517bd6", + "target_lvs.spice": "9ca48608fc337c85ed7aab3aab23f3dffde3382e589212b32f0f1ff437b94f33", + "testbench.spice": "839d9802c97ac7d40a7b507152e1ade42ffb49b896fe3eae2a75bb449b6d5ee1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..0901904c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.04, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5d3b293e01331d85", + "mirror_pass1": { + "vmin": 0.5150785, + "status": "passed", + "vout_test": 0.86 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6151 + }, + "_frozen_from": { + "schematic": { + "err": -0.024261, + "vmin": 0.5150785 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.951478e-05, + "err": -0.024261, + "vmin": 0.5150785, + "dev_at_vdd": 0.02420698, + "gout_t": 5.011179e-09, + "rout_t": 199570200.0, + "vout_test": 0.86, + "rout_nom": 199570200.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..bf1c2740 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6151 + }, + "_frozen_from": { + "schematic": { + "err": -0.024261, + "vmin": 0.5150785 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..8a049502 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u ng=1 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +.ends C14_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..58cda3ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_ihp130_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C14_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..b1392de3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.86 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.86 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.86 +echo vout_test = 0.86 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..6936ff95 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C14_ihp130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 2.08, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 2.08, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 2.08, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 2.08, + "nf": 2 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.91 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 2.08, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4076379bf7710c72", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..3e87e458 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5dcb486eb515c7546c009b90e3bcc929f9d005e19cb49f092e9e6a51ae2bcb9c", + "qualification.json": "eca88fde8859eda6feb065455655f21a554bb5e7b719ae84734f37a135f18ecc", + "specs.json": "9f4ffb82ab169815584ddc2d9fdee56bf0df2ce007af06078e6478cb59ed5412", + "target.spice": "1d600d152ff6c21c0bbe472b0ed8d51c39f3fd21d02f1bd8f8b40a87491717a3", + "target_lvs.spice": "70efc58c4de7bed8564acd2830aa575b2429f3d34cca955c25e8fde7d57bf481", + "testbench.spice": "4dd9599db3534f229dd1ea6c71eb6b103d0df330a75fa9b16c7392e14221c349" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..ea215c05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 2.08, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4076379bf7710c72", + "mirror_pass1": { + "vmin": 0.6224217, + "status": "passed", + "vout_test": 0.91 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + }, + "_frozen_from": { + "schematic": { + "err": -0.0195255, + "vmin": 0.6224217 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "iout_t": 1.960949e-05, + "err": -0.0195255, + "vmin": 0.6224217, + "dev_at_vdd": 0.01947342, + "gout_t": 1.357794e-08, + "rout_t": 73679960.0, + "vout_test": 0.91, + "rout_nom": 73679960.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..e83dc8b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + }, + "_frozen_from": { + "schematic": { + "err": -0.0195255, + "vmin": 0.6224217 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..fcfae54f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u ng=1 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +.ends C14_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..584bad39 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_ihp130_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C14_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..94337af0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.91 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.91 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.91 +echo vout_test = 0.91 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..34c83d16 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C14_ihp130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.56, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.56, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 1.56, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 1.56, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.56, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "58117cef7b455207", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..02de412d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d94b17781813a29223c33b1e5a328992aad642a6f84a9e73288bef9faa326da5", + "qualification.json": "c679ea2236d98c4a3538605d7364ad3cac6a0bce825fd7b64d38ab39309ee586", + "specs.json": "a267e25acf075f972f3632fe12a15c9365c9b54dcc86b8dc86f11f1af04cae5a", + "target.spice": "51255a29342389903eac9973957e9b5c491940678d8bf4da23ae23b5870769ad", + "target_lvs.spice": "a11c9374fb9ca331e87e4e6fe3f4fe653fa697e9a704c1647951e52aa51ee12f", + "testbench.spice": "08eaf9994eac25abb11dc69147756220ce785e0e9b6112d2f6db73fcf352dc45" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..e9e077b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.56, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "58117cef7b455207", + "mirror_pass1": { + "vmin": 0.4018094, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5018 + }, + "_frozen_from": { + "schematic": { + "err": -0.0212935, + "vmin": 0.4018094 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.957413e-05, + "err": -0.0212935, + "vmin": 0.4018094, + "dev_at_vdd": 0.02124491, + "gout_t": 3.139546e-09, + "rout_t": 318519300.0, + "vout_test": 0.8, + "rout_nom": 318519300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..08d803af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5018 + }, + "_frozen_from": { + "schematic": { + "err": -0.0212935, + "vmin": 0.4018094 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..7f17ad85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.56u ng=6 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.56u ng=6 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1.5u l=1.56u ng=3 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=3u l=1.56u ng=6 m=1 +.ends C14_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..11b8ab85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_ihp130_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C14_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..78b2d7c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..b0db6106 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C14_ihp130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.04, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 1.04, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 1.04, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.79 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.04, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "fa54eda32ba64792", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..0c4ea629 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8e7d74e0d675328da0e1a61982071a874ebd84be459ade4ace566d9af08db3eb", + "qualification.json": "924719a98e92cd0b98fdce10aef14daf7caa648c14447a40d3d26d2ce0159e1d", + "specs.json": "dda5640853504825775243264a2b10aae592b5434906165a3b6a777643dd8d7d", + "target.spice": "de53c107db5bde5ccd7a9c5164bc42e0553f149b4ef5e304d2a82189c17e3159", + "target_lvs.spice": "63ec9c0a034176d71f55b0a8fc57932ff0fef9c4bca857091ce64b9b190e4bb0", + "testbench.spice": "90cd8f8fa51e0acea6cdf967aaf1a7055609c7827b990ba1d9fc09b20150178d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..713a97cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.04, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.04, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "fa54eda32ba64792", + "mirror_pass1": { + "vmin": 0.3811875, + "status": "passed", + "vout_test": 0.79 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4812 + }, + "_frozen_from": { + "schematic": { + "err": -0.0247995, + "vmin": 0.3811875 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.7, + "schematic_measures": { + "iout_t": 1.950401e-05, + "err": -0.0247995, + "vmin": 0.3811875, + "dev_at_vdd": 0.02471719, + "gout_t": 5.071973e-09, + "rout_t": 197162700.0, + "vout_test": 0.79, + "rout_nom": 197162700.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..bf9984b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4812 + }, + "_frozen_from": { + "schematic": { + "err": -0.0247995, + "vmin": 0.3811875 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..680934d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1.5u l=1.04u ng=3 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=3u l=1.04u ng=6 m=1 +.ends C14_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..69be4958 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_ihp130_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C14_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..f3b315b7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.79 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.79 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.79 +echo vout_test = 0.79 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..78455e0b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C14_ihp130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 2.08, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 2.08, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 2.08, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 2.08, + "nf": 6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.81 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 2.08, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "198656f7f3528079", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..e94e0182 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fc77e6572a07a300c43959c03f2070d8b84deb8a526f801e7361df194801ff94", + "qualification.json": "5e9e2aa18944c6754720f46cfed0149a3848e4facf6465c6454b35e86ac68798", + "specs.json": "755c92dc9503f12281eab49acf8534cd92c58cc0939d00b162aa841317afd6ce", + "target.spice": "24154e8ad50242ef00238d8bb14455cf81909199d025b08edfab82c7294913f4", + "target_lvs.spice": "5351add8d7afaf72812a84129b33fcfdb3ff99ecc3876a5e296824728690e705", + "testbench.spice": "6c72e5cefa946d2cb139616fb0c42c0d32bc47000bdcd138d8c85403222516a8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..33e2a7ea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 2.08, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 2.08, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "198656f7f3528079", + "mirror_pass1": { + "vmin": 0.4295694, + "status": "passed", + "vout_test": 0.81 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5296 + }, + "_frozen_from": { + "schematic": { + "err": -0.0191985, + "vmin": 0.4295694 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.8, + "schematic_measures": { + "iout_t": 1.961603e-05, + "err": -0.0191985, + "vmin": 0.4295694, + "dev_at_vdd": 0.01916515, + "gout_t": 2.293335e-09, + "rout_t": 436046200.0, + "vout_test": 0.81, + "rout_nom": 436046200.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..80264c7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5296 + }, + "_frozen_from": { + "schematic": { + "err": -0.0191985, + "vmin": 0.4295694 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..83cea088 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=3u l=2.08u ng=6 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=3u l=2.08u ng=6 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1.5u l=2.08u ng=3 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=3u l=2.08u ng=6 m=1 +.ends C14_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b3af542c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_ihp130_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C14_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..a1cbd5c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.81 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.81 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.81 +echo vout_test = 0.81 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..4ca4c68b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C14_ihp130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.56, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.56, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.56, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.83 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4875bd2cab9213f2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..03b5ec5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3df8ea39da4ff31219ca41d4295e65db7590bcb5f191f1c9e538ffcce8ac13c5", + "qualification.json": "37e563a4e99b04ff1968c39471b0900006b8d5d1920b9fc72eb75d3f671a530e", + "specs.json": "623e388beb54ef4b6803af0320e457b14c84fbd7df6cdfaf925c9344fa9aa2fe", + "target.spice": "e97ff5662a48a4a865ccd338f1e8d654c031dfc88154192f3b298a842abc95b3", + "target_lvs.spice": "bdc9365a298ae9d8c7fc412f9e4435d7cfbeb4709c2de1d27deaaa0942492719", + "testbench.spice": "a126509911fc1e74351fa89753115b788bee8fa6e62d4885e9159623ebd53a89" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..3bde8b94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4875bd2cab9213f2", + "mirror_pass1": { + "vmin": 0.4521513, + "status": "passed", + "vout_test": 0.83 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5522 + }, + "_frozen_from": { + "schematic": { + "err": -0.0210755, + "vmin": 0.4521513 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.5, + "schematic_measures": { + "iout_t": 1.957849e-05, + "err": -0.0210755, + "vmin": 0.4521513, + "dev_at_vdd": 0.02103556, + "gout_t": 2.945076e-09, + "rout_t": 339555500.0, + "vout_test": 0.83, + "rout_nom": 339555500.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..5793c1ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5522 + }, + "_frozen_from": { + "schematic": { + "err": -0.0210755, + "vmin": 0.4521513 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..6088fbe8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1u l=1.56u ng=2 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +.ends C14_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7cccaf4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_ihp130_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C14_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..a6c17b89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.83 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.83 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.83 +echo vout_test = 0.83 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..bc3dc6b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C14_ihp130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.81 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "670d6b40ce2d2b65", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..191ccd9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d2791eebc00cc41d97eab6df6acac77b37e2db741b0b7f130496abed967f3f8c", + "qualification.json": "5a7c2a49bf0b6c45804fbd466bf22717827b167b29530b5b593e07c298ce5c5f", + "specs.json": "060cb41307e89fb80de55a2afd6f83883cbe82bc1f2695b2fe7d8795b431b005", + "target.spice": "31bad05f87bea70b3584b1dc159d8aff4e88b726626debb688a142ca90e5e085", + "target_lvs.spice": "62b704113b7361be84f4d91f54f78307afc2f330ec8fb1d00e676726f598345e", + "testbench.spice": "ed56b43700fe479d233f487ff977778dccd75f90bd019f3509c66b60f91bf66c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..0cc05866 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.04, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "670d6b40ce2d2b65", + "mirror_pass1": { + "vmin": 0.4206067, + "status": "passed", + "vout_test": 0.81 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5206 + }, + "_frozen_from": { + "schematic": { + "err": -0.0243925, + "vmin": 0.4206067 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.6, + "schematic_measures": { + "iout_t": 1.951215e-05, + "err": -0.0243925, + "vmin": 0.4206067, + "dev_at_vdd": 0.02432419, + "gout_t": 4.547072e-09, + "rout_t": 219921700.0, + "vout_test": 0.81, + "rout_nom": 219921700.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..2881af73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5206 + }, + "_frozen_from": { + "schematic": { + "err": -0.0243925, + "vmin": 0.4206067 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..7ffc3657 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1u l=1.04u ng=2 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +.ends C14_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..196c7406 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_ihp130_sW1_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C14_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..ce874543 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.81 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.81 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.81 +echo vout_test = 0.81 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..3e8f0f97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW1_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C14_ihp130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 2.08, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 2.08, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.84 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b9b577a40ce05d31", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..0e372a10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fa245a725c8dffdd55ab9db611decf0b796dffb6d639d692bff913f3ea485a32", + "qualification.json": "b5d002babcbf063653272fb2ce64a8a63a098eac2e0f3e00ae3d3209ae917bf2", + "specs.json": "c0ea4fc073b10202c3dfd99ddfec90c3c8db045d07cc6cbcf329eb5c0ed6ddcb", + "target.spice": "1afb0f4517764c3c27e86fa28553ab5ae2f17c94d5e1c15b96a3bb01f3239aac", + "target_lvs.spice": "82f30af7918b7efb59009842184bba4d39eca52850aa59997d726f7f7d166996", + "testbench.spice": "643b742ac3a65acc79b002c79ac2dcfab9a43184810b52eaac96d17757b82b6b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..39f8af1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW1_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 2.08, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "b9b577a40ce05d31", + "mirror_pass1": { + "vmin": 0.4878588, + "status": "passed", + "vout_test": 0.84 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5879 + }, + "_frozen_from": { + "schematic": { + "err": -0.019096, + "vmin": 0.4878588 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "iout_t": 1.961808e-05, + "err": -0.019096, + "vmin": 0.4878588, + "dev_at_vdd": 0.01906682, + "gout_t": 2.535919e-09, + "rout_t": 394334300.0, + "vout_test": 0.84, + "rout_nom": 394334300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..00a4f3c9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.5879 + }, + "_frozen_from": { + "schematic": { + "err": -0.019096, + "vmin": 0.4878588 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..b3bd5055 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW1_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=1u l=2.08u ng=2 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +.ends C14_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..e0d9e3fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_ihp130_sW1_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C14_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..a3aefa05 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.84 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.84 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.84 +echo vout_test = 0.84 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..d9cf2a57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C14_ihp130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.56, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.56, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 1.56, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.79 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "846970e5d2b47f91", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..d72a7fe8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ab774b4ae22e785556692733c9cf0b72b812b48b76ac17fe801f274d86a95b9b", + "qualification.json": "ca5407605ac0c6ed9b4109a5431cdfaed4d6361142dc837ed6945024e5a51370", + "specs.json": "cfd25f6fd39116f3b0b59eae0d073681c27401426f5385835ab7cf07061a18a0", + "target.spice": "f1e3efd504cd5ead97cb78751c1da35ef414a438cef50df2d85ca36221c61efb", + "target_lvs.spice": "d06d3b9d61d23526a4e802bd2c5776546b93ede711b0a2f3463b7dc6b8e7b2b1", + "testbench.spice": "a634455da6b0a831164169c5f579edf5f9773e6109e6d08d9da0509fb8643d64" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..98589655 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "846970e5d2b47f91", + "mirror_pass1": { + "vmin": 0.3723262, + "status": "passed", + "vout_test": 0.79 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4723 + }, + "_frozen_from": { + "schematic": { + "err": -0.0215525, + "vmin": 0.3723262 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.8, + "schematic_measures": { + "iout_t": 1.956895e-05, + "err": -0.0215525, + "vmin": 0.3723262, + "dev_at_vdd": 0.02149791, + "gout_t": 3.39237e-09, + "rout_t": 294780300.0, + "vout_test": 0.79, + "rout_nom": 294780300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..d91f20d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4723 + }, + "_frozen_from": { + "schematic": { + "err": -0.0215525, + "vmin": 0.3723262 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..eecb80bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.56u ng=8 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.56u ng=8 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=2u l=1.56u ng=4 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=4u l=1.56u ng=8 m=1 +.ends C14_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..6e797181 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_ihp130_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f6 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM1_f7 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f6 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM2_f7 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM3_f3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f6 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +XM4_f7 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.56u +.ends C14_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..fbe678f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.79 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.79 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.79 +echo vout_test = 0.79 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..3daad9d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW2_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C14_ihp130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.04, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 1.04, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.78 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "48ca72d1df585caa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..1a201718 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7c316dfc9e312d585bb875964f2b0aff585bd5b5ee433480fbc22457284ffb02", + "qualification.json": "b9bd7125f3eebff2b5a8bfeb7abaffd56ce736796294b7dfe094839aef69241d", + "specs.json": "467b82b9c76a4f325dd211276187b57b183b96cdc257e4f00a5308a12401fe2b", + "target.spice": "7fd7df686bf2ec07c7e84fc3a2e34dd7ab8e12556a3336daea3e5d4207b9fb70", + "target_lvs.spice": "1111bd63ce1dbbc516c25e18aaf87c44111cb4783e926543a910ec835dbba05f", + "testbench.spice": "11a53ac5da15a5d47a13c3644d697ad1fb8a0c938f0388c8df2d5ca930d10038" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..196dbbf8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW2_sL1", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.04, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.04, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "48ca72d1df585caa", + "mirror_pass1": { + "vmin": 0.3586395, + "status": "passed", + "vout_test": 0.78 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4586 + }, + "_frozen_from": { + "schematic": { + "err": -0.0251955, + "vmin": 0.3586395 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.9, + "schematic_measures": { + "iout_t": 1.949609e-05, + "err": -0.0251955, + "vmin": 0.3586395, + "dev_at_vdd": 0.02510205, + "gout_t": 5.580814e-09, + "rout_t": 179185300.0, + "vout_test": 0.78, + "rout_nom": 179185300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..5e2212af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4586 + }, + "_frozen_from": { + "schematic": { + "err": -0.0251955, + "vmin": 0.3586395 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..169d59e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW2_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=2u l=1.04u ng=4 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=4u l=1.04u ng=8 m=1 +.ends C14_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..9a78d6ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_ihp130_sW2_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f6 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM1_f7 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f6 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM2_f7 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM3_f3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f6 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +XM4_f7 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=1.04u +.ends C14_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..f15ad626 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.78 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.78 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.78 +echo vout_test = 0.78 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..92eff8b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_ihp130_sW2_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C14_ihp130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 2.08, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 2.08, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03, + "vout_test": 0.8 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bd7838c5c1dac2d6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..5382fe17 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c4ec94d270e19cc5e255a3ab7d64e0548f6a91ad8fc65f3e9bf6967756c00b10", + "qualification.json": "f1d0a8e71f629bd8b13d02290516463fc80fe91774aa585931639b6a4889355e", + "specs.json": "1596be5dc3c379d268f29c1dbe355ea5674874da1032b085dfd4e5ccb1bfa170", + "target.spice": "98002c44cfaa8c1b239d9ff255e27e888cf00362773257d8b407a4140a5fe203", + "target_lvs.spice": "5c4d35818bf9e8df8e092c5c6045ea1326d90f35e25eca0571f48620ded9d67c", + "testbench.spice": "4fe410cd575e6daeacdd2bf5d033c3c29a8c6060deb4604851a91c5e78eddb22" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..34d6873a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_ihp130_sW2_sL2", + "circuit_id": "C14", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 1.04, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 2.08, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 1.04, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 2.08, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bd7838c5c1dac2d6", + "mirror_pass1": { + "vmin": 0.3948416, + "status": "passed", + "vout_test": 0.8 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4948 + }, + "_frozen_from": { + "schematic": { + "err": -0.0193775, + "vmin": 0.3948416 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "iout_t": 1.961245e-05, + "err": -0.0193775, + "vmin": 0.3948416, + "dev_at_vdd": 0.01934037, + "gout_t": 2.401369e-09, + "rout_t": 416431300.0, + "vout_test": 0.8, + "rout_nom": 416431300.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..ccb4aad7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.4948 + }, + "_frozen_from": { + "schematic": { + "err": -0.0193775, + "vmin": 0.3948416 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.72 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..69fe5701 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_ihp130_sW2_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +XM2 net11 IIN1 VSS VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +XM3 IREF1 net11 VSS VSS sg13_lv_nmos w=2u l=2.08u ng=4 m=1 +XM4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=4u l=2.08u ng=8 m=1 +.ends C14_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..720cd020 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_ihp130_sW2_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f1 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f2 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f3 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f4 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f5 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f6 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM1_f7 IIN1 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f0 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f1 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f2 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f3 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f4 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f5 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f6 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM2_f7 net11 IIN1 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f0 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f1 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f2 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM3_f3 IREF1 net11 VSS VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f0 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f1 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f2 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f3 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f4 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f5 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f6 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +XM4_f7 IOUT1 IREF1 net11 VSS sg13_lv_nmos w=0.5u l=2.08u +.ends C14_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..2448f927 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.36 v(IREF1)=0.36 + +VOUT IOUT1 0 1.2 +.control +dc VOUT 1.2 0 -0.003 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=0.8 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.194 +let gout = deriv(iout) +meas dc gout_t find gout at=0.8 +let rout_v = 1/gout +meas dc rout_t find rout_v at=0.8 +echo vout_test = 0.8 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..5afae4cb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C14_sky130_sW0.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.9, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.9, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 0.9, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 0.9, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.27 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 0.9, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9149c4dac9a1af5b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..98dd044a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "50dd02b9dc9fa43665b3aa3ad40d983c6dd82dbeb951373d7b9092a9c15a5326", + "qualification.json": "26194b2c030199b164846a41ef07a3a808145012f91c543c101d305a83af55da", + "specs.json": "fa9fb8882197038530b1df87bb7ff9315d5e7d89303a0244725bd644ff29e499", + "target.spice": "debce2f940b59d3dcb2879b8eb313128f39109c7863c27a6031f053e69c7202e", + "target_lvs.spice": "a95ea13d83e53e05821f9a87af8a78af600080e9cda00f1e0ef73ef613d3a3af", + "testbench.spice": "29880827391fefcc8cb4ed89c2a6348cb4c4f19b4f5385e4a35148231899128e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..47f20560 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW0.5_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 0.9, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9149c4dac9a1af5b", + "mirror_pass1": { + "vmin": 0.7394514, + "status": "passed", + "vout_test": 1.27 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8395 + }, + "_frozen_from": { + "schematic": { + "err": -0.010322, + "vmin": 0.7394514 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.2, + "schematic_measures": { + "iout_t": 1.979356e-05, + "err": -0.010322, + "vmin": 0.7394514, + "dev_at_vdd": 0.01031004, + "gout_t": 1.451525e-09, + "rout_t": 689193900.0, + "vout_test": 1.27, + "rout_nom": 689193900.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..3452809d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8395 + }, + "_frozen_from": { + "schematic": { + "err": -0.010322, + "vmin": 0.7394514 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..02dee906 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 nf=1 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +.ends C14_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..430f2687 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_sky130_sW0.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C14_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..5964a3dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.27 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.27 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.27 +echo vout_test = 1.27 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..a6e03c2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C14_sky130_sW0.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 0.6, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 0.6, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.24 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 0.6, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cec90c22ccda6260", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..7f647753 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "57dbeec226df629c0b6d357b18733eeb16b99fb47fafe113149a9392cb02dfee", + "qualification.json": "35f95f0409925899fcf7b64587b891bde8aa62a73c4cf8e2bd6e7ce6f26ae21b", + "specs.json": "1642199fbb35ae5fd693894db8633792fce1cb36253cac1885e163473a1d6631", + "target.spice": "b09742c15b30c6df56a861ab7a4ac840d45c230b8f09f662f63d98705d5a57d1", + "target_lvs.spice": "3aaed56e19baa066bb0c5097b221247ff5ede77c4db61b6271e7d8f7ed66a40c", + "testbench.spice": "09d3a5c3a07e73787357c74bfb06555203b6a1884406fd655a22e4ed59495f1d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..8760144a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW0.5_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 0.6, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "cec90c22ccda6260", + "mirror_pass1": { + "vmin": 0.6825595, + "status": "passed", + "vout_test": 1.24 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7826 + }, + "_frozen_from": { + "schematic": { + "err": -0.008847, + "vmin": 0.6825595 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.1, + "schematic_measures": { + "iout_t": 1.982306e-05, + "err": -0.008847, + "vmin": 0.6825595, + "dev_at_vdd": 0.00883981, + "gout_t": 6.273302e-10, + "rout_t": 1594470000.0, + "vout_test": 1.24, + "rout_nom": 1594470000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..3617a52b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7826 + }, + "_frozen_from": { + "schematic": { + "err": -0.008847, + "vmin": 0.6825595 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..e5051158 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 nf=1 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +.ends C14_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b8f3303e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_sky130_sW0.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C14_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..f223b4bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.24 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.24 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.24 +echo vout_test = 1.24 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..215db8b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C14_sky130_sW0.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.2, + "nf": 2 + }, + "M2": { + "w": 1.0, + "l": 1.2, + "nf": 2 + }, + "M3": { + "w": 0.5, + "l": 1.2, + "nf": 1 + }, + "M4": { + "w": 1.0, + "l": 1.2, + "nf": 2 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.28 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.2, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "09e948c51cdf0fa7", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..f9bbd5a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8b0b738293b19c4273e974064482fd2b99a0ed7f5fc9f8a836779d1bdf868462", + "qualification.json": "16e5d44002e28409e445e15c644c81f47790c3c54ba98033a5a3187e0d2716ad", + "specs.json": "4dfe90c7076176e46853492859f32be2c8774781494c6724f3c83366b7eef481", + "target.spice": "62dfcbedb64a8fb9a435f787e2fd89a515e91c5c62be9cd31f5143df6f80b1be", + "target_lvs.spice": "d08b9e722383f2f3113140cb9804b48193960b72971400ce0d8d8746d6441fe6", + "testbench.spice": "21770d65d61c46312e89b23a4b5f7fe244ec7d0d4e413e852b267e42d358a10d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..1ba6918b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW0.5_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 0.5, + "l": 1.2, + "nf": 1, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "09e948c51cdf0fa7", + "mirror_pass1": { + "vmin": 0.7688774, + "status": "passed", + "vout_test": 1.28 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8689 + }, + "_frozen_from": { + "schematic": { + "err": -0.010678, + "vmin": 0.7688774 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 19.1, + "schematic_measures": { + "iout_t": 1.978644e-05, + "err": -0.010678, + "vmin": 0.7688774, + "dev_at_vdd": 0.01065672, + "gout_t": 3.72794e-09, + "rout_t": 268445700.0, + "vout_test": 1.28, + "rout_nom": 268445700.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..2995ad21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.8689 + }, + "_frozen_from": { + "schematic": { + "err": -0.010678, + "vmin": 0.7688774 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..99eae893 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 nf=1 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +.ends C14_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4f8a776f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C14_sky130_sW0.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C14_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..5217842d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.28 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.28 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.28 +echo vout_test = 1.28 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..c6284673 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C14_sky130_sW1.5_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.9, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.9, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 0.9, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 0.9, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.18 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 0.9, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e81ecec96cb109d9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..ed765a79 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "14893addfa3bfdc3144491966868c94b39f70dca88ad59d0e7d6588f54e154c8", + "qualification.json": "9606912a1a52efe09b3c242f0577b3ce11e36c344e8533458e34d87f7132a795", + "specs.json": "aaba5e6eb62a673fb9bebd997c40239e61d296a9ec897a018eb32ef6f33c0758", + "target.spice": "ebd4dd3c51cc5a2e661c1480dd8091b49f818a74948d18d13c856f879a69831a", + "target_lvs.spice": "536dfb0d0cc5b722da026621aa50c2a3f510ac0017da097ec5b1e9bb0c7a8242", + "testbench.spice": "9ef16a6edf1f51661205e074fac69ac8ca01811d0e04635c936eec48fd980a0e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..cf204cb4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1.5_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 0.9, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.9, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e81ecec96cb109d9", + "mirror_pass1": { + "vmin": 0.5698569, + "status": "passed", + "vout_test": 1.18 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6699 + }, + "_frozen_from": { + "schematic": { + "err": -0.007168, + "vmin": 0.5698569 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.4, + "schematic_measures": { + "iout_t": 1.985664e-05, + "err": -0.007168, + "vmin": 0.5698569, + "dev_at_vdd": 0.007163431, + "gout_t": 2.607722e-10, + "rout_t": 3834946000.0, + "vout_test": 1.18, + "rout_nom": 3834946000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..30adb68c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6699 + }, + "_frozen_from": { + "schematic": { + "err": -0.007168, + "vmin": 0.5698569 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..1a9db8b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.9 nf=6 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.9 nf=6 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1.5 l=0.9 nf=3 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.9 nf=6 +.ends C14_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..74c7c9f5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_sky130_sW1.5_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C14_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..7a0f8beb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.18 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.18 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.18 +echo vout_test = 1.18 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..5e76273f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C14_sky130_sW1.5_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 0.6, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 0.6, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.17 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 0.6, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ddf8e23b97de0177", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..61c6bbe8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6273462e59ed9febfc50eb3f7eb28ae2b17e2b91db594ebf62cbccc5f0c199a8", + "qualification.json": "f52396c5777fbb57854cf48ac34ed1e616d1379b1a6ccc08b3af53fd7c69e5b5", + "specs.json": "d7df9a87acd9278252b45eefa23358285ff3540469d6447e3a768a2575cacc16", + "target.spice": "4a8b064b609daeb29db6f3ff0d2b1a8671aadd26d3c30e5f063ea949f682e3a7", + "target_lvs.spice": "304d0dec8043f40bb2163ac5f257a34bc91445bdf4f7ffd1393eed55c7401305", + "testbench.spice": "5624c922048d6151197dacc258f555a4a855f166c22c98ee1be5a6fc33eba781" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..71503139 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1.5_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 0.6, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "ddf8e23b97de0177", + "mirror_pass1": { + "vmin": 0.546345, + "status": "passed", + "vout_test": 1.17 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6463 + }, + "_frozen_from": { + "schematic": { + "err": -0.0063195, + "vmin": 0.546345 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.987361e-05, + "err": -0.0063195, + "vmin": 0.546345, + "dev_at_vdd": 0.00631613, + "gout_t": 1.864492e-10, + "rout_t": 5363391000.0, + "vout_test": 1.17, + "rout_nom": 5363391000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..5a27d64d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6463 + }, + "_frozen_from": { + "schematic": { + "err": -0.0063195, + "vmin": 0.546345 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..69642904 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1.5 l=0.6 nf=3 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +.ends C14_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b537c63a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_sky130_sW1.5_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C14_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..5fd2d369 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.17 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.17 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.17 +echo vout_test = 1.17 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..3de052bb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C14_sky130_sW1.5_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.2, + "nf": 6 + }, + "M2": { + "w": 3.0, + "l": 1.2, + "nf": 6 + }, + "M3": { + "w": 1.5, + "l": 1.2, + "nf": 3 + }, + "M4": { + "w": 3.0, + "l": 1.2, + "nf": 6 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.19 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.2, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cf7ee1291b61ccbb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..240e2c31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0d5ccc3b5e6db3d359741213429d68d4529901df54002541a3a0c03ced36346a", + "qualification.json": "184c1be61a944eab5800b90337a528af5c32f83fa8cb543dbfdf9320f7a4ff43", + "specs.json": "d89aae57dfba16cc0c6fdfb8770cca1fbbb78b9f5d0e1f0dd09f111dfa244016", + "target.spice": "f8e80c0cd60e62e422c1ac658582b1186c07f3622e84fd45666382e0662ac738", + "target_lvs.spice": "f98552ac4ad81ac823db58af4e77c19c85a73c32bcbf4db500218bbbef2e346b", + "testbench.spice": "50e041d060e32c1ce8c82f95b1fd06340c1d62b1cdbcf745981bfd0d45677c37" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..152a325a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1.5_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.5, + "l": 1.2, + "nf": 3, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.2, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "cf7ee1291b61ccbb", + "mirror_pass1": { + "vmin": 0.5775861, + "status": "passed", + "vout_test": 1.19 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6776 + }, + "_frozen_from": { + "schematic": { + "err": -0.007468, + "vmin": 0.5775861 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.985064e-05, + "err": -0.007468, + "vmin": 0.5775861, + "dev_at_vdd": 0.00746273, + "gout_t": 3.154333e-10, + "rout_t": 3170565000.0, + "vout_test": 1.19, + "rout_nom": 3170565000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..b905987d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6776 + }, + "_frozen_from": { + "schematic": { + "err": -0.007468, + "vmin": 0.5775861 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..83122ad1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=1.2 nf=6 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=1.2 nf=6 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1.5 l=1.2 nf=3 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=3 l=1.2 nf=6 +.ends C14_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..39d6628b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,23 @@ +.subckt C14_sky130_sW1.5_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C14_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..c22a0eaa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.19 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.19 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.19 +echo vout_test = 1.19 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..9eecc0aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C14_sky130_sW1_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.9, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 0.9, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.21 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a2f661aad0521e79", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..711f964a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9cfff12af92e89b70f54a23d7b0c8af9af113e90eac3c83b02f017428e1160c9", + "qualification.json": "97e2d827036706a015640121d779078042946d641744bf24e87d4efc4780a9e0", + "specs.json": "05ee4ddc04c5814c94ab087cf310ede77b6550d8b407e74511a4da36c8bfa29f", + "target.spice": "6f3baee2147288c1de82f5ed022d464a81e1698ab66fb3778e89ab1e1ac4d775", + "target_lvs.spice": "90a42c5b8bffbb3f7be384feca95e9f186df994f4b5494382fd097f77b35abbd", + "testbench.spice": "f1e9bcf15df87865c88f551f1e538203ca1e533348eb9cfbbf8cc850b133cd92" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..db5c1a0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 0.9, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a2f661aad0521e79", + "mirror_pass1": { + "vmin": 0.6196821, + "status": "passed", + "vout_test": 1.21 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7197 + }, + "_frozen_from": { + "schematic": { + "err": -0.008077, + "vmin": 0.6196821 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.3, + "schematic_measures": { + "iout_t": 1.983846e-05, + "err": -0.008077, + "vmin": 0.6196821, + "dev_at_vdd": 0.008071483, + "gout_t": 3.878803e-10, + "rout_t": 2578252000.0, + "vout_test": 1.21, + "rout_nom": 2578252000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..0a8fbcc9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7197 + }, + "_frozen_from": { + "schematic": { + "err": -0.008077, + "vmin": 0.6196821 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..6c5f1530 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.9 nf=2 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +.ends C14_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a0e913d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_sky130_sW1_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C14_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..d5b8f915 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.21 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.21 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.21 +echo vout_test = 1.21 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..cee29fac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C14_sky130_sW1_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.19 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e52fa280169f5140", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..5d0ef83f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bf1af23f61b501bbce30a0281cb0e41b330a5298b506e5b7fc630bc680e5ea51", + "qualification.json": "2b01955b399ce91cf8ed728c64a98f4eda16a0299167c328f791431df3d748f4", + "specs.json": "086e08f1348a2ee374b3f7baee394d664c7443cb699b1cdfc7dccc4a21a8d663", + "target.spice": "c41c78d920bbfb883d8b0e67b1acf33eb38e2010b6e1cef5011eea90fca3ab00", + "target_lvs.spice": "a2f3edec11d9debdbed090993c9b42965d8a2aa5b1b0ec81e6cb30711d2c62b0", + "testbench.spice": "5f0f1d3c63482c9434871ab250691ddfab36d5b6cbda71ac4696e747284be445" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..bc2b1faa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e52fa280169f5140", + "mirror_pass1": { + "vmin": 0.5866486, + "status": "passed", + "vout_test": 1.19 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6866 + }, + "_frozen_from": { + "schematic": { + "err": -0.0070175, + "vmin": 0.5866486 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 18.7, + "schematic_measures": { + "iout_t": 1.985965e-05, + "err": -0.0070175, + "vmin": 0.5866486, + "dev_at_vdd": 0.007013247, + "gout_t": 2.542863e-10, + "rout_t": 3932890000.0, + "vout_test": 1.19, + "rout_nom": 3932890000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..8fe35831 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6866 + }, + "_frozen_from": { + "schematic": { + "err": -0.0070175, + "vmin": 0.5866486 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..ca7c5b58 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +.ends C14_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..8649a2e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_sky130_sW1_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C14_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..3362a5e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.19 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.19 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.19 +echo vout_test = 1.19 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..44d01795 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW1_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C14_sky130_sW1_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.2, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.2, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.22 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4071a01c9b314c3d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..99e86c2d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2bd19f8dc2976707c38eb6fc3132221f3654953354d05b450fee8d3d107474e9", + "qualification.json": "853a8048db8d7ea45433a5e377d6b7876ee7cb422a87c7b6068f111c96210971", + "specs.json": "7d7140fe379490486ee32bf81bbc0d0f432fbdfbedfc46da6ab4ebdbc3cba934", + "target.spice": "3470d4e9ec20fa40fb0b60b861f0c97332ce394231384d3b09d36f28a66f5c42", + "target_lvs.spice": "1939a4f24317264579b346367cdd01485e5439ff0bfa60ad4df1d7aeffe1bc75", + "testbench.spice": "72e33f1caa80e7db7015e29f7a90a03910dfa713ea5b28c5b7b42be461e98d39" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..5d07a41b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW1_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 1.0, + "l": 1.2, + "nf": 2, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4071a01c9b314c3d", + "mirror_pass1": { + "vmin": 0.6332049, + "status": "passed", + "vout_test": 1.22 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7332 + }, + "_frozen_from": { + "schematic": { + "err": -0.0084205, + "vmin": 0.6332049 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 15.6, + "schematic_measures": { + "iout_t": 1.983159e-05, + "err": -0.0084205, + "vmin": 0.6332049, + "dev_at_vdd": 0.00841385, + "gout_t": 5.408206e-10, + "rout_t": 1849226000.0, + "vout_test": 1.22, + "rout_nom": 1849226000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..bf388f70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.7332 + }, + "_frozen_from": { + "schematic": { + "err": -0.0084205, + "vmin": 0.6332049 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..656ac2cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW1_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=1.2 nf=2 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +.ends C14_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..02a91992 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,16 @@ +.subckt C14_sky130_sW1_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C14_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..308e1932 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.22 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.22 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.22 +echo vout_test = 1.22 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..0d48f50d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C14_sky130_sW2_sL1.5", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.9, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.9, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 0.9, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.17 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cf5bd71dfe67d9fd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..c482b03f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bcc2794ab074b38629c34e2218c8dbbadd5f6a90dc73b11810ed6e794fd1e9a7", + "qualification.json": "44b920b798b24cbbbcd7d03e7ddf52626be154c3c851345b76fac2b1ff464f33", + "specs.json": "50b6c77317c913d546b94b07e26d97fa1078428995c5c1eb712015b5f3b8e051", + "target.spice": "c6e19be42636d7b8e1d1013459c9f4c26240654141fe511dc4cf5ddf312aeb88", + "target_lvs.spice": "99bab95f6b6bf8e3a746e5ff3b48b695f027fa413e7d07ee44b9d989209fce33", + "testbench.spice": "4ee8b044201826cdfc4708f33d8aa1383636a58ce70bc7906afdb69d95c5a8f6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..14227bc5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW2_sL1.5", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 0.9, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.9, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cf5bd71dfe67d9fd", + "mirror_pass1": { + "vmin": 0.5415636, + "status": "passed", + "vout_test": 1.17 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6416 + }, + "_frozen_from": { + "schematic": { + "err": -0.0066865, + "vmin": 0.5415636 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.1, + "schematic_measures": { + "iout_t": 1.986627e-05, + "err": -0.0066865, + "vmin": 0.5415636, + "dev_at_vdd": 0.006682356, + "gout_t": 2.10599e-10, + "rout_t": 4748360000.0, + "vout_test": 1.17, + "rout_nom": 4748360000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..8e5e9d67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6416 + }, + "_frozen_from": { + "schematic": { + "err": -0.0066865, + "vmin": 0.5415636 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..cdeca0ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.9 nf=4 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.9 nf=8 +.ends C14_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..0747db32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_sky130_sW2_sL1.5 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f6 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM1_f7 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f6 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM2_f7 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM3_f3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f6 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +XM4_f7 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.9 +.ends C14_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..6050f4d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.17 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.17 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.17 +echo vout_test = 1.17 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..416afb9d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW2_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C14_sky130_sW2_sL1", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.16 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e689edfc71f66240", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..3bb33c28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eabfa30223e9a38dd6984be536e71852ae3b7987e7ae66b233297ddeed89141b", + "qualification.json": "40fc0147b012385cf1c8a51e1f805dd3b7d29b6534450501ad1bb3326e8ad769", + "specs.json": "b9a4990bf4c9e7063a4de1c01b1c88ae5dd2139d548c70804019243c21fb6fd3", + "target.spice": "37fe1572078b2174b11deab25575721eaf4fe46285cf746d444d26a3cdf97cae", + "target_lvs.spice": "d0620c590b17d8d8521e90cc6e57e8e091e441f14df48e7f7d9b18f6f471b865", + "testbench.spice": "27fc429bc4ebfba0d6bf402b99610f393dc2b09d7665786547a5ce0dc27844ad" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..3ebdedd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW2_sL1", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e689edfc71f66240", + "mirror_pass1": { + "vmin": 0.523346, + "status": "passed", + "vout_test": 1.16 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6233 + }, + "_frozen_from": { + "schematic": { + "err": -0.0059585, + "vmin": 0.523346 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.1, + "schematic_measures": { + "iout_t": 1.988083e-05, + "err": -0.0059585, + "vmin": 0.523346, + "dev_at_vdd": 0.005955145, + "gout_t": 1.600138e-10, + "rout_t": 6249602000.0, + "vout_test": 1.16, + "rout_nom": 6249602000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..1b52d7a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6233 + }, + "_frozen_from": { + "schematic": { + "err": -0.0059585, + "vmin": 0.523346 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..aa1b8f1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW2_sL1 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +.ends C14_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..cd767956 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_sky130_sW2_sL1 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f6 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f7 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +.ends C14_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..a09cedf3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.16 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.16 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.16 +echo vout_test = 1.16 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..f61335ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/case.json @@ -0,0 +1,152 @@ +{ + "case_id": "C14_sky130_sW2_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C14_sky130_sW2_sL2", + "ports": [ + "VSS", + "IIN1", + "IOUT1", + "IREF1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 1.2, + "nf": 4 + }, + "M4": { + "w": 4.0, + "l": 1.2, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03, + "vout_test": 1.17 + }, + "category": "mirror", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6753c26801898c56", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IIN1", + "current_A": 2e-05, + "from": "VDD" + }, + { + "kind": "ideal_current_source", + "port": "IREF1", + "current_A": 5e-06, + "from": "VDD" + }, + { + "kind": "reference_current_value", + "value_A": 2e-05 + }, + { + "kind": "testbench_element", + "what": "ideal reference current source(s)" + }, + { + "kind": "testbench_element", + "what": "ideal output voltage source (swept)" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..528339e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a9ff060c3656310149f19ad754e74ae548031b28bbaf4cd85e29d244548ed902", + "qualification.json": "1908fe59798536b94733161ecb4dd7002f04722177bfc9773c20f029074861b6", + "specs.json": "94eda37e225b901be9010c54d2515581ce42897dc7aa5c2e2782389cdf8351ce", + "target.spice": "0c879cd89afaf9a84b058974fe3a40a1f4cfa7f6b47a7d55f927ade649ecfa71", + "target_lvs.spice": "665dd093f0e45d2f56d437bb5cfe6deb23d8b767e14d56669175bfa287990f2f", + "testbench.spice": "c1426bd82f74cfcf2a1b097d30ae6e6bd8ddc9ebf0f34a291328f74a4458df85" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..3b489978 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/qualification.json @@ -0,0 +1,115 @@ +{ + "case_id": "C14_sky130_sW2_sL2", + "circuit_id": "C14", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "mirror", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 1.0, + "l0": 0.6, + "nf0": 2, + "uw0": 0.5, + "w": 2.0, + "l": 1.2, + "nf": 4, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 2.0, + "l0": 0.6, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.2, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6753c26801898c56", + "mirror_pass1": { + "vmin": 0.5463274, + "status": "passed", + "vout_test": 1.17 + }, + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6463 + }, + "_frozen_from": { + "schematic": { + "err": -0.0069555, + "vmin": 0.5463274 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.1, + "schematic_measures": { + "iout_t": 1.986089e-05, + "err": -0.0069555, + "vmin": 0.5463274, + "dev_at_vdd": 0.006950881, + "gout_t": 2.502328e-10, + "rout_t": 3996279000.0, + "vout_test": 1.17, + "rout_nom": 3996279000.0, + "ok_at_vdd": 1.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..9cbd723e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 0.6463 + }, + "_frozen_from": { + "schematic": { + "err": -0.0069555, + "vmin": 0.5463274 + }, + "floors": { + "err": { + "abs_max": 0.03 + }, + "vmin": { + "max": 1.08 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..5b72fbc4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C14_sky130_sW2_sL2 VSS IIN1 IOUT1 IREF1 +XM1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +XM3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=1.2 nf=4 +XM4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=4 l=1.2 nf=8 +.ends C14_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..0669ad6d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C14_sky130_sW2_sL2 VSS IIN1 IOUT1 IREF1 +XM1_f0 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f1 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f2 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f3 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f4 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f5 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f6 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM1_f7 IIN1 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f0 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f1 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f2 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f3 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f4 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f5 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f6 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM2_f7 net11 IIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f0 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f1 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f2 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM3_f3 IREF1 net11 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f0 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f1 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f2 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f3 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f4 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f5 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f6 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +XM4_f7 IOUT1 IREF1 net11 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=1.2 +.ends C14_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..2afd9922 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C14/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VSS IIN1 IOUT1 IREF1 C14_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIIN1 VDDB IIN1 2e-05 +IIREF1 VDDB IREF1 5e-06 +.nodeset v(IIN1)=0.54 v(IREF1)=0.54 + +VOUT IOUT1 0 1.8 +.control +dc VOUT 1.8 0 -0.0045 +let iout = -i(VOUT) +let dev = abs(iout - 2e-05)/2e-05 +meas dc iout_t find iout at=1.17 +let err = (iout_t - 2e-05)/2e-05 +print err +meas dc vmin find v(IOUT1) when dev=0.03 cross=last +meas dc dev_at_vdd find dev at=1.791 +let gout = deriv(iout) +meas dc gout_t find gout at=1.17 +let rout_v = 1/gout +meas dc rout_t find rout_v at=1.17 +echo vout_test = 1.17 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..d9e8f671 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C15_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e5c92a4c6f49b5ae", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..db629019 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3107cb1c541d7a7f16d562ac68e0931f67417b9376d228494bb71e1c0b17f1ab", + "qualification.json": "d95a55cadeb5a54d7a5fec762b14fa18f35a46d932ffd5bb0152a825c9f6636f", + "specs.json": "9457e8d8a8a246f367401c55410250aa8159114718db706b99703cd6ee8e9455", + "target.spice": "d21ca5b1f0855c571eae600c2574fbbcea2f51f6f9742592169d80f86a9a5f38", + "target_lvs.spice": "9200a83e97c3eecb1642b57a64e43cacb84f7cd1e6f0db93ca80fc50204b5db0", + "testbench.spice": "2abe6a4a330a76f79eb61ec62793b42328b7a41c10d0f42ee713e6c62de4d914" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..30ad0784 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,73 @@ +{ + "case_id": "C15_gf180_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e5c92a4c6f49b5ae", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=7.201 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 42490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.201418, + "f3db": 70820190.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.753914, + "vin0": 1.753914, + "idd": 6.948485e-05, + "gain_lf": 7.201418, + "f3db": 70820190.0, + "ugf": 146479100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..45e9348b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 42490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.201418, + "f3db": 70820190.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..022a751d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..67404c60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..5c86010a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..79a2b4a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C15_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "3ea6591d35394b90", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..dfa2bc12 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "313def0cb3903f4617d0adfc5646eaacf532b207be4239bbda4c9cfd71b1127f", + "qualification.json": "69ea7f757d68e68994e4ef87c81190d41c5a57cb5678adaf9301ee2c696cf3cc", + "specs.json": "be432a83e4d48833c7759a6e7a766c1b65ea9cfb6c92443c856005d9c59f4f08", + "target.spice": "6dac371f5a9df7f0a4c17bfd3b10e0e242318f5deadaa2a5fe080cac5be4aa97", + "target_lvs.spice": "0dc8686b283baf65b3dca205416b00eeca1709b7f16031c69e958b69b1917b6e", + "testbench.spice": "b613854fff8afcd527da10ede4176138ceb2a7d2191f620961a9a84a1498a994" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..e2ba93a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "3ea6591d35394b90", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 43520000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.859438, + "f3db": 72536000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.596329, + "vin0": 1.596329, + "idd": 7.656709e-05, + "gain_lf": 8.859438, + "f3db": 72536000.0, + "ugf": 188295400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..9d8b21f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 43520000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.859438, + "f3db": 72536000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..9c5626f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..91744c74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..44dd2445 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..0ce1006e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C15_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0e75830eef7fa606", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..d5894bec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "57f242d92ab0e9c751949f39a14cf796736434c51c9ff19f6cfe5fb2c05115f4", + "qualification.json": "c17c8cb552891cdb41817c7e5d6ba05339a2d2350a0128d6ac48e982ce0841b1", + "specs.json": "16e978277d04dcd7337637b9f0c47a65f402f941741dd12dfb233b36f22dcdbb", + "target.spice": "4a585d8000b5b0958266468c413050acb043e481891c029de58e550d7d3ef340", + "target_lvs.spice": "50356ebbd769293cbfc0c13614dca7201cb8a29cb01e8770ee34021cb92f0af8", + "testbench.spice": "2a53b1e920b87a5c02fe1fcb8b284ba8d248d7ad9efcfc25cbcef32def310b2e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..5f2b1afc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,73 @@ +{ + "case_id": "C15_gf180_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0e75830eef7fa606", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.973 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 42110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.973049, + "f3db": 70183790.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.868614, + "vin0": 1.868614, + "idd": 6.432993e-05, + "gain_lf": 5.973049, + "f3db": 70183790.0, + "ugf": 121057600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..d673d58f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 42110000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.973049, + "f3db": 70183790.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..e89d153d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..964e1a67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..db0811fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..35414ba7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C15_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4c8495fad8681d30", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..e8b161e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c46ad0f11f2ca67ae2c337d931c399971ed4df42b209567c5b9f7e88f751e30c", + "qualification.json": "de77446c62d0bce6890701bc82ead3332f56b7cfa2b6989925d5687f360ece9b", + "specs.json": "eb264340679d25090a12e5070e1b05dc24d0c3aef5d3c5bd70b7d56b860c1604", + "target.spice": "d4800579a1e9a8b9e2dae26bb36dac99e3a108196b0c310bd3d86c20cc274311", + "target_lvs.spice": "a6696019897bc06c130d541337d23f415564e33b67bb44b988521ca6323d3a55", + "testbench.spice": "505f5bad41cb2ccf8343893488de7c828e9db7cdd27f4b3443e1b31f340d8ca1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..b5def9e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "4c8495fad8681d30", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.89 + }, + "f3db": { + "min": 42350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.8931, + "f3db": 70579120.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.328069, + "vin0": 1.328069, + "idd": 8.862334e-05, + "gain_lf": 13.8931, + "f3db": 70579120.0, + "ugf": 343586600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..299a4838 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.89 + }, + "f3db": { + "min": 42350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.8931, + "f3db": 70579120.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..65e0d574 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..47f86003 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..1db214da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..11b9a2ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C15_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "86a486d0e4f5032f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..ffe2c1b3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "55e9e27352670c19afbcea38566261f026c569b3baa254bb1c645ff2771e23f3", + "qualification.json": "8f82f0dc64c48f55f59522221863d86cf3d460b83b4322d0d6d21eec3a191ebb", + "specs.json": "54abddd6cd2a4f1f250614d02d7133b40b3e4e2b54476f0fd20488eb91141011", + "target.spice": "1f7eb6186e9cab06246da924f7107ad3ec6ee5699b757679574fc4934d522e65", + "target_lvs.spice": "beb213052eab3b5ae2e760e7440a6887ccc68fdb0adee7b1b9cf570cf3d85d16", + "testbench.spice": "a7ea0b7dae557980cc9c547be781ff875e7babeb10c48541b5c376a4e7b44193" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..e54093f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "86a486d0e4f5032f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.52 + }, + "f3db": { + "min": 43980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.51781, + "f3db": 73303320.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.211577, + "vin0": 1.211577, + "idd": 9.385875e-05, + "gain_lf": 15.51781, + "f3db": 73303320.0, + "ugf": 433003800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..32e04597 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.52 + }, + "f3db": { + "min": 43980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.51781, + "f3db": 73303320.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..660bd734 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..90b59479 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..5f8f8945 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..e206de15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C15_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "01ed2036739dac11", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..4ea0f925 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5c86c78df66b5d670e0a6e5ac7c05c3037fb0da8522932d33a1e62e34370605d", + "qualification.json": "cdabacdf29977284d169a656b713fb67784c66386039b7cd02eb83c2c9492637", + "specs.json": "aee13cfa659e34c0c58192e0566076d46ada26e4ae9eed1e710963a90e5c1f2d", + "target.spice": "a510390021c31233273a99e971dda7895f45bd8c227f649767382438cd3d3d95", + "target_lvs.spice": "14372db62c7542eae059c34e1e46f018863084e1ea5443ca49243ad333630dd0", + "testbench.spice": "27ccbeee786949f9e429af451cc709f31cd82070b7056b417975439449ee0902" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..70bcc86e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "01ed2036739dac11", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.672 + }, + "f3db": { + "min": 41740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.67212, + "f3db": 69571380.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.418151, + "vin0": 1.418151, + "idd": 8.457483e-05, + "gain_lf": 12.67212, + "f3db": 69571380.0, + "ugf": 292319300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..233c2b11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.672 + }, + "f3db": { + "min": 41740000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.67212, + "f3db": 69571380.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..0c208da3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..9fb8d159 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..ba68648b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..66401d4e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C15_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ce02ba3fd6fac776", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..865a8c5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1ac1fda88cc0547e373fd4a72667cc1f03adc2df12122a441b95e7fa92e09325", + "qualification.json": "2a60741b173f9b834760cdc2c1dd0cf563bf3418a1fb7284fe23ba9b35b0b30f", + "specs.json": "4fbf02cbac5fd5ee909594917eb5c97abd60fda4a3c14066268b7f55862bf19b", + "target.spice": "59335d209cff532e391257310fae508b70f347d0e7d9dedca7ea33e6c6538301", + "target_lvs.spice": "c6472224267e021557a1641e50375c66628e167fafa8acfba96e5ec5dcc8d10a", + "testbench.spice": "f564e852f65aeb92e4b8ad2170fd0d3aa5c87ebdea21330e7bb1d25c52c0f625" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..08bc508c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ce02ba3fd6fac776", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.539 + }, + "f3db": { + "min": 42510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.53859, + "f3db": 70852030.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.466917, + "vin0": 1.466917, + "idd": 8.238316e-05, + "gain_lf": 11.53859, + "f3db": 70852030.0, + "ugf": 258862800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..11565778 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.539 + }, + "f3db": { + "min": 42510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.53859, + "f3db": 70852030.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..3be82ce6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..14a2b135 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..485c1d8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..da67c785 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C15_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "741d811afb36a449", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..ea7c83c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8f859b78631709c83474d2f13bd4ca9af95a01bcd2451f7a889e34be6be19f09", + "qualification.json": "b2e3990a66bbf7d20809131a57a123027c63d2281c45d016683dc5af97a19a16", + "specs.json": "aa1063b4b9d093a26e1125534f4fdb0467a0b6b8113feb162fe019672a4859c7", + "target.spice": "05de7b139001242227a2d435913e3afc10d9ebef3acc7c957157f7c3e758b496", + "target_lvs.spice": "886637ad9fcc2ddf0e0cc3510aeb485818c7125a281c9c19f76c74ba4e582ee5", + "testbench.spice": "203b396bb597443b6bf61176b88bd828ccad0af3406d16c19dbead51e51ed7c4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..c61c223f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "741d811afb36a449", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.18 + }, + "f3db": { + "min": 43920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.1781, + "f3db": 73207020.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.333873, + "vin0": 1.333873, + "idd": 8.83625e-05, + "gain_lf": 13.1781, + "f3db": 73207020.0, + "ugf": 326850000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..302920f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.18 + }, + "f3db": { + "min": 43920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.1781, + "f3db": 73207020.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..fb0a3481 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..f5d87590 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..5af7ddd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..65c856b1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW1_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C15_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1cd57dfdb1973c1c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..324d5f76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5e692994fe6facc503c868f5a61080516ddabdcd9cdf05a1e22757d2fbb81708", + "qualification.json": "1eeb0de64007b95dcb77c372881cc761e2ccfbfbefb75920ed88e1f4e82f5541", + "specs.json": "e23ce34bc701c0a3da8cd4a18fcfcb0be4724f759e5729748b1563f143280d93", + "target.spice": "0104e8a720f270e7a37e4dc83fc494a16849c83d0a52a3e0bcfe6980005218a2", + "target_lvs.spice": "fd37dec7e370da3f97076aeae9fb03c9cf06fd529030b0368f600d68632e17fc", + "testbench.spice": "ad8431249c55183f43c65c84b5e24cbac5760bf97d46af1b1fb74cd72d368b5a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..4e2c3a1b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW1_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1cd57dfdb1973c1c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.31506, + "f3db": 69977800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.567756, + "vin0": 1.567756, + "idd": 7.785124e-05, + "gain_lf": 10.31506, + "f3db": 69977800.0, + "ugf": 219291100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..2c819c1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.31506, + "f3db": 69977800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..02039d78 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..7547bb6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..1d45a19d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..36fdf5a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C15_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "49b7a00077cfbee6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..3c4f2d87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e801381db2bea5b462eb6324b417cc5330d6ce20f1f792ef79b897c047eb4768", + "qualification.json": "85fbd9dfb88672494cf4aa3526bde0737cc356a461679cffdfe132c977a298e8", + "specs.json": "3c9b88ba36668aebde64ea0e50adce701037a5b6119eaee45b17a2a18d19a831", + "target.spice": "ab5e009be98c2a3e987899fb53f1c3902fd2136d81f200fb4ead00b07737128b", + "target_lvs.spice": "2c4fad83082941b50b7228fad1735e505af269955f3f7c6085b4f62fe1b271b2", + "testbench.spice": "33184bf50154ece547598ce254b292455298e2c6868fb7409392e65b078aa86a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..b8148a92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "49b7a00077cfbee6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.49 + }, + "f3db": { + "min": 42100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.491, + "f3db": 70173410.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.242207, + "vin0": 1.242207, + "idd": 9.248218e-05, + "gain_lf": 15.491, + "f3db": 70173410.0, + "ugf": 413486600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..3265fe32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.49 + }, + "f3db": { + "min": 42100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.491, + "f3db": 70173410.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..2e3cb811 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..90da0c56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..4fec46a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..789cc9e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW2_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C15_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dfff483edf5d728d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..cc28d08c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5bfe6eb4e2ceb3ee7269ad05a825ce85b7dfb3c012bb641d426b25e5119de13c", + "qualification.json": "210d78f54ec26a2a073803eb7f649b92cbcb8d0a6118f60e077e6be42e049899", + "specs.json": "03f7b4e2450af06bf3fe52d561d0a5df47486a18029477b6e3f42f374fc89588", + "target.spice": "d0271081d8df39516b837d446f520205813772e8c6021025eff2f2f16d8e30cb", + "target_lvs.spice": "cf6ef9670e1f5903ec5d34013ca010703c1936660352200d3f46543de4e983bf", + "testbench.spice": "4246f432b37b9d4f33da5a803bab299286fca3537f47389f2b64773f9f003a3a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..924b202a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW2_sL1", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dfff483edf5d728d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 14.1 + }, + "f3db": { + "min": 43890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.09957, + "f3db": 73149630.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.137371, + "vin0": 1.137371, + "idd": 9.719374e-05, + "gain_lf": 17.09957, + "f3db": 73149630.0, + "ugf": 520860300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..ec8fede6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 14.1 + }, + "f3db": { + "min": 43890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.09957, + "f3db": 73149630.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..01164f99 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..04037bc8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..68fb6ad9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..dbcd9e80 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_gf180_sW2_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C15_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "13fc8e728fc9fd01", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..1fa106eb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0a60c2ddfa5d9fae3ec7ee8db3456babcb478d5f8cdb1394a423645224a18c9d", + "qualification.json": "a4b14ecd187e88cfeeb2d26bc42ffff6fbf33f914a351b50412371fd99559284", + "specs.json": "65dfd5940467afd55ab3293c74e88490cd75c0269652e8c49b0c537bee4323bb", + "target.spice": "a2ef64386858fb5c9aaeb07bb956f2c28ec0a4fad8ed7efc95fc18ff2e230a5d", + "target_lvs.spice": "5b46778fe6a18e84c55a029403582298e0731d8dd71f133f95e6814b9d594e5b", + "testbench.spice": "703cd90268b7060ab5089160dfcde4b67c8b1f15d79a926d290876d8c2667482" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..4b5441e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_gf180_sW2_sL2", + "circuit_id": "C15", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "13fc8e728fc9fd01", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.27 + }, + "f3db": { + "min": 41450000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.27284, + "f3db": 69077760.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 1.32431, + "vin0": 1.32431, + "idd": 8.879226e-05, + "gain_lf": 14.27284, + "f3db": 69077760.0, + "ugf": 351920900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..d4c45721 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.27 + }, + "f3db": { + "min": 41450000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.27284, + "f3db": 69077760.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..58c00780 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 +MM1 VOUT1 VIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +.ends C15_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..cd4db33c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 +MM1_f0 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +.ends C15_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..c40528c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..c148cbf8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C15_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "87a6b19045a6cb8c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..c5e83ec8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9ba73379493e8fd9dd505b988ba7ebf75c6c39c89c5c83ede682a2ebf793386b", + "qualification.json": "84e9e92401c033425deb7195e170b5dad6282ad04306938186b8b5fcff36d420", + "specs.json": "52892c1cf4f367863c931fa83e296cdb2211ec038ba04f55a063bc14aa9968f4", + "target.spice": "da57f22a5a61b23e4d91a015478037d73d57991e6ddda5e5c789148829769d72", + "target_lvs.spice": "10d2737fbd34e0ad0a7e0c4e97f47c0dafb0b7d75661cd34db51db8c10234682", + "testbench.spice": "97689607f95cc38b7247a4c076c930d2029e66948cce26cf189f78da2c43e2d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..dc8556dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "87a6b19045a6cb8c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 86530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.319831, + "f3db": 144216600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.6544276, + "vin0": 0.6544276, + "idd": 4.546971e-05, + "gain_lf": 8.319831, + "f3db": 144216600.0, + "ugf": 348140800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..c3b2451b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 86530000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.319831, + "f3db": 144216600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..dc32b60f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..32e88929 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..ad495e1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..51578d5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C15_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9b70078aee21bb36", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..ed8b5916 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "710df4f1e24e36702fefb989e77b46660cc7238d1e16fbead4104c0d8dca82ef", + "qualification.json": "250ce8adfe472f1ec169a864db9bfa9945c01ca340da890da2cd6c370fd80a68", + "specs.json": "2cb77ce03a7d4ac04dfd59c41b237af645936435aa6ca0ebde49ae1b724d631c", + "target.spice": "da9a6e2c06e2a8f2504be800b7805504fb583ba3113eebe6a70f19042d7a698f", + "target_lvs.spice": "9533742926c834eeb45b2db34c50053f2127879aa76d7d648b90b450f1054447", + "testbench.spice": "2a201c32300bf13d1065e1af9d9bd6f301019711fcb27573f30797dc3da05df9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..34dcb07e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9b70078aee21bb36", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 89420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.307059, + "f3db": 149028300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.6462885, + "vin0": 0.6462885, + "idd": 4.614805e-05, + "gain_lf": 9.307059, + "f3db": 149028300.0, + "ugf": 410210500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..d6bc9fca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 89420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.307059, + "f3db": 149028300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..984c62a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..fb77cc17 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..002d6fcc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..8f5f68da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C15_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3772d1331b2bfd17", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..859f6f1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0eca39e9df21bbfe6f4cf6994eaf501db136ca152ba24007d113c9dfbc34579a", + "qualification.json": "76b0880d76b18ddc2b3e906f70fc18d703a2543666f62cd423ef40f8d96d8bd6", + "specs.json": "09fd81a200ad07927e64b8a6f7d7dc37fe722ebf404bb100a8287c4dc35f9ee6", + "target.spice": "9ed10fd727723ba49edc8a20b19da8f827319078a4b0408ceea174884963af71", + "target_lvs.spice": "b3f7ce1569f8aa151721851da0d521d17075006b1040141312bb77fa28caf9f8", + "testbench.spice": "86c6db166833801439c98cb417e1330d0a782b3b276e21a13bba95a1ab45fce9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..165fb9d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,73 @@ +{ + "case_id": "C15_ihp130_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3772d1331b2bfd17", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=7.377 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 84590000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.377442, + "f3db": 140980200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.6726415, + "vin0": 0.6726415, + "idd": 4.395171e-05, + "gain_lf": 7.377442, + "f3db": 140980200.0, + "ugf": 299023600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..8559f9d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 84590000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.377442, + "f3db": 140980200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ecc6b72b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..1ceedf3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..4f628f81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..facedbd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C15_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0076cec2241a3686", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..5b043336 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9ed1a6ae8123adf4d86c8413681677dbc784b2c30871065d3c6ff4cb06c9ea95", + "qualification.json": "62e4e1ff0ccae0c1ba7372d5ba37ede5101e19ee4188e212dea182b0e39c919c", + "specs.json": "9502bc64d2187642c890646628b867fb13a41c7399404542ddca95eb2f785cbd", + "target.spice": "ad03ec5d6e2c45798d0a4b2fa495e55a585b94a259f8c5fb15a8e15135ae1cc2", + "target_lvs.spice": "9a44ac2c77a7f09d1e4d5c2d955dfe3769946978d22775a4993ff044127c6898", + "testbench.spice": "bb20c61ffde6706d510cb12e37c78739519166a18721c5ab7da6ca07c8b9004d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..c61ebf5e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0076cec2241a3686", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.877 + }, + "f3db": { + "min": 92970000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.877, + "f3db": 154945300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5264768, + "vin0": 0.5264768, + "idd": 5.613354e-05, + "gain_lf": 12.877, + "f3db": 154945300.0, + "ugf": 667673000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..5f5d9921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.877 + }, + "f3db": { + "min": 92970000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.877, + "f3db": 154945300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..87aef741 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3ca9bb31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..e07c1f35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..b7817057 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C15_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d3209990dbb25d8e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..1f0ff1dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9566f9ba7d1344ce8761bd808194dd4dc02b7191b49f3e4d49f8943db7673c9e", + "qualification.json": "51e750fdac7e515b3de489bc73f7cb4fcb634cfcdfe98caa8990ef1be4b07a0b", + "specs.json": "404a9bc3d453d653b1bc14ad94dd4741372cf1abd2250d89feae7a53a63a3ca9", + "target.spice": "f3032bf018ec6490fa8be95d05db2c5f2f448b1b8773caaaa521cb10820480f6", + "target_lvs.spice": "1cc5395ead020c3ff7968e76b35a391ab58056b85d9c0d21bacf915353fcb0d7", + "testbench.spice": "7742922b10128849aae081dec56da9ca5c8325ebf2a9e5cb86f2ce70cbf9982f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..57235585 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d3209990dbb25d8e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.44 + }, + "f3db": { + "min": 97350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.4412, + "f3db": 162241800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5311651, + "vin0": 0.5311651, + "idd": 5.57428e-05, + "gain_lf": 13.4412, + "f3db": 162241800.0, + "ugf": 748211300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..8e083759 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.44 + }, + "f3db": { + "min": 97350000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.4412, + "f3db": 162241800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..25636359 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..69a0b2c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..e95cba11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..14fe40e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C15_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dfe46ecfb09fcaff", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..363eea9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9a0884539809d21bb998bfbc146800f3b80487a61743495d7a9331267914b27c", + "qualification.json": "5b874e2aaaf324759dec4cde3a2a738e7ce3411cf283f7a750cd07a5ae5c6a7b", + "specs.json": "fea9842633e421b0c0c589e81188239b97f024ffae91b9b5ea40cc14bd0e68ae", + "target.spice": "3b59b9dbbde6dcfe5cd076b56d7f8ba71ad5f7214e3093717f4f8b63c3882c37", + "target_lvs.spice": "1ab9deba5c089d4d47771675ac30bd09f97817dc5fa3594145460ee957a68e96", + "testbench.spice": "19dde049fc47ec8a00d788d9068afab07641bde93b31a1644056a493beb3fa09" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..6caadfd1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dfe46ecfb09fcaff", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.247 + }, + "f3db": { + "min": 89910000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.24704, + "f3db": 149846600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5348215, + "vin0": 0.5348215, + "idd": 5.543807e-05, + "gain_lf": 12.24704, + "f3db": 149846600.0, + "ugf": 598223700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..aad7d3de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.247 + }, + "f3db": { + "min": 89910000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.24704, + "f3db": 149846600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..a1519ceb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..6231d26d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..59c0820a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..cb7ba0a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C15_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a5d13a517b6c773d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..34b734a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7344597e2325e89d887884a003ec07e042e14fad5c1e7ed2748de6562969cb5f", + "qualification.json": "af4c3a9705104643f5657c777e15a5acdac8ccbbd698ab88e5f25f458057e6ab", + "specs.json": "2e174ec1eaf05aebc094c219660830bd77e3b65954224fd9e923704fad9cb055", + "target.spice": "c971d5a08918e906b4a84302d041581d43ceacbc8618e7daf0fe2d08d3f0b0b2", + "target_lvs.spice": "67b7ece4008e523ecafe90686ad2d365b48a5cd4df564131bb6b0d108f680ea3", + "testbench.spice": "8e6d3808d61606663b4b9082ca0933f30364902a449157fe2c5c8ce83ec7a4d4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..eb25222c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "a5d13a517b6c773d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.351 + }, + "f3db": { + "min": 90400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.35112, + "f3db": 150666800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5694624, + "vin0": 0.5694624, + "idd": 5.255099e-05, + "gain_lf": 11.35112, + "f3db": 150666800.0, + "ugf": 538054100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..62c06f21 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.351 + }, + "f3db": { + "min": 90400000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.35112, + "f3db": 150666800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..e6959b8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..312c464c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..2abbfe60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..f6ac9294 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C15_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d7ff3e1b04562e8f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..8fa9f594 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e4df077f85219d6560e659426f37aaa792840a33e566bdfac2eb9d12fd99bef0", + "qualification.json": "1c54be67022763dc908b88e77717869d4ef4a136f8edc52fddbb8dddc1977e3b", + "specs.json": "cfed887be949b714ce25b972f27f396143afb02bbbf6ae12851ebc0733a1153c", + "target.spice": "16ca468c261badb09f9b2c0327d7f4fdc707aed4cc52b43dea7f239ad8656421", + "target_lvs.spice": "34307335b0fcf4a7fccbd5ded2c336df8a284fec2a9f2480a42e2a7e02a8b164", + "testbench.spice": "1622e52fff1f90987a5b6fd9af35f1b09a0d128307e8650f4a81ef7f6d8e182a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..bd0c499c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "d7ff3e1b04562e8f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.071 + }, + "f3db": { + "min": 94170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.07051, + "f3db": 156951600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5697971, + "vin0": 0.5697971, + "idd": 5.252309e-05, + "gain_lf": 12.07051, + "f3db": 156951600.0, + "ugf": 612331300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..9976a16a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.071 + }, + "f3db": { + "min": 94170000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.07051, + "f3db": 156951600.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..ea5031b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..aa329b43 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..66f1ff8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..04ed2458 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW1_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C15_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a0cabdab59942aae", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..0b5e4850 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c562cfdf9cdd29fb71a62f9e1c9b67812a9ce7d24e2e513fc9fef3163580ae41", + "qualification.json": "668755fe541886b310bb6344755862cef6e2b4f4af81b86753cc034836c88b88", + "specs.json": "58de11629e939fefaa5fabfb512d381dda2b8e3f41daae85bf4fee9660bbe0cd", + "target.spice": "b3698d060bcf42dec6e764d2d5c4d5b83b5dc0d7567cdf341fcbd67a5141c4af", + "target_lvs.spice": "aba0862d13787ae778f3562440b32997e249a71ecf6e2a48a573c06e6077bde9", + "testbench.spice": "43a1d9504a22b98ad65ab300eaac4ea197f9ecf1d6d53568fadd66c16ca8de41" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..3d844a67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW1_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "a0cabdab59942aae", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 87800000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.60652, + "f3db": 146326000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5813189, + "vin0": 0.5813189, + "idd": 5.156283e-05, + "gain_lf": 10.60652, + "f3db": 146326000.0, + "ugf": 476155200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..d7b53846 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 87800000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.60652, + "f3db": 146326000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..cd6db179 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..6aa0f36b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..17c0eb2b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..6f7cd983 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C15_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f7049c9dd7d69d1a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..f47b0133 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4a3731b428299e75b9643f7a895cbaa481eda522146b9dc33a711ca2c8ab7557", + "qualification.json": "5c436de5440b6e0019058c96e193938ed5d7a365c3afd87a88fc9d1df9c317ce", + "specs.json": "e22a87d00726f2a225f907dd00cc8bfd3c9f7e27f374841ed458ab24244bbe26", + "target.spice": "ce0f51569a2471ebb88e0b815a99efcb11d777d4be1bf0d6598a651409f7cddd", + "target_lvs.spice": "880b727f4b2a37115b66bd2b7f6bfba8ca8e36747690603a158b9651dd4ddc9d", + "testbench.spice": "2be17f7031863893798efac91ad3ab0786ae5d058afc98c1db78b9a4599045d9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..610b01b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f7049c9dd7d69d1a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.86 + }, + "f3db": { + "min": 94880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.85799, + "f3db": 158126100.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.4988202, + "vin0": 0.4988202, + "idd": 5.843853e-05, + "gain_lf": 13.85799, + "f3db": 158126100.0, + "ugf": 767281300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..99a0b187 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.86 + }, + "f3db": { + "min": 94880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.85799, + "f3db": 158126100.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..c8b92cda --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f560df61 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..efb148ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..c67c73ad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW2_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C15_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dcad40c2373a6514", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..34d217e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "566347acba3319b83d5eadd7793d99aa46080654dab280c1968ad00980612270", + "qualification.json": "dc4eeffcc4e885153182052837367aa151286418f55151960420da2754f5fe3a", + "specs.json": "bdf86ca6da25bed37ad009d658a23729471a6d00cd2a97dc634ebff2c205cc52", + "target.spice": "1734c64a681637db8e05b0050b5c4c70f5eaf70b042a2deb8b129f9ddff20398", + "target_lvs.spice": "cb2ff34b2722944611c52e8ce82af8e0ca617d37d2f3a4f9e5b60765cae7abc4", + "testbench.spice": "7392a417b01c54092790c86a95311dd595fdcb1b80c8fe607e012c925c7e2888" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..41449c2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW2_sL1", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "dcad40c2373a6514", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.31 + }, + "f3db": { + "min": 99720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.31278, + "f3db": 166198500.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5062686, + "vin0": 0.5062686, + "idd": 5.781776e-05, + "gain_lf": 14.31278, + "f3db": 166198500.0, + "ugf": 851250200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..7fe1b2f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.31 + }, + "f3db": { + "min": 99720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.31278, + "f3db": 166198500.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..318dd46b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..aa75c53b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..cb6e8f40 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..a308be36 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_ihp130_sW2_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C15_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "649588b2052271a8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..1cb345cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "aae50cc12deb29ea34331c1bcb43378400ebf99fb241c25710fb45363c1a4fab", + "qualification.json": "08e42f42a3b143bf7c5e437e264fcce3e682205c95a11b55a37e784916b728da", + "specs.json": "c21faa691ab57bab86a78d12dcb0d62fd0dbd0743fcd60e633f19b72425974fd", + "target.spice": "a543604fa328035fa1f5b07ffbbf7d1be79902b0f8f57bd4dbf57c844d010ff5", + "target_lvs.spice": "d735e0c09746ecb8555cf56188813bc3e42d42dc37d39e1903231bf53ea762c9", + "testbench.spice": "17b0c4c2125585e45133bdb2ff8c2e2f8f5e37fbb8a15edf446862dffdef3b5c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..10751c9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_ihp130_sW2_sL2", + "circuit_id": "C15", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "649588b2052271a8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.31 + }, + "f3db": { + "min": 91460000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.30866, + "f3db": 152436800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vout0": 0.5048617, + "vin0": 0.5048617, + "idd": 5.793501e-05, + "gain_lf": 13.30866, + "f3db": 152436800.0, + "ugf": 692654800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..24fd8057 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.31 + }, + "f3db": { + "min": 91460000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.30866, + "f3db": 152436800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..2d42609b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..2c370d4c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +.ends C15_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..b4bb6b85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..0579efc2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C15_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8998307b59f6d76d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..93f9b8c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dee42a204f4f867d9c5ef18b60752bfe5cb6c08adb33953e1d984ae5dabd7ba6", + "qualification.json": "321afc9f9a8f0301e3a6afb9fe9cd5cfdadc9d7e068467ae31b2faf1332e13ff", + "specs.json": "fb19247ba26d28148a3d9f7c458aa003c65a009d781be09a38071c1fad326555", + "target.spice": "33bf03e966e965a342175424c77a0a2e3cb44e399142963ec359747392de6fcc", + "target_lvs.spice": "f3bc717c4c286b7835b688e333938780e91f9dadd883a3912d0f656b3d2af4af", + "testbench.spice": "a753c80ce70fa5bd0e48e292247d875337e2f33ad027498b92caee26b430b840" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..4bb6324b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW0.5_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "8998307b59f6d76d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 49960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.19672, + "f3db": 83271890.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vout0": 1.025537, + "vin0": 1.025537, + "idd": 3.865494e-05, + "gain_lf": 10.19672, + "f3db": 83271890.0, + "ugf": 257005100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4987ddf1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 49960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.19672, + "f3db": 83271890.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..2800ba3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8bede5df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..2b9fe7e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..a4913e26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C15_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "505bd95e8dcbbaed", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..8f24884b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "745e092cf8ccc457259044d2434c70740538f9f81f067fb45c730b37f6eda823", + "qualification.json": "f243b7a22e281cbfcc9abc00599a7f01756ea1aa026c03327cb84764147d26db", + "specs.json": "95ab91b94c1020607243b0bc8132a01f641890488f194e9bc367f876eee8c9a6", + "target.spice": "aabadc00fd4fbf679dc17e50def99779ea8fd415301a7754e23807672be3f557", + "target_lvs.spice": "66ef931a44ba52a545ea63e101c5d2d478d7a2412b2efac8c15b68ae1d0bd1c0", + "testbench.spice": "42b19cd89d10dc462a9f17fa789ae6294ff1d1e716339f686dace3162093f17f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..8da007e6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW0.5_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "505bd95e8dcbbaed", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.121 + }, + "f3db": { + "min": 51370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.12053, + "f3db": 85623300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.9, + "schematic_measures": { + "vout0": 0.9785074, + "vin0": 0.9785074, + "idd": 4.101788e-05, + "gain_lf": 12.12053, + "f3db": 85623300.0, + "ugf": 336160500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..f0ea5452 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.121 + }, + "f3db": { + "min": 51370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.12053, + "f3db": 85623300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..061ccf2f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..a6b740fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..dc2aef23 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..153ec8fc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C15_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "afaff861fdfe443d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..bd03a7bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dc0df723c627255ef4ab980455b444604ebaebba45d06a65c28c79445b72b8bc", + "qualification.json": "bbd329b50fd5157a986775a8708b4dfe96a3b35c194a9d795c2e786e82338acf", + "specs.json": "cd902ec6d85eda03562f4139354b582ba7af7fc0be8e1947c9cd16e72622ed24", + "target.spice": "4e15e4b8fd61d8e231f9010e4aed9485bf9d799349ef733deff4630a6204f130", + "target_lvs.spice": "9ecb732b4ac454334cbd2c9c318dc36040ca97265a24b8f1bf1f9817f6094bdd", + "testbench.spice": "e227bef8f939ef03c012f5a6d6737ca03dad0660460993352606b8a6a9a0dff8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..7924dcd0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW0.5_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "afaff861fdfe443d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 49210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.726616, + "f3db": 82015780.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vout0": 1.069306, + "vin0": 1.069306, + "idd": 3.645686e-05, + "gain_lf": 8.726616, + "f3db": 82015780.0, + "ugf": 209186400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..2f0c24ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 49210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.726616, + "f3db": 82015780.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..05a835a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b4156d20 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,5 @@ +.subckt C15_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..3715bdab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..96fa9e59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C15_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "21d648e4ab31c007", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..63ea12fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2032a5f83a9dcf0a7047bd52991037b04f7615963bfbf35cb5cab54d1277fc14", + "qualification.json": "54305498e899f81cf0b25db9f4dee6740f818d5e755d36b363e7eef8133053a1", + "specs.json": "f4c23d4264ccb6c057b1c150e46f2c90d95db13453b47cb57fa2b6f7d32498ad", + "target.spice": "bf10c41ad12739e0112a83f7ac83b9b2418361da3d1b0b6f7b19bd6753aad759", + "target_lvs.spice": "0553ecf643b6fa44987b129187643be7d6b3ab4a6870bab79f41d3dc004135ae", + "testbench.spice": "a59616a0c694e5c166f50d0defa27d1f39af0246d68146b74aa2955b32291faf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..66c19cc0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1.5_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "21d648e4ab31c007", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.95 + }, + "f3db": { + "min": 51250000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.95233, + "f3db": 85413490.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.0, + "schematic_measures": { + "vout0": 0.8689475, + "vin0": 0.8689475, + "idd": 4.652634e-05, + "gain_lf": 15.95233, + "f3db": 85413490.0, + "ugf": 531470000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..2a72936f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.95 + }, + "f3db": { + "min": 51250000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.95233, + "f3db": 85413490.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..731d7321 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ef13b4fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..9f8dcafd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..00f8b711 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C15_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4b2112236cbf51db", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..f824b76e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f67c52a403e28e678634ffb4808623243f8bd83602941b3f426eef33783f1e20", + "qualification.json": "1bbb04e18a7fe291dec3f19c249aa1831a6ddff1624fce34a12891bbcd24a935", + "specs.json": "f2d7e0f3eac03b3db879c0b6b461582acb3cb690d4be58245fd60f5c35bd7640", + "target.spice": "496f2f46305cacde565fd62c7cdb5b95d80fae62678076aa940c868758ffd1d4", + "target_lvs.spice": "e010fb76576c2572fbba4feda00f4f2174d576fde9cc2671370b6b5210d27242", + "testbench.spice": "a3ea526806554dc5381649ac2bec2cbab365a2ea6fcba785c80209038bf79162" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..c98cab3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1.5_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4b2112236cbf51db", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 14.39 + }, + "f3db": { + "min": 53550000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.39146, + "f3db": 89253290.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.4, + "schematic_measures": { + "vout0": 0.8448226, + "vin0": 0.8448226, + "idd": 4.77399e-05, + "gain_lf": 17.39146, + "f3db": 89253290.0, + "ugf": 657617900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..dd97fb56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 14.39 + }, + "f3db": { + "min": 53550000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.39146, + "f3db": 89253290.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..f8ec7ae8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..54317d76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..57469940 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..4fab399c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C15_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d276f4855c7c1e77", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..8f41e8c6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "efd4ff0e2d483c91d8ccf00b2b47ee60f4dc3a995055cbd6478583fb71599ff4", + "qualification.json": "e3d985c7348342f686063de35ca8e768dd2ee71ed552157a904868ac23e8d48d", + "specs.json": "bb99b6da4409f04909449befe72b97c1dbe4fec24fad02907c73126cea1ec7b6", + "target.spice": "f78fac5ba66ee37381b65c0c8f56c72ddd3c5416693b113553e687730cfa40b7", + "target_lvs.spice": "88fdf0c37c8220f2c974239f7aa80d8dd2df20c5388c83b2bfe61462431005aa", + "testbench.spice": "7279ac668c807598159250db6b314d7bac51aa116523ba88ea1b4ae532037e61" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..7c351a25 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1.5_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d276f4855c7c1e77", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.75 + }, + "f3db": { + "min": 49980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.74626, + "f3db": 83303350.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.7, + "schematic_measures": { + "vout0": 0.8960326, + "vin0": 0.8960326, + "idd": 4.516411e-05, + "gain_lf": 14.74626, + "f3db": 83303350.0, + "ugf": 448768800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..c50b8b53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.75 + }, + "f3db": { + "min": 49980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.74626, + "f3db": 83303350.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..6b0f0337 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..4ab5fffd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,9 @@ +.subckt C15_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..85699c98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..ad336c9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C15_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "369d8c947d175331", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..4ed2b274 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9af73bbeaddcdce674020d2f1aaa3813e808497cf5476070813310b0f5f309e7", + "qualification.json": "0f04d894b56f994d01c0f34622034ca9f07c93158aeaef7398e225a8fc88982e", + "specs.json": "eb2d2be56ce1bf8565906f5fb28e3940703657047763220148ab61ed9e09782f", + "target.spice": "24085716706f8df460d9cca69243f9e210829e283c78c2dbb60cf98248cdd8a6", + "target_lvs.spice": "fe7051dc0690d6abc8bb778a4356f6e272e72ddfe47076b636ade958a13db2cc", + "testbench.spice": "56949a3d440aff2d67b0a11b7f2549eeee6d05d326c7aa05af1f91daab058b3f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..bd14d22a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "369d8c947d175331", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.94 + }, + "f3db": { + "min": 50790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.94361, + "f3db": 84652550.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.4, + "schematic_measures": { + "vout0": 0.9196854, + "vin0": 0.9196854, + "idd": 4.397473e-05, + "gain_lf": 13.94361, + "f3db": 84652550.0, + "ugf": 414579500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..754eb33e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.94 + }, + "f3db": { + "min": 50790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.94361, + "f3db": 84652550.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..359f76cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..9ea2c358 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..ed95e219 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..53ae5ffc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C15_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0f19065f287c7cfb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..8332bbc8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "895b36da7297e069f2caf4fca831bef2324a49f249a18880f3d19a67bcadaa52", + "qualification.json": "1d0cd61f2cf0f2ac0ec01a6082c3d65badc42bae82f10f48a4ed21c7a9353032", + "specs.json": "a5558b358b308235c1eb5aac7aac9e34ef9b33a140adb1e4bea0c25e9b805878", + "target.spice": "4ac2c66f4b989e7d6dbe32dddc1a086838552f867e76bb52a6674675a0b15655", + "target_lvs.spice": "a2e3d549f596d8aa2f15f106770acf4680d56996d73d61a55bf80157fef29903", + "testbench.spice": "81ec1dc0ac5d600c1634edcfa8fed8bc8c00d7d638a2cd2246225b62fa5810be" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..350d06ed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "0f19065f287c7cfb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.61 + }, + "f3db": { + "min": 52730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.61151, + "f3db": 87882490.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.8, + "schematic_measures": { + "vout0": 0.8878716, + "vin0": 0.8878716, + "idd": 4.557453e-05, + "gain_lf": 15.61151, + "f3db": 87882490.0, + "ugf": 525014400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..5accc0ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.61 + }, + "f3db": { + "min": 52730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.61151, + "f3db": 87882490.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..aa85069f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..c1b1c1e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..3abe384b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..cda18203 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW1_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C15_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "264ef86abdf63fdf", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..a3e2891f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c14fa2e9c212395f88de05f203950ec1885c15c236a7fd6d81e7bccadeed7d21", + "qualification.json": "dcce383dccdb91c657dafa26fedb88ed654b40a165c65cff962524098e214808", + "specs.json": "48504ba14b5d5536015e6a6324c5eb32a794835b9fb66435ce33b2258ff9a07b", + "target.spice": "d8761ae17b9b79eb5754f0e4189f6a1011969ae11cb1363d50edb63340915682", + "target_lvs.spice": "1fa7ed07dee97cb8272436a9e8aaf976cef342adc02acca1a0dc21efd1161563", + "testbench.spice": "fc4ec9575cb8440285c3bc23ae4f75bfda036c46d40afa187201bac2a44a5a05" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..e0f3fd8b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW1_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "264ef86abdf63fdf", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.617 + }, + "f3db": { + "min": 49750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.6172, + "f3db": 82912590.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.3, + "schematic_measures": { + "vout0": 0.9527432, + "vin0": 0.9527432, + "idd": 4.23128e-05, + "gain_lf": 12.6172, + "f3db": 82912590.0, + "ugf": 345835500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..9d922daf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.617 + }, + "f3db": { + "min": 49750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.6172, + "f3db": 82912590.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..96d66252 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..2e5e7b77 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,7 @@ +.subckt C15_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..f2f1084c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..a9d494b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C15_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "666425d59334542a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..16e8a56b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4acbdbe9ad59c048491430f95987e9120c5708d28c9e622c5466a1b669fd148d", + "qualification.json": "a02876f685ce5553440a3f0c069c233b682755e35f0d94c9f2be92b98289099f", + "specs.json": "b68cacf16e71c4d286773109aa4b7a64edc1d37216d0b47ffb8550360bffd2f3", + "target.spice": "dd09c66527b3583fac11c38367a8e9b4f2c83566a7e8c64b20fc7ff760c4f883", + "target_lvs.spice": "3fa575d1e64186830267a6b6946a0452dab802af41e82d55c386a6690a1c50ed", + "testbench.spice": "182bd7997891c758f56a09f87189a7059e527b05f25a4fde2ffa40a76c34f6a4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..15f7109d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW2_sL1.5", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "666425d59334542a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 14.28 + }, + "f3db": { + "min": 51540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.27803, + "f3db": 85900090.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.1, + "schematic_measures": { + "vout0": 0.8373893, + "vin0": 0.8373893, + "idd": 4.811385e-05, + "gain_lf": 17.27803, + "f3db": 85900090.0, + "ugf": 624330000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..5226b565 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 14.28 + }, + "f3db": { + "min": 51540000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 17.27803, + "f3db": 85900090.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..7ecc6b1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3334ccb5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..d6caef8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..51aef486 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW2_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C15_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6211f14f6e3e3a9d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..8dcda990 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "de4ad79a4ab635199b4461783a55fa58e40990202a8a09806537aa961003a85f", + "qualification.json": "90f3705a328725959221effd348f158d52e7d774e7e3e51a8cb0dbeff8f38228", + "specs.json": "5cd2b55f5e63d0c61bd25ae8505e1fba3199a3ead34bb0ebcf5304fbb2deac40", + "target.spice": "201cf5f5de04879fb404ce7c80df0ab7a86297054f15c164baf83f1223e57208", + "target_lvs.spice": "8fc732ee7357feb7695e2dc4ed0af9cb9623a389da48a63ead4157bb76e8957d", + "testbench.spice": "592ab8b153e3cfdd14da74629654b8b842cc17eac1aa848b06effb5df777451a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..973db194 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW2_sL1", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "6211f14f6e3e3a9d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 15.52 + }, + "f3db": { + "min": 54130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 18.52396, + "f3db": 90209280.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.4, + "schematic_measures": { + "vout0": 0.8179266, + "vin0": 0.8179266, + "idd": 4.909307e-05, + "gain_lf": 18.52396, + "f3db": 90209280.0, + "ugf": 759025500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..dbc4cbd9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 15.52 + }, + "f3db": { + "min": 54130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 18.52396, + "f3db": 90209280.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..6c4567e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..64521712 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..e0998a6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..9752a662 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/case.json @@ -0,0 +1,77 @@ +{ + "case_id": "C15_sky130_sW2_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C15_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "category": "single", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3a8e9c122c45c82e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "testbench_element", + "what": "DC servo (1 MH / 1 MF) setting V_in,dc = V_out,dc" + }, + { + "kind": "testbench_element", + "what": "load capacitor" + } + ], + "core_devices": [ + "M1", + "R1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..9ae28358 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "33be72cf85f292b604a9b8c0cd5cd47f33806423668ce0f24393dcf9f6e25c01", + "qualification.json": "4fccbdb5766665bd7cb9db74257fdf6495a368de95b73ecba706f1a6c1322097", + "specs.json": "db6b55ac0125b67135651803dd60dc3acbddf0444a3634cb40941fde7b05f7c3", + "target.spice": "1a8c047240776098d2dfd329e088a8a6385e5d4c716b37236fab113240aede6b", + "target_lvs.spice": "db5eaf23bb80ba591f0bc155b9a0846a134c2b63382dba7df0f91a48d60f30d3", + "testbench.spice": "ccc21915563993717574cd86e8c4b8e7e5945db78dbc6de5bf65706acb4e4818" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..95e61f57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/qualification.json @@ -0,0 +1,71 @@ +{ + "case_id": "C15_sky130_sW2_sL2", + "circuit_id": "C15", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "single", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3a8e9c122c45c82e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 13.18 + }, + "f3db": { + "min": 50090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 16.1788, + "f3db": 83489130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.1, + "schematic_measures": { + "vout0": 0.8606514, + "vin0": 0.8606514, + "idd": 4.694364e-05, + "gain_lf": 16.1788, + "f3db": 83489130.0, + "ugf": 534006600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..d12045fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 13.18 + }, + "f3db": { + "min": 50090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 16.1788, + "f3db": 83489130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..3db78530 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target.spice @@ -0,0 +1,4 @@ +.subckt C15_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..5250669a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,11 @@ +.subckt C15_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 +XM1_f0 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C15_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..fed2c729 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C15/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,26 @@ +X1 VDD VSS VIN1 VOUT1 C15_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 + +* DC servo (disclosed): V_in,dc follows V_out,dc through LFB (open at AC); AC drive through CIN +LFB VOUT1 VIN1 1e6 +CIN VAC VIN1 1e6 +VAC VAC 0 dc 0 ac 1 +CL VOUT1 0 1e-13 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let idd = -i(VDD) +print vout0 vin0 idd +ac dec 20 10 100G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..e68af8fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C16_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "137e08d7f3f3e764", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..142e7884 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6b7479ea2ea69db18f61c11ad1f4f7ec200eaec96c1563fcfad6b40edf33e28d", + "qualification.json": "d185ed072eee1d7c82d613e4877fb7c8c476db337ad0f422d0e4f1d66e0f7d96", + "specs.json": "a128fe7e52d2f46c7e95c1a5bb5e7581f3d12506ee97f4f85360237f86afd426", + "target.spice": "98a12ea3015f142bcab0ea7d53955f25c2f2255deafdec4fd5653340da4ff616", + "target_lvs.spice": "49665613561a49becf4a88d466b04d9ddff82a5b7c7f66eb929fe2dfeb5e6c42", + "testbench.spice": "9722597c40564904daa69f5b691dadad181dea8c3a6731a4d669550f2cd1448a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..61072b5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,86 @@ +{ + "case_id": "C16_gf180_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "137e08d7f3f3e764", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=6.852 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.852083, + "f3db": 68950960.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854718, + "vo2": 2.854718, + "idd": 4.00241e-05, + "vos_in": 0.0, + "gain_lf": 6.852083, + "f3db": 68950960.0, + "ugf": 135645000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..cc2aa637 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41370000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.852083, + "f3db": 68950960.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..758c2787 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..506d17de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..bb6b47df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..6f666277 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C16_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "104c0497b6755bd9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..f4146530 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "49f9c83e3c18429681544e8e7154692c91a6175f27d9f93562c525c87ef54485", + "qualification.json": "fb5b9dc6c81993ac08bffeeade861fb9ee721586b187bd4edbbb4300403ef454", + "specs.json": "810873f715ed2cdc7370848ba909a6b0e3ad4a670fbe5c271545663fe1e1543e", + "target.spice": "f717a721203c615baf0fc236093a0962dacaead215643623105cfb44305bd2bc", + "target_lvs.spice": "2c74c5f47d9ee2b55bf4db8b347cb3564e09adf0c5d9df29ef87bee6b4ce1eb9", + "testbench.spice": "d03636a71b5adb3a7a2a042aa485c5573a0c9e94d92a4541e2659e18aebf79cf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..83f56db8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "104c0497b6755bd9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.6615, + "f3db": 69405180.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854677, + "vo2": 2.854677, + "idd": 4.002774e-05, + "vos_in": 3.637979e-12, + "gain_lf": 8.6615, + "f3db": 69405180.0, + "ugf": 175383000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..456ffb1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41640000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.6615, + "f3db": 69405180.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..f734ef30 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..94e0a68f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..f485f798 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..34007a19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C16_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c89d1ef4a42f7ea3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..0acb176f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "19b387fdc6b2373a1db611fd03f9c0e5aa426b6ccf8a501d317de171c9808fba", + "qualification.json": "f9a6e64c31b80ac625eb80576280e7cf353588d1f99ca24312cab78f0b77e4fb", + "specs.json": "41ab8dd289caa080f8a3fd209183645afd94df5d7ec5ae924ace6eedd6645822", + "target.spice": "780be7282af0b566bc5ce311954696595a856e95a8fdfe95e28c697e57b1be8a", + "target_lvs.spice": "84787b506d1155472d83d20d3d502fd6f5e3279882592bbe18896316d93f5e37", + "testbench.spice": "13622d99ca97e9b68da67d5e67818ceb5489fd3f708f597d7681068d01614ad5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..05351316 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,86 @@ +{ + "case_id": "C16_gf180_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c89d1ef4a42f7ea3", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.577 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.577394, + "f3db": 68802710.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854768, + "vo2": 2.854768, + "idd": 4.001955e-05, + "vos_in": 0.0, + "gain_lf": 5.577394, + "f3db": 68802710.0, + "ugf": 111493500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..9e50bd49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 41280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.577394, + "f3db": 68802710.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..fe53a2dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..3378c096 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..a0334335 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..eeee1d56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C16_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9d9530d415cc31cd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..d425d7d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "79c14712b44a543f581cd19e3aed262aab4f3f1658935e5ecff4d4da72d7deca", + "qualification.json": "5b757aedc8fe0f3677ce918d2116445e9515f672601b4520da61209fec124c3f", + "specs.json": "227fed9ff54260050dbcc7025cf52ba2d58106329a04c2677d5edf88de99df85", + "target.spice": "6c7fb86bb44cabf75a57959000e4505fd9e9d47b174a7187d02da9475929a1c1", + "target_lvs.spice": "fd1456a0c611d85b7b91b0fedb28c4e6c90fe6a1e160124fea4a9b148eacaec1", + "testbench.spice": "5bd11ffb8597581cecd5f907687e1fa6f04a1c18f5bab9b9e3f961a303b55007" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..c82d4903 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9d9530d415cc31cd", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.579 + }, + "f3db": { + "min": 40030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.57911, + "f3db": 66720130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854718, + "vo2": 2.854718, + "idd": 4.002409e-05, + "vos_in": 0.0, + "gain_lf": 11.57911, + "f3db": 66720130.0, + "ugf": 245177300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..6b494d35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.579 + }, + "f3db": { + "min": 40030000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.57911, + "f3db": 66720130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..1d923ec1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..59e0434b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..25a2b77f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..dffa446f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C16_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c334fe9064288036", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..a584f7f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6e95b46bb40f13370c8bd451eed6a8f2f23e838890a5836f3dc29f285068dd9d", + "qualification.json": "3cd3f8e3e058203a9ef5a4d44cea688e00584823afbece4df28c960cfdd97f11", + "specs.json": "a144d37970a4352cf95b6cf13c8a5bbe38964e7869cb244717fab3442a9a963e", + "target.spice": "9f8ea0c2d82b187067ae51034c77ffd14eb4576d9144491c11f72005ccab3638", + "target_lvs.spice": "55305d9063ea87c1abbee51ee4043a3cc7a0f03de14dda6fd1ccc3b19fad16b5", + "testbench.spice": "b68b946f7bb154e9209f96a169a9114c5c33c6348f1fdb314aa2a81202241507" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..e16d2897 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c334fe9064288036", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.08 + }, + "f3db": { + "min": 40410000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.0785, + "f3db": 67348800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.85468, + "vo2": 2.85468, + "idd": 4.002751e-05, + "vos_in": 3.637979e-12, + "gain_lf": 13.0785, + "f3db": 67348800.0, + "ugf": 297298700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..06d1edcf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.08 + }, + "f3db": { + "min": 40410000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.0785, + "f3db": 67348800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..5e721f35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..a26e2b5c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..0c24809c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..c57a8515 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C16_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ada439db6e83a40c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..ca4ae9f7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ba9968086b056941ae7d25c9cd85f0f30064c17e80a9259f58b28903af406d0f", + "qualification.json": "4b7aa90e0f9d2d85d8ee1c6bddfa3e1954f5df30e1ffef66b69697429f74f9c3", + "specs.json": "fc3a49679552d1eef145ed7fb40c1b2d91b4ed0185e3b9a9f67311ad98469b57", + "target.spice": "2e444fc2410f2676925f620b0d3db148bbe1b48322c6cfcd6d6bda0d877f2049", + "target_lvs.spice": "204fa45e0086c143bdec98e4ca56183850fd5eeeacf7dd503b4d66f763196913", + "testbench.spice": "92527e29ea23aa35c67e4f901c30b3e8398a28f3b7e85df58fe38f7211d973f0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..ebea8d51 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ada439db6e83a40c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 39920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.44895, + "f3db": 66538770.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854767, + "vo2": 2.854767, + "idd": 4.001965e-05, + "vos_in": 0.0, + "gain_lf": 10.44895, + "f3db": 66538770.0, + "ugf": 212527800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..2384d2aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 39920000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.44895, + "f3db": 66538770.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..50bcd376 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e225e347 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..d818eca5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..e1173deb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C16_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "44b139f1258451ea", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..9b6d1406 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "601067988facba9aff25decd331c2b10c2d4820f4fabaaf091441776b67567c0", + "qualification.json": "c8866a22ee3471cdbe7ac9b0e5ed14c50110cb047c5af710fcdd07186fea8356", + "specs.json": "7593b660ecda41713c6b4b82b812e87066d31246d552033cbe40b83c904e5efa", + "target.spice": "fa9294e6235051b4dabd2d997bd48be18c212a6106d3e7fbe6cd04df068af23c", + "target_lvs.spice": "0b17e8ec5d9d5ccad1b4ba732a235ec19f8d6775b1603f325193a867c9d5aa1e", + "testbench.spice": "646730a12de210b9178b8e8fe97965a32076da75f5a76f560238c9486c86d9b3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..0f54cfd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "44b139f1258451ea", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 40700000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.95608, + "f3db": 67834790.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854718, + "vo2": 2.854718, + "idd": 4.002409e-05, + "vos_in": 0.0, + "gain_lf": 9.95608, + "f3db": 67834790.0, + "ugf": 203091000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..15013d0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 40700000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.95608, + "f3db": 67834790.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..35733856 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..e5471986 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..54b3921a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..04f24796 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C16_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8094ec594a0bafc3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..660e5a47 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "420992fcfb67979cca3675b47af41534b416be9c65f8bda569c03be688d6b668", + "qualification.json": "eca2b287dd84a1fc81a0ed61f4ac97fa68d0164d58ccfbde8ae45f0f41ed49dc", + "specs.json": "3d8ebdee3e09831b6bbf0dcc6c5c41baeb60da68eb2273b723ccb27736898acd", + "target.spice": "7b2eabba9884259ec0bcb0ccd7068f705fd3329ce8f5b3b0d30352e6a557e88f", + "target_lvs.spice": "4405d2b9af88748380f3d78b5bd22cc63a3c7c97a32c2df0dfb69aea23fcf91f", + "testbench.spice": "ed748efc775e94f9932283391b87de6fb08e922eb9cf55be65d18559bf1a0b72" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..232d6320 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8094ec594a0bafc3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.616 + }, + "f3db": { + "min": 41040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.61561, + "f3db": 68401630.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854679, + "vo2": 2.854679, + "idd": 4.002764e-05, + "vos_in": 0.0, + "gain_lf": 11.61561, + "f3db": 68401630.0, + "ugf": 252093600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..f4313bb3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.616 + }, + "f3db": { + "min": 41040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.61561, + "f3db": 68401630.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..760fb8f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..5563cf9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..ee22df57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..d5e55864 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW1_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C16_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7e34aaf32d0ab872", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..12d71cf6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1064b35e9fca88ed6de164b66e926f4e4813fe853e7d3801c233b8e7aa90ba08", + "qualification.json": "0afa9baf1879e63b4c284454d554e8d4b3c50462096c361fb8722325d4683eec", + "specs.json": "78056cbe7a1d29edbfeff72e9356f160327d9c384e55c0d1fb485ef7ab0db37d", + "target.spice": "ceea74a9113f204cfe5adf5eb2a452fc78cdd571a28b2ef5b0359cfeb0f5c5df", + "target_lvs.spice": "6c7a6358308414f893a96461d8ae72c257fcf23228da39e2b295236d33b556e4", + "testbench.spice": "49307763489f9e47d5fe1aeedb3e581e958e71afa8683c7bd51fd2ee47c9eac8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..64b68cd0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW1_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "7e34aaf32d0ab872", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 40600000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.731853, + "f3db": 67663690.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854768, + "vo2": 2.854768, + "idd": 4.00196e-05, + "vos_in": 0.0, + "gain_lf": 8.731853, + "f3db": 67663690.0, + "ugf": 172786600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..3cc533ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 40600000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.731853, + "f3db": 67663690.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..7e10cd3e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..892258d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..960515ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..cd8c2f6f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C16_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04b1a6054b58e13a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..8c91f9af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1ed21e30c07d9549b270c2feb2606433812ec3a522a449249f413e65e5e5612e", + "qualification.json": "1b567cad000e3e08fdc3ad88216a44700b1e838604eac05ae952d7e99af4f860", + "specs.json": "68ade61a3edab054c861f8b19ad6b7bd29f3950e3ba79b1456cc4c8b6dd9e3e8", + "target.spice": "638627d0818dc15566835da4365c4de20d80e2b2fe5ed9ae6c12e1fbfa3e52c9", + "target_lvs.spice": "9710f02ec3c4452cdf0909d94b90eed3c50267564ebbfd1a933c6e217505fbf9", + "testbench.spice": "9272982b79d439f2f2ba61ee3baf52b5095eb2d9b2cddc8254c6f27a4348769e" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..606351f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "04b1a6054b58e13a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.644 + }, + "f3db": { + "min": 39380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.64394, + "f3db": 65626640.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854719, + "vo2": 2.854719, + "idd": 4.002405e-05, + "vos_in": 0.0, + "gain_lf": 12.64394, + "f3db": 65626640.0, + "ugf": 275012200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..1d976849 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.644 + }, + "f3db": { + "min": 39380000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.64394, + "f3db": 65626640.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..8d6acf00 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7f08577b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..bc62fa84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..1c89c043 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW2_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C16_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "654ff4b73c733749", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..f5dfa345 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4451ba1f272a3dab845e17d0b71bf61c724dd3c8572421d2d18a1186d5e49f8d", + "qualification.json": "9b07688bca0e229d01b3bdd151074daaa7728a4743fbb29ac4b68b8044c772e2", + "specs.json": "f7c98e56d0d8baba21912eefe58383340a97cb7353e6521e4a58d65d50614e1c", + "target.spice": "7f8674069bb1f2dad30f3bc836ed1f9c4b2503e1855185cf2d39bad5325141bd", + "target_lvs.spice": "bf5b5bbc39708e43a25b59f01c1cf3eb318b0bc141b0dfafd544ff30661fce08", + "testbench.spice": "2531ee643415ce36819a7cdc07cc0330f1a4b32bf5e8d68c701d5e7bab700afd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..52311da4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW2_sL1", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "654ff4b73c733749", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.03 + }, + "f3db": { + "min": 39780000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.02758, + "f3db": 66299530.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854682, + "vo2": 2.854682, + "idd": 4.002735e-05, + "vos_in": 0.0, + "gain_lf": 14.02758, + "f3db": 66299530.0, + "ugf": 328146900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..37dff9df --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.03 + }, + "f3db": { + "min": 39780000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.02758, + "f3db": 66299530.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..674efcab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..28bba7e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..586ef89a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..564dac9c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_gf180_sW2_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C16_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9d03c44b3a59d72c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..0e0016b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "986d331e2fd8457e68f6e96e427eae1fda7f3a73c6378d1cae9c5482954a462a", + "qualification.json": "68495f4d7ff64e1b0461995074c2d77f5e0d87d483d883ae882b4bfee1be7ea2", + "specs.json": "ab1ba3e91bd8b5202ff23aee7aff6396986a14001aa817495b8768688dbfbaff", + "target.spice": "e4c17f9db7f562722093fe57d18463b33015567777cd5835258dd1b23348296a", + "target_lvs.spice": "b17dc9ab0471f629b5a964300776a8568098ec351f627fc290d5c0318b258569", + "testbench.spice": "e7299e415e0aa90c7be44d7876ad41e1b789e8e166646c22fd10faf47052028f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..e809ca5d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_gf180_sW2_sL2", + "circuit_id": "C16", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "9d03c44b3a59d72c", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.559 + }, + "f3db": { + "min": 39260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.55868, + "f3db": 65435360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.854767, + "vo2": 2.854767, + "idd": 4.001967e-05, + "vos_in": 0.0, + "gain_lf": 11.55868, + "f3db": 65435360.0, + "ugf": 240426500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..22b20808 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.559 + }, + "f3db": { + "min": 39260000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.55868, + "f3db": 65435360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..23354938 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +.ends C16_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..a05d2958 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +MM1_f0 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f12 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f13 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f14 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f15 VOUT1 VIN1 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 VOUT2 VIN2 IB1 VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +.ends C16_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..b207dedf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=2.31 + +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..eb9e2c0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C16_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "90f7962027ac3501", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..e97ba9e9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "02c758245296464ec60cd6e46f7f4524af4a5f389f237d6d44882344e62fe706", + "qualification.json": "4629829a251a7eb47e985ecd4256689fa0f9450da1d191b2e536175f15c916b6", + "specs.json": "fcb4ab84c48c976b5c4863ea4ba99e3bb0bac6a53369fb8223d2e4515c47a272", + "target.spice": "15a3ce1a24ae715719d25d389e50135865ba6e9d52503675fde7995c2adea716", + "target_lvs.spice": "f2e96395a97966da0c12bc558a0b09ba3add567353236891b00be3bd17432339", + "testbench.spice": "d75eb6c4286c633da15b5dd070bfcaa42f96148aae6533ec9ab1b4932298c6e0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..49a66102 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,86 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "90f7962027ac3501", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=7.371 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 81630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.370634, + "f3db": 136047200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 7.370634, + "f3db": 136047200.0, + "ugf": 288199800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4be4c0b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 81630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.370634, + "f3db": 136047200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..e1a8a188 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..147f1757 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..8a9c9516 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..ed5bcbdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C16_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7844684450a58e2d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..1aed742e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "00e473020fe108f2e178152862fec81a7731eb0146a982b70bd58af8c0c087fe", + "qualification.json": "99963aa3a0c40d9273367e126803ce53386568577b0577ef8bf3b975d935d652", + "specs.json": "c3ead17c501392b9be3063b0be4e354b7c1036db52ceb70e57c94c829e112b83", + "target.spice": "557d8ccc3ad37297b5ef14a2a3da843861b34a5f67a3dc920ae7adb9cd2980cf", + "target_lvs.spice": "31417162a71cdb5741a61ca8ee102c934e4de0fb8e0181d1a013a544706555c1", + "testbench.spice": "b505d33acbcd21caa94f1812b6b32de25ed709cd8edf7d1fddb0ac486ffc034c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..fd94f0fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7844684450a58e2d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.045954, + "f3db": 138540100.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600281, + "vo2": 0.9600281, + "idd": 4e-05, + "vos_in": 1.818989e-12, + "gain_lf": 8.045954, + "f3db": 138540100.0, + "ugf": 322254800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..4dd586c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83120000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.045954, + "f3db": 138540100.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..d3e82b01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..e2e60972 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..6bc1b336 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..c026dce2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C16_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e3a20daa1d9d7424", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..72a18de5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fcb11d50d1cc3f750942c004824e1a44884cf4b724c9d442fe6114b309ae0608", + "qualification.json": "2f0a24fe45971a2c1575d3eb5835c7ad0e42d83f7d6dd74e2863b5e208b8c8ae", + "specs.json": "6af02d95c73044fab4f0f8c550fbf963502bc08259b3ed55a67ddf1e88cc5333", + "target.spice": "7bc82f435f4d8d097504ebc3a9e9daa93c0a52f4cabaf3339872e5babe94a887", + "target_lvs.spice": "a5cc242d541e7fa525492de60f740a9d5878d61a92498e2198218fa3c2590e20", + "testbench.spice": "07192449f00fae3f17c54e313673f54fbe65feb0c81bf46b7ee417280a4081d9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..352c0d50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,86 @@ +{ + "case_id": "C16_ihp130_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "e3a20daa1d9d7424", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=6.721 below floor 8" + ], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.720895, + "f3db": 134386300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 6.720895, + "f3db": 134386300.0, + "ugf": 259389900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..2179e358 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80630000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.720895, + "f3db": 134386300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ced832d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..08384e58 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..43d44028 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..95399586 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C16_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7ebed7572ae83e36", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..e829ebb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2481161fe405738e9927447f3bcc743a1a385b352b1f6bd43f201dc6d4186fb8", + "qualification.json": "462ec0027e15e041d3dee356f3d6a23dcfae5fabf3ae30940a5afeb74bdf26ff", + "specs.json": "8a9886f59c2bc9f3e77e2849cfdd497d9ec0cc7ef8a176382ae07576d056e11b", + "target.spice": "bca90d5b795ac20f1d99314eeb5d805c6907b9e11facdf3b8628aaf50403063f", + "target_lvs.spice": "29e4e46e1a294426be1401e7d614d7747eecba26c1ef55f5ae3a04459739f06e", + "testbench.spice": "c67221b032d0ecd541d7885d1b9deb70f6296a5534cefcf4292a93e962b9321c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..9289eac3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7ebed7572ae83e36", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 82100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.36718, + "f3db": 136826000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": -1.81899e-12, + "gain_lf": 10.36718, + "f3db": 136826000.0, + "ugf": 432273800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..786c6f26 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 82100000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.36718, + "f3db": 136826000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..34977f37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7e33b0a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..609c7d25 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..f280d574 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C16_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b39896e42b07eb87", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..a4a896c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fe2bf3a2e82200a6863f76725b01e680ed2c846eb89939fd22f879023823c843", + "qualification.json": "19f1842f01558594dc63f593b5f2e42f8e132da93fea24b7d55dd1d80bda0f6c", + "specs.json": "cea6061a98b0c182f18bb6f8f6f076aa91c2b5a96736a0263386f6df8d684d88", + "target.spice": "229d5fc3f528d4b3431fdce2616211ce5d1ad8ebbd6aeb6c3afda2ca7642aefb", + "target_lvs.spice": "07e0b0faff41e25e5c8d864faa806a638af7d3277e6fccf364768fb617a872e3", + "testbench.spice": "47e07db987bd3aefad8b0ed1fcac336e6a517b0bbaba2d2601e97fd19df7c668" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..ff42eda8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "b39896e42b07eb87", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.80834, + "f3db": 139975700.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 0.9600281, + "vo2": 0.9600281, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 10.80834, + "f3db": 139975700.0, + "ugf": 467342700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..b3691d0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.80834, + "f3db": 139975700.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..cc3b1dba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..8d0eb13a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..1a087676 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..5b68d6f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C16_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bacc38bc5d80bef5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..7e504370 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "529959cf67a127a84572713247024733a17a5b89b0ddf1c1341f0c4a00a12bf4", + "qualification.json": "128aa0c1876d004311c238d007b5c3a688a5f46bb13cdb101f5e341db1d43b33", + "specs.json": "0e60ddb7f685a3cab2a62a28a0750efc353c33ee375de5d675f099e1dab39c44", + "target.spice": "7df045b1f0a291673d949555a9cf196e8714aaf149dd732f0c606c434138ef3b", + "target_lvs.spice": "c4fc1fc5980de4e45d85012e04588ffa7905f64beadd1281e62026bbd3e9a036", + "testbench.spice": "ca9bc42e2100d76f891e6f6a749592ff6e79b127b3751db70c16684294e082d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..1563ae7b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "bacc38bc5d80bef5", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80760000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.904036, + "f3db": 134605800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 9.904036, + "f3db": 134605800.0, + "ugf": 400906900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..1998c052 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80760000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.904036, + "f3db": 134605800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..83d34afb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..5e3f114b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..6633c75e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..e89958a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C16_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ab187a703b51798d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..d813281d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "7a6ac5f96142c1c765eb9b7f2c23694c74703f5648806a3095a4e4d341f2a493", + "qualification.json": "e47db43b327c5cc2c29b25c37aed41dc76359a9b34ae8dc7976897780f499438", + "specs.json": "9ae5a99fc3aa6bfc1b6ed5c7bd8dd1e21c6970ec1ff38cc2e23d9ac92baf41af", + "target.spice": "9669dbfd1a9b41bcc425f1bd8989fb5bcc3251afc9f868f0ff3afb1239f4eb4d", + "target_lvs.spice": "4b461777976e35006fb52c7e9bc9394a6cc8743cf1a1dfb54fd6a6c5d6554b84", + "testbench.spice": "be459c5003fad212f5193dd78f9d26f238c163454a3602b3d7e75f19b5bcd267" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..222d7692 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ab187a703b51798d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 82190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.322068, + "f3db": 136986900.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 9.322068, + "f3db": 136986900.0, + "ugf": 378180200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..5701e80d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 82190000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.322068, + "f3db": 136986900.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..ab4474d5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..64299ae0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..5b170c0a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..ad4a9d0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C16_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c560286cd4977237", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..d410f1d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "27507c71d2eb76f51fcd65f1234525ef69edbd02eda8a1655fb88d346f523d47", + "qualification.json": "4155964589e28da4efe32b41cdb532a207b39acafcdef940316c7485eb418cd2", + "specs.json": "37c04ea856c5f08b869b93abc18587519122ae35d68c240e6e4e64bf26ae8939", + "target.spice": "8f74b8e40ee55ce1fd5305ab1d8d19373facfbb874e530a9cdc218a892d02708", + "target_lvs.spice": "d2404c2314782221c29f3c383e0f68c33f1f9d14316cdb22d93628eca5813c6a", + "testbench.spice": "473baf889dc30b0121212d46953fbb72deed651fc2e086d4098615fa7acddda6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..bd210608 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c560286cd4977237", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.827807, + "f3db": 139975000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600281, + "vo2": 0.9600281, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 9.827807, + "f3db": 139975000.0, + "ugf": 412374600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..9b51ace4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 83980000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.827807, + "f3db": 139975000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..f15c0d1a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..55ec3746 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..e1880402 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..7c7f93e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW1_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C16_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f4f951893cec6bc8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..3b559870 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "49abbe4d95c4eacd9c3379292700513cd0fd15ce2ea3318211f5835d1c97f16f", + "qualification.json": "f15ab98d2ca1c8bf5097686530cdc4641d2b7ba911d350d2c81cf988399ec555", + "specs.json": "7fc7027058f2e427a5317a91d730225dede84891b39181016cca5e9803f15e87", + "target.spice": "4cc6146a79d8bde5e0858c06144bb5b49057db24e1c964292ffde290e3965744", + "target_lvs.spice": "12526d02f802870c541037e36fdb38b72ae545c92e88565e2186210d2b1d9867", + "testbench.spice": "8e68292fbf73a977b7f0e7f2be41b5371d26d6aeaec79f518be0c54196b719eb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..0c16c12c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW1_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f4f951893cec6bc8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.79747, + "f3db": 134939200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 8.79747, + "f3db": 134939200.0, + "ugf": 347657700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..4a8264b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80960000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.79747, + "f3db": 134939200.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..fc56e164 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..01ea4838 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..9cb2f3d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..08fe6293 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C16_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "397ffbf15ed43bea", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..c0a29165 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "791777213d2b9216c16ea48dc9688bc004822654f6d84745b83bece75e5f034c", + "qualification.json": "d6e0ee53a91e68d5b1b5505f5953309f5bb989d501691274187e4fcdc4e5d0d8", + "specs.json": "5ee549d46c734fc9ccec681d47c87c9aef9632a180200de87e977eacb0130cdc", + "target.spice": "ba20e9b8d0986b900037ddab60ba30bf02e66c8eeebe2977bc67b99b7c14eac1", + "target_lvs.spice": "11819bc79bce47fdeb0e5877c63ad17a37b1adee6c4303ed97e12124fd100348", + "testbench.spice": "f77f3bcdbdec0a94dbaa765cb85702fd4f78e21a9cae146513adfceaacff7adb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..befaa611 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "397ffbf15ed43bea", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.072 + }, + "f3db": { + "min": 81670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.0718, + "f3db": 136109000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 11.0718, + "f3db": 136109000.0, + "ugf": 470402500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..cd01c98b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.072 + }, + "f3db": { + "min": 81670000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.0718, + "f3db": 136109000.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..703328ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..7c8ba715 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..d8f49eb6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..d6fff638 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW2_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C16_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "49f4a9c44985bba4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..fa5cb7e0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ba5d48223049ab7c9554c2de81903712bddf3447d7ea2b14d986295e234b9ea0", + "qualification.json": "a2cacd33ae12b5459773e17caee7d46c7cab8cfb57ce6a5471dbc98d6a3f66c5", + "specs.json": "a3f2aae1816bb34c5a1de3b65ab8e42b5f41e39d6dabc8ad2722de188abd508a", + "target.spice": "fbfe910f3ef53e4d8bab1d06963b5f7ff6cadbff55892281b142aee0f04ba552", + "target_lvs.spice": "632657abd735350a1ddaeb69f93c6333f138021589b1ef83f12709537c699f8d", + "testbench.spice": "f27864dab17641e2d0b4aba7591757ceb641de3d474e90afdad7a743fa87dd52" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..c0f27765 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW2_sL1", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "49f4a9c44985bba4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.48 + }, + "f3db": { + "min": 83560000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.47984, + "f3db": 139272800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.9600281, + "vo2": 0.9600281, + "idd": 4e-05, + "vos_in": 0.0, + "gain_lf": 11.47984, + "f3db": 139272800.0, + "ugf": 505411700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..05c3951e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.48 + }, + "f3db": { + "min": 83560000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.47984, + "f3db": 139272800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..7ce25afc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..878fd873 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..9f71bcf2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..dcce6e8e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_ihp130_sW2_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C16_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "611a16c2cf270253", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..39c459da --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "77bcdce8135adc07ca15d376a7a4157add5e88c6933549f52ead75f7cd9faa83", + "qualification.json": "90898f4936a0020e2816a717c8d5538e346b945f55771bbc6f406a3f21db37fa", + "specs.json": "4d5df9b2e413e1e5eba7166fad89d09460861ac04dbef93bccd8729ffd95a139", + "target.spice": "731050e9e4c3211f266612e0fe289f4ee4d36d0f62797b7c1f2249c8817058e1", + "target_lvs.spice": "fe91e7a414085bf1eb51a172583c1d9043973496f35620b07c749193eb4f9980", + "testbench.spice": "98f07d2984bed783d8f07b3fd5bd0a7f878ad6e266e693098f29255a51d95bfd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..d16889a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_ihp130_sW2_sL2", + "circuit_id": "C16", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "611a16c2cf270253", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.6453, + "f3db": 133821800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 0.9600282, + "vo2": 0.9600282, + "idd": 3.999999e-05, + "vos_in": -3.63798e-12, + "gain_lf": 10.6453, + "f3db": 133821800.0, + "ugf": 438722600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..101d2881 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 80290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.6453, + "f3db": 133821800.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..0057ed31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..52834cd8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 VOUT1 VIN1 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 VOUT2 VIN2 IB1 VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=46.385u m=1 +XRR2 VDD VOUT2 rppd w=1u l=46.385u m=1 +.ends C16_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..4f1c7149 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=0.84 + +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..6add528a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C16_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "df610f73af6cd6e4", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..70f015a8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dbfe6febed54f0b394a24eb49a5f42dcb00654b2233e798b449dedce0d333161", + "qualification.json": "7dca3f0630f6f62c0318ef8bb287473761f9dc211319a4e1ef25458fdbdb2767", + "specs.json": "8affda751062c21b9539d90588ca15752f5ce1acf7f9f779fd8987acd6d9aabe", + "target.spice": "7c23f8bdd2e6e9f5b1e048c0eebec1478a4e5d8a0aa1116dfcba05d6d5670fbc", + "target_lvs.spice": "84af8e3e7bdac99655afc29154f9ae2002c1ae88e571ad123ed374acb420a3c4", + "testbench.spice": "617a94417c8dbb6ea112a6d3f8996b5b443e119651aaac9f8adf5949f59b2509" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..9cb81b7e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW0.5_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "df610f73af6cd6e4", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.188 + }, + "f3db": { + "min": 48280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.1881, + "f3db": 80474360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.8, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000012e-05, + "vos_in": 0.0, + "gain_lf": 11.1881, + "f3db": 80474360.0, + "ugf": 281208300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..71d011d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.188 + }, + "f3db": { + "min": 48280000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 11.1881, + "f3db": 80474360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..3687030a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..387a8b8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..f70c7df0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..ed091571 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C16_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "23ba434e91ba9cc6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..a454af1e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a6ae41f238f3d7a1f49fcf5722898f29b48559429ab5cd2255fc2224a489cc4e", + "qualification.json": "f61d974a39c83e01b5476533c6ba86e4cce86f24f31482fab84d1a64c544aca0", + "specs.json": "2609acc976355045a6705c497a3183c26632de0dbb01f97abb6744612d2c191c", + "target.spice": "6fae1f80d6484cef726a6756dfc4b4d606d8c22ff3bdb6e0c89f2bfcdfffef5b", + "target_lvs.spice": "ecf8d5e91653c50dc1f28dc2fa50aa7a04891d7498d640310ba3c2c3afa6fb6c", + "testbench.spice": "ee287c43a81a55176f223410f988afcddfdd3f2c2f5039b3858d1b39214a1815" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..8ae7e167 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW0.5_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "23ba434e91ba9cc6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.459 + }, + "f3db": { + "min": 49390000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.45872, + "f3db": 82314190.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.0, + "schematic_measures": { + "vo1": 1.397826, + "vo2": 1.397826, + "idd": 4.000047e-05, + "vos_in": 0.0, + "gain_lf": 12.45872, + "f3db": 82314190.0, + "ugf": 336834500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..2e0007e8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.459 + }, + "f3db": { + "min": 49390000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.45872, + "f3db": 82314190.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..3910457d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..a2792921 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..619b9c72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..3e98c0b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C16_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f98f1ab65c511c92", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..f0bd8272 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f3f3efcb20e2fde825296240fb09c8450518254d50bf1d96cfb76b008c7d95d6", + "qualification.json": "e50cca7a8a13c6a6848404a2052d9c118e5f61b10b603ef4f0e1593b39d36a5a", + "specs.json": "eeb478ddd9eca80d2389289946888e4add9421fdfdfda2458ec85a7effaa26c6", + "target.spice": "95adef4f83c75995e7e1dce90dfc36b21ddf032a28c5e3d127c749b9b9aac0b8", + "target_lvs.spice": "b34a6b94d79da5fd37976536f5165482158227be66fa65bbf0ffdb5011a6ca04", + "testbench.spice": "0fa05d37c4b83cc2ed2a732e44a26bf93fd1f6fab207b0735f7ed5752b3db86c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..4f87b42f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW0.5_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f98f1ab65c511c92", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 47650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.11452, + "f3db": 79422910.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.2, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.00001e-05, + "vos_in": -1.81899e-12, + "gain_lf": 10.11452, + "f3db": 79422910.0, + "ugf": 242691900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..ab5cbdd4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 47650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.11452, + "f3db": 79422910.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..94077ed6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..3c89c6ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,12 @@ +.subckt C16_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..0bad7089 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..ede2aee3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C16_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7a72245721f90e8b", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..fc4500b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "348e37a3d0720d8537d1b764925043d53648ebeb801b51a7c574096b0a74ec0a", + "qualification.json": "64d20783f2bdec72deb3fdb29deca709c5dfe31d0a8a8d40d535a9aee954cf9b", + "specs.json": "2c99b8f4347d2f3b9426f4b8baed738abcaa82f9db3e5c7edb031d5af591a4ae", + "target.spice": "75e2177b91315731a625b4e681550af4b709e0fa033ce5638ce9657824a7113c", + "target_lvs.spice": "f919ce1d8c9e3b71c0a1b59b736acbc96f1a6beccd4dc515fc214a388b27bd67", + "testbench.spice": "d0133cf372bf45ee5186a205d1cc2447146a543fa5e51fbe6215eb18e13dad46" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..538039f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1.5_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7a72245721f90e8b", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.76 + }, + "f3db": { + "min": 48220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.76196, + "f3db": 80371300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.6, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000012e-05, + "vos_in": -3.63798e-12, + "gain_lf": 14.76196, + "f3db": 80371300.0, + "ugf": 434498500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..3dd08b94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.76 + }, + "f3db": { + "min": 48220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.76196, + "f3db": 80371300.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..4b3d7301 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..5777cd41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..b9c77c66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..8ebf61b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C16_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "10a907dd00787c1a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..3d3d9da1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6609f998f925f7f07d7e136a832c0d1e407144c79cbbeb1f0180052a6492c4b7", + "qualification.json": "1767e55fbf06309542ec2cd6c827314adaba27efa1d6705b8706b9db2387b7e8", + "specs.json": "c26b393cfbb45cf670ecff5222da4cc93b4917c959ee35cc50bb77ef11f910db", + "target.spice": "2d73328f72703799b8b05ae40d7826ba7311484e09c8a053028cabdc8ebf627e", + "target_lvs.spice": "351727ef70b808cd81e02da89171289613b5f19be2b3bafd59019a7310baf238", + "testbench.spice": "ccc37eb77da96a1c9ef382a4246d1a415810d741d3fd5d9526fe7106434f9764" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..492580f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1.5_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "10a907dd00787c1a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.26 + }, + "f3db": { + "min": 49780000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.25772, + "f3db": 82972260.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.7, + "schematic_measures": { + "vo1": 1.397827, + "vo2": 1.397827, + "idd": 4.000039e-05, + "vos_in": 0.0, + "gain_lf": 15.25772, + "f3db": 82972260.0, + "ugf": 475653900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..b3cd6cce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.26 + }, + "f3db": { + "min": 49780000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.25772, + "f3db": 82972260.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..6016465c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..01d56f9e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..5720c0c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..5e84a259 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C16_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f571453fdd7e17ca", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..43c8e89c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "064d889061101b3204b093c405acd9ec500adf45ed0df05505cfbe6bd770bc11", + "qualification.json": "f5831616f4676ae19f6387467ead54cc2289e513f05e0a90c9a57d84446ba674", + "specs.json": "f1450d04ca301b98d5e722f8c95e8ad4067ded998c29231639c5ae9680275927", + "target.spice": "fbaf91e9fb47919a9521a03e3fdc860a32c69d1ca99db4a239312265e6718f3b", + "target_lvs.spice": "b6abee407f2749f3956d4e93ec853fef807df293bff634f3b04e8a6727ad8cd8", + "testbench.spice": "a76303e1cc8d2d623968b1e5458240b27b9811acd9177c87e7deee6dc59dd23a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..3aa129c8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1.5_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "f571453fdd7e17ca", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.14 + }, + "f3db": { + "min": 47300000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.1392, + "f3db": 78827960.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000011e-05, + "vos_in": 0.0, + "gain_lf": 14.1392, + "f3db": 78827960.0, + "ugf": 395668900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..435e7f9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.14 + }, + "f3db": { + "min": 47300000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.1392, + "f3db": 78827960.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..98ae5a5f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..b4062766 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,28 @@ +.subckt C16_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..bd53e76a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..290fbccc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C16_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "80bd48e9e064726a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..251bfb19 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1d7b1b0d34c0dcbc480fa440bf550681e857b81fed6d0a9d60399b05a080ab24", + "qualification.json": "5af629ada60d553f10e841ae089f53e72c03a224685c41f8b65b31a574401f72", + "specs.json": "03c2b8cb4dea304a6f66521b04e487fb0194ff67c45e4af3e3e705ae3af3c33c", + "target.spice": "43ddbf4a4eb6a572e0248c50b9e07b46e25becf55114cbebd24a6d6311de19b3", + "target_lvs.spice": "15d23ede3f5001ef02b937b71713b8a59bfbde7ef56bad815e40ef6ad9c0de22", + "testbench.spice": "57cbd4a09d81ede59bc894d373f4d867ad67b194c10d4ba7ec0be771a2646382" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..aaa05239 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "80bd48e9e064726a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 10.62 + }, + "f3db": { + "min": 48330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.62179, + "f3db": 80548140.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.6, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000012e-05, + "vos_in": 0.0, + "gain_lf": 13.62179, + "f3db": 80548140.0, + "ugf": 379720000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..6e9f5984 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 10.62 + }, + "f3db": { + "min": 48330000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 13.62179, + "f3db": 80548140.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..73e31b38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2246f450 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..2828a4f0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..8c236b10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C16_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4832805b1b446506", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..2b447b72 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "edf3952122a925b66a8f8c369a5af9fef80b36bfc56d42b9ac6418b076c16218", + "qualification.json": "6e354045a3dfd7760ee2d2b2fdbd23fc11d0e938a57d17c0b16536a3f64d7a32", + "specs.json": "f42ddd640188b11220640f5125d7f12313306097b6bd6b5cbab97a9eb6eebf25", + "target.spice": "7e6cce549206ae5aaad979dd63075d42d0804e681bdd83f3d2a1b1493b0e3c53", + "target_lvs.spice": "0333ba0d60e2867666a67f6f857814e3fa34500de3825a4aebe93f0795963c53", + "testbench.spice": "737f4e0294630240c16515ea621a3f61b7254043eb4c759a1b2dd77d78478c38" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..9e292147 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "4832805b1b446506", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.4 + }, + "f3db": { + "min": 49720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.39639, + "f3db": 82864900.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.9, + "schematic_measures": { + "vo1": 1.397827, + "vo2": 1.397827, + "idd": 4.000041e-05, + "vos_in": 0.0, + "gain_lf": 14.39639, + "f3db": 82864900.0, + "ugf": 428504800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..abcbda7b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.4 + }, + "f3db": { + "min": 49720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.39639, + "f3db": 82864900.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..5d4b69c4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..b6021c91 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..171068b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..f0e2a0b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW1_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C16_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1062603d06092a5e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..a6f3fb14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bd1c96114f9563dee74bf149bef74e74e8119a33d38d4ec6f1a053efc9b88925", + "qualification.json": "9f96487ee7ca8554c452a8a74f1b4052bcf275757eddc25f276ebdb4fbd16021", + "specs.json": "16c627989236245b6333dd08b2556198a6ea6920da6412e441c9d7d52e99f698", + "target.spice": "17c505fcc8cff050b7ce3540023219acc75f7ce7bf1f6086f82f3666df065fd4", + "target_lvs.spice": "624e0b09501615e070e8377d35c5cbac0db031c54eadf57c3e4377862d201012", + "testbench.spice": "f0b2dc3f9d618f7c92cf1989cdadf34758ac2e80a7f44d68968a2c62383dd8fb" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..ff0af324 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW1_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1062603d06092a5e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 9.83 + }, + "f3db": { + "min": 47510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.82955, + "f3db": 79176130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.2, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.00001e-05, + "vos_in": 0.0, + "gain_lf": 12.82955, + "f3db": 79176130.0, + "ugf": 339298000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..3168e11d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 9.83 + }, + "f3db": { + "min": 47510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 12.82955, + "f3db": 79176130.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..23bad929 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..af864063 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,20 @@ +.subckt C16_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..3254cf1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..749c7457 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C16_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9a274eb3b2a75082", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..99a912e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2c15e8aaf3fb8df01bd9dda3f6341ccd904d977fc4e39d6f78b351bdef3afbe1", + "qualification.json": "5563acbe9132a6c003b2b6bc2717e1dc08c0244ced8078e4c411c8116405d4c2", + "specs.json": "5ef2e72631b1550f09937f7a9d541b3e1504b11398ea93b5902a8fe7010a101f", + "target.spice": "e107177e6b3de3de0c05f20f9558175aca84d3110ea0eda5df178cce7ef7bc01", + "target_lvs.spice": "e6480911d0f6bdcec121041ffd46f965cce5bc261cee8acae7992c2873c7f743", + "testbench.spice": "2d30fb6c42cc348b0880850e52f28f0f0f1cf73fded46af5be08a33abd1f5398" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..01245706 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW2_sL1.5", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9a274eb3b2a75082", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.45 + }, + "f3db": { + "min": 48050000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.45251, + "f3db": 80085140.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.5, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000013e-05, + "vos_in": 1.818989e-12, + "gain_lf": 15.45251, + "f3db": 80085140.0, + "ugf": 470667400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..843766a7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.45 + }, + "f3db": { + "min": 48050000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.45251, + "f3db": 80085140.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..b2abf5a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2f000f38 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..674234c5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..f06a9abb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW2_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C16_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "31f28fd76db9084e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..868f32b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cf5368d43500dfbee90c1b315fb0bf61ce92a28c770b8cdd5c10dee2b24239b7", + "qualification.json": "5b2051100d444170761a3f13e4e0f7b3c6b9b5da33d54a0dc7b8855b7db24c89", + "specs.json": "3a91ae72cca8beeed4eb2a25ccf221e502cbbedd2f3593cf736fe7f307c31953", + "target.spice": "e94a8cb903dcf170fb9e177197786dd9aca6b5a96a6fb027b1d3f754499a69a6", + "target_lvs.spice": "e350efce701c13b32fb3e454471bc9f8e46e68efcca74ced187da79c8ffe8503", + "testbench.spice": "9585f90212b1de535f97b9e3a4f25bd1d4a7d10427571f70d26154e03beaf1c0" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..499225d9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW2_sL1", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "31f28fd76db9084e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 12.74 + }, + "f3db": { + "min": 49720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.74038, + "f3db": 82863360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.6, + "schematic_measures": { + "vo1": 1.397827, + "vo2": 1.397827, + "idd": 4.000038e-05, + "vos_in": 0.0, + "gain_lf": 15.74038, + "f3db": 82863360.0, + "ugf": 502553600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..6da46a1b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 12.74 + }, + "f3db": { + "min": 49720000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 15.74038, + "f3db": 82863360.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..ef5ac97c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..92b91e35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..5ef092de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..0b76a302 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/case.json @@ -0,0 +1,117 @@ +{ + "case_id": "C16_sky130_sW2_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C16_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "IB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "38e046d7bad937af", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "ideal_current_source", + "port": "IB1", + "current_A": 4e-05, + "from": "VSS" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "R1", + "R2" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..c6eb29cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "884a1a55c0e5f71af8e70abc437fe8651ee22a725c6a04e788170ba0f3766aa0", + "qualification.json": "bd8bd7c6f9a1b1984fd6f55cf3646c4c6ea2f0e1ad9e7af6dbdb9be1f0987107", + "specs.json": "7b581949321f1f2784dd56877d5831f48ff96f4b011e694f363ff61e4ff995f3", + "target.spice": "11bf6a58adfd6feade96ffe88ae90121ac661a7cdb1f981d97b48d7b0e13ecaf", + "target_lvs.spice": "7500ec417cb1af41aba5c388bbeb71cb2eabfe523367718339ad0c94d34a7ebe", + "testbench.spice": "f84573aa52b8c270e3809219b0d5b00a0b404f702e5439eba34346c5cef5b89b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..15db1270 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/qualification.json @@ -0,0 +1,84 @@ +{ + "case_id": "C16_sky130_sW2_sL2", + "circuit_id": "C16", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "38e046d7bad937af", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 11.94 + }, + "f3db": { + "min": 47060000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.94208, + "f3db": 78435440.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.9, + "schematic_measures": { + "vo1": 1.39783, + "vo2": 1.39783, + "idd": 4.000012e-05, + "vos_in": 0.0, + "gain_lf": 14.94208, + "f3db": 78435440.0, + "ugf": 434414100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..367082d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 11.94 + }, + "f3db": { + "min": 47060000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 14.94208, + "f3db": 78435440.0 + }, + "floors": { + "gain_lf": { + "min": 8.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..21d5a208 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target.spice @@ -0,0 +1,6 @@ +.subckt C16_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..80694cfb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,36 @@ +.subckt C16_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 +XM1_f0 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 VOUT1 VIN1 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 VOUT2 VIN2 IB1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +.ends C16_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..bed3bc97 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C16/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,40 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 IB1 C16_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +IIB1 IB1 VSS 4e-05 +.nodeset v(IB1)=1.26 + +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..e7c4db2c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C17_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e308b00f7ced0681", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..416de9ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c627fe0e5b9aa2e74c7a4f0d15531b2eb2685b5d41e1295f0cdc9780bf8d2efa", + "qualification.json": "a3bcc443defa34a0f4e39de4fb6a78a5bd03a325dd3c19aae9e10fa620fa82b7", + "specs.json": "abd605474be1ef98cd84b0ddb653976062a7f70af09a250196856c5d87c9ef29", + "target.spice": "bb7b4af4b88c427ec281756267ca61c6f7ee7cd5b6b97162bc007ac0694ee096", + "target_lvs.spice": "6d84e04fa515cb39e94014a36d4c032b1cf12b5a53bb85f14589108d01dbca43", + "testbench.spice": "81b3fb005f2999eb64a6a6a889f992ef70861096199669f80611b035cb85ccaf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..56fa62a0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_gf180_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "e308b00f7ced0681", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=4.396 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 4.395898, + "f3db": 68814990.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.913756, + "vo2": 2.913756, + "idd": 3.471751e-05, + "vos_in": 0.0, + "gain_lf": 4.395898, + "f3db": 68814990.0, + "ugf": 91327520.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..f5fa94bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 4.395898, + "f3db": 68814990.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..168cd017 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..469f56f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_gf180_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..d48b7bb1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..dd69975c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C17_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "76efb510b767858e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..ebb15d1d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0fcd384e9db0fee81584a65a4ea67e90b1b42d0192a8e8e9462dcd70f315a008", + "qualification.json": "207a75e4f898511ec39de0db4400125dffd4c29155a3e4c77580ee551c9bfdf3", + "specs.json": "07dc5a80f2da172a8a3f88c943aca2d431fa4152fd14b034ec0fc03eafb47bb8", + "target.spice": "ec802e77ff3c76b703a0936f5c14162cc4c879c0ad0178a7c5320f5e2a32fe2c", + "target_lvs.spice": "601107a81e1023dbe1b11d53460444424f6c8362c9fb329dd7662c83201906f7", + "testbench.spice": "dd5c65662b405cf506d50ed8cc11c5965b50cc7d7ace1f04892c4a6bb0ba19ee" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..ccda9884 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "76efb510b767858e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.147384, + "f3db": 69151350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.872855, + "vo2": 2.872855, + "idd": 3.839382e-05, + "vos_in": 0.0, + "gain_lf": 6.147384, + "f3db": 69151350.0, + "ugf": 122486300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..d46af734 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.147384, + "f3db": 69151350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..0d34b231 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..784649bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_gf180_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..2de6dfe9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..ce911011 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C17_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d3626f227a8198d5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..38584fdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9f70ea398658af01be736aa8aeaebd0824b0f439da830b664e8abafa13ac54cc", + "qualification.json": "31e932bab243c8a945a70fd86a6df0aa7d429acb842bf3fa42160abe659373cd", + "specs.json": "50718db550fa09c231164534097c95d4e3e613ddd262dbb3aca8cff76aa40aea", + "target.spice": "e71ab3b90dfeadcaea031362483b5be20aa9d54cbb0c1b017d7aecd207bb39e9", + "target_lvs.spice": "874e5a8547ce7d15ae90b4525d57ea4a942f575b1ecce79b23a4029c3bc64ce3", + "testbench.spice": "873ff0516706961c87205354796917cb83d99fb6220a91ba61ec3ba2afeb3a2c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..ad92d829 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_gf180_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "d3626f227a8198d5", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=3.003 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 3.003399, + "f3db": 68701510.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.95199, + "vo2": 2.95199, + "idd": 3.128084e-05, + "vos_in": 0.0, + "gain_lf": 3.003399, + "f3db": 68701510.0, + "ugf": 68755470.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..51614d86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 41220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 3.003399, + "f3db": 68701510.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..8a533c55 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..251eb5c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_gf180_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..db2ef6a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=2u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..1d30aa94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C17_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c0e8d314e7790c49", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..848a3895 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "27a98bbe91a9e23314c234feed91f21b622c8c4cbd4a5b3ff0b83e072dd8375b", + "qualification.json": "2abf8e3b2d3a33052851f7b47ae554a802808b8851648202862d4b07d4b88dfe", + "specs.json": "38a807383d85d62b069db110d24cd616ed4f150ee529d2eeb55e18921fb30808", + "target.spice": "a1a5e12dd6ac09eb2ad79414250469593d9a8e13e7385524628bc1f8bb678496", + "target_lvs.spice": "99b3447cb99b712ff89384b520d1a333f110872f4e97d5adf6c694837d155b25", + "testbench.spice": "9f282248d02c530857d7a0f90744b999164484d37e7b7dfc7ee72a66a6e38c6f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..73e4ef83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c0e8d314e7790c49", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.305866, + "f3db": 66484790.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.86526, + "vo2": 2.86526, + "idd": 3.907651e-05, + "vos_in": 0.0, + "gain_lf": 8.305866, + "f3db": 66484790.0, + "ugf": 160204800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..563b7fea --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39890000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.305866, + "f3db": 66484790.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..4ea5787d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=6u l=0.84u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..90f61e45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_gf180_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..1d60d887 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..9c85b9cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C17_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "adaaa61db8464556", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..54109a0c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "772e5206ff2155fe272a651588e98e57eda57de49685bf7363c0e5071e96468e", + "qualification.json": "da07ef802c51f719b1b654d46d3f9849822b74bc86815a475281c14e69a40430", + "specs.json": "88676d9bc6267c6d978cf4099998187a2a9807f9ae2c60b5d5c00cf55dc9aa36", + "target.spice": "d303ce1f47e72123cad4348c6e66bec9519bfb939adf35f562575d2cfabf4399", + "target_lvs.spice": "546fb62c31f29a89d9a7b897b533ce04ce5390b32a02a66ceff149e3c04f30fb", + "testbench.spice": "b117b7b508c40de2e2eeab68fb4e0067d82e77f7777ec9f555ea879a3f0f90dc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..3523e1e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "adaaa61db8464556", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.678 + }, + "f3db": { + "min": 40140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.677684, + "f3db": 66891800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.820001, + "vo2": 2.820001, + "idd": 4.314466e-05, + "vos_in": -3.63798e-12, + "gain_lf": 9.677684, + "f3db": 66891800.0, + "ugf": 193229800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..65117208 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.678 + }, + "f3db": { + "min": 40140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.677684, + "f3db": 66891800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..43788646 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=6u l=0.56u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..7b9dccd3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_gf180_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..d9cc138b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..885f5849 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C17_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "60948ff25ac440c0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..f5856f3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5d2272800ad8bff627254ac655cac7677a90e64a08674354abb5df78c41599e8", + "qualification.json": "cdfa6bb6b525aaadce0e31de493f22842f1bfdf3c33bdca9936041145218d379", + "specs.json": "a46b722fed2cd192baf81f7c2a43e2dc4c67662dca191b198d740c3e66b44fcc", + "target.spice": "298f51b9991b051ec2f361561471617dbf670cdefabf8a153d3598180965ce3a", + "target_lvs.spice": "a0768d3892f0789ce70e5e81b1c0ded68cd4b57752ce442dbfe73c025a70c39a", + "testbench.spice": "fd5d9dd918dc73a67eac8f9dd2cec4c647c494a68707e4cac1b5f7ec5ee01378" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..0a27d1b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "60948ff25ac440c0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39820000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.315751, + "f3db": 66371130.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.886042, + "vo2": 2.886042, + "idd": 3.720852e-05, + "vos_in": 0.0, + "gain_lf": 7.315751, + "f3db": 66371130.0, + "ugf": 139533800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..62b814a3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39820000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.315751, + "f3db": 66371130.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..20651fd5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=6u l=1.12u nf=12 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..02da338f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_gf180_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..1a5de309 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=6u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..1ce2fb5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C17_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5db991fefb6215a9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..4873358f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f76040e1e435633e2c86c3917f1c1ffdcabe73ab59cbba465626c22e920a7bd8", + "qualification.json": "424b30ccc7d8aed36b7e8c563f36eb5d200f5e33168162532ec1d28805604345", + "specs.json": "e4677c29fcd1a266ca294fb74e0ee5219ceb496bf1dbfb8d9d8df862ff23a6d7", + "target.spice": "e3540e20c5ad292358eff4ec33755ed960da741c2c950a74f616c1257e994d3e", + "target_lvs.spice": "baa1940a053c223c6148edfee057b3164ebf0225c00c90bca7960d229bce55e6", + "testbench.spice": "cd54d11bcac64b009bd7682843c10acb160c91517bf6c9282349c94939bc1d86" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..ac6ee722 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "5db991fefb6215a9", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40590000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.062054, + "f3db": 67646170.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.875718, + "vo2": 2.875718, + "idd": 3.813652e-05, + "vos_in": 0.0, + "gain_lf": 7.062054, + "f3db": 67646170.0, + "ugf": 137161400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..592c8f67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40590000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.062054, + "f3db": 67646170.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..d3991fc9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..2e31dc9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_gf180_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..13e45e89 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..7168805d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C17_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5983103958081783", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..4ee87d28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cfa943d648ade514d6f5cb2158f4b69bab7356e1f0234a701fab843ca63d5765", + "qualification.json": "7c37d5b1b53b924f398e8858e4b3c5ba6fe11c009ce8c8c8d422609095803aee", + "specs.json": "b6d13a6590db22eacf0d3f3957e5b27485b1c78394a9e9a9e322f0a65a047461", + "target.spice": "e361e3a84c5f4719a7ceb8ad4f517dd7a16b2d198dbd900430b09724606c6cbf", + "target_lvs.spice": "3f90d677b4c1c7b04738586a29210642a7a3b9d18edfc40da73f59a76139cdcd", + "testbench.spice": "cd70d99d12ecf2e8b3857d8e4e3fc4635d02e2069130d18e0095dcd3afe13426" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..ab7c9a92 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW1_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "5983103958081783", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40820000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.524808, + "f3db": 68028250.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.840199, + "vo2": 2.840199, + "idd": 4.132911e-05, + "vos_in": 0.0, + "gain_lf": 8.524808, + "f3db": 68028250.0, + "ugf": 168910800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..0e973a7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40820000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.524808, + "f3db": 68028250.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..6de62d35 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..21e312b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_gf180_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..c7513c9b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..2a0e438a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW1_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C17_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "caff61a89c3c6ac3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..a27d2471 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ae5c710febcbeeb758b1c9fbeff2beba5b03449b52ecdc6ef14644d1ef35c946", + "qualification.json": "015b79c825437dee4b785712947f1df8f52ff0621afe896be3cc56f5af4e8210", + "specs.json": "62b724a641f620e44fd3a435191a9538e5a1e16f1e625b90ca6787600359f26f", + "target.spice": "40826b628b79e353addd98b87e83f1e9287b8ad847248d690cbe2eccf3f64ac8", + "target_lvs.spice": "013eece24408388b2158a7c16e2404a73534f36d5677a37765f5d823d5b765c1", + "testbench.spice": "ed247ce9ac7607a3cff3c6944a3209eef9363f2d50dae6d7cdb820f226b9ab1b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..adcd2a8c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_gf180_sW1_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "caff61a89c3c6ac3", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.996 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40520000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.996186, + "f3db": 67532410.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.893826, + "vo2": 2.893826, + "idd": 3.650884e-05, + "vos_in": 0.0, + "gain_lf": 5.996186, + "f3db": 67532410.0, + "ugf": 116934400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..0f307fa0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 40520000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.996186, + "f3db": 67532410.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..07e335ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..4755275f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_gf180_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..8790fab9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=4u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..5de520aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C17_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c5f4f94b1511cbb6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..96d8c0ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c8340ea476bf540cc751b6defe589dbe31013276c79e517ab7f9ba090841eb86", + "qualification.json": "eae1ce03e53914354dd6c6e87edb677e1234daf0c9b893534134c27d4d65d55a", + "specs.json": "9247c8903d931025cc9f8e9863268fcf1f360854b4434bf442b29e472996d3d4", + "target.spice": "21d00a8a1d96d2009a1f0c8935c2cd1150637810f1abac3e1a47400e7ea84dc7", + "target_lvs.spice": "bc1f30569d185ac01e09278649c6bc56b66513ff166329b3275a77c2f226b2c0", + "testbench.spice": "bd809ff1cec75c708879d10d1637d4fdd3d7e5bcb8c986837bf2e4b6a15d1f39" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..83638036 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "c5f4f94b1511cbb6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.099 + }, + "f3db": { + "min": 39210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.099341, + "f3db": 65352150.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.856445, + "vo2": 2.856445, + "idd": 3.98689e-05, + "vos_in": 0.0, + "gain_lf": 9.099341, + "f3db": 65352150.0, + "ugf": 175080000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..e6b94f22 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.099 + }, + "f3db": { + "min": 39210000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 9.099341, + "f3db": 65352150.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..4e60ecf7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..678d38fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_gf180_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f12 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f13 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f14 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM1_f15 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f12 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f13 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f14 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM2_f15 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.84u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..7256d5f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.84u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..b971c7c2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW2_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C17_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f8fde3b54068678a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..9d1f6b87 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "60044751ad5e818db5f9ea216a61ecf2f60149cb1745f3645036dafb33cc1bd6", + "qualification.json": "563890235abeb3e7008e8a56aa29a9037c390828006d056ce83cf542bdb44237", + "specs.json": "a37b2a97d777a46505feb7ca3b0b094d8e172f5f327abeadfe9004137c646157", + "target.spice": "5477d984a62d37fce3e158e49d7e6834a84427373b20abc560c5ef3980171e33", + "target_lvs.spice": "bdcde11a5faef2c05d55875f79afcf9d0189d3a2a8b41df1cb26c0b5c913c588", + "testbench.spice": "c554128b16782a7d4f62f33156f474804a0277df9ebef9323fb111440c3fd7bc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..a13c394c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW2_sL1", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f8fde3b54068678a", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 7.405 + }, + "f3db": { + "min": 39460000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.40503, + "f3db": 65772220.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.803843, + "vo2": 2.803843, + "idd": 4.459697e-05, + "vos_in": 3.637979e-12, + "gain_lf": 10.40503, + "f3db": 65772220.0, + "ugf": 208572000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..27dceff8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 7.405 + }, + "f3db": { + "min": 39460000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 10.40503, + "f3db": 65772220.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..162b402e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..9e565950 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_gf180_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f12 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f13 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f14 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM1_f15 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f12 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f13 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f14 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM2_f15 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=0.56u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..65afe730 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=0.56u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..0ab89a0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_gf180_sW2_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C17_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ff66d5a891505aaa", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..8bf273ab --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cf165881bccc5996c209061be2e2837c7bdd6f24d8e1f721436fc44945e438fb", + "qualification.json": "592ed36f9210b38c369a7861b9295dfe1d825d6f9daaf684131b2983d1efba9e", + "specs.json": "2517bd9da3d9094898e8640ee7d4383ea6362b176a7ba4056c4e5cc18a5e1a0f", + "target.spice": "589dc2c26bb3eb78d1b975d9964dace0db14432576c2525bdaa1baef1b788075", + "target_lvs.spice": "e8339d566637f687d1b186516a706dcafdb24791db5da92b4eb6e7682e65d544", + "testbench.spice": "a23a9a01b9a219a9a0d2095766e877193145e0ffb04dd8b194880f6f45b3bc1f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..6692b46f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_gf180_sW2_sL2", + "circuit_id": "C17", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ff66d5a891505aaa", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.156878, + "f3db": 65239890.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.1, + "schematic_measures": { + "vo1": 2.880635, + "vo2": 2.880635, + "idd": 3.769457e-05, + "vos_in": -3.63798e-12, + "gain_lf": 8.156878, + "f3db": 65239890.0, + "ugf": 154226200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..e47aabc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 39140000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.156878, + "f3db": 65239890.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..8961e24e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1 VOUT1 VIN1 net07 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM2 VOUT2 VIN2 net09 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net06 VB1 VSS VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +XRR1 VDD VOUT1 VSS ppolyf_u r_width=1u r_length=60u +XRR2 VDD VOUT2 VSS ppolyf_u r_width=1u r_length=60u +XRR3 net07 net06 VSS ppolyf_u r_width=1u r_length=5.085u +XRR4 net09 net06 VSS ppolyf_u r_width=1u r_length=5.085u +.ends C17_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..bd3b749d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_gf180_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +MM1_f0 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f8 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f9 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f10 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f11 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f12 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f13 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f14 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM1_f15 VOUT1 VIN1 net07 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f1 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f2 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f3 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f4 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f5 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f6 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f7 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f8 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f9 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f10 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f11 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f12 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f13 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f14 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM2_f15 VOUT2 VIN2 net09 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f0 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net06 VB1 VSS VSS nfet_03v3 w=0.5u l=1.12u +RR1 VDD VOUT1 VSS ppolyf_u L=60u W=1u +RR2 VDD VOUT2 VSS ppolyf_u L=60u W=1u +RR3 net07 net06 VSS ppolyf_u L=5.085u W=1u +RR4 net09 net06 VSS ppolyf_u L=5.085u W=1u +.ends C17_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..d6ebab77 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VSS VSS nfet_03v3 w=8u l=1.12u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 1.5 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..f02adb53 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C17_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0aba1e99791534e3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..fc14c161 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "11e92fb25b54fede2c1aed0d9ebc84c3e03b80e9c36372ef691b6769d2c55c9d", + "qualification.json": "9826b18807319a9bded599c1d20d683e636c94243e04eb6d7735b7f425e708ee", + "specs.json": "bd80eb4c695aecca328da4c0427bc8e50a341c9b0410b9012ed72776f2a417bb", + "target.spice": "39939adf933a8826d4db63407e7e87fada1ea2be599dffd900f96e3618cf26d6", + "target_lvs.spice": "5cf327b896546d17a4c3975f1dbe8e095e650bf238a030c96db3a919cc04d1c6", + "testbench.spice": "1d5476e93895d011408e2fd8b32733337b5af4b530c0deac407c63c13ce69c1a" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..c38ede52 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "0aba1e99791534e3", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.942 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.941521, + "f3db": 106646300.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9889885, + "vo2": 0.9889885, + "idd": 2.813885e-05, + "vos_in": 3.637979e-12, + "gain_lf": 5.941521, + "f3db": 106646300.0, + "ugf": 183056300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..89711d2e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63990000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.941521, + "f3db": 106646300.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..7d41d86f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..191457d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..490cb967 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..245d5cb8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C17_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f346c32c94f6ee07", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..3a3714e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "92fdc0011fa46a8139d18bff83558be7b0fdc4729798e790b9b4335eb7dbe841", + "qualification.json": "327d34fe8e6f1c31cebf90d0af4f0045b48197a87d47695f8410436aac7d44e2", + "specs.json": "bdf63f595e41b07890ab2bab382a1b73737b864ad5a15ca9265b3dbd371e340b", + "target.spice": "2f9d7af4a7d98267de37e83647b437e78343e4f31c1c1d7bb32294ff9669f2a1", + "target_lvs.spice": "12abba580ab3859f3c67c49777f928d08e00a751f70b15cb147d4f8e35dd4aec", + "testbench.spice": "b5cb944431ff3d821ada731c29269e3ee5426490941d779ed1b8750dc531625f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..d22145b8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f346c32c94f6ee07", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 64600000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.071398, + "f3db": 107658700.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 1.006454, + "vo2": 1.006454, + "idd": 2.580981e-05, + "vos_in": 0.0, + "gain_lf": 6.071398, + "f3db": 107658700.0, + "ugf": 188550200.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..2218e92d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 64600000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.071398, + "f3db": 107658700.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..36f8ae94 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..e466d5c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_ihp130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..74fd5521 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.26u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..9e7d015f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C17_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5e9312d16677d32d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..bbb3829c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e4dd65a510a7544a0c7e62e56878d640ad7b6022af2617d4a688f55cdc13aa6c", + "qualification.json": "ca6b1771ff655f039b1b4d369a6d109bb7293d37297779f95c87b8304954d99a", + "specs.json": "25f49f1720f5501280cf4fb83a8b1bb2ea412a5c1cc3204fec23c880afa9bb87", + "target.spice": "4706fe75e725640330520cb2cb26d2d96de82b05c123d40acb14230136a4f81e", + "target_lvs.spice": "24e41fb8c3f454851f33d7b51cb2b7d7ffb0b770d3f8b221e8773e417e25bad5", + "testbench.spice": "69970473ba1a73e40b1c09bfd5a8ba8089d2975ff5c4bc86e8fa9de19413b05f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..d61f6ffb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_ihp130_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5e9312d16677d32d", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.469 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63410000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.468711, + "f3db": 105677000.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9872316, + "vo2": 0.9872316, + "idd": 2.837313e-05, + "vos_in": 0.0, + "gain_lf": 5.468711, + "f3db": 105677000.0, + "ugf": 168395000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..1e195d45 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63410000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.468711, + "f3db": 105677000.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..d7f71adc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..e8aa1c73 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_ihp130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..6c95a990 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=2u l=0.52u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..25a21dc6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C17_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7d30068458eda978", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..0fac9ea7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "604f5295d4cd65da536bece728c0f6f7b1f307476323bc0e3ee2ce20c7d268f8", + "qualification.json": "2c4dddd95d35036d3d9ec8d7fdd8a2dba79e07f9504357d53dabe31f646ca79a", + "specs.json": "7fe580f30da4bfe7e154a664b861467e1d526aefc45f32f62bd97a030d65302c", + "target.spice": "4f9739b98e3b1898fc993c1eb4d749468a131012470ae3eb193cb2b4c6fb0302", + "target_lvs.spice": "69b671cee6c4916c5a155615a911d73764a1f931453c7e8fd909a963a5a66986", + "testbench.spice": "bc51f6131b45d2cc46b5a7a68db4907a70c7033a7843cd5d7c49b975a0f8f4f1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..eb67b23a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7d30068458eda978", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 62880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.715947, + "f3db": 104791900.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 1.01808, + "vo2": 1.01808, + "idd": 2.425947e-05, + "vos_in": 0.0, + "gain_lf": 7.715947, + "f3db": 104791900.0, + "ugf": 233216000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..5e0ed27b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 62880000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.715947, + "f3db": 104791900.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..992fb5ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=6u l=0.39u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..f3addb57 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..6db8c47f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..a11ce016 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C17_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1d0375d5f1075dad", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..38221a34 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "49d5198afd5bf42d776c1056ca80447976ff33a0dd88c69a01d3b2efd7b9e860", + "qualification.json": "3ca499643ed2f836fe642edebd2b8c35726c64d6d737f309d9fd870e6c870d22", + "specs.json": "be228909bdfe1dd3d1478cc4b10611a781e44633b94ba6ff8bd346f174d4d646", + "target.spice": "a995d0300b4c76210b16789fbb18c8698b2d584965d5f19679139b6f96d5f38e", + "target_lvs.spice": "aa802cbd0b3b4d5d85e829c6516a4258beeb43695bc4008a71242f93cd871b4d", + "testbench.spice": "c748151f8d9a64f5da721400e98103bed21484406b3f00ff77a520e1c22eba16" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..7305e51d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "1d0375d5f1075dad", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.456876, + "f3db": 105071600.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 1.043034, + "vo2": 1.043034, + "idd": 2.093175e-05, + "vos_in": -1.81899e-12, + "gain_lf": 7.456876, + "f3db": 105071600.0, + "ugf": 225280100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..8af27c8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63040000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.456876, + "f3db": 105071600.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..7e8b11a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=6u l=0.26u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..c2a4ffad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_ihp130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..0d82b2ae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.26u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..6c98f90e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C17_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c8fb0ecf39c25b8e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..6a2cf161 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6cb4147fe772d60cea7b69611def203a2173b7fd01e3a75d2b77cf89c2f3448f", + "qualification.json": "9573e1c3856946b1d4401a9bb4acb6b6568bf9555dca969d2c8293a4e85c4fac", + "specs.json": "e64078b2278477c9ce7916b19343d8f45733c0f2105cb0ced53bda472bf448e7", + "target.spice": "d00c7724fb3ade147358341564db9d71bb021ef516382375f2188e57ca99319d", + "target_lvs.spice": "7f71e9976e9d64f8436185d6ec3d72d7d3f4b0d486f7f267577e2bdc83c27ad9", + "testbench.spice": "e9e1b0ab707c7ad7cfcbb06436c6ded4f341f4de956d57830316497cac83f940" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..c052f621 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "c8fb0ecf39c25b8e", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 62500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.652116, + "f3db": 104159200.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 1.004767, + "vo2": 1.004767, + "idd": 2.603473e-05, + "vos_in": 0.0, + "gain_lf": 7.652116, + "f3db": 104159200.0, + "ugf": 229824300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..7d3e7e95 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 62500000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.652116, + "f3db": 104159200.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..d707ae31 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=6u l=0.52u ng=12 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c94caca4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_ihp130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..dd7c70d6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=6u l=0.52u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..2bcafcfe --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C17_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cb211546087dec2f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..acd98509 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "99946854b6df98aa7a0899a80bfa9a647d2df0d88188f1687ce60506b9de8343", + "qualification.json": "f2d55cf7cde502f28e9931a980eb04015a87005a4069b20a2743de8173904778", + "specs.json": "94726ba5313a35e5dc6ca8b5a636c39e2221428b689beddcb2a5c5bf8ad6be3a", + "target.spice": "8505160dbb7a9a9642e83c7e0a787f03827b1a655c10d486c1f73544b715081a", + "target_lvs.spice": "2aedfdd3ccc7dcd3083652729ece901a7cd3480ef993bd4f11e5547fc3334fd9", + "testbench.spice": "e716131e3bbe49f9fc4e7703ff12d90e84c65f5a56cafbd935f0929aa5405a71" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..5115fa0e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "cb211546087dec2f", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.353998, + "f3db": 106311400.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9965709, + "vo2": 0.9965709, + "idd": 2.712772e-05, + "vos_in": 1.818989e-12, + "gain_lf": 7.353998, + "f3db": 106311400.0, + "ugf": 224624700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..35b51901 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63790000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.353998, + "f3db": 106311400.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..cf93e547 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..fd68fe9a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_ihp130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..bf307b3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..4131944e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C17_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "674e7201b22c0d84", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..eefdf8a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "422111aeaa7c7fe53d79ff3600d70142d62c7cd0a56f5f3df979b4043c56f131", + "qualification.json": "3660285978fcc27d908f6e3f9f787bfc63ea02895d108e71b53fc4ce6fbe6861", + "specs.json": "bed2fa6246bb4afd2642730aeb08a37265bfdf88cd073f929d78f30eedd73658", + "target.spice": "7bc2481ebe0f823005369208929f52a983119469d7b48e54e67ebfe0293d3138", + "target_lvs.spice": "a452319156d260b5024cfa517747d68dbc019a9617a4fc4f7af1589043baef54", + "testbench.spice": "9dccc7f51d00719a29c282b976413c37e4793e2b43e7d7a84cb7f64a0c3576cf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..a10a23b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "674e7201b22c0d84", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 64200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.213422, + "f3db": 106993800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.3, + "schematic_measures": { + "vo1": 1.02104, + "vo2": 1.02104, + "idd": 2.386467e-05, + "vos_in": 3.637979e-12, + "gain_lf": 7.213422, + "f3db": 106993800.0, + "ugf": 221610800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..7bfd50ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 64200000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.213422, + "f3db": 106993800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..304bc216 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..15e25898 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_ihp130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..8e7f75f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.26u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..0511bdbb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW1_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C17_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "357001ffc886bf12", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..25b354de --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1f57257f4eb797d61760319fe799601944915ab4092137689b3314631f233fda", + "qualification.json": "a2ed80f82a3674ea2bc250ad0927cf417eff8fe7c1fa5c09aa30f9d83a056ef6", + "specs.json": "11c184364685d1127e403b1c593eb31bce1dd3b6f7451adbbfca873ecb37520a", + "target.spice": "14ee414433d0707a47386b63ad2dfdca4c4546de09feeecd6ab60fefb84554b1", + "target_lvs.spice": "96749c4e3f6a681f506599d1202af8cf02e7256c7ebead279d9f5110d1e3598f", + "testbench.spice": "a97bd86b0750bee3a79b2d84a3010ff9c8909c3dcd408f0e99edf98818450ba8" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..757bd1ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW1_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "357001ffc886bf12", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.18929, + "f3db": 105477500.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.2, + "schematic_measures": { + "vo1": 0.9847926, + "vo2": 0.9847926, + "idd": 2.869837e-05, + "vos_in": 1.818989e-12, + "gain_lf": 7.18929, + "f3db": 105477500.0, + "ugf": 217910300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..37d4a8be --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 63290000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.18929, + "f3db": 105477500.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..aa716c65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..f11c0ff4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_ihp130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..e29e049c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=4u l=0.52u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..0f0df0e5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C17_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9f7bed10f4ef6849", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..932bf75f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "20a863fe3e3286b5906aab72be58f13a175e3964733362a3a619ece544b9359b", + "qualification.json": "525b9da51df85cdd86dcf244ba881a330d08e73ba938021845c0047f685ec1ab", + "specs.json": "bc481db264923dda1436d7d3be95817ca4e5b62aad4a8fd4aaf49ee46c376f05", + "target.spice": "55635ebcb648a3b118bf73dfaad63706edd58f3c3ad10e9a17a3443a2db23e69", + "target_lvs.spice": "dc82bc14b4f7a8436207f7f1b813e03a194c151f03249bb29e8ec2c38dd1cfcd", + "testbench.spice": "641df8751d7795b551b2db562849d23fecf4b4e4553af88bbf645baaf7dfd599" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..a849fef1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "9f7bed10f4ef6849", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.7766, + "f3db": 102911000.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 1.03766, + "vo2": 1.03766, + "idd": 2.164834e-05, + "vos_in": -1.81899e-12, + "gain_lf": 7.7766, + "f3db": 102911000.0, + "ugf": 231036100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..965d189a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61750000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.7766, + "f3db": 102911000.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..691bb92c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..97c516a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_ihp130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f12 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f13 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f14 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f15 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f12 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f13 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f14 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f15 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..b029c320 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.39u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..c327ebd6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW2_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C17_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7cc8f02c0a3a3521", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..045907fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0a450afc941ee4d07d742fe6f74f9c068e44c960ecbaaeb99aa628d1468289e4", + "qualification.json": "b1edfc38ad12495182ce3909d1c818bb8922b49c5f154df2ee616dcbea04e02f", + "specs.json": "cbc8f11fce8419b7ff5bce7b1f8862b8f67204e38be339ffd943263fbd44204c", + "target.spice": "e1d1d2ad6aeb6da43c1bf745e894c3b283fe307182e3b0027fd18d6c9dfa4f1c", + "target_lvs.spice": "d834e5d9b9e44c35a8bb14a84b5ecbf5bed8897ed964829bbb39da95e9cfcd4e", + "testbench.spice": "61ac4640995f88f232f0bfdf71588ee3c5725469703e4bc5ed8593b4a8703df4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..34ac4452 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW2_sL1", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "7cc8f02c0a3a3521", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.382897, + "f3db": 102887100.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 1.061853, + "vo2": 1.061853, + "idd": 1.842219e-05, + "vos_in": -3.63798e-12, + "gain_lf": 7.382897, + "f3db": 102887100.0, + "ugf": 218482700.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..9e3aad20 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.382897, + "f3db": 102887100.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..25570b74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..4efe5f59 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_ihp130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f12 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f13 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f14 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f15 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f12 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f13 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f14 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f15 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..1f1165cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.26u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..6358acf3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_ihp130_sW2_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C17_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1826b0386648d6e3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..d0275e66 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "6b5b797d1b26ba848e9a8b1d7bfc4425479ce19cb83130e88ad74a064023ddac", + "qualification.json": "0f58ffc6e049bc40e8dfc0fe20fb56858bef45374a6df5ac72ca484109713b52", + "specs.json": "8b89c9dc60e5d04a8282a973b86d6bf8820d8254e79408769f64582037fe6ff7", + "target.spice": "b1d2c36f01c0bf2fb10db5ade85c475ef7c7ac6731e06e494250c0b5177cdbb4", + "target_lvs.spice": "be1350deeb9830bdf126983491907b20de670a41055d8edc12022a11d7205c08", + "testbench.spice": "98447822944673f3ad4197f5e72f5028d9682ccf2668cd4859690272d259c047" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..bfb82fa8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_ihp130_sW2_sL2", + "circuit_id": "C17", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "1826b0386648d6e3", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.786772, + "f3db": 102489800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 0.4, + "schematic_measures": { + "vo1": 1.024025, + "vo2": 1.024025, + "idd": 2.346664e-05, + "vos_in": 0.0, + "gain_lf": 7.786772, + "f3db": 102489800.0, + "ugf": 230572000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..8fee3ad4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 61490000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.786772, + "f3db": 102489800.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..61c0b638 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM3 net06 VB1 VSS VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..279b6160 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_ihp130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f8 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f9 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f10 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f11 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f12 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f13 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f14 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f15 VOUT1 VIN1 net07 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f1 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f2 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f3 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f4 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f5 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f6 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f7 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f8 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f9 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f10 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f11 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f12 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f13 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f14 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f15 VOUT2 VIN2 net09 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f0 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net06 VB1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XRR1 VDD VOUT1 rppd w=1u l=58.055u m=1 +XRR2 VDD VOUT2 rppd w=1u l=58.055u m=1 +XRR3 net07 net06 rppd w=1u l=3.6u m=1 +XRR4 net09 net06 rppd w=1u l=3.6u m=1 +.ends C17_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..223b0261 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VSS VSS sg13_lv_nmos w=8u l=0.52u +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.6 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..bc3888d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C17_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7fdece2029af6a38", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..092acb18 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cfaccbc6b455c418ce580e428a900d3009319d6be5c7c70e1305a33f378d67d5", + "qualification.json": "ed503546fb7ae4552a86fe579f8430f6602a5d3bf7ed68a1b439d0ec98309753", + "specs.json": "365c2be8a227efc2c0003d5ec1e6b03f1fa067ec958a02bd18804c064fdc96a2", + "target.spice": "992b5dc6bbb14e28384bb843632266884115ce244bce3600fd830193ecb2a4ac", + "target_lvs.spice": "a0a5a5135820649773d37cd2ff9d8c376c94ef3ca451d9aeef378e4edca9286b", + "testbench.spice": "87d77f9b0ada1f1eda8d61898a842bcffc763f632d70a0b175b6fde1ab1fac64" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..7916027b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_sky130_sW0.5_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7fdece2029af6a38", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=5.423 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.422736, + "f3db": 78553550.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vo1": 1.590567, + "vo2": 1.590567, + "idd": 2.078147e-05, + "vos_in": -3.63798e-12, + "gain_lf": 5.422736, + "f3db": 78553550.0, + "ugf": 124182900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..4440d18c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 5.422736, + "f3db": 78553550.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..d63151f4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..4d2333c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_sky130_sW0.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..a2af929d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..804752b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C17_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bdfe90aea4ba36ab", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..2a037831 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bdd5ee81b4e0606f5fdd44952d63016eb636231e2949fc1f73cf2a2ed8c6b1ea", + "qualification.json": "14c8bf139a46739997cfdd110375abc6675605847ec8ae07fecf26b2b50f8f7a", + "specs.json": "0bffcebd6727319fd643c1e932f2c7cf33ef97f760c09f7206fc60fddfee58e4", + "target.spice": "6b8d53186c56893cdf60f5085a1b6069ea1f69084c9dcc80dfc08d3b1cb8f203", + "target_lvs.spice": "6f579f9deb2de7179fafb93945233a71fe82d4e28c6875accd1ec6f656529e20", + "testbench.spice": "1faa4601b12651810a828945ace343e8ff8db3b92df467b2e53bf9e90985b7a1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..925cd5a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW0.5_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "bdfe90aea4ba36ab", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47700000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.458793, + "f3db": 79500490.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.0, + "schematic_measures": { + "vo1": 1.567544, + "vo2": 1.567544, + "idd": 2.307286e-05, + "vos_in": -3.63798e-12, + "gain_lf": 6.458793, + "f3db": 79500490.0, + "ugf": 147605100.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..6107dead --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47700000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 6.458793, + "f3db": 79500490.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..78e19fe4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..ec09e91c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_sky130_sW0.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..e69e339c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..458501cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C17_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ee836db74e1b2dc2", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..46f4ee32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0ca8c9bdb668c4017a41ec9d329532cebc656e2b4b1dc652e5688ff4178b3c3c", + "qualification.json": "d4ff3ff944c5f02a445a902b459807d12376cb4a68ddf6e0dc572ab5b81f2673", + "specs.json": "07b8fc737e3cc81a367e2f07a8a153bdc29c0b1b0a9386e417dbe236f0da37ea", + "target.spice": "2cafaf28c9983d1db2a7c38edb6aad1386011f59d43cd5e9707fc8dd716ca6a4", + "target_lvs.spice": "3478b3dd29be8d071db8c294685eb4dd2cb4f6529b117925972165b5f446b173", + "testbench.spice": "54584468d8ab16c5ea3987e4510798608f00d0f09cdba9883a15f6192b240b15" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..e8affbaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,98 @@ +{ + "case_id": "C17_sky130_sW0.5_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ee836db74e1b2dc2", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "gain_lf=4.267 below floor 6" + ], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46770000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 4.267453, + "f3db": 77942910.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vo1": 1.616323, + "vo2": 1.616323, + "idd": 1.821962e-05, + "vos_in": 0.0, + "gain_lf": 4.267453, + "f3db": 77942910.0, + "ugf": 101030500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..a0666ad0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46770000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 4.267453, + "f3db": 77942910.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..9e6099b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..28fc74b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,18 @@ +.subckt C17_sky130_sW0.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..db795857 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..1a9d7810 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C17_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f1d751cc273d80bf", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..122a1384 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "db742c99aeb7698ddd5c27040ab6859afec016f3364d9e976414aec4bb31a74f", + "qualification.json": "1f84d9d79508cd4e6f70797bad5f98b614d22bb36c58150cdb00cb950177a1fc", + "specs.json": "53c228b51e5ff79e56eed562c75a44dbb39c28679b52c76f55a67f0446dcffff", + "target.spice": "6982252d2d05da294de725a889f251a2c8650154a64ad44ebe276650a1f52f6a", + "target_lvs.spice": "6a654b295e84ea2486a2d022f4420037bb0580a202878cd751e8c9d8f92423e0", + "testbench.spice": "0700532dded058ccfaca6012d30afe1d69a51a66e02b65dc7a8c8eaffc67a5b2" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..9b55e88d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1.5_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f1d751cc273d80bf", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46860000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.569138, + "f3db": 78103720.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.1, + "schematic_measures": { + "vo1": 1.519202, + "vo2": 1.519202, + "idd": 2.788819e-05, + "vos_in": -1.81899e-12, + "gain_lf": 8.569138, + "f3db": 78103720.0, + "ugf": 195090500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..19321b3e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46860000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.569138, + "f3db": 78103720.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..bd12fc6b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8296d459 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_sky130_sW1.5_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..f54b890f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..88f10826 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C17_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8c18d770f04bd12d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..0ce12bad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "742e085abb66f419d6419d5577c95bc59708770e05fdfda27f9df610c44c05ec", + "qualification.json": "8d0486a365f21a5852c0f726e56905d2505192ea668cb52603862c971d23d3b6", + "specs.json": "cabc9fe921f805fc0db6fa82472c808770e913b09e48ad3f132259057eed4031", + "target.spice": "7f3d7248809c2f49e274022e34a21e25bbe5d3abc958f0e9eb160083c44e2f26", + "target_lvs.spice": "74247fd9b8bcc62dc46c7e06e95a94bf99b1904b313c75d2780063e8aafcf16f", + "testbench.spice": "a88637b5441f0d2fbf3b7bffc9f4269c4871548b1350203ff5de3947628e4cb4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..4a038e08 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1.5_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "8c18d770f04bd12d", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.631978, + "f3db": 79182690.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.6, + "schematic_measures": { + "vo1": 1.524254, + "vo2": 1.524254, + "idd": 2.738469e-05, + "vos_in": 0.0, + "gain_lf": 8.631978, + "f3db": 79182690.0, + "ugf": 199267800.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..7371e46e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47510000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.631978, + "f3db": 79182690.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..d30b274b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..bba906b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_sky130_sW1.5_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..1c8a51e2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..382851ee --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C17_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5a506eabdbbefada", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..ed46d202 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "f7e19c57c9b4d680fde8b427f73785aaf908b37fa84fa98b6403ecf08a403545", + "qualification.json": "f9e3b91d745696e0e781920a5ffe4b5ccc87df9686ddc7e343382c9d4e6696ce", + "specs.json": "974409255e28d8241b54873cf73a7824b2bf20a15619c835593d0278c819f58a", + "target.spice": "1d52fddd201dd86e756f0eeaca09b7e9c535a112c748742715165695ba8dfe36", + "target_lvs.spice": "c4ddf5a8e5d17631d095139e5f03a7a440da7cff63507bf90b28fc1e76da301c", + "testbench.spice": "f02fe4614f0bb765314fd5b1a733f1bb88e7c05f48398c559541c855260b3f4b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..993efb76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1.5_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5a506eabdbbefada", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.100762, + "f3db": 77370550.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vo1": 1.529405, + "vo2": 1.529405, + "idd": 2.687138e-05, + "vos_in": 3.637979e-12, + "gain_lf": 8.100762, + "f3db": 77370550.0, + "ugf": 181459300.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..b5584474 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46420000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.100762, + "f3db": 77370550.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..eba67085 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 nf=12 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c18b27d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,42 @@ +.subckt C17_sky130_sW1.5_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..212408f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=6 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..bb6f1ae4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C17_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "93f6bcf65f79ac74", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..56fcb9e7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0399814a027f192e3f1c3ed4a38fb48382a9f41994c242389d6176be6d1c8df4", + "qualification.json": "1444565e024a0124c15352862ff25387f2076417021cf80ca80d03c7cfc6d450", + "specs.json": "6b2acf8393206d3e97889da9133eaa29510dc18810b30dec0f6d8fcbe008b5b8", + "target.spice": "002fd52a58106aae57c6fa43508d7544c138140c6ff7596fb64340f79b92fead", + "target_lvs.spice": "fdd51a96b087a305ce56aacbf817c534cab452f096e56db600f62c42475bfdc6", + "testbench.spice": "87f1f4ec91917a70561806ca841540e15885457c7668df9c0011de8fb77765cd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..ea14c2d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "93f6bcf65f79ac74", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.751929, + "f3db": 78477050.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.4, + "schematic_measures": { + "vo1": 1.533358, + "vo2": 1.533358, + "idd": 2.647755e-05, + "vos_in": -1.81899e-12, + "gain_lf": 7.751929, + "f3db": 78477050.0, + "ugf": 175310600.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..d71e29a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47090000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.751929, + "f3db": 78477050.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..0e0860d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..d2e8e5b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_sky130_sW1_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..6d3bcbdc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..9d657a95 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C17_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e3355a0044395ab0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..d0ed8f15 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "54cc5a0756b94b9761209357ac8ef48a1075a8f85df69f383c71de5857cdd4f4", + "qualification.json": "a73f7ce914279b830a46f41087e62991bee3710c5e4396a4f1b55b3ad94bc057", + "specs.json": "067812ace5e5b6baf1397bd03d3c5ed4e1b81c6fe1b7c98e06c478680fc4734d", + "target.spice": "9635dfb5075acab15d8429db52d7823b4261d5648ae6e0336571278cfd71676d", + "target_lvs.spice": "6a93dc340c94cba0b82220a442ce01018f0065d9a6e1555cbcfe67a90f5b9446", + "testbench.spice": "933bfb1e15a7a4d81dd05fd0f5ea416e966759b5668fdc7c9146c9a3c73a4297" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..60351d3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e3355a0044395ab0", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.178825, + "f3db": 79542460.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.5, + "schematic_measures": { + "vo1": 1.524965, + "vo2": 1.524965, + "idd": 2.731382e-05, + "vos_in": -3.63798e-12, + "gain_lf": 8.178825, + "f3db": 79542460.0, + "ugf": 188501400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..d2e88a10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47730000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.178825, + "f3db": 79542460.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..875fb658 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..dc61c0ec --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_sky130_sW1_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..5ab8b7fb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..582c385c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW1_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C17_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac667ca55d98cec8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..5ef1d827 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "5e4e62147c2e567af8f791378c9e895fca9f5338d895c5c05ddd94fb240e2401", + "qualification.json": "0b0b57c5d0cd38b9c81fd374ea1c2fcb2143ee5c88e5eda31719ed824cc75516", + "specs.json": "0f2b7b7ae0e6b3a5e504faf7ac61478f242c66b0e34e6c35fe8ff01f3a3a644a", + "target.spice": "81130185d7f5729fb0021cd3d708c4f6e1b9247102463ae4fdfa3cd4e11c9ed8", + "target_lvs.spice": "c02a0f967f7fb53ba2453707ec727e99730ed6972c756c4514287a38920e3387", + "testbench.spice": "912015f02e31a43b13d0ac7e8de9a12eae7e0ee066a62c2b691bb8da8eedc570" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..8f22591b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW1_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "ac667ca55d98cec8", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.011717, + "f3db": 77755120.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.3, + "schematic_measures": { + "vo1": 1.553628, + "vo2": 1.553628, + "idd": 2.445846e-05, + "vos_in": 0.0, + "gain_lf": 7.011717, + "f3db": 77755120.0, + "ugf": 156497000.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..73961b68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46650000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 7.011717, + "f3db": 77755120.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..ac9114c7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..6cea089e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,30 @@ +.subckt C17_sky130_sW1_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..29cdcbe0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..08f33b7f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C17_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ed5bcaca675aa7a6", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..9b3cb6f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3d917a0f135d3e194df5fd2a979cb4215702bada95aac3b7e1ffdfb409604310", + "qualification.json": "caab6e049d9e0a7d2d15a7358840b5b739d4e1b87b23b7d26f65988d19b4093d", + "specs.json": "828068411b8c6c671c7bb8f0d36e1a7f19c81496a77d0d52a43dc83f1c4919b4", + "target.spice": "9f2b3fb108f4aeb28a38fda16eb80e1de3ffebd6218234a79edd6b97c7b14cf8", + "target_lvs.spice": "2c980a16177e542d23f8e870ebd68e6de3ec92e2ab54148ba85655e3b7bc93a2", + "testbench.spice": "b33d26472eaa371c3cfcfbe7ca55b81f99484be0c5c6dd3ee83e1717b8989634" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..e1082eb2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW2_sL1.5", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "ed5bcaca675aa7a6", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46560000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.838831, + "f3db": 77607350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.9, + "schematic_measures": { + "vo1": 1.525305, + "vo2": 1.525305, + "idd": 2.727998e-05, + "vos_in": 0.0, + "gain_lf": 8.838831, + "f3db": 77607350.0, + "ugf": 200921400.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..8654ae81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46560000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.838831, + "f3db": 77607350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..4ea5a365 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..164a908c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_sky130_sW2_sL1.5 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f12 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f13 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f14 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f15 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f12 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f13 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f14 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f15 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f12 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f13 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f14 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f15 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..c6ae9d76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..482341aa --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW2_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C17_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "96d020ab38cf0aef", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..53842805 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1776f5a11dcc28208480c253a4baff68110af94f2a9b0aa31605bcf99de69369", + "qualification.json": "e0fc451c7824fe0a19318638354b92aa955c38be2ed29ea472ea7082ed3971b4", + "specs.json": "7b0436631fb557f1150bd21d571210dd61536af72219d1f1455f0d0e33e0eb9a", + "target.spice": "569f31b757c206eca279cf5ce7fc57de6050e18ce45bbe66ea856196115043ce", + "target_lvs.spice": "3757668d82f82858f8f72a5582f33b2d9f8f8f997c34328bbed56f8bce42e084", + "testbench.spice": "c69747c3cf661264c7a526dd6eac9d26aeec42f9593a74704cfe7e1dee1972bc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..97518396 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW2_sL1", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "96d020ab38cf0aef", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.723596, + "f3db": 78697350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 7.3, + "schematic_measures": { + "vo1": 1.534642, + "vo2": 1.534642, + "idd": 2.634963e-05, + "vos_in": 3.637979e-12, + "gain_lf": 8.723596, + "f3db": 78697350.0, + "ugf": 200561900.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..dd15dfae --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 47220000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.723596, + "f3db": 78697350.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..8f18cf67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..1a441a33 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_sky130_sW2_sL1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f12 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f13 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f14 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f15 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f12 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f13 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f14 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f15 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f12 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f13 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f14 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f15 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..dcc6a37a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..39a232cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/case.json @@ -0,0 +1,150 @@ +{ + "case_id": "C17_sky130_sW2_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C17_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VIN2", + "VOUT1", + "VOUT2", + "VB1" + ], + "sizing": { + "M1": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "category": "diff_r", + "notes": [ + "first-pass sizing v1" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44f3db779a0eedeb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M3", + "current_A": 4e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "ideal input common-mode source" + }, + { + "kind": "testbench_element", + "what": "load capacitors" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "R1", + "R2", + "R3", + "R4" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..8116c25b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "3725cf4dd6b2557193d399f3ee5252272f8a78013206fe140842dfc200310cae", + "qualification.json": "daf914622fe4818b19ead5f3af169ce6172cef07fe7d035728a877279099ecb3", + "specs.json": "bbaa18a6f5713a768b33c8a4c3f482e9f7406ec7f77a9307540ad65db86774ce", + "target.spice": "7f5022021e5a0224a853e83e73cc3a18741d7ff7a771962f9b846876a40d50bb", + "target_lvs.spice": "0ae02c754ecc2f68aeaed6c3f5cf09270fdc909f8416ca4eb1a76c0a77c8e516", + "testbench.spice": "af4f55ac53ac9cdca9c5d8127e66d154af0c8929c4acc41d56660d8fa9a155df" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..a6e7c92c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/qualification.json @@ -0,0 +1,96 @@ +{ + "case_id": "C17_sky130_sW2_sL2", + "circuit_id": "C17", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "diff_r", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "44f3db779a0eedeb", + "stage": "qualified", + "qualification": { + "qualified": true, + "reasons": [], + "spec": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.509626, + "f3db": 76882420.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 6.4, + "schematic_measures": { + "vo1": 1.530562, + "vo2": 1.530562, + "idd": 2.675617e-05, + "vos_in": 0.0, + "gain_lf": 8.509626, + "f3db": 76882420.0, + "ugf": 190754500.0 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/specs.json new file mode 100644 index 00000000..cb555fcb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/specs.json @@ -0,0 +1,23 @@ +{ + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 46130000.0 + }, + "_frozen_from": { + "schematic": { + "gain_lf": 8.509626, + "f3db": 76882420.0 + }, + "floors": { + "gain_lf": { + "min": 6.0 + }, + "f3db": { + "min": 1000000.0 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..c668c913 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target.spice @@ -0,0 +1,9 @@ +.subckt C17_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..635f3655 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/target_lvs.spice @@ -0,0 +1,54 @@ +.subckt C17_sky130_sW2_sL2 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 +XM1_f0 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f4 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f5 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f6 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f7 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f8 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f9 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f10 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f11 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f12 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f13 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f14 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f15 VOUT1 VIN1 net07 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f1 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f2 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f3 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f4 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f5 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f6 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f7 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f8 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f9 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f10 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f11 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f12 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f13 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f14 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f15 VOUT2 VIN2 net09 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f0 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f12 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f13 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f14 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f15 net06 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XRR1 VDD VOUT1 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR2 VDD VOUT2 VSS sky130_fd_pr__res_high_po_0p35 l=17.55 mult=1 +XRR3 net07 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +XRR4 net09 net06 VSS sky130_fd_pr__res_high_po_0p35 l=1.25 mult=1 +.ends C17_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..fadc5b01 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C17/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,39 @@ +X1 VDD VSS VIN1 VIN2 VOUT1 VOUT2 VB1 C17_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VSS VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 +IB_VB1 VDDB VB1 4e-05 +VCM VCM 0 0.9 +* differential DC servo (disclosed test auxiliary, same form as the single-ended OTA servo): an input offset +* VOSI = -0.5 tanh(2e4 (VOUT2 - VOUT1)), low-passed at 0.16 uHz, is added to the differential input, so the open-loop +* gain is measured at the balanced operating point (without it, a sub-mV systematic offset from +* extracted wiring resistance moves the outputs by hundreds of mV at 60-70 dB gain). vos_in reports that offset. +* Sign: V(VOUT2) - V(VOUT1) = +A (V(VIN1) - V(VIN2)) for this topology, so the servo term is negative feedback. +BDSV VDSV 0 V = -0.5*tanh(2e4*(v(VOUT2)-v(VOUT1))) +RDSV VDSV VOSI 1e3 +CDSV VOSI 0 1e3 +BXD VX 0 V = v(VD) + v(VOSI) +EIN1 VIN1 VCM VX 0 0.5 +EIN2 VIN2 VCM VX 0 -0.5 +VD VD 0 dc 0 ac 1 +CL1 VOUT1 0 1e-13 +CL2 VOUT2 0 1e-13 +.control +op +let vo1 = v(VOUT1) +let vo2 = v(VOUT2) +let idd = -i(VDD) +let vos_in = v(VOSI) +print vo1 vo2 idd vos_in +ac dec 20 10 100G +let vdiff = v(VOUT2)-v(VOUT1) +let gdb = db(vdiff) +meas ac gain_lf find gdb at=100 +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +meas ac ugf when gdb=0 cross=1 +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..bf59e85b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C18_gf180_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.84, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.84, + "nf": 32 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eb34481d183ffc94", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..f40e8811 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "d5602bf5654725f2a65c08ab7b9a9fbdfdd30eaccf09fcde346a920b8bf66a9d", + "qualification.json": "81110ef763e54ccdcb81f9b477528afefa90c5e253d0946f46794c546cd1d94d", + "specs.json": "1e0da95a13be2a2dca43e416ce51d2594a72cac4ba5e2114e69b1828eb094506", + "target.spice": "0de5bbd32dfe02c24beb7004a7ba33545308a18edfb394ca25188cbdd11be526", + "target_lvs.spice": "59434ade9cd7f9c21d0de1fc1de3c0c558df9480b0ad98598da249f9c4d22739", + "testbench.spice": "c08f5607b71b901f4ecc3a86864a5e32b8cf4fc1471561262446fbcf8042bb0c" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..ff1bf48d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.84, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "eb34481d183ffc94", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=21.36 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 10680000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 21.3568, + "iq": 4.128334e-05, + "f3db": 17806850.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.0, + "schematic_measures": { + "vout0": 1.706328, + "vin0": 1.49, + "iq": 4.128334e-05, + "gain_lf": -22.93675, + "f3db": 17806850.0, + "gmid": 0.07130919, + "vo_a": 1.690331, + "vo_b": 1.690331, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 21.3568 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..27c02df2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 10680000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 21.3568, + "iq": 4.128334e-05, + "f3db": 17806850.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..506be7ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=1u l=0.84u nf=2 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=2u l=0.84u nf=4 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=16u l=0.84u nf=32 m=1 +.ends C18_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..dd8c4b28 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_gf180_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +.ends C18_gf180_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..76da906f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/case.json new file mode 100644 index 00000000..8b85b14a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C18_gf180_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.56, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.56, + "nf": 32 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "faa3188fe532f1da", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..7ce59015 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "213b205ce6699abc220a7efc8c66e3a2702501ab9d1b75b74235479fc6963228", + "qualification.json": "2d70cc774b4732e87ce89f405b54ea12b6cf10a7d6a24cbe52f1fb7bb85ff9e5", + "specs.json": "9f9f84f232b55450f11cabae2ef08f73a415c2ac56f42dca6f9f55d46a2ba32c", + "target.spice": "54a77576d58f06db6a5c2ad6cdee7bf568d1b4a6eb26ae6bc99561d3be19e65e", + "target_lvs.spice": "14a4a879d5e7bad54ed7c54e9d819e66cddbb44ffb540b87f11cd62874f30709", + "testbench.spice": "165882a5e6e14e944913d2e4e508b415b7fcae8e35b9b04283bc5f75356ff3cf" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..906905d7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.56, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "faa3188fe532f1da", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=26.94 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14570000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 26.9362, + "iq": 5.295894e-05, + "f3db": 24278360.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.1, + "schematic_measures": { + "vout0": 1.656175, + "vin0": 1.412015, + "iq": 5.295894e-05, + "gain_lf": -19.35979, + "f3db": 24278360.0, + "gmid": 0.107644, + "vo_a": 1.635907, + "vo_b": 1.635907, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 26.9362 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/specs.json new file mode 100644 index 00000000..a05065d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14570000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 26.9362, + "iq": 5.295894e-05, + "f3db": 24278360.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target.spice new file mode 100644 index 00000000..10a5bb43 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=1u l=0.56u nf=2 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=2u l=0.56u nf=4 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=16u l=0.56u nf=32 m=1 +.ends C18_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..4ae365af --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_gf180_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +.ends C18_gf180_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..ff18d370 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/case.json new file mode 100644 index 00000000..07a18c8d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C18_gf180_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 1.12, + "nf": 32 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0b54a83843c05712", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..899fe6bc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "95c821f0e693ccb257837cfda2788ff57efce1e18dfa84311c3fa80c3ad88274", + "qualification.json": "c1ccfd1ddbab634fda8f9545c909d1c2a7db38574b7c75f7406aca6818637705", + "specs.json": "3fb5ccf7797df7f50db4145695c93edc236c15d0a1e4e280cc19db98205d4a60", + "target.spice": "be4e4504f842620c33a45987795624519f52d9f7b746041ad1f5df5337495246", + "target_lvs.spice": "76d5dcba2ac84342d757bec49d6754daeb04481fc9efe3f1c6cac41c806db809", + "testbench.spice": "80601bc9bc0098619af864565df0932a3d81d526bc5661a36c98271ed830205b" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..1bcb6173 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_gf180_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 1.12, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "0b54a83843c05712", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=1.725938 target=1.65 (tol 0.066 V)", + "thd_pct=20.72 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 8494000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 20.7249, + "iq": 3.33925e-05, + "f3db": 14157280.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 1.1, + "schematic_measures": { + "vout0": 1.725938, + "vin0": 1.49, + "iq": 3.33925e-05, + "gain_lf": -23.87583, + "f3db": 14157280.0, + "gmid": 0.06400154, + "vo_a": 1.711236, + "vo_b": 1.711236, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 20.7249 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/specs.json new file mode 100644 index 00000000..8a77ac2a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 8494000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 20.7249, + "iq": 3.33925e-05, + "f3db": 14157280.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target.spice new file mode 100644 index 00000000..3b691bc0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=1u l=1.12u nf=2 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=2u l=1.12u nf=4 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=16u l=1.12u nf=32 m=1 +.ends C18_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..f7e6bb04 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_gf180_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +.ends C18_gf180_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..7134f9e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW0.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=2u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..05745581 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C18_gf180_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.84, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.84, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.84, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.84, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.84, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.84, + "nf": 96 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.84, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.84, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.84, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.84, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "48bcd1ee0b1f064e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..133d87a6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "71dcf2bd761ed601af527de4b3a807e56820384c99e7b0fdc315bcbc300a6ea2", + "qualification.json": "c2145ed5698f61f05fa16ec72284c854a97d28eb870a1ce4e499d1150cbf8e7b", + "specs.json": "df76c38b224aa2ceb28e5d8c5c2eb0c05a4dcab5c88d8874a8c2d139ae17191d", + "target.spice": "6314b051ac2ff9f0f6a554e820b908af5997628cdb395ac4dadd8f28d12033b3", + "target_lvs.spice": "c430ad4ea202def38da0755891b43c24f938148eee0e9dbbdf0ce2e1475c45fb", + "testbench.spice": "8cdc972da893d6345177cda48116bac673787a6d243c9ae28b291d4ce4fcd587" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..770f3513 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.84, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.84, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.84, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.84, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.84, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.84, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "48bcd1ee0b1f064e", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=38.76 above floor 3", + "out_swing=0.4003 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 19190000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 38.7588, + "iq": 5.853009e-05, + "f3db": 31984040.0, + "out_swing": 0.400254 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.1, + "schematic_measures": { + "vout0": 1.650572, + "vin0": 1.046996, + "iq": 5.853009e-05, + "gain_lf": -7.898394, + "f3db": 31984040.0, + "gmid": 0.4027752, + "vo_a": 2.025529, + "vo_b": 1.625275, + "out_swing": 0.400254, + "vamp2": 0.2482673, + "thd_pct": 38.7588 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..af601a6a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 19190000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 38.7588, + "iq": 5.853009e-05, + "f3db": 31984040.0, + "out_swing": 0.400254 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..423a5cc8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=3u l=0.84u nf=6 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=6u l=0.84u nf=12 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=12u l=0.84u nf=24 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=24u l=0.84u nf=48 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=24u l=0.84u nf=48 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=48u l=0.84u nf=96 m=1 +.ends C18_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..3ef03d3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_gf180_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +.ends C18_gf180_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..b732cd3f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/case.json new file mode 100644 index 00000000..f2a97e49 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C18_gf180_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.56, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.56, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.56, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.56, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.56, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.56, + "nf": 96 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.56, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.56, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.56, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.56, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9d239e397e692f04", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..94b3bd5f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c676d354aff450c6ac3936548b94ace6ac61c8a2953131afebbcbafa7f10302b", + "qualification.json": "c5e58dc745000855ec91219933f81f39c9ef0cf3db063ad15c2f3853983de1bf", + "specs.json": "1eaca97f6fdf57029f101beb64dfb7524d35ae97917cdc937c5d8ec1584a8573", + "target.spice": "a899a204c596565696f80f87935f2f67fac062d3d8afa6fe4497bc0df8db268a", + "target_lvs.spice": "c9f2e691b8b38b60afd7c11620d306e8bf1c4d970d893aa84fb048196a31c890", + "testbench.spice": "655c9afa2b15528e09145cb3f1968247439d614440e9e648b0c859a8155290c4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..1b128fde --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.56, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.56, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.56, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.56, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.56, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.56, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "9d239e397e692f04", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=28.89 above floor 3", + "out_swing=0.3135 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14450000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 28.8929, + "iq": 6.122585e-05, + "f3db": 24088320.0, + "out_swing": 0.313468 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.0, + "schematic_measures": { + "vout0": 1.649173, + "vin0": 0.9080044, + "iq": 6.122585e-05, + "gain_lf": 10.93205, + "f3db": 24088320.0, + "gmid": 3.528578, + "vo_a": 1.935532, + "vo_b": 1.622064, + "out_swing": 0.313468, + "vamp2": 0.02840501, + "thd_pct": 28.8929 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/specs.json new file mode 100644 index 00000000..572f4608 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14450000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 28.8929, + "iq": 6.122585e-05, + "f3db": 24088320.0, + "out_swing": 0.313468 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target.spice new file mode 100644 index 00000000..953deb84 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=3u l=0.56u nf=6 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=6u l=0.56u nf=12 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=12u l=0.56u nf=24 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=24u l=0.56u nf=48 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=24u l=0.56u nf=48 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=48u l=0.56u nf=96 m=1 +.ends C18_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..acfb8267 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_gf180_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +.ends C18_gf180_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..7dc0c204 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/case.json new file mode 100644 index 00000000..fd068ae7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C18_gf180_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 1.12, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 1.12, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 1.12, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 1.12, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 1.12, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 1.12, + "nf": 96 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 1.12, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 1.12, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 1.12, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 1.12, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8e140a0f707bbdcc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..8ae3195e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "37c7d7aac0ce51a9b58512aa71eb93a1a997d34d18e5daf322c330e221f13f11", + "qualification.json": "6a9e138ccfe61f3662dea8d4296d5f2d61d672d7f6843acea1cee997800ac498", + "specs.json": "a132721eeb54d72d8b9af9f6cfd425dfc6466411d3bf688040d1eb8d3de15102", + "target.spice": "d27067fbe7e0f00c2d12182a95fbd814ea7d4adb60b44e30a554b514ad96c470", + "target_lvs.spice": "598da6034596f0eb2eb5e246dc42ae9b4122c6a6ff6b2e5ecf6ba58ed54f37cb", + "testbench.spice": "e1f354c91f945f52396db1721f6908896c31dc82abc870ffd10be5eba2154333" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..6a9ec5b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 1.12, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 1.12, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 1.12, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 1.12, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 1.12, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 1.12, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "8e140a0f707bbdcc", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=33.01 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17570000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 33.0134, + "iq": 5.690205e-05, + "f3db": 29290630.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.1, + "schematic_measures": { + "vout0": 1.65395, + "vin0": 1.319204, + "iq": 5.690205e-05, + "gain_lf": -19.75458, + "f3db": 29290630.0, + "gmid": 0.1028636, + "vo_a": 1.63726, + "vo_b": 1.63726, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 33.0134 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/specs.json new file mode 100644 index 00000000..1901edf8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17570000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 33.0134, + "iq": 5.690205e-05, + "f3db": 29290630.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target.spice new file mode 100644 index 00000000..ee82c236 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=3u l=1.12u nf=6 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=6u l=1.12u nf=12 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=12u l=1.12u nf=24 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=24u l=1.12u nf=48 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=24u l=1.12u nf=48 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=48u l=1.12u nf=96 m=1 +.ends C18_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..c9768e10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_gf180_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +.ends C18_gf180_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..1148bc56 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=6u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/case.json new file mode 100644 index 00000000..f4fdccc0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C18_gf180_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.84, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.84, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.84, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.84, + "nf": 64 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f69b009192ebadc8", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..bcf401b6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1bddd1da70f8bc384de45da4bec55879044f6059280325548ac0b822274a799e", + "qualification.json": "eafd838a3a41ed2da5da7bcf7f4883a0fc709c5ba63c86b2e50a02a650a37b60", + "specs.json": "72ab025108f4c07eea28147c1810810577a423a0f28f1daafb6e80b1ead60a82", + "target.spice": "5aa71d7c308ac1a7cb23afb8247cb66bf17e82da0eeb192387834b7b708b0c8b", + "target_lvs.spice": "87bfa3873a18c51d40238e7358fc81b2ff6539c48038cccf5020519b19b82f6a", + "testbench.spice": "e067938af14bd4fa32c19588ca5ccde44a1d4c03a58451918116d688c3e0deef" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..1ca89191 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.84, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f69b009192ebadc8", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=29.98 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17060000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 29.979, + "iq": 5.600763e-05, + "f3db": 28436200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.1, + "schematic_measures": { + "vout0": 1.654657, + "vin0": 1.355626, + "iq": 5.600763e-05, + "gain_lf": -19.89406, + "f3db": 28436200.0, + "gmid": 0.1012222, + "vo_a": 1.637144, + "vo_b": 1.637144, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 29.979 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/specs.json new file mode 100644 index 00000000..2ba4191f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17060000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 29.979, + "iq": 5.600763e-05, + "f3db": 28436200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target.spice new file mode 100644 index 00000000..7b17d6e1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=2u l=0.84u nf=4 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=4u l=0.84u nf=8 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=8u l=0.84u nf=16 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=16u l=0.84u nf=32 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=16u l=0.84u nf=32 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=32u l=0.84u nf=64 m=1 +.ends C18_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8a846d5b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_gf180_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +.ends C18_gf180_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..8ccbcff5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/case.json new file mode 100644 index 00000000..a062151c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C18_gf180_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.56, + "nf": 64 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "80490b484f82087d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/manifest.json new file mode 100644 index 00000000..550c350e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8ff95f588d475c5b15e173f6469720cc1ca0d063a6660028b5597739c52f5ad4", + "qualification.json": "54bb419fe45d19958b61229a32ae37733c0163830668db63f7f09aac82a0b030", + "specs.json": "8ba62e07ed29b882ee8275c1cda934dfbcb1892a39b1da9421bb8408e9f08318", + "target.spice": "86339751f6b57f4459f5d96fda4f4208166f58ec8f9cbdc3388d5f93055655b4", + "target_lvs.spice": "58027fb64bb0759e4f899c18c79fed7f3b7026390286220f8f38078d4598383d", + "testbench.spice": "799dacf22bcfe6dec4236af9f2e89e99d7992816247420d66728dd1887b635c5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/qualification.json new file mode 100644 index 00000000..8471a6ac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.56, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "80490b484f82087d", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=32.9 above floor 3", + "out_swing=0.4151 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 19870000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 32.8993, + "iq": 5.918492e-05, + "f3db": 33112140.0, + "out_swing": 0.41509 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.0, + "schematic_measures": { + "vout0": 1.650088, + "vin0": 0.9988306, + "iq": 5.918492e-05, + "gain_lf": -0.8197628, + "f3db": 33112140.0, + "gmid": 0.9100092, + "vo_a": 2.033717, + "vo_b": 1.618627, + "out_swing": 0.41509, + "vamp2": 0.1098976, + "thd_pct": 32.8993 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/specs.json new file mode 100644 index 00000000..00172c3b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 19870000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 32.8993, + "iq": 5.918492e-05, + "f3db": 33112140.0, + "out_swing": 0.41509 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target.spice new file mode 100644 index 00000000..881f2f4d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=2u l=0.56u nf=4 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=4u l=0.56u nf=8 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=8u l=0.56u nf=16 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=16u l=0.56u nf=32 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=16u l=0.56u nf=32 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=32u l=0.56u nf=64 m=1 +.ends C18_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..09cf77e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_gf180_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +.ends C18_gf180_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/testbench.spice new file mode 100644 index 00000000..ac13245e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/case.json new file mode 100644 index 00000000..28507d07 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW1_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C18_gf180_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 1.12, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 1.12, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 1.12, + "nf": 64 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5cf5566114aeb37e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/manifest.json new file mode 100644 index 00000000..82e476b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8f2b410344fb5a3fd00ff943ce7d347c0cdca7ba7129e4b0515a52fbe12fad66", + "qualification.json": "5cfd7cc28230fe4590df9aa4e3016aac3b6c622c1ac1785d93be7a21f2fdebe5", + "specs.json": "31f453ca0790d36de84e82e14583cd98da56845d9ed69cad1e563dd4752daff8", + "target.spice": "cae5c86ced32a8374f0d455a5851a00933ffc87dcc39526269e246cfabe3daf6", + "target_lvs.spice": "fa3fed4c19387faa7c01bb6f4973e665efd1a7175a5254f6d00942406edb71a3", + "testbench.spice": "30a34ad2760fac4ace37021572e06c6b56bcc3efca483e6c7efa4456a66dfe78" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/qualification.json new file mode 100644 index 00000000..0d4a16b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW1_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 1.12, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5cf5566114aeb37e", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=21.38 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14190000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 21.3766, + "iq": 5.028947e-05, + "f3db": 23652200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.2, + "schematic_measures": { + "vout0": 1.683178, + "vin0": 1.489998, + "iq": 5.028947e-05, + "gain_lf": -23.77753, + "f3db": 23652200.0, + "gmid": 0.0647298, + "vo_a": 1.668788, + "vo_b": 1.668788, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 21.3766 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/specs.json new file mode 100644 index 00000000..af04e48b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14190000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 21.3766, + "iq": 5.028947e-05, + "f3db": 23652200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target.spice new file mode 100644 index 00000000..42e1f363 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=2u l=1.12u nf=4 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=4u l=1.12u nf=8 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=8u l=1.12u nf=16 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=16u l=1.12u nf=32 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=16u l=1.12u nf=32 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=32u l=1.12u nf=64 m=1 +.ends C18_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..3c4cdecd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_gf180_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +.ends C18_gf180_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/testbench.spice new file mode 100644 index 00000000..a4accccc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW1_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=4u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/case.json new file mode 100644 index 00000000..18dbd536 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C18_gf180_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.84, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.84, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.84, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.84, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.84, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.84, + "nf": 128 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.84, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "37371290d4270b9f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..10c55f50 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "39ff68eb314cfd04484f7042a0f6c2794204d2136de026a297c450d5cdb11c35", + "qualification.json": "c9aae834928c9f82afa2136d12f90c8435262828a0f4bd7cf967616f17e62b42", + "specs.json": "df05babb014ea14944520be075ef12134523f3471004b7251cf326e2969063ef", + "target.spice": "2acdf8aea07f5dbea19ff0f8b0b488761c8b195b61f8aaf60bffb7808f8327e2", + "target_lvs.spice": "e3757ac7e49fdc8992d4ada6c99d6fa5571a15c85fa58e80fbfdd49898cd5d2b", + "testbench.spice": "a370f8f784d6722e6f6c16939d01aa33c4229fe741e87443cff98760dd690ccc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..2810b045 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.84, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.84, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.84, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.84, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.84, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "37371290d4270b9f", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=33.43 above floor 3", + "out_swing=0.3971 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 16840000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 33.43, + "iq": 5.946696e-05, + "f3db": 28070750.0, + "out_swing": 0.397109 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 4.2, + "schematic_measures": { + "vout0": 1.649532, + "vin0": 0.9433282, + "iq": 5.946696e-05, + "gain_lf": 0.1937598, + "f3db": 28070750.0, + "gmid": 1.022776, + "vo_a": 2.020227, + "vo_b": 1.623118, + "out_swing": 0.397109, + "vamp2": 0.09779395, + "thd_pct": 33.43 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/specs.json new file mode 100644 index 00000000..e56a4408 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 16840000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 33.43, + "iq": 5.946696e-05, + "f3db": 28070750.0, + "out_swing": 0.397109 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target.spice new file mode 100644 index 00000000..4e4ad6d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=4u l=0.84u nf=8 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=8u l=0.84u nf=16 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=16u l=0.84u nf=32 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=32u l=0.84u nf=64 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=32u l=0.84u nf=64 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=64u l=0.84u nf=128 m=1 +.ends C18_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a2a66c14 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_gf180_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f6 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM1_f7 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.84u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f12 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f13 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f14 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM2_f15 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.84u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f24 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f25 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f26 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f27 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f28 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f29 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f30 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM3_f31 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.84u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f48 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f49 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f50 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f51 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f52 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f53 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f54 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f55 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f56 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f57 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f58 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f59 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f60 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f61 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f62 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM4_f63 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.84u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f48 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f49 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f50 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f51 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f52 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f53 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f54 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f55 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f56 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f57 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f58 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f59 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f60 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f61 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f62 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM5_f63 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.84u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f96 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f97 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f98 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f99 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f100 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f101 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f102 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f103 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f104 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f105 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f106 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f107 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f108 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f109 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f110 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f111 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f112 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f113 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f114 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f115 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f116 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f117 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f118 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f119 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f120 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f121 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f122 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f123 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f124 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f125 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f126 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +MM6_f127 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.84u +.ends C18_gf180_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..800a3620 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=0.84u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/case.json new file mode 100644 index 00000000..2b3d05b2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW2_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C18_gf180_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.56, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.56, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.56, + "nf": 128 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.56, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "051218102f694e22", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/manifest.json new file mode 100644 index 00000000..1c135abd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "17bf8858ea15bdabc98ff383f81d39e181982968aa5635ddf64a5e911146bd51", + "qualification.json": "fa632f2acdb46f72414d17a0fd72beb06b4d2e7d88cc22b8cbe5a927d079ccac", + "specs.json": "d5a9b75287de9f9ace4fe9a5b33670e3793782f8dd0362c30c7733b87f9c79b6", + "target.spice": "9955de1aa3dc1f44588bd3600519e59427e26df11bcdf2b5f034e039f36e5993", + "target_lvs.spice": "b40ce2682bbc8e170f236aa35465e7f32462f267da1509646b6064b7411c168c", + "testbench.spice": "ece74341ef72ed7bbe3716590291242ef266dc90b48bcde85787e6cd9aa7bcfc" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/qualification.json new file mode 100644 index 00000000..9a4feba6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW2_sL1", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.56, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.56, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.56, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.56, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.56, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "051218102f694e22", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=26.61 above floor 3", + "out_swing=0.2552 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 7414000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 26.6068, + "iq": 6.284896e-05, + "f3db": 12356960.0, + "out_swing": 0.2552 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 3.6, + "schematic_measures": { + "vout0": 1.648752, + "vin0": 0.8676934, + "iq": 6.284896e-05, + "gain_lf": 18.96702, + "f3db": 12356960.0, + "gmid": 8.936743, + "vo_a": 1.875164, + "vo_b": 1.619964, + "out_swing": 0.2552, + "vamp2": 0.01126289, + "thd_pct": 26.6068 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/specs.json new file mode 100644 index 00000000..2ad910d2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 7414000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 26.6068, + "iq": 6.284896e-05, + "f3db": 12356960.0, + "out_swing": 0.2552 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target.spice new file mode 100644 index 00000000..825613d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=4u l=0.56u nf=8 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=8u l=0.56u nf=16 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=16u l=0.56u nf=32 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=32u l=0.56u nf=64 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=32u l=0.56u nf=64 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=64u l=0.56u nf=128 m=1 +.ends C18_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..7409269b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_gf180_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f6 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM1_f7 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=0.56u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f12 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f13 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f14 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM2_f15 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=0.56u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f24 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f25 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f26 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f27 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f28 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f29 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f30 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM3_f31 net9 net9 net22 VSS nfet_03v3 w=0.5u l=0.56u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f48 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f49 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f50 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f51 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f52 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f53 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f54 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f55 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f56 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f57 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f58 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f59 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f60 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f61 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f62 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM4_f63 net13 net13 net22 VDD pfet_03v3 w=0.5u l=0.56u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f48 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f49 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f50 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f51 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f52 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f53 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f54 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f55 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f56 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f57 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f58 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f59 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f60 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f61 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f62 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM5_f63 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=0.56u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f96 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f97 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f98 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f99 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f100 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f101 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f102 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f103 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f104 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f105 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f106 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f107 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f108 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f109 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f110 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f111 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f112 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f113 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f114 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f115 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f116 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f117 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f118 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f119 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f120 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f121 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f122 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f123 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f124 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f125 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f126 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +MM6_f127 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=0.56u +.ends C18_gf180_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/testbench.spice new file mode 100644 index 00000000..6d3fa1c3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=0.56u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/case.json new file mode 100644 index 00000000..1cccab9d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_gf180_sW2_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C18_gf180_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 1.12, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 1.12, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 1.12, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 1.12, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 1.12, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 1.12, + "nf": 128 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 1.12, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5289f1065a71db6a", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/manifest.json new file mode 100644 index 00000000..cd0c4b6d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "dadbdfcf7684608753f7e63f2655457723402caa17c587c6b1258426aad72f06", + "qualification.json": "f1ba2c64318cf178eabf9b3784c3eaf3ad5c3f0f7808c5ca4cc90822f4552fec", + "specs.json": "558929cb4025f25c4781226f7cffd883e9c873ab8b60c728ca3f2b2eefd60c5f", + "target.spice": "bdf7c0ecfb30cf21166600591ea3bac6430dced74770dbe28999ccd76cd40b39", + "target_lvs.spice": "6fada85e15cad200de569ffd81626dbff427485fbac59e44e8db0a16c4e436e8", + "testbench.spice": "c43ef869e2a90a9ea7307efeb9be8b3b4fc0040a7ca5a8e5737dbd02a5de3078" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/qualification.json new file mode 100644 index 00000000..dc713c70 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_gf180_sW2_sL2", + "circuit_id": "C18", + "pdk": "gf180", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.56, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 1.12, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.56, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 1.12, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.56, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 1.12, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.56, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 1.12, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.56, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 1.12, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "5289f1065a71db6a", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=42.28 above floor 3", + "out_swing=0 below floor 0.825" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17710000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 42.2833, + "iq": 5.833965e-05, + "f3db": 29518230.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 2.8, + "schematic_measures": { + "vout0": 1.650887, + "vin0": 1.07775, + "iq": 5.833965e-05, + "gain_lf": -10.80582, + "f3db": 29518230.0, + "gmid": 0.2882045, + "vo_a": 1.628495, + "vo_b": 1.628495, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 42.2833 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/specs.json new file mode 100644 index 00000000..0a9b77b0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17710000.0 + }, + "out_swing": { + "min": 0.825 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 42.2833, + "iq": 5.833965e-05, + "f3db": 29518230.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.825 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target.spice new file mode 100644 index 00000000..71648822 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1 net13 VIN1 VSS VSS nfet_03v3 w=4u l=1.12u nf=8 m=1 +MM2 net9 VB1 VDD VDD pfet_03v3 w=8u l=1.12u nf=16 m=1 +MM3 net9 net9 net22 VSS nfet_03v3 w=16u l=1.12u nf=32 m=1 +MM4 net13 net13 net22 VDD pfet_03v3 w=32u l=1.12u nf=64 m=1 +MM5 VDD net9 VOUT1 VSS nfet_03v3 w=32u l=1.12u nf=64 m=1 +MM6 VSS net13 VOUT1 VDD pfet_03v3 w=64u l=1.12u nf=128 m=1 +.ends C18_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..76985f74 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_gf180_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +MM1_f0 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f1 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f2 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f3 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f4 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f5 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f6 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM1_f7 net13 VIN1 VSS VSS nfet_03v3 w=0.5u l=1.12u +MM2_f0 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f1 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f2 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f3 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f4 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f5 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f6 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f7 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f8 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f9 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f10 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f11 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f12 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f13 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f14 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM2_f15 net9 VB1 VDD VDD pfet_03v3 w=0.5u l=1.12u +MM3_f0 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f1 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f2 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f3 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f4 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f5 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f6 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f7 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f8 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f9 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f10 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f11 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f12 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f13 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f14 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f15 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f16 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f17 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f18 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f19 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f20 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f21 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f22 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f23 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f24 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f25 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f26 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f27 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f28 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f29 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f30 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM3_f31 net9 net9 net22 VSS nfet_03v3 w=0.5u l=1.12u +MM4_f0 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f1 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f2 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f3 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f4 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f5 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f6 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f7 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f8 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f9 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f10 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f11 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f12 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f13 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f14 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f15 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f16 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f17 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f18 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f19 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f20 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f21 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f22 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f23 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f24 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f25 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f26 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f27 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f28 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f29 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f30 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f31 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f32 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f33 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f34 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f35 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f36 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f37 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f38 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f39 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f40 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f41 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f42 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f43 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f44 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f45 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f46 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f47 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f48 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f49 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f50 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f51 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f52 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f53 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f54 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f55 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f56 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f57 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f58 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f59 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f60 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f61 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f62 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM4_f63 net13 net13 net22 VDD pfet_03v3 w=0.5u l=1.12u +MM5_f0 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f1 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f2 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f3 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f4 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f5 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f6 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f7 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f8 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f9 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f10 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f11 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f12 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f13 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f14 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f15 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f16 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f17 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f18 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f19 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f20 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f21 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f22 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f23 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f24 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f25 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f26 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f27 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f28 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f29 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f30 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f31 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f32 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f33 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f34 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f35 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f36 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f37 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f38 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f39 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f40 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f41 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f42 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f43 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f44 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f45 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f46 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f47 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f48 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f49 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f50 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f51 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f52 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f53 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f54 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f55 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f56 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f57 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f58 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f59 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f60 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f61 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f62 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM5_f63 VDD net9 VOUT1 VSS nfet_03v3 w=0.5u l=1.12u +MM6_f0 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f1 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f2 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f3 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f4 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f5 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f6 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f7 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f8 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f9 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f10 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f11 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f12 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f13 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f14 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f15 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f16 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f17 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f18 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f19 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f20 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f21 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f22 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f23 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f24 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f25 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f26 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f27 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f28 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f29 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f30 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f31 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f32 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f33 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f34 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f35 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f36 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f37 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f38 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f39 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f40 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f41 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f42 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f43 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f44 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f45 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f46 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f47 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f48 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f49 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f50 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f51 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f52 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f53 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f54 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f55 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f56 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f57 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f58 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f59 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f60 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f61 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f62 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f63 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f64 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f65 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f66 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f67 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f68 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f69 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f70 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f71 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f72 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f73 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f74 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f75 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f76 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f77 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f78 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f79 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f80 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f81 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f82 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f83 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f84 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f85 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f86 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f87 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f88 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f89 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f90 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f91 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f92 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f93 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f94 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f95 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f96 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f97 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f98 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f99 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f100 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f101 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f102 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f103 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f104 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f105 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f106 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f107 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f108 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f109 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f110 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f111 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f112 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f113 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f114 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f115 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f116 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f117 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f118 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f119 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f120 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f121 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f122 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f123 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f124 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f125 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f126 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +MM6_f127 VSS net13 VOUT1 VDD pfet_03v3 w=0.5u l=1.12u +.ends C18_gf180_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/testbench.spice new file mode 100644 index 00000000..a911afd7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/gf180/sW2_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_gf180_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 3.3 +VSS VSS 0 0 +VDDB VDDB 0 3.3 +MB_VB1 VB1 VB1 VDDB VDDB pfet_03v3 w=8u l=1.12u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 1.65 +VMID VMID 0 1.65 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.99 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..253dc034 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C18_ihp130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.39, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.39, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "08b310978ed647bb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..19994086 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0548d1b42d16f94d7d192be12361804ae3931e2f31dbb2a5944573c6be45ce63", + "qualification.json": "53cdea33db75976fc2f9c6f37c6478b7fabf88989c3ceac784bf0e6776765761", + "specs.json": "52818eb57b58522e8a51180339cc386aac2e2157195894d8a671fa02e5110a0a", + "target.spice": "e2ec0a0600165b608934641e4fd9461cb73bf12e05eddbb7503a06c46a7d1b36", + "target_lvs.spice": "f6a1d7dff8734ad571a78fe748a29f65f41f0fe803be5677f176d1eb5f022832", + "testbench.spice": "82c182f67353f33c89bdb22c227e0b4ee35fd8e9de906f275db34e23b45de4e7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..c746215e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.39, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "08b310978ed647bb", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=40.33 above floor 3", + "out_swing=0 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 20120000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 40.3251, + "iq": 4.742868e-05, + "f3db": 33525560.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 23.8, + "schematic_measures": { + "vout0": 0.6118055, + "vin0": 0.8511827, + "iq": 4.742868e-05, + "gain_lf": -27.96005, + "f3db": 33525560.0, + "gmid": 0.0399938, + "vo_a": 0.6068152, + "vo_b": 0.6068152, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 40.3251 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..8f16ae43 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 20120000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 40.3251, + "iq": 4.742868e-05, + "f3db": 33525560.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..3d9f1653 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.39u ng=2 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=2u l=0.39u ng=4 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +.ends C18_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..dc5cceb9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_ihp130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C18_ihp130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..c54aad68 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/case.json new file mode 100644 index 00000000..8e491b65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C18_ihp130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.26, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.26, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "28b505f9731bf2c0", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..d1dba261 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "eac5a0019fddb687c032f09475aae9c99928a2e38e5feaf7d9f04a90e052c090", + "qualification.json": "36bd2e767795f113fa567fa8f80d4179d4ce32f9d6146ab6b2f4b0255e592b92", + "specs.json": "d2cd153a19eca2e5bdd657dc93c0a561985d2206bf2111b57a8cc80942490d09", + "target.spice": "88a5a8bf1a3f27462706afba32d6f395729fa455f357edff080f9b4767220c6e", + "target_lvs.spice": "9446cba31931b8b58336716200a75176b81049a8812fda9f95fef1c1e0c0f02a", + "testbench.spice": "27e26fdfd7834b434dae69fdc84c0643f6906ad7384bf0292b2073089a7f3211" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..6aa7645b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.26, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "28b505f9731bf2c0", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=54.68 above floor 3", + "out_swing=0 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 21840000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 54.6817, + "iq": 4.628699e-05, + "f3db": 36399540.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 74.6, + "schematic_measures": { + "vout0": 0.6043479, + "vin0": 0.7105812, + "iq": 4.628699e-05, + "gain_lf": -21.08209, + "f3db": 36399540.0, + "gmid": 0.08828463, + "vo_a": 0.5972281, + "vo_b": 0.5972281, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 54.6817 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..8f742fb5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 21840000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 54.6817, + "iq": 4.628699e-05, + "f3db": 36399540.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..ff201b4e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.26u ng=2 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=2u l=0.26u ng=4 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +.ends C18_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..9368741b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_ihp130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C18_ihp130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..3d5d1b83 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/case.json new file mode 100644 index 00000000..0b88b6f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C18_ihp130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.52, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.52, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "97e6c10759926681", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..96edc13f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "e0d37b476638441a4c56f8a9457b7573c81981e51f9eb0297cbeb79c87410c7f", + "qualification.json": "bb0eeb721e3883a2c42898a4582e64dcf123aeaa6badce4cc93b23834b742cb7", + "specs.json": "e8421b7e3b586325f6b5582d0477885a1a176bc73b6fda3f5a610be9a044ae2e", + "target.spice": "1a3eb5518e484ae1746d56943c41a2025312f7a3875649939eaf2a1402f64cdc", + "target_lvs.spice": "1fcc126db51b0525716c844cade07acadca3cc532b4bd9dd50b2dd12eac71d84", + "testbench.spice": "7101dfee19948a3d95355802e142f55abf0a2623b1a859c37d8c9b2a52700ddd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..02bbccf0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.52, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "97e6c10759926681", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=36.63 above floor 3", + "out_swing=0 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17850000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 36.632, + "iq": 4.446401e-05, + "f3db": 29750080.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.0, + "schematic_measures": { + "vout0": 0.6217032, + "vin0": 0.8598303, + "iq": 4.446401e-05, + "gain_lf": -28.082, + "f3db": 29750080.0, + "gmid": 0.03943634, + "vo_a": 0.6164709, + "vo_b": 0.6164709, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 36.632 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..6ac82a41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17850000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 36.632, + "iq": 4.446401e-05, + "f3db": 29750080.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..a8d3e0d8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=1u l=0.52u ng=2 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=2u l=0.52u ng=4 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +.ends C18_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..41d135b5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_ihp130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C18_ihp130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..20686377 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW0.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=2u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..f9f09bdb --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C18_ihp130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.39, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.39, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.39, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.39, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.39, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.39, + "nf": 96 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.39, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "73e69a61ee8d4e8d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..fc73773d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "005dcb7e1c524bd15fa234020b35741e0d7e8298ffd5bc214448b71449601a3b", + "qualification.json": "f4a6b6ef14c2e848132fcfe527bf33bd9d9cc5163afe0ad513dee83645c94f77", + "specs.json": "6506bc7b41d3592d2fabc3967bd2d28d782c8e5749174311ae83fd33a50aa5c9", + "target.spice": "da355dbfd5eb3d65a6ab0c66d63eadc87abebf4dc0cb631b399dde07f2fee16c", + "target_lvs.spice": "56a368858abfaf6a8fe8f953f3333f5aa107d3731489afa1208090d8c4adbbdd", + "testbench.spice": "7be44a40150981d541b992f02bfa67c6bf065e62b8baa65ea413e445f86ea24f" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..d9e5e148 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.39, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.39, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.39, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.39, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.39, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "73e69a61ee8d4e8d", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=31.37 above floor 3", + "out_swing=0.228 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 36530000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.3697, + "iq": 6.579642e-05, + "f3db": 60880530.0, + "out_swing": 0.2279786 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 64.7, + "schematic_measures": { + "vout0": 0.6012279, + "vin0": 0.4803811, + "iq": 6.579642e-05, + "gain_lf": -3.507436, + "f3db": 60880530.0, + "gmid": 0.6679019, + "vo_a": 0.81337, + "vo_b": 0.5853914, + "out_swing": 0.2279786, + "vamp2": 0.1497518, + "thd_pct": 31.3697 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..faa20db0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 36530000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.3697, + "iq": 6.579642e-05, + "f3db": 60880530.0, + "out_swing": 0.2279786 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..30df51f2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.39u ng=6 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=6u l=0.39u ng=12 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=12u l=0.39u ng=24 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=24u l=0.39u ng=48 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=24u l=0.39u ng=48 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=48u l=0.39u ng=96 m=1 +.ends C18_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..9c83cf61 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_ihp130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C18_ihp130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..ca293340 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/case.json new file mode 100644 index 00000000..1c2a730a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C18_ihp130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.26, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.26, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.26, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.26, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.26, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.26, + "nf": 96 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.26, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c8f9c93822d7cdeb", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..c13d4aef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "b8452648b22ea208b8f0c2afefe9f88e4d19c1cdc5d145ffc64747fa50c12011", + "qualification.json": "f431ae24f16a8fc6744bf5c5dda4b2a29b9fcc3762339052ad62c3878990d131", + "specs.json": "eaab86f1a7a857a6aae8151dcf69b292162dc480bbec9b524632918c30a01482", + "target.spice": "d85b0cb0e5635d4f20448496728c8f28847898ebd326a5256c3601e04af237bf", + "target_lvs.spice": "125e5f86063b8ab871195cb54e4e11dbafa8584e72aa3aca1d3880af3d7afb07", + "testbench.spice": "4cf0838d82fe31b95ce97c6416e892c5744fc0e2f5cdfd30754892edb87f1bc4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..966b9674 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.26, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.26, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.26, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.26, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.26, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "c8f9c93822d7cdeb", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=25.63 above floor 3", + "out_swing=0.1936 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 35820000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 25.6333, + "iq": 6.034971e-05, + "f3db": 59696350.0, + "out_swing": 0.1936459 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 88.5, + "schematic_measures": { + "vout0": 0.6011689, + "vin0": 0.474809, + "iq": 6.034971e-05, + "gain_lf": 2.389674, + "f3db": 59696350.0, + "gmid": 1.317209, + "vo_a": 0.7765116, + "vo_b": 0.5828657, + "out_swing": 0.1936459, + "vamp2": 0.07594803, + "thd_pct": 25.6333 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..eda9793d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 35820000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 25.6333, + "iq": 6.034971e-05, + "f3db": 59696350.0, + "out_swing": 0.1936459 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..1b0542bf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.26u ng=6 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=6u l=0.26u ng=12 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=12u l=0.26u ng=24 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=24u l=0.26u ng=48 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=24u l=0.26u ng=48 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=48u l=0.26u ng=96 m=1 +.ends C18_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..93d7e9ff --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_ihp130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C18_ihp130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..310b13f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/case.json new file mode 100644 index 00000000..671bb2f6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C18_ihp130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.52, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.52, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.52, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.52, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.52, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.52, + "nf": 96 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.52, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dce189abb5766e5e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..681771b9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c3ea114159b0d08a8190459a726d15653f0ece5a012a9013069ac0ced140c3c7", + "qualification.json": "efd51f73e68a55a386657834fbdc54c8fb438fdbb0211bb2b437d2e65f0b8149", + "specs.json": "acfe2b9d3a5e7bf89470b6f44780d63ebe0040fbe9ba2bd957ff2926320d9d59", + "target.spice": "36ba556a8cc2f769a6c393f62a118bef4c542bba61648f46561d3e871cb3ad4f", + "target_lvs.spice": "09e2dd3603c7c3ec255948b7ff8aa48e098d02be7c9a251b14b91c3abef3133a", + "testbench.spice": "9f59c6d8c04d096e44de6c61f979e65e27eeffc3719e63e20c27d62fe9b5a60d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..e713f728 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.52, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.52, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.52, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.52, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.52, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "dce189abb5766e5e", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=34.67 above floor 3", + "out_swing=0.2387 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 35080000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 34.6666, + "iq": 6.750667e-05, + "f3db": 58463990.0, + "out_swing": 0.2387012 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 74.5, + "schematic_measures": { + "vout0": 0.6015679, + "vin0": 0.5118427, + "iq": 6.750667e-05, + "gain_lf": -8.80122, + "f3db": 58463990.0, + "gmid": 0.3630485, + "vo_a": 0.8261181, + "vo_b": 0.5874169, + "out_swing": 0.2387012, + "vamp2": 0.2754616, + "thd_pct": 34.6666 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..5ac6bb3a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 35080000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 34.6666, + "iq": 6.750667e-05, + "f3db": 58463990.0, + "out_swing": 0.2387012 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..bbcd4962 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=3u l=0.52u ng=6 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=6u l=0.52u ng=12 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=12u l=0.52u ng=24 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=24u l=0.52u ng=48 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=24u l=0.52u ng=48 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=48u l=0.52u ng=96 m=1 +.ends C18_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target_lvs.spice new file mode 100644 index 00000000..33f92b3c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_ihp130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C18_ihp130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..437f35a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=6u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/case.json new file mode 100644 index 00000000..60240afc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C18_ihp130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.39, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "64d50719a975becd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..8585b796 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "90092bfc39a3f49b5e2227e5b1eecdd7681d2abbeed6674a123eb8e81b5875c1", + "qualification.json": "ec2ae848ebd58ae607fc4e2813a52935d673c1016d4fde62e86b458e8d3bcf35", + "specs.json": "1f9d2e3a48015a46fc4e1cfdae082091a5e2ba3ec2f0cfd9fdd30ae87d3d7b60", + "target.spice": "eab634c2700cdcc206e277ec9c353c582980b5d1062cce7c1d74bfb7e8359b2f", + "target_lvs.spice": "e2487cf0794c29caaa3bccd69ebdf793fe0949af58e07efc689985a5d3f5ca56", + "testbench.spice": "3742e3cb512027fb5a83a710a7d45dfdf442bc108858878b830b11ee68caffd5" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..2cf0015c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.39, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "64d50719a975becd", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=39.25 above floor 3", + "out_swing=0.2183 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 31080000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 39.2533, + "iq": 6.132357e-05, + "f3db": 51793050.0, + "out_swing": 0.2183261 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 62.7, + "schematic_measures": { + "vout0": 0.6022713, + "vin0": 0.5726971, + "iq": 6.132357e-05, + "gain_lf": -13.14255, + "f3db": 51793050.0, + "gmid": 0.2202138, + "vo_a": 0.8090009, + "vo_b": 0.5906748, + "out_swing": 0.2183261, + "vamp2": 0.3, + "thd_pct": 39.2533 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..ba3f2bb8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 31080000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 39.2533, + "iq": 6.132357e-05, + "f3db": 51793050.0, + "out_swing": 0.2183261 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..1c031191 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.39u ng=4 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=4u l=0.39u ng=8 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=8u l=0.39u ng=16 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=16u l=0.39u ng=32 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +.ends C18_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..734cc16c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_ihp130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C18_ihp130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..5e346404 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/case.json new file mode 100644 index 00000000..49d0f2f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C18_ihp130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.26, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "76485ab8bb4105c5", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/manifest.json new file mode 100644 index 00000000..a33e2121 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "620bf35f548e6094dab13a88ab0333335434fac8b8b075e13a66351bd88cc335", + "qualification.json": "770ddbb49dab8a4445b6c78ca8efc3df2fbf2fd11acd0e8647e64f77bebb556b", + "specs.json": "fd071a1bf165712c965bde1560b8bd6be1f23c75a70fd20b1d2524deec2c8fa8", + "target.spice": "f1da45827e54ac7589d9901724d11f52a3c07e665576e27a557ab79868cd991e", + "target_lvs.spice": "536c052531aed4a30a85b36c7437eb8cbcac859175667c9cffb71c70fa147157", + "testbench.spice": "2427bd092e0cf351a537f853d5850f68bcbb8fe5b19bce609317724298f666fa" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/qualification.json new file mode 100644 index 00000000..a07092d0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.26, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "76485ab8bb4105c5", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=31.41 above floor 3", + "out_swing=0.1982 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 32190000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.4117, + "iq": 5.666062e-05, + "f3db": 53647720.0, + "out_swing": 0.1982082 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 60.6, + "schematic_measures": { + "vout0": 0.601749, + "vin0": 0.5280955, + "iq": 5.666062e-05, + "gain_lf": -5.664669, + "f3db": 53647720.0, + "gmid": 0.5209781, + "vo_a": 0.7852801, + "vo_b": 0.5870719, + "out_swing": 0.1982082, + "vamp2": 0.1919701, + "thd_pct": 31.4117 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/specs.json new file mode 100644 index 00000000..2333675b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 32190000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.4117, + "iq": 5.666062e-05, + "f3db": 53647720.0, + "out_swing": 0.1982082 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target.spice new file mode 100644 index 00000000..ed13f816 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.26u ng=4 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=4u l=0.26u ng=8 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=8u l=0.26u ng=16 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=16u l=0.26u ng=32 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +.ends C18_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..5401762e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_ihp130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C18_ihp130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..daa767ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/case.json new file mode 100644 index 00000000..f4312690 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW1_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C18_ihp130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.52, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "10054bb31697d3b3", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/manifest.json new file mode 100644 index 00000000..ea803d67 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "9218ef0ec8cd2b5be2d54d1921e9ba8c15f7c7f63dedd24ec8d69184efb2e32e", + "qualification.json": "4c6564e18beea032dd1fe19572a78ecae1eff04ae9de29cd98f4f370868c3d8a", + "specs.json": "ced43bb7ce1400bee0f0396b216993861bbd598aa1cc28968589581761380943", + "target.spice": "ad469f1a56dd28228e1fe72ddf2a3c3e9a3773005a46918c31a121464ca20196", + "target_lvs.spice": "14eb4bf2103429ff98338c7e5bce541a54d84535fcc50b256efb687a3343b5b6", + "testbench.spice": "1d61c950f9641cae6086cf83c2cf343054f857dba90caee10bca96d8573192fa" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/qualification.json new file mode 100644 index 00000000..72c6dde9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW1_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.52, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "10054bb31697d3b3", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=56.22 above floor 3", + "out_swing=0 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 28880000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 56.219, + "iq": 6.201357e-05, + "f3db": 48134030.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 52.2, + "schematic_measures": { + "vout0": 0.6034816, + "vin0": 0.6610136, + "iq": 6.201357e-05, + "gain_lf": -19.58239, + "f3db": 48134030.0, + "gmid": 0.1049226, + "vo_a": 0.5948294, + "vo_b": 0.5948294, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 56.219 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/specs.json new file mode 100644 index 00000000..e56c7786 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 28880000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 56.219, + "iq": 6.201357e-05, + "f3db": 48134030.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target.spice new file mode 100644 index 00000000..1f8a72a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=2u l=0.52u ng=4 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=4u l=0.52u ng=8 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=8u l=0.52u ng=16 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=16u l=0.52u ng=32 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +.ends C18_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..99d6abe1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_ihp130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C18_ihp130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..dec44978 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW1_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=4u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/case.json new file mode 100644 index 00000000..361835d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C18_ihp130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.39, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.39, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.39, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.39, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.39, + "nf": 128 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.39, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f4d8f3ef142ec982", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..3773df48 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "cb9823b0efd29ac1dc1d504d6b9edd76ea19b8fd7e28094935fba7291cc349ca", + "qualification.json": "cbb7bcff637171a3c354cb69a59585dc4d17e8dec1842e030abf9b0af17f19b6", + "specs.json": "102a86c339ae5fef344d62141e19c54e86ece4f5c57fb083b0209bbf4a52f280", + "target.spice": "a2158e4309ca6fa1545a1d4d137ba9b3ae4fcd1ce9a03c8ace48fa351dd4f63d", + "target_lvs.spice": "c1b2c365e8cc558014d9474062b2b64327e4d60b067e46f7af76102f892e46ba", + "testbench.spice": "8e2f13620250698788f3d581522a627235d3127cf565ae515da0163941c538b6" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..3c70573b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.39, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.39, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.39, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.39, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.39, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "f4d8f3ef142ec982", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=27.96 above floor 3", + "out_swing=0.2199 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 34300000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 27.9647, + "iq": 6.810104e-05, + "f3db": 57174060.0, + "out_swing": 0.2198753 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 89.9, + "schematic_measures": { + "vout0": 0.60082, + "vin0": 0.4412735, + "iq": 6.810104e-05, + "gain_lf": 2.770807, + "f3db": 57174060.0, + "gmid": 1.376713, + "vo_a": 0.80318, + "vo_b": 0.5833047, + "out_swing": 0.2198753, + "vamp2": 0.07268746, + "thd_pct": 27.9647 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..d27968bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 34300000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 27.9647, + "iq": 6.810104e-05, + "f3db": 57174060.0, + "out_swing": 0.2198753 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..c43c1a98 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.39u ng=8 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=8u l=0.39u ng=16 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=16u l=0.39u ng=32 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=32u l=0.39u ng=64 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=32u l=0.39u ng=64 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=64u l=0.39u ng=128 m=1 +.ends C18_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..a699ba86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_ihp130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f6 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM1_f7 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.39u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f12 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f13 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f14 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM2_f15 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.39u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f24 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f25 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f26 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f27 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f28 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f29 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f30 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM3_f31 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.39u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f48 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f49 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f50 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f51 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f52 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f53 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f54 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f55 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f56 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f57 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f58 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f59 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f60 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f61 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f62 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM4_f63 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.39u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f48 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f49 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f50 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f51 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f52 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f53 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f54 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f55 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f56 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f57 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f58 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f59 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f60 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f61 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f62 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM5_f63 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.39u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f96 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f97 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f98 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f99 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f100 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f101 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f102 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f103 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f104 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f105 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f106 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f107 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f108 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f109 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f110 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f111 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f112 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f113 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f114 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f115 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f116 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f117 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f118 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f119 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f120 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f121 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f122 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f123 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f124 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f125 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f126 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +XM6_f127 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.39u +.ends C18_ihp130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..4104c608 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.39u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/case.json new file mode 100644 index 00000000..dbcb5776 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW2_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C18_ihp130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.26, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.26, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.26, + "nf": 128 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.26, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "61ce3b7138701efd", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/manifest.json new file mode 100644 index 00000000..097a1a76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "bd4dcb64013dafd543c1617578df6614360c04eec000e8a6f3abcd2304e1f169", + "qualification.json": "6a918d76b5d3e75a483fb3aa188e27643815750e6d58fbb99f1af5721683aae5", + "specs.json": "c908f0b120bdb42efb6753acce25214e63209507e7338fbc7edd3268e59e0f5c", + "target.spice": "fa47b3ae99bbda4489f2fb6c14960d5090fbcdf2e619dc958b58aeb8de92f0d9", + "target_lvs.spice": "29204b51f771cf691f932e1cadf73b17eccfcd316408dbb657d5e5dbc0e9ea98", + "testbench.spice": "86cc14f061b90e4e4c912af8684afb2cc8148b50f8ea02f5791d6d5e2d195b55" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/qualification.json new file mode 100644 index 00000000..a5a7d59b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW2_sL1", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.26, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.26, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.26, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.26, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.26, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "61ce3b7138701efd", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=22.86 above floor 3", + "out_swing=0.1709 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 32290000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 22.8591, + "iq": 6.236234e-05, + "f3db": 53820020.0, + "out_swing": 0.1709128 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 94.8, + "schematic_measures": { + "vout0": 0.6008871, + "vin0": 0.4477911, + "iq": 6.236234e-05, + "gain_lf": 7.291935, + "f3db": 53820020.0, + "gmid": 2.316724, + "vo_a": 0.7506718, + "vo_b": 0.579759, + "out_swing": 0.1709128, + "vamp2": 0.04319202, + "thd_pct": 22.8591 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/specs.json new file mode 100644 index 00000000..ff38b5bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 32290000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 22.8591, + "iq": 6.236234e-05, + "f3db": 53820020.0, + "out_swing": 0.1709128 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target.spice new file mode 100644 index 00000000..4f2e637b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.26u ng=8 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=8u l=0.26u ng=16 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=16u l=0.26u ng=32 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=32u l=0.26u ng=64 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=32u l=0.26u ng=64 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=64u l=0.26u ng=128 m=1 +.ends C18_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..2988a043 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_ihp130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f6 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM1_f7 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.26u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f12 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f13 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f14 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM2_f15 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.26u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f24 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f25 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f26 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f27 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f28 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f29 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f30 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM3_f31 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.26u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f48 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f49 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f50 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f51 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f52 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f53 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f54 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f55 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f56 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f57 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f58 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f59 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f60 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f61 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f62 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM4_f63 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.26u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f48 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f49 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f50 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f51 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f52 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f53 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f54 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f55 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f56 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f57 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f58 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f59 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f60 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f61 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f62 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM5_f63 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.26u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f96 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f97 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f98 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f99 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f100 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f101 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f102 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f103 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f104 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f105 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f106 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f107 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f108 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f109 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f110 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f111 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f112 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f113 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f114 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f115 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f116 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f117 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f118 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f119 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f120 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f121 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f122 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f123 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f124 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f125 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f126 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +XM6_f127 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.26u +.ends C18_ihp130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..3f26c7a4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.26u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/case.json new file mode 100644 index 00000000..d3f2a310 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_ihp130_sW2_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C18_ihp130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.52, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.52, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.52, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.52, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.52, + "nf": 128 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.52, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6fe5bda305e5fead", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/manifest.json new file mode 100644 index 00000000..33f65006 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "fcb6ad2987eacda2c69f90db87d78955a7c6d44cf320eccac0c4fa3b12136178", + "qualification.json": "e9a7dc5c06bba5b45451bbfc7f81189f5535727443b1a25ae5657aa7bb8dc126", + "specs.json": "6b134fe6da84f38d5ba3b0feebfebc504fd81d891e4813d8381137aa6d0b9668", + "target.spice": "5d7e704af71b759971f4d0fbd02573fd65f41da7fa8dbca60db0234c4f5dc8b8", + "target_lvs.spice": "a1a8f0179d6cdfaa793fc6b5038fbcfef11a16175f9e27fc324f4074a4b58550", + "testbench.spice": "04ba511ad3f0ad1f4f243e36327beb5ba4d943c331e186fd84a4e73ce0294c96" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/qualification.json new file mode 100644 index 00000000..92e37452 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/qualification.json @@ -0,0 +1,153 @@ +{ + "case_id": "C18_ihp130_sW2_sL2", + "circuit_id": "C18", + "pdk": "ihp130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.26, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.52, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.26, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.52, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.26, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.52, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.26, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.52, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.26, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.52, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "6fe5bda305e5fead", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "thd_pct=31.05 above floor 3", + "out_swing=0.2425 below floor 0.3" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 34650000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.0486, + "iq": 7.012928e-05, + "f3db": 57755300.0, + "out_swing": 0.2424721 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 81.3, + "schematic_measures": { + "vout0": 0.6009576, + "vin0": 0.4546021, + "iq": 7.012928e-05, + "gain_lf": -1.998438, + "f3db": 57755300.0, + "gmid": 0.7946839, + "vo_a": 0.8267659, + "vo_b": 0.5842938, + "out_swing": 0.2424721, + "vamp2": 0.1258699, + "thd_pct": 31.0486 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/specs.json new file mode 100644 index 00000000..b3fc9a81 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 34650000.0 + }, + "out_swing": { + "min": 0.3 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 31.0486, + "iq": 7.012928e-05, + "f3db": 57755300.0, + "out_swing": 0.2424721 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.3 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target.spice new file mode 100644 index 00000000..016ce6a9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sg13_lv_nmos w=4u l=0.52u ng=8 m=1 +XM2 net9 VB1 VDD VDD sg13_lv_pmos w=8u l=0.52u ng=16 m=1 +XM3 net9 net9 net22 VSS sg13_lv_nmos w=16u l=0.52u ng=32 m=1 +XM4 net13 net13 net22 VDD sg13_lv_pmos w=32u l=0.52u ng=64 m=1 +XM5 VDD net9 VOUT1 VSS sg13_lv_nmos w=32u l=0.52u ng=64 m=1 +XM6 VSS net13 VOUT1 VDD sg13_lv_pmos w=64u l=0.52u ng=128 m=1 +.ends C18_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..395245fd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_ihp130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f1 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f2 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f3 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f4 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f5 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f6 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM1_f7 net13 VIN1 VSS VSS sg13_lv_nmos w=0.5u l=0.52u +XM2_f0 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f1 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f2 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f3 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f4 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f5 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f6 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f7 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f8 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f9 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f10 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f11 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f12 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f13 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f14 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM2_f15 net9 VB1 VDD VDD sg13_lv_pmos w=0.5u l=0.52u +XM3_f0 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f1 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f2 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f3 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f4 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f5 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f6 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f7 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f8 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f9 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f10 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f11 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f12 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f13 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f14 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f15 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f16 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f17 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f18 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f19 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f20 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f21 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f22 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f23 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f24 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f25 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f26 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f27 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f28 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f29 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f30 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM3_f31 net9 net9 net22 VSS sg13_lv_nmos w=0.5u l=0.52u +XM4_f0 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f1 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f2 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f3 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f4 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f5 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f6 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f7 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f8 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f9 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f10 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f11 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f12 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f13 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f14 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f15 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f16 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f17 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f18 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f19 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f20 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f21 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f22 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f23 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f24 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f25 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f26 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f27 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f28 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f29 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f30 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f31 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f32 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f33 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f34 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f35 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f36 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f37 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f38 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f39 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f40 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f41 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f42 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f43 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f44 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f45 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f46 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f47 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f48 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f49 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f50 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f51 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f52 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f53 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f54 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f55 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f56 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f57 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f58 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f59 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f60 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f61 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f62 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM4_f63 net13 net13 net22 VDD sg13_lv_pmos w=0.5u l=0.52u +XM5_f0 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f1 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f2 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f3 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f4 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f5 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f6 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f7 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f8 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f9 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f10 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f11 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f12 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f13 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f14 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f15 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f16 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f17 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f18 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f19 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f20 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f21 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f22 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f23 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f24 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f25 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f26 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f27 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f28 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f29 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f30 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f31 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f32 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f33 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f34 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f35 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f36 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f37 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f38 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f39 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f40 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f41 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f42 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f43 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f44 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f45 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f46 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f47 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f48 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f49 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f50 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f51 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f52 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f53 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f54 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f55 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f56 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f57 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f58 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f59 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f60 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f61 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f62 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM5_f63 VDD net9 VOUT1 VSS sg13_lv_nmos w=0.5u l=0.52u +XM6_f0 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f1 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f2 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f3 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f4 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f5 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f6 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f7 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f8 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f9 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f10 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f11 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f12 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f13 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f14 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f15 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f16 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f17 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f18 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f19 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f20 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f21 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f22 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f23 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f24 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f25 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f26 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f27 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f28 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f29 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f30 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f31 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f32 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f33 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f34 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f35 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f36 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f37 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f38 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f39 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f40 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f41 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f42 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f43 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f44 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f45 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f46 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f47 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f48 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f49 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f50 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f51 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f52 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f53 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f54 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f55 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f56 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f57 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f58 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f59 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f60 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f61 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f62 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f63 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f64 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f65 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f66 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f67 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f68 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f69 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f70 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f71 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f72 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f73 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f74 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f75 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f76 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f77 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f78 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f79 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f80 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f81 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f82 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f83 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f84 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f85 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f86 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f87 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f88 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f89 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f90 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f91 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f92 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f93 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f94 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f95 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f96 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f97 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f98 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f99 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f100 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f101 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f102 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f103 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f104 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f105 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f106 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f107 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f108 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f109 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f110 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f111 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f112 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f113 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f114 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f115 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f116 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f117 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f118 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f119 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f120 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f121 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f122 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f123 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f124 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f125 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f126 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +XM6_f127 VSS net13 VOUT1 VDD sg13_lv_pmos w=0.5u l=0.52u +.ends C18_ihp130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..c940cc6e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/ihp130/sW2_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_ihp130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.2 +VSS VSS 0 0 +VDDB VDDB 0 1.2 +XB_VB1 VB1 VB1 VDDB VDDB sg13_lv_pmos w=8u l=0.52u +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.6 +VMID VMID 0 0.6 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.36 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/case.json new file mode 100644 index 00000000..d33a46cc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "dut_name": "C18_sky130_sW0.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.45, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.45, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7964407fd9178853", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/manifest.json new file mode 100644 index 00000000..f2efa412 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "2af32d6ee781c53cc72b46de7269f68f248d2c0d405b2fcc22cf1c68b569570b", + "qualification.json": "94298dab75ed8b0e4705c3ab38d5ca02d70e1c6df715c7110243b1791743f00f", + "specs.json": "dfc286f3b34a8e75174cf071926b4995d7de7b8fa6606754d4bc6a0d9673d87c", + "target.spice": "bef774854c264ebb3a1ed5ff9fb2e1065a527efb601f06b15fa07fc2e9fe4a9b", + "target_lvs.spice": "28e3dbb6008df7edcf5be15e3d28904d31f84906b7f1fa3b4c72b2a2056b7faa", + "testbench.spice": "8a9f276721635af6e727b1b6cdb6295da1389f5d8641b1cb9c577402dc7baba4" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/qualification.json new file mode 100644 index 00000000..c19b0af5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW0.5_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL1.5", + "sW": 0.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.45, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "7964407fd9178853", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.983791 target=0.9 (tol 0.036 V)", + "thd_pct=43.65 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 43.6465, + "iq": 7.38858e-06, + "f3db": 7027076.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.7, + "schematic_measures": { + "vout0": 0.983791, + "vin0": 1.04, + "iq": 7.38858e-06, + "gain_lf": -49.45347, + "f3db": 7027076.0, + "gmid": 0.003367665, + "vo_a": 0.983392, + "vo_b": 0.983392, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 43.6465 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/specs.json new file mode 100644 index 00000000..12556403 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 43.6465, + "iq": 7.38858e-06, + "f3db": 7027076.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target.spice new file mode 100644 index 00000000..2659526d --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.45 nf=2 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.45 nf=4 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +.ends C18_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target_lvs.spice new file mode 100644 index 00000000..8f5b5bac --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_sky130_sW0.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f5 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f6 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM3_f7 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM4_f0 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f1 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f2 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f3 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f5 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f6 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f7 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f8 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f9 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f10 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f11 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f12 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f13 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f14 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM4_f15 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C18_sky130_sW0.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/testbench.spice new file mode 100644 index 00000000..40904adc --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW0.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/case.json new file mode 100644 index 00000000..f0d664ef --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "dut_name": "C18_sky130_sW0.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.3, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.3, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "21b49306a7f1808e", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/manifest.json new file mode 100644 index 00000000..e1d9086f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "1e2429a6195d5c0847ed8a878b6fb13ce991fe47baf3b100355fc1cbdc01bfc8", + "qualification.json": "91c3453ada9c9aa01d7ec66da7e65cee6027f1dfbd16148ccc3b59a25bb43518", + "specs.json": "181f4131de668148f8a40bf29bc400802e4da7a758df1464fad0acc1a28d85bb", + "target.spice": "dfb640ac0514edba203c574dd769287d40dc71d4a4ccee13edf080853d0ab791", + "target_lvs.spice": "5bf47dc79bd5d7f5a03944e4f40df5ac9067ee92dec3d843be3cfc732a7cc4d6", + "testbench.spice": "732d752ce6ff92221e37ffba29da70bcea6b6c0eb9d060574e10653547d43cd3" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/qualification.json new file mode 100644 index 00000000..75e2a68a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW0.5_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL1", + "sW": 0.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.3, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "21b49306a7f1808e", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9614974 target=0.9 (tol 0.036 V)", + "thd_pct=49.73 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5852000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 49.7262, + "iq": 1.024917e-05, + "f3db": 9752937.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.7, + "schematic_measures": { + "vout0": 0.9614974, + "vin0": 1.04, + "iq": 1.024917e-05, + "gain_lf": -42.24355, + "f3db": 9752937.0, + "gmid": 0.007723707, + "vo_a": 0.9606606, + "vo_b": 0.9606606, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 49.7262 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/specs.json new file mode 100644 index 00000000..180657cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5852000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 49.7262, + "iq": 1.024917e-05, + "f3db": 9752937.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target.spice new file mode 100644 index 00000000..f26e6059 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.3 nf=2 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.3 nf=4 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +.ends C18_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target_lvs.spice new file mode 100644 index 00000000..b749d864 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_sky130_sW0.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f12 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f13 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f14 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f15 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C18_sky130_sW0.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/testbench.spice new file mode 100644 index 00000000..45007828 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW0.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/case.json new file mode 100644 index 00000000..7ed1b765 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "dut_name": "C18_sky130_sW0.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M5": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M6": { + "w": 16.0, + "l": 0.6, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4519e206a6fac587", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/manifest.json new file mode 100644 index 00000000..817d1193 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "c743ab592b1533c79433e09f97ff6d7b26bc25282797a7cee549c696f803b6bf", + "qualification.json": "d34c4bc2a2c6ed8ad32d96f7bfa0497fb4df948256b1c2e722e2b8d22d9a7efa", + "specs.json": "b4245d7aeeb4fe98d7a26ebfdd435a32eff2a90a22eba4278c0ec9bf72935252", + "target.spice": "fce0c65427dbd193572d9e086f1755c08c4ab8d5d2a3907f43a1538f2b74be27", + "target_lvs.spice": "1d5110712e94a234ebc14885fa9440558fc4049ab0914f97b57a4a70150f5242", + "testbench.spice": "09d820d22bfb793d79f6a8b904edfa7cdb8b203a85f9931dde3559005c378e86" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/qualification.json new file mode 100644 index 00000000..9f812390 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW0.5_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW0.5_sL2", + "sW": 0.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 0.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 1.0, + "l": 0.6, + "nf": 2, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 0.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "4519e206a6fac587", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9867281 target=0.9 (tol 0.036 V)", + "thd_pct=41.38 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 41.3803, + "iq": 6.251843e-06, + "f3db": 5960859.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.8, + "schematic_measures": { + "vout0": 0.9867281, + "vin0": 1.04, + "iq": 6.251843e-06, + "gain_lf": -54.26525, + "f3db": 5960859.0, + "gmid": 0.001935263, + "vo_a": 0.9864907, + "vo_b": 0.9864907, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 41.3803 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/specs.json new file mode 100644 index 00000000..aefa4026 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 41.3803, + "iq": 6.251843e-06, + "f3db": 5960859.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target.spice new file mode 100644 index 00000000..ebf0b77b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=1 l=0.6 nf=2 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=2 l=0.6 nf=4 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +.ends C18_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target_lvs.spice new file mode 100644 index 00000000..d7157ea8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/target_lvs.spice @@ -0,0 +1,80 @@ +.subckt C18_sky130_sW0.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f12 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f13 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f14 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f15 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C18_sky130_sW0.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/testbench.spice new file mode 100644 index 00000000..812f8451 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW0.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW0.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=2 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/case.json new file mode 100644 index 00000000..bb09f433 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "dut_name": "C18_sky130_sW1.5_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.45, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.45, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.45, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.45, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.45, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.45, + "nf": 96 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.45, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "27dbdf4b8370397c", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/manifest.json new file mode 100644 index 00000000..ec590a6c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "4fd354134e6cd674119e2de404082b20f90d0230547104e70af32c488bdf5b0b", + "qualification.json": "2bdaf2e64b282c57f53d854373067361b50f14564cc5a1431ffb464ffdbf32cd", + "specs.json": "19760f3a6e4ade806375f28238711e21b9dddc71103916b17a973b46da088be9", + "target.spice": "795b6466947bfcd390bced0fb2af6ffa413d9e06ca779b4c42e13d5ad3593613", + "target_lvs.spice": "c7e8585ac90c96712ff6a8c3a5faa750fbbd76b144f1fd45e5bf9edef9abdc88", + "testbench.spice": "b89b66ef47c52ba977df72a82112a596de8598b3b810904b1b2979c591593433" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/qualification.json new file mode 100644 index 00000000..7ef34524 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1.5_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL1.5", + "sW": 1.5, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.45, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.45, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.45, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.45, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.45, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "27dbdf4b8370397c", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.99676 target=0.9 (tol 0.036 V)", + "thd_pct=46.44 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 8890000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 46.4405, + "iq": 1.579314e-05, + "f3db": 14816630.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 14.2, + "schematic_measures": { + "vout0": 0.99676, + "vin0": 1.04, + "iq": 1.579314e-05, + "gain_lf": -45.19149, + "f3db": 14816630.0, + "gmid": 0.005500832, + "vo_a": 0.9961201, + "vo_b": 0.9961201, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 46.4405 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/specs.json new file mode 100644 index 00000000..5d0ed3a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 8890000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 46.4405, + "iq": 1.579314e-05, + "f3db": 14816630.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/target.spice new file mode 100644 index 00000000..e7492443 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1.5_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.45 nf=6 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.45 nf=12 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.45 nf=24 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.45 nf=48 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=24 l=0.45 nf=48 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=48 l=0.45 nf=96 +.ends C18_sky130_sW1.5_sL1.5 diff --git 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net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f41 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f42 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f43 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f44 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f45 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f46 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f47 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C18_sky130_sW1.5_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/testbench.spice new file mode 100644 index 00000000..083adfda --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1.5_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/case.json new file mode 100644 index 00000000..31805fad --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "dut_name": "C18_sky130_sW1.5_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.3, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.3, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.3, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.3, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.3, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.3, + "nf": 96 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.3, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a5b472df9e3d1b23", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/manifest.json new file mode 100644 index 00000000..5e817bed --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "75aae0f41176739b31ed84eb9117aa40cac1ce4ea008852de1cdb4b4cacd2ced", + "qualification.json": "217bda0872045b6468db1c440b9d25651b5262b62f6e3f49838e5446f87e923f", + "specs.json": "32ad0c2d9b3c76f5c70594a4b11ec45ce4ac2bde734a3f9f26d9d13e04d85c4b", + "target.spice": "e6f45151c54799cbb12e1a6d9bcb39d05db2469c65b028c66a9e57940f8172bd", + "target_lvs.spice": "b639660ff32a5f98186c5b413cfb93fdba8cf402630a7977bb170e85582c9735", + "testbench.spice": "669f738f3a7c69c67901b9ba79005ed78e95d7f3ff5936f7750b2474f7458621" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/qualification.json new file mode 100644 index 00000000..98fc9d37 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1.5_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL1", + "sW": 1.5, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.3, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.3, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.3, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.3, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.3, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "a5b472df9e3d1b23", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9648527 target=0.9 (tol 0.036 V)", + "thd_pct=52.47 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14070000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 52.4707, + "iq": 2.522956e-05, + "f3db": 23454130.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.4, + "schematic_measures": { + "vout0": 0.9648527, + "vin0": 1.04, + "iq": 2.522956e-05, + "gain_lf": -40.25145, + "f3db": 23454130.0, + "gmid": 0.009714729, + "vo_a": 0.9638176, + "vo_b": 0.9638176, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 52.4707 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/specs.json new file mode 100644 index 00000000..e330e4ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 14070000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 52.4707, + "iq": 2.522956e-05, + "f3db": 23454130.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target.spice new file mode 100644 index 00000000..49748156 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.3 nf=6 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.3 nf=12 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=12 l=0.3 nf=24 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=24 l=0.3 nf=48 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=24 l=0.3 nf=48 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=48 l=0.3 nf=96 +.ends C18_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target_lvs.spice new file mode 100644 index 00000000..84ebabe2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/target_lvs.spice @@ -0,0 +1,236 @@ +.subckt C18_sky130_sW1.5_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net13 VIN1 VSS VSS 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w=0.5 l=0.3 +XM5_f21 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f32 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f33 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f34 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f35 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f36 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f37 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f38 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f39 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f40 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f41 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f42 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f43 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f44 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f45 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f46 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f47 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C18_sky130_sW1.5_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/testbench.spice new file mode 100644 index 00000000..43f3e5cf --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1.5_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/case.json new file mode 100644 index 00000000..3c274cf3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "dut_name": "C18_sky130_sW1.5_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 3.0, + "l": 0.6, + "nf": 6 + }, + "M2": { + "w": 6.0, + "l": 0.6, + "nf": 12 + }, + "M3": { + "w": 12.0, + "l": 0.6, + "nf": 24 + }, + "M4": { + "w": 24.0, + "l": 0.6, + "nf": 48 + }, + "M5": { + "w": 24.0, + "l": 0.6, + "nf": 48 + }, + "M6": { + "w": 48.0, + "l": 0.6, + "nf": 96 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.6, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 24.0, + "l": 0.6, + "nf": 48, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 48.0, + "l": 0.6, + "nf": 96, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "de2cba923b099141", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/manifest.json new file mode 100644 index 00000000..583d87ce --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "ea570e568e50db08409331c87a5c3ba4bd39225fcf6d84ba3957157fa9bc43b9", + "qualification.json": "26d82c078ad520dfc95bf337951d322714edf348cff711c42f2425bc613e8142", + "specs.json": "9ba6a7b0a34b53e5db7034d6dfd2432470d8577b5e2094d5a90e6ed90a4a6747", + "target.spice": "e69c2c044e6263eef3128b7fb02a31d0d4735783c064f930d7ad52b0333c4368", + "target_lvs.spice": "6f5cc0c828a7918baeefedbcf10182db4c9650783b02fc329ff878a039fc8667", + "testbench.spice": "d01596c56af33b4ca0c92a6d3432ae65dc78b4660dfe09d5cb7811b0d6ccf0d7" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/qualification.json new file mode 100644 index 00000000..623fae4f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1.5_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1.5_sL2", + "sW": 1.5, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.5, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 3.0, + "l": 0.6, + "nf": 6, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 6.0, + "l": 0.6, + "nf": 12, + "uw": 0.5, + "w_ratio": 1.5, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 12.0, + "l": 0.6, + "nf": 24, + "uw": 0.5, + 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{ + "thd_pct": 43.9839, + "iq": 1.217202e-05, + "f3db": 11354920.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 10.7, + "schematic_measures": { + "vout0": 1.005301, + "vin0": 1.04, + "iq": 1.217202e-05, + "gain_lf": -48.51603, + "f3db": 11354920.0, + "gmid": 0.003751467, + "vo_a": 1.004848, + "vo_b": 1.004848, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 43.9839 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/specs.json new file mode 100644 index 00000000..9de6d6f9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 6813000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 43.9839, + "iq": 1.217202e-05, + "f3db": 11354920.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/target.spice new file mode 100644 index 00000000..68d30313 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1.5_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=3 l=0.6 nf=6 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=6 l=0.6 nf=12 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+XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f32 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f33 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f34 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f35 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f36 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f37 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f38 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f39 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f40 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f41 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f42 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f43 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f44 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f45 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f46 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f47 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C18_sky130_sW1.5_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/testbench.spice new file mode 100644 index 00000000..a0a0cd11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1.5_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1.5_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=6 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/case.json new file mode 100644 index 00000000..54a82a9f --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "dut_name": "C18_sky130_sW1_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.45, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.45, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "00e5f9e72e8e2c2d", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/manifest.json new file mode 100644 index 00000000..54b21867 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "a9f76a939a0275661206a610df64373536008414c15e73045d6314a1cff7d638", + "qualification.json": "cf4ee8d39de4acf0a6c2fc20ed9b1e751e9db94dd57dfc85f3ba7bf2ef297b74", + "specs.json": "a07ab948ed316674a6b9ae22957105c706ff2e1b1a9c52cfb93eea320be278ef", + "target.spice": "d49dccce27dd492ba3bdb17fc363494b0d6aad0f8fa7898079870ebb483ce712", + "target_lvs.spice": "15785390d4884818c07c1954b5265be7bb22c7816f613953fd225281c4e08157", + "testbench.spice": "a853a424db55d27d2c8c479fe349b5f0a77a63cd98a2c0ad6efda76bbf8b89e9" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/qualification.json new file mode 100644 index 00000000..ec7966cd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL1.5", + "sW": 1.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.45, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "00e5f9e72e8e2c2d", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9931647 target=0.9 (tol 0.036 V)", + "thd_pct=45.56 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 6578000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 45.5605, + "iq": 1.169591e-05, + "f3db": 10963250.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 9.0, + "schematic_measures": { + "vout0": 0.9931647, + "vin0": 1.04, + "iq": 1.169591e-05, + "gain_lf": -46.4172, + "f3db": 10963250.0, + "gmid": 0.00477686, + "vo_a": 0.9926056, + "vo_b": 0.9926056, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 45.5605 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/specs.json new file mode 100644 index 00000000..94fc5fd0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 6578000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 45.5605, + "iq": 1.169591e-05, + "f3db": 10963250.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target.spice new file mode 100644 index 00000000..e47a6687 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.45 nf=4 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.45 nf=8 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.45 nf=16 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.45 nf=32 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +.ends C18_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ee376690 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_sky130_sW1_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net13 VIN1 VSS VSS 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sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C18_sky130_sW1_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/testbench.spice new file mode 100644 index 00000000..1de6fd86 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/case.json new file mode 100644 index 00000000..b98223a5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "dut_name": "C18_sky130_sW1_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.3, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e13aa8d3c3a2f41f", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/manifest.json new file mode 100644 index 00000000..c3ded06e --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "493b36e4e836772476dc5b6d4268b51dbf852e0628b889a35c861d7a64eb2f41", + "qualification.json": "819746d87a5624ea3fbe211a31409b62397b771e59a6ad9f486f963e1def486f", + "specs.json": "8848e2a6b1ec0470c41ad4173a82085dc0e9598fcfc6b0a15c1ee5cecc9a7bd5", + "target.spice": "eb435e8c2dc7bf73c07b8b0453769c456c24cbe2ec906ce7efb5f64eb02680fb", + "target_lvs.spice": "6fb4b3817180beb45f083054fe43627f5faa3ad6b516982f5e86d5b185a3ce3f", + "testbench.spice": "484298689591b6723434a9846ef9953bdb6670ca11e920a29da44f4f0ea3b882" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/qualification.json new file mode 100644 index 00000000..b019e109 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL1", + "sW": 1.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.3, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "e13aa8d3c3a2f41f", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9644481 target=0.9 (tol 0.036 V)", + "thd_pct=51.71 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 10040000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 51.7123, + "iq": 1.791735e-05, + "f3db": 16728900.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.9, + "schematic_measures": { + "vout0": 0.9644481, + "vin0": 1.04, + "iq": 1.791735e-05, + "gain_lf": -40.76458, + "f3db": 16728900.0, + "gmid": 0.009157438, + "vo_a": 0.9634673, + "vo_b": 0.9634673, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 51.7123 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/specs.json new file mode 100644 index 00000000..73eafc32 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 10040000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 51.7123, + "iq": 1.791735e-05, + "f3db": 16728900.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target.spice new file mode 100644 index 00000000..5b3d26b4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.3 nf=4 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.3 nf=8 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.3 nf=16 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.3 nf=32 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +.ends C18_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target_lvs.spice new file mode 100644 index 00000000..97dad1d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_sky130_sW1_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f6 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f7 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f8 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f9 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f10 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f11 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f12 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f13 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f14 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f15 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM4_f0 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f1 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f2 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f3 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f5 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f6 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f7 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f8 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f9 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f10 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f11 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f12 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f13 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f14 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f15 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f16 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f17 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f18 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f19 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f20 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f21 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f22 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f23 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f24 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f25 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f26 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f27 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f28 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f29 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f30 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM4_f31 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f16 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f17 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f18 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f19 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f20 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f21 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C18_sky130_sW1_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/testbench.spice new file mode 100644 index 00000000..1059ae60 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/case.json new file mode 100644 index 00000000..de90c0d4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW1_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "dut_name": "C18_sky130_sW1_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.6, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "458fd75b00038f25", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/manifest.json new file mode 100644 index 00000000..ce48c273 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "06a6367006b7ef0fb01a3a32b992f126e3eeb153f44e08a63ca9658f68b566b9", + "qualification.json": "5dd686057532f99818935566faa16f6a08d29115600056b76701465facf149da", + "specs.json": "03d14ea55f4c11ebf1b2e8abb66f4bc9a68ddc890a71066f275cb96eab07a5b8", + "target.spice": "d357ef9dd464bbc1e9bf0bd19a974940df4edb174a841c190e0e2d0ff96175ae", + "target_lvs.spice": "7cd147f3b17d25f0a3c37ebcfca42fa6a5f9563f36a8c8f0d616356fcc20df8d", + "testbench.spice": "00dc1d8d84fe38824fd7588a1e501890d08da4195a1b9a0b0bc12d9acf9d6319" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/qualification.json new file mode 100644 index 00000000..6ef2ac06 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW1_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW1_sL2", + "sW": 1.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 1.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 2.0, + "l": 0.6, + "nf": 4, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 1.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "458fd75b00038f25", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.999616 target=0.9 (tol 0.036 V)", + "thd_pct=43.08 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5217000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 43.0831, + "iq": 9.318186e-06, + "f3db": 8695030.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 8.9, + "schematic_measures": { + "vout0": 0.999616, + "vin0": 1.04, + "iq": 9.318186e-06, + "gain_lf": -50.29108, + "f3db": 8695030.0, + "gmid": 0.003058079, + "vo_a": 0.9992444, + "vo_b": 0.9992444, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 43.0831 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/specs.json new file mode 100644 index 00000000..5ec8fc10 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5217000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 43.0831, + "iq": 9.318186e-06, + "f3db": 8695030.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target.spice new file mode 100644 index 00000000..9b3a23e4 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=2 l=0.6 nf=4 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=4 l=0.6 nf=8 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=8 l=0.6 nf=16 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=16 l=0.6 nf=32 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.6 nf=32 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.6 nf=64 +.ends C18_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target_lvs.spice new file mode 100644 index 00000000..dd37ae85 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/target_lvs.spice @@ -0,0 +1,158 @@ +.subckt C18_sky130_sW1_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM1_f3 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f4 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f5 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f6 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM2_f7 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f5 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f6 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f7 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f8 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f9 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f10 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f11 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f12 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f13 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f14 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM3_f15 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM4_f0 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f1 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f2 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f3 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f5 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f6 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f7 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f8 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f9 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f10 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f11 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f12 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f13 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f14 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f15 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f16 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f17 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f18 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f19 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f20 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f21 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f22 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f23 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f24 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f25 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f26 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f27 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f28 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f29 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f30 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM4_f31 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f16 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f17 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f18 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f19 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f20 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f21 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C18_sky130_sW1_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/testbench.spice new file mode 100644 index 00000000..e549000c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW1_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW1_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=4 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/case.json new file mode 100644 index 00000000..f75c9a4b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "dut_name": "C18_sky130_sW2_sL1.5", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.45, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.45, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.45, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.45, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.45, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.45, + "nf": 128 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.45, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b3a96efbd6f92422", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/manifest.json new file mode 100644 index 00000000..d428af8a --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "8cc919185e45444da4792976cf53afe2ce962292fe7c3b9d8b34d855d44cfb2a", + "qualification.json": "3ee0487c8aea26bee887e946eb296dbd822c81f8c43892e81048c15b310dafea", + "specs.json": "6632780533f4fdf2b5f9ddc941122eb1a36c9852bc67135256fcd66f2ad3c966", + "target.spice": "1ebc04b9f57bb04cbf8283860f559b3863410fbf38908d931cdd6ea0f98560d5", + "target_lvs.spice": "908c708e1cc2a23d902739795899d303bc4e72bbae17dba198bf601301d43a69", + "testbench.spice": "8fd888a248738a1632569531bee1d91abb63730ac50b926c8153d10035efb7bd" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/qualification.json new file mode 100644 index 00000000..2c026af6 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW2_sL1.5", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL1.5", + "sW": 2.0, + "sL": 1.5, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.5, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.45, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.45, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.45, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.45, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.45, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.5 + } + } + }, + "signature": "b3a96efbd6f92422", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.9985048 target=0.9 (tol 0.036 V)", + "thd_pct=46.94 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 11170000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 46.9376, + "iq": 1.978111e-05, + "f3db": 18615980.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.0, + "schematic_measures": { + "vout0": 0.9985048, + "vin0": 1.04, + "iq": 1.978111e-05, + "gain_lf": -44.53606, + "f3db": 18615980.0, + "gmid": 0.005931983, + "vo_a": 0.9978174, + "vo_b": 0.9978174, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 46.9376 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/specs.json new file mode 100644 index 00000000..b8462f88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 11170000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 46.9376, + "iq": 1.978111e-05, + "f3db": 18615980.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target.spice new file mode 100644 index 00000000..94fb3458 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.45 nf=8 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.45 nf=16 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.45 nf=32 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.45 nf=64 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=32 l=0.45 nf=64 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=64 l=0.45 nf=128 +.ends C18_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target_lvs.spice new file mode 100644 index 00000000..ed5bec41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_sky130_sW2_sL1.5 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM1_f3 net13 VIN1 VSS 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sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f16 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f17 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f18 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f19 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f20 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f21 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f32 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f33 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f34 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f35 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f36 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f37 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f38 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f39 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f40 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f41 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f42 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f43 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f44 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f45 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f46 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f47 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f48 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f49 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f50 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f51 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f52 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f53 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f54 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f55 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f56 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f57 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f58 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f59 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f60 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f61 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f62 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM5_f63 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.45 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f96 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f97 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f98 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f99 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f100 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f101 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f102 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f103 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f104 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f105 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f106 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f107 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f108 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f109 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f110 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f111 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f112 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f113 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f114 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f115 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f116 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f117 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f118 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f119 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f120 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f121 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f122 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f123 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f124 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f125 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f126 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +XM6_f127 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.45 +.ends C18_sky130_sW2_sL1.5 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/testbench.spice new file mode 100644 index 00000000..5c573fd5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1.5/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW2_sL1.5 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.45 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/case.json new file mode 100644 index 00000000..edfab9dd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW2_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "dut_name": "C18_sky130_sW2_sL1", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.3, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.3, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.3, + "nf": 128 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.3, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f0ae8d5f09761da9", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/manifest.json new file mode 100644 index 00000000..a88e4012 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "0a4373774e9a115dcb9bb200f1bca29d7c8ab81b8a246bbf5c7458d290f07bb7", + "qualification.json": "6e29bb1dd36b55c8dc42d5630feb1dba55f587f5fcd8bc7a771fb53422a69574", + "specs.json": "7677d5dbb8851708218018a8a1ec375dade80aabf504fe6540306ebc4e2d1e43", + "target.spice": "0201c2b1c1f84154c9d3d428f6485e4d6607436f0c44a558fca4d4791d3d5a22", + "target_lvs.spice": "72565d7ad61c3c41d8ecbe74d1560c8e70390297971c3fe339eb876b02279423", + "testbench.spice": "28b8c64b6c081c78f0e958c402639d942e65cfe8825fa006c71e87f8dc0178e1" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/qualification.json new file mode 100644 index 00000000..44568de9 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW2_sL1", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL1", + "sW": 2.0, + "sL": 1.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 1.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.3, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.3, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.3, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.3, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.3, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 1.0 + } + } + }, + "signature": "f0ae8d5f09761da9", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=0.96461 target=0.9 (tol 0.036 V)", + "thd_pct=52.88 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17990000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 52.8808, + "iq": 3.228383e-05, + "f3db": 29978200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 12.0, + "schematic_measures": { + "vout0": 0.96461, + "vin0": 1.04, + "iq": 3.228383e-05, + "gain_lf": -40.00373, + "f3db": 29978200.0, + "gmid": 0.009995783, + "vo_a": 0.9635484, + "vo_b": 0.9635484, + "out_swing": 0.0, + "vamp2": 0.3, + "thd_pct": 52.8808 + }, + "testbench_rule": "55e01f6c3361826d" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/specs.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/specs.json new file mode 100644 index 00000000..31a70953 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/specs.json @@ -0,0 +1,37 @@ +{ + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 17990000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 52.8808, + "iq": 3.228383e-05, + "f3db": 29978200.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target.spice new file mode 100644 index 00000000..d4df2da5 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.3 nf=8 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.3 nf=16 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.3 nf=32 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.3 nf=64 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=32 l=0.3 nf=64 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=64 l=0.3 nf=128 +.ends C18_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target_lvs.spice new file mode 100644 index 00000000..afa8cbd2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/target_lvs.spice @@ -0,0 +1,314 @@ +.subckt C18_sky130_sW2_sL1 VDD VSS VIN1 VOUT1 VB1 +XM1_f0 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f2 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f3 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f4 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f5 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f6 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM1_f7 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM2_f0 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f1 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f3 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f4 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f5 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f6 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f7 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f8 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f9 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f10 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f11 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f12 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f13 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f14 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM2_f15 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM3_f0 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f1 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f2 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f4 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.3 +XM3_f5 net9 net9 net22 VSS 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sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f96 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f97 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f98 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f99 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f100 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f101 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f102 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f103 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f104 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f105 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f106 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f107 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f108 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f109 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f110 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f111 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f112 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f113 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f114 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f115 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f116 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f117 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f118 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f119 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f120 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f121 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f122 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f123 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f124 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f125 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f126 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +XM6_f127 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.3 +.ends C18_sky130_sW2_sL1 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/testbench.spice new file mode 100644 index 00000000..a165a3bd --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL1/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW2_sL1 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.3 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/case.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/case.json new file mode 100644 index 00000000..88544682 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/case.json @@ -0,0 +1,185 @@ +{ + "case_id": "C18_sky130_sW2_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "dut_name": "C18_sky130_sW2_sL2", + "ports": [ + "VDD", + "VSS", + "VIN1", + "VOUT1", + "VB1" + ], + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 8.0, + "l": 0.6, + "nf": 16 + }, + "M3": { + "w": 16.0, + "l": 0.6, + "nf": 32 + }, + "M4": { + "w": 32.0, + "l": 0.6, + "nf": 64 + }, + "M5": { + "w": 32.0, + "l": 0.6, + "nf": 64 + }, + "M6": { + "w": 64.0, + "l": 0.6, + "nf": 128 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3", + "vout_amp": 0.1 + }, + "category": "buffer_ab", + "notes": [ + "first-pass sizing v1", + "RL/CL returned to an ideal mid-supply source; open-loop output-swing metric added" + ], + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.6, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3796e57029af3adc", + "testbench_rule": "55e01f6c3361826d", + "test_auxiliaries": [ + { + "kind": "replica_bias", + "port": "VB1", + "replica_of": "M2", + "current_A": 2e-05, + "variant": "diode" + }, + { + "kind": "testbench_element", + "what": "bounded tanh DC servo (freezable)" + }, + { + "kind": "testbench_element", + "what": "mid-supply load return" + }, + { + "kind": "testbench_element", + "what": "load resistor and capacitor" + } + ], + "core_devices": [ + "M1", + "M2", + "M3", + "M4", + "M5", + "M6" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/manifest.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/manifest.json new file mode 100644 index 00000000..2add75d1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/manifest.json @@ -0,0 +1,8 @@ +{ + "case.json": "29746c5e532c9bfc88ee33fb8a35050b6276fa9eae1f1628394f3d5d18be7b13", + "qualification.json": "28e9e03779af4b5d1a4c5aa84e59cda492a4fb727caf4f32bc7bb16419db734a", + "specs.json": "6aad2d5abf1cbdf4a57a5c67293a01c725590c9f3038cdbd81ef6fb4f2694d55", + "target.spice": "ee45aec6db1e9dc839c9a0d18619f1d1968c3a0aca43b9e72c1bed91dbb00254", + "target_lvs.spice": "b62235b8099f37c052cba2605785bb7d24efe28efa3e732fdc889ed704c9bfa9", + "testbench.spice": "f4198b7bd7cc6d8d971d3552234f364ff67cf2641eaa7daa11491ef112b00420" +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/qualification.json b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/qualification.json new file mode 100644 index 00000000..48f2e881 --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/qualification.json @@ -0,0 +1,154 @@ +{ + "case_id": "C18_sky130_sW2_sL2", + "circuit_id": "C18", + "pdk": "sky130", + "size": "sW2_sL2", + "sW": 2.0, + "sL": 2.0, + "category": "buffer_ab", + "derivation": { + "sW": 2.0, + "sL": 2.0, + "rule": "grid.derive_sizing v1", + "status": "derived", + "finger_rule": "nf scaled (unit width kept)", + "devices": { + "M1": { + "w0": 2.0, + "l0": 0.3, + "nf0": 4, + "uw0": 0.5, + "w": 4.0, + "l": 0.6, + "nf": 8, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M2": { + "w0": 4.0, + "l0": 0.3, + "nf0": 8, + "uw0": 0.5, + "w": 8.0, + "l": 0.6, + "nf": 16, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M3": { + "w0": 8.0, + "l0": 0.3, + "nf0": 16, + "uw0": 0.5, + "w": 16.0, + "l": 0.6, + "nf": 32, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M4": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M5": { + "w0": 16.0, + "l0": 0.3, + "nf0": 32, + "uw0": 0.5, + "w": 32.0, + "l": 0.6, + "nf": 64, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + }, + "M6": { + "w0": 32.0, + "l0": 0.3, + "nf0": 64, + "uw0": 0.5, + "w": 64.0, + "l": 0.6, + "nf": 128, + "uw": 0.5, + "w_ratio": 2.0, + "l_ratio_exact": 2.0 + } + } + }, + "signature": "3796e57029af3adc", + "stage": "schematic_not_qualified", + "qualification": { + "qualified": false, + "reasons": [ + "servo did not reach the output target: vout0=1.008435 target=0.9 (tol 0.036 V)", + "thd_pct=44.53 above floor 3", + "out_swing=0 below floor 0.45" + ], + "spec": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 8401000.0 + }, + "out_swing": { + "min": 0.45 + }, + "_frozen_from": { + "schematic": { + "thd_pct": 44.5327, + "iq": 1.494627e-05, + "f3db": 14001530.0, + "out_swing": 0.0 + }, + "floors": { + "thd_pct": { + "max": 3.0 + }, + "iq": { + "max": 0.0003 + }, + "f3db": { + "min": 5000000.0 + }, + "out_swing": { + "min": 0.45 + } + }, + "rule": "textbook_sharing.qualify v1" + } + } + }, + "presim_status": "passed", + "presim_errors": [], + "presim_s": 11.9, + "schematic_measures": { + "vout0": 1.008435, + "vin0": 1.04, + "iq": 1.494627e-05, + "gain_lf": -47.51454, + "f3db": 14001530.0, + "gmid": 0.004209937, + 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a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target.spice new file mode 100644 index 00000000..0c90432b --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target.spice @@ -0,0 +1,8 @@ +.subckt C18_sky130_sW2_sL2 VDD VSS VIN1 VOUT1 VB1 +XM1 net13 VIN1 VSS VSS sky130_fd_pr__nfet_01v8 w=4 l=0.6 nf=8 +XM2 net9 VB1 VDD VDD sky130_fd_pr__pfet_01v8 w=8 l=0.6 nf=16 +XM3 net9 net9 net22 VSS sky130_fd_pr__nfet_01v8 w=16 l=0.6 nf=32 +XM4 net13 net13 net22 VDD sky130_fd_pr__pfet_01v8 w=32 l=0.6 nf=64 +XM5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=32 l=0.6 nf=64 +XM6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=64 l=0.6 nf=128 +.ends C18_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target_lvs.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/target_lvs.spice new file mode 100644 index 00000000..ea2a4ac4 --- /dev/null +++ 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l=0.6 +XM5_f0 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f1 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f2 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f3 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f4 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f5 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f6 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f7 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f8 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f9 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f10 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f11 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f12 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f13 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f14 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f15 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f16 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f17 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f18 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f19 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f20 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f21 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f22 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f23 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f24 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f25 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f26 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f27 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f28 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f29 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f30 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f31 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f32 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f33 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f34 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f35 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f36 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f37 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f38 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f39 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f40 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f41 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f42 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f43 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f44 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f45 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f46 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f47 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f48 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f49 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f50 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f51 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f52 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f53 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f54 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f55 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f56 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f57 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f58 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f59 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f60 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f61 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f62 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM5_f63 VDD net9 VOUT1 VSS sky130_fd_pr__nfet_01v8 w=0.5 l=0.6 +XM6_f0 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f1 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f2 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f3 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f4 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f5 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f6 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f7 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f8 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f9 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f10 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f11 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f12 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f13 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f14 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f15 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f16 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f17 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f18 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f19 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f20 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f21 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f22 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f23 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f24 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f25 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f26 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f27 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f28 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f29 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f30 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f31 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f32 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f33 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f34 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f35 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f36 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f37 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f38 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f39 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f40 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f41 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f42 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f43 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f44 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f45 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f46 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f47 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f48 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f49 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f50 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f51 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f52 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f53 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f54 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f55 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f56 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f57 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f58 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f59 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f60 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f61 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f62 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f63 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f64 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f65 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f66 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f67 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f68 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f69 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f70 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f71 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f72 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f73 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f74 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f75 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f76 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f77 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f78 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f79 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f80 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f81 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f82 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f83 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f84 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f85 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f86 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f87 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f88 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f89 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f90 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f91 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f92 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f93 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f94 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f95 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f96 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f97 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f98 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f99 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f100 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f101 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f102 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f103 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f104 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f105 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f106 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f107 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f108 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f109 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f110 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f111 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f112 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f113 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f114 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f115 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f116 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f117 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f118 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f119 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f120 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f121 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f122 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f123 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f124 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f125 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f126 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +XM6_f127 VSS net13 VOUT1 VDD sky130_fd_pr__pfet_01v8 w=0.5 l=0.6 +.ends C18_sky130_sW2_sL2 diff --git a/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/testbench.spice b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/testbench.spice new file mode 100644 index 00000000..94b24c1c --- /dev/null +++ b/benchmarks/textbook_sharing/data/cases/C18/sky130/sW2_sL2/testbench.spice @@ -0,0 +1,58 @@ +X1 VDD VSS VIN1 VOUT1 VB1 C18_sky130_sW2_sL2 +.include DUT_INCLUDE_PATH +VDD VDD 0 1.8 +VSS VSS 0 0 +VDDB VDDB 0 1.8 +XB_VB1 VB1 VB1 VDDB VDDB sky130_fd_pr__pfet_01v8 w=8 l=0.6 +IB_VB1 VB1 VSS 2e-05 +* DC servo (disclosed test auxiliary): VINT -> input DC level that makes V_out = VT; frozen at VHOLD when KSW = 1 +VT VT 0 0.9 +VMID VMID 0 0.9 +VKSW KSW 0 0 +VHOLD VHOLD 0 0 +BSRV VSRV 0 V = (1-v(KSW))*(0.54 + 0.5*tanh(200*(v(VOUT1)-v(VT)))) + v(KSW)*v(VHOLD) +RSRV VSRV VINT 1e3 +CSRV VINT 0 1e3 +EIN VIN1 VINT VAC 0 1 +VAC VAC 0 dc 0 ac 1 sin(0 1m 1meg) +RL VOUT1 VMID 20000 +CL VOUT1 VMID 5e-12 +.option method=gear reltol=1e-3 +.control +op +let vout0 = v(VOUT1) +let vin0 = v(VIN1) +let iq = -i(VDD) +print vout0 vin0 iq +set vin0_s = "$&vin0" +ac dec 20 10 10G +let gdb = db(v(VOUT1)) +meas ac gain_lf find gdb at=100 +set gain_s = "$&gain_lf" +let g3 = gdb - gain_lf + 3 +meas ac f3db when g3=0 cross=1 +* open-loop DC transfer around the operating point (servo frozen at the input level it found) +alter @VHOLD[dc] = $vin0_s +alter @VKSW[dc] = 1 +dc VAC -0.4 0.4 0.001 +let gin = abs(deriv(v(VOUT1))) +meas dc gmid find gin at=0 +let gn = gin/gmid +meas dc vo_a find v(VOUT1) when gn=0.5 cross=1 +meas dc vo_b find v(VOUT1) when gn=0.5 cross=last +let out_swing = abs(vo_b - vo_a) +print out_swing +* distortion at a fixed OUTPUT amplitude of 0.1 V (servo frozen, input amplitude = amplitude / |gain|) +alter @VKSW[dc] = 0 +let a_lin = 10^($gain_s/20) +let vamp2 = 0.1/a_lin +if vamp2 > 0.3 + let vamp2 = 0.3 +end +print vamp2 +alter @VAC[sin] = [ 0 $&vamp2 1meg ] +tran 2n 6u 3u +fourier 1meg v(VOUT1) +quit +.endc +.end diff --git a/benchmarks/textbook_sharing/data/frozen/fixed_order.json b/benchmarks/textbook_sharing/data/frozen/fixed_order.json new file mode 100644 index 00000000..b68a1eaf --- /dev/null +++ b/benchmarks/textbook_sharing/data/frozen/fixed_order.json @@ -0,0 +1,36 @@ +{ + "order": [ + "combined", + "gate_only", + "diffusion_only", + "independent" + ], + "per_mode": { + "diffusion_only": { + "applicable": 75, + "passed": 74, + "pass_rate": 0.9866666666666667, + "n_paired": 74, + "mean_rel_area": -0.024349224362344435 + }, + "gate_only": { + "applicable": 57, + "passed": 56, + "pass_rate": 0.9824561403508771, + "n_paired": 56, + "mean_rel_area": -0.04540359657543676 + }, + "combined": { + "applicable": 57, + "passed": 55, + "pass_rate": 0.9649122807017544, + "n_paired": 55, + "mean_rel_area": -0.05471477540677514 + } + }, + "sizes": [ + "sW1_sL1", + "sW1_sL1.5" + ], + "rule": "For each sharing mode m, over the development cases where both m and independent passed every automatic stage, take the mean of (A_m / A_independent - 1); order the modes by that mean ascending (ties: higher pass rate first); 'independent' is always last. Declared before the development results were read; computed from the development sizes only and frozen before any held-out size was measured." +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C01/gf180.json b/benchmarks/textbook_sharing/data/nominal/C01/gf180.json new file mode 100644 index 00000000..6d5155a1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C01/gf180.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C01", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.05 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C01/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C01/ihp130.json new file mode 100644 index 00000000..946c1579 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C01/ihp130.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C01", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.05 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C01/sky130.json b/benchmarks/textbook_sharing/data/nominal/C01/sky130.json new file mode 100644 index 00000000..6451f62f --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C01/sky130.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C01", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.05 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C02/gf180.json b/benchmarks/textbook_sharing/data/nominal/C02/gf180.json new file mode 100644 index 00000000..100a9be7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C02/gf180.json @@ -0,0 +1,44 @@ +{ + "circuit_id": "C02", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C02/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C02/ihp130.json new file mode 100644 index 00000000..f30f1baa --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C02/ihp130.json @@ -0,0 +1,44 @@ +{ + "circuit_id": "C02", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C02/sky130.json b/benchmarks/textbook_sharing/data/nominal/C02/sky130.json new file mode 100644 index 00000000..42ad4efc --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C02/sky130.json @@ -0,0 +1,44 @@ +{ + "circuit_id": "C02", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C03/gf180.json b/benchmarks/textbook_sharing/data/nominal/C03/gf180.json new file mode 100644 index 00000000..7f40fa41 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C03/gf180.json @@ -0,0 +1,39 @@ +{ + "circuit_id": "C03", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.24, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 2.24, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.1 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C03/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C03/ihp130.json new file mode 100644 index 00000000..1b1db194 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C03/ihp130.json @@ -0,0 +1,39 @@ +{ + "circuit_id": "C03", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 2.08, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 2.08, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.1 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C03/sky130.json b/benchmarks/textbook_sharing/data/nominal/C03/sky130.json new file mode 100644 index 00000000..1f14bac0 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C03/sky130.json @@ -0,0 +1,39 @@ +{ + "circuit_id": "C03", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 1.2, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 1.2, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.1 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C04/gf180.json b/benchmarks/textbook_sharing/data/nominal/C04/gf180.json new file mode 100644 index 00000000..d71ba661 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C04/gf180.json @@ -0,0 +1,32 @@ +{ + "circuit_id": "C04", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C04/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C04/ihp130.json new file mode 100644 index 00000000..8f90390c --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C04/ihp130.json @@ -0,0 +1,32 @@ +{ + "circuit_id": "C04", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C04/sky130.json b/benchmarks/textbook_sharing/data/nominal/C04/sky130.json new file mode 100644 index 00000000..44068d8f --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C04/sky130.json @@ -0,0 +1,32 @@ +{ + "circuit_id": "C04", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C05/gf180.json b/benchmarks/textbook_sharing/data/nominal/C05/gf180.json new file mode 100644 index 00000000..3a70f543 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C05/gf180.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C05", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 2.145, + "RL": 20000.0, + "CL": 1e-12 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C05/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C05/ihp130.json new file mode 100644 index 00000000..af3a5830 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C05/ihp130.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C05", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 0.78, + "RL": 20000.0, + "CL": 1e-12 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C05/sky130.json b/benchmarks/textbook_sharing/data/nominal/C05/sky130.json new file mode 100644 index 00000000..07807ab3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C05/sky130.json @@ -0,0 +1,34 @@ +{ + "circuit_id": "C05", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M1", + "current": 2e-05 + } + }, + "load": { + "vin_nom": 1.1700000000000002, + "RL": 20000.0, + "CL": 1e-12 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C06/gf180.json b/benchmarks/textbook_sharing/data/nominal/C06/gf180.json new file mode 100644 index 00000000..8f9b2215 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C06/gf180.json @@ -0,0 +1,52 @@ +{ + "circuit_id": "C06", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C06/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C06/ihp130.json new file mode 100644 index 00000000..cacedb1f --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C06/ihp130.json @@ -0,0 +1,52 @@ +{ + "circuit_id": "C06", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.26, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C06/sky130.json b/benchmarks/textbook_sharing/data/nominal/C06/sky130.json new file mode 100644 index 00000000..83959d0f --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C06/sky130.json @@ -0,0 +1,52 @@ +{ + "circuit_id": "C06", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M4", + "current": 2e-05, + "kind": "cascode" + }, + "VB2": { + "replica": "M1", + "current": 2e-05, + "kind": "cascode" + }, + "VB3": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C07/gf180.json b/benchmarks/textbook_sharing/data/nominal/C07/gf180.json new file mode 100644 index 00000000..79338835 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C07/gf180.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C07", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13, + "vocm": 1.65 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C07/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C07/ihp130.json new file mode 100644 index 00000000..36f37030 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C07/ihp130.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C07", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13, + "vocm": 0.6 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C07/sky130.json b/benchmarks/textbook_sharing/data/nominal/C07/sky130.json new file mode 100644 index 00000000..199a4701 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C07/sky130.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C07", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13, + "vocm": 0.9 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C08/gf180.json b/benchmarks/textbook_sharing/data/nominal/C08/gf180.json new file mode 100644 index 00000000..e2d4e022 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C08/gf180.json @@ -0,0 +1,49 @@ +{ + "circuit_id": "C08", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C08/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C08/ihp130.json new file mode 100644 index 00000000..3289a678 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C08/ihp130.json @@ -0,0 +1,49 @@ +{ + "circuit_id": "C08", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.39, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.39, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.39, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C08/sky130.json b/benchmarks/textbook_sharing/data/nominal/C08/sky130.json new file mode 100644 index 00000000..fc6b3356 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C08/sky130.json @@ -0,0 +1,49 @@ +{ + "circuit_id": "C08", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-12, + "inv_input": "VIN2" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C09/gf180.json b/benchmarks/textbook_sharing/data/nominal/C09/gf180.json new file mode 100644 index 00000000..59b0934d --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C09/gf180.json @@ -0,0 +1,76 @@ +{ + "circuit_id": "C09", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 2e-05, + "kind": "cascode" + }, + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 2e-05, + "M1": 2e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 1.4849999999999999 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C09/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C09/ihp130.json new file mode 100644 index 00000000..e4f206e3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C09/ihp130.json @@ -0,0 +1,76 @@ +{ + "circuit_id": "C09", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.26, + "nf": 32 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.54 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C09/sky130.json b/benchmarks/textbook_sharing/data/nominal/C09/sky130.json new file mode 100644 index 00000000..7b4d3df2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C09/sky130.json @@ -0,0 +1,76 @@ +{ + "circuit_id": "C09", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M2": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M5": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M6": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M7": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M8": { + "w": 16.0, + "l": 0.3, + "nf": 32 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 1e-05, + "kind": "cascode" + }, + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": { + "expr": "v(VB1) - gs(M3) + gs(M1) - 0.1", + "currents": { + "M3": 1e-05, + "M1": 1e-05 + } + }, + "CL": 1e-12, + "inv_input": "VIN2", + "vout_target": 0.81 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C10/gf180.json b/benchmarks/textbook_sharing/data/nominal/C10/gf180.json new file mode 100644 index 00000000..44af3438 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C10/gf180.json @@ -0,0 +1,93 @@ +{ + "circuit_id": "C10", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 1.5, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 1.65 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C10/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C10/ihp130.json new file mode 100644 index 00000000..542a0108 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C10/ihp130.json @@ -0,0 +1,93 @@ +{ + "circuit_id": "C10", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.52, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.52, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.6, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.6 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C10/sky130.json b/benchmarks/textbook_sharing/data/nominal/C10/sky130.json new file mode 100644 index 00000000..3a3ba6f1 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C10/sky130.json @@ -0,0 +1,93 @@ +{ + "circuit_id": "C10", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M5": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M6": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M7": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M9": { + "w": 4.0, + "l": 0.6, + "nf": 8 + }, + "M10": { + "w": 4.0, + "l": 0.6, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M5", + "current": 2e-05, + "kind": "cascode3" + }, + "VB2": { + "replica": "M7", + "current": 2e-05, + "kind": "cascode3" + }, + "VB3": { + "replica": "M9", + "current": 2e-05 + }, + "VB4": { + "replica": "M3", + "current": 4e-05 + }, + "IB1": { + "i": 4e-05, + "from": "VDD" + } + }, + "load": { + "vcm": 0.9, + "CL": 5e-13, + "cmfb_gain": 20.0, + "vocm": 0.9 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C11/gf180.json b/benchmarks/textbook_sharing/data/nominal/C11/gf180.json new file mode 100644 index 00000000..289a68a2 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C11/gf180.json @@ -0,0 +1,77 @@ +{ + "circuit_id": "C11", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 7.795 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "cap_mim_2f0fF" + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.32, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 1.65 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C11/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C11/ihp130.json new file mode 100644 index 00000000..5d1c2d64 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C11/ihp130.json @@ -0,0 +1,77 @@ +{ + "circuit_id": "C11", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 1.0, + "l": 11.38 + }, + "C1": { + "c": 1e-12, + "w": 25.82, + "l": 25.82, + "model": "cap_cmim" + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.48, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.6 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C11/sky130.json b/benchmarks/textbook_sharing/data/nominal/C11/sky130.json new file mode 100644 index 00000000..972e79fa --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C11/sky130.json @@ -0,0 +1,77 @@ +{ + "circuit_id": "C11", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M4": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M6": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M7": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M8": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 3000.0, + "body": "VSS", + "w": 0.35, + "l": 2.155 + }, + "C1": { + "c": 1e-12, + "w": 22.365, + "l": 22.365, + "model": "sky130_fd_pr__cap_mim_m3_1" + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.7200000000000001, + "CL": 1e-12, + "inv_input": "VIN1", + "vout_target": 0.9 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C12/gf180.json b/benchmarks/textbook_sharing/data/nominal/C12/gf180.json new file mode 100644 index 00000000..e854f149 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C12/gf180.json @@ -0,0 +1,27 @@ +{ + "circuit_id": "C12", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C12/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C12/ihp130.json new file mode 100644 index 00000000..b56957fe --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C12/ihp130.json @@ -0,0 +1,27 @@ +{ + "circuit_id": "C12", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C12/sky130.json b/benchmarks/textbook_sharing/data/nominal/C12/sky130.json new file mode 100644 index 00000000..d615edb3 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C12/sky130.json @@ -0,0 +1,27 @@ +{ + "circuit_id": "C12", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C13/gf180.json b/benchmarks/textbook_sharing/data/nominal/C13/gf180.json new file mode 100644 index 00000000..1e68ad00 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C13/gf180.json @@ -0,0 +1,53 @@ +{ + "circuit_id": "C13", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 0.5, + "l": 0.56, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.56, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.65, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C13/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C13/ihp130.json new file mode 100644 index 00000000..3a972577 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C13/ihp130.json @@ -0,0 +1,53 @@ +{ + "circuit_id": "C13", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 0.5, + "l": 0.52, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.52, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.52, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.6, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C13/sky130.json b/benchmarks/textbook_sharing/data/nominal/C13/sky130.json new file mode 100644 index 00000000..cab9c1ca --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C13/sky130.json @@ -0,0 +1,53 @@ +{ + "circuit_id": "C13", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 0.5, + "l": 0.3, + "nf": 1 + }, + "M2": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M3": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M4": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M5": { + "w": 2.0, + "l": 0.3, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 2e-05, + "from": "VDD" + }, + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.9, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C14/gf180.json b/benchmarks/textbook_sharing/data/nominal/C14/gf180.json new file mode 100644 index 00000000..05b70870 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C14/gf180.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C14", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.12, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.12, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.12, + "nf": 4 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 2.145, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C14/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C14/ihp130.json new file mode 100644 index 00000000..4ac1a17b --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C14/ihp130.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C14", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 1.04, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 1.04, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 1.04, + "nf": 4 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 0.78, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C14/sky130.json b/benchmarks/textbook_sharing/data/nominal/C14/sky130.json new file mode 100644 index 00000000..a7817d1b --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C14/sky130.json @@ -0,0 +1,48 @@ +{ + "circuit_id": "C14", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M2": { + "w": 2.0, + "l": 0.6, + "nf": 4 + }, + "M3": { + "w": 1.0, + "l": 0.6, + "nf": 2 + }, + "M4": { + "w": 2.0, + "l": 0.6, + "nf": 4 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IIN1": { + "i": 2e-05, + "from": "VDD" + }, + "IREF1": { + "i": 5e-06, + "from": "VDD" + }, + "IREF": 2e-05 + }, + "load": { + "vout_nom": 1.1700000000000002, + "tol": 0.03 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C15/gf180.json b/benchmarks/textbook_sharing/data/nominal/C15/gf180.json new file mode 100644 index 00000000..654023ba --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C15/gf180.json @@ -0,0 +1,28 @@ +{ + "circuit_id": "C15", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C15/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C15/ihp130.json new file mode 100644 index 00000000..941a22f7 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C15/ihp130.json @@ -0,0 +1,28 @@ +{ + "circuit_id": "C15", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C15/sky130.json b/benchmarks/textbook_sharing/data/nominal/C15/sky130.json new file mode 100644 index 00000000..a589da11 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C15/sky130.json @@ -0,0 +1,28 @@ +{ + "circuit_id": "C15", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": {}, + "load": { + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C16/gf180.json b/benchmarks/textbook_sharing/data/nominal/C16/gf180.json new file mode 100644 index 00000000..5fcdcb7a --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C16/gf180.json @@ -0,0 +1,45 @@ +{ + "circuit_id": "C16", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C16/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C16/ihp130.json new file mode 100644 index 00000000..cae18621 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C16/ihp130.json @@ -0,0 +1,45 @@ +{ + "circuit_id": "C16", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + }, + "R2": { + "r": 12000.0, + "body": "VSS", + "w": 1.0, + "l": 46.385 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C16/sky130.json b/benchmarks/textbook_sharing/data/nominal/C16/sky130.json new file mode 100644 index 00000000..ebf46e76 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C16/sky130.json @@ -0,0 +1,45 @@ +{ + "circuit_id": "C16", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "IB1": { + "i": 4e-05, + "from": "VSS" + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C17/gf180.json b/benchmarks/textbook_sharing/data/nominal/C17/gf180.json new file mode 100644 index 00000000..12a4b296 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C17/gf180.json @@ -0,0 +1,62 @@ +{ + "circuit_id": "C17", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "R1": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R2": { + "r": 40000.0, + "body": "VSS", + "w": 1.0, + "l": 60.0 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 1.0, + "l": 5.085 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 1.5, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C17/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C17/ihp130.json new file mode 100644 index 00000000..0bd11d88 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C17/ihp130.json @@ -0,0 +1,62 @@ +{ + "circuit_id": "C17", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "R1": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R2": { + "r": 15000.0, + "body": "VSS", + "w": 1.0, + "l": 58.055 + }, + "R3": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + }, + "R4": { + "r": 1000.0, + "body": "VSS", + "w": 1.0, + "l": 3.6 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.6, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C17/sky130.json b/benchmarks/textbook_sharing/data/nominal/C17/sky130.json new file mode 100644 index 00000000..a46fb5f8 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C17/sky130.json @@ -0,0 +1,62 @@ +{ + "circuit_id": "C17", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "R1": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R2": { + "r": 20000.0, + "body": "VSS", + "w": 0.35, + "l": 17.55 + }, + "R3": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + }, + "R4": { + "r": 2000.0, + "body": "VSS", + "w": 0.35, + "l": 1.25 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M3", + "current": 4e-05 + } + }, + "load": { + "vcm": 0.9, + "CL": 1e-13 + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C18/gf180.json b/benchmarks/textbook_sharing/data/nominal/C18/gf180.json new file mode 100644 index 00000000..ad18d419 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C18/gf180.json @@ -0,0 +1,58 @@ +{ + "circuit_id": "C18", + "pdk": "gf180", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.56, + "nf": 64 + } + }, + "supply": { + "VDD": 3.3, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 1.65, + "vin_center": 0.9899999999999999, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C18/ihp130.json b/benchmarks/textbook_sharing/data/nominal/C18/ihp130.json new file mode 100644 index 00000000..214e3c65 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C18/ihp130.json @@ -0,0 +1,58 @@ +{ + "circuit_id": "C18", + "pdk": "ihp130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.26, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.26, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.26, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.26, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.26, + "nf": 64 + } + }, + "supply": { + "VDD": 1.2, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.6, + "vin_center": 0.36, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/nominal/C18/sky130.json b/benchmarks/textbook_sharing/data/nominal/C18/sky130.json new file mode 100644 index 00000000..1f529530 --- /dev/null +++ b/benchmarks/textbook_sharing/data/nominal/C18/sky130.json @@ -0,0 +1,58 @@ +{ + "circuit_id": "C18", + "pdk": "sky130", + "sizing": { + "M1": { + "w": 2.0, + "l": 0.3, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.3, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.3, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.3, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.3, + "nf": 64 + } + }, + "supply": { + "VDD": 1.8, + "VSS": 0.0 + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 2e-05 + } + }, + "load": { + "RL": 20000.0, + "CL": 5e-12, + "vamp": 0.02, + "vout_target": 0.9, + "vin_center": 0.54, + "servo_slope": 200.0, + "options": ".option method=gear reltol=1e-3" + }, + "notes": [ + "first-pass sizing v1" + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/data/res_calibration.json b/benchmarks/textbook_sharing/data/res_calibration.json new file mode 100644 index 00000000..7f404805 --- /dev/null +++ b/benchmarks/textbook_sharing/data/res_calibration.json @@ -0,0 +1,50 @@ +{ + "sky130": { + "w": 0.35, + "points": [ + [ + 5.0, + 6144.664 + ], + [ + 20.0, + 22708.8 + ] + ], + "a_ohm_per_um": 1104.2757333333332, + "b_ohm": 623.2853333333342, + "rsh_nominal_table": 319.8 + }, + "gf180": { + "w": 1.0, + "points": [ + [ + 5.0, + 1969.782 + ], + [ + 20.0, + 7500.941 + ] + ], + "a_ohm_per_um": 368.7439333333333, + "b_ohm": 126.06233333333353, + "rsh_nominal_table": 315.0 + }, + "ihp130": { + "w": 1.0, + "points": [ + [ + 5.0, + 1360.14 + ], + [ + 20.0, + 5216.774 + ] + ], + "a_ohm_per_um": 257.1089333333333, + "b_ohm": 74.59533333333343, + "rsh_nominal_table": 260.0 + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/results/analysis/agent_session_audit.json b/benchmarks/textbook_sharing/results/analysis/agent_session_audit.json new file mode 100644 index 00000000..dee5ccb3 --- /dev/null +++ b/benchmarks/textbook_sharing/results/analysis/agent_session_audit.json @@ -0,0 +1,2297 @@ +{ + "what": "Tool-call audit of the 84 Anthropic model sessions (agent interface). Allowed: Read/Write/Edit of a file inside the session folder and `bash submit.sh ` run inside it. Any other call is flagged: 'in_folder_edit' = text processing of the session's own files (protocol deviation, no outside information); 'isolation_breach' = anything else (outside paths, listing/search, network); every automatically flagged session was reviewed by hand.", + "model_ids_in_transcripts": { + "claude-sonnet-5-5": 1900 + }, + "launch_texts": { + "A": "You are the model under test in a controlled analog-layout experiment. Your session folder is:\n\n\nRead README.md in that folder first and follow it exactly. Use only the files in that folder (README.md, interface.md, examples.md, task.md). Write each proposal with the Write tool as p_answer.md in that folder, then run exactly this Bash command (with k replaced by the proposal number) to submit it and read the tool report:\ncd && bash submit.sh k\nDo not open, list or search any other file or directory, and do not run any other command. You have at most 8 proposals. When you stop, reply with one line: the number of the proposal you consider best.", + "B": "You are the model under test in a controlled analog-layout experiment. Your session folder is:\n\n\nRead README.md in that folder first and follow it exactly. Use only the files in that folder (README.md, interface.md, examples.md, task.md). Write each proposal with the Write tool as p_answer.md in that folder, then run exactly this Bash command (with k replaced by the proposal number) to submit it and read the tool report:\ncd && bash submit.sh k\nDo not open, list or search any other file or directory, and do not run any other command. Run the submit command in the foreground and wait for its report. You have at most 8 proposals. When you stop, reply with one line: the number of the proposal you consider best." + }, + "launch_text_note": "Text B adds one sentence (run submit.sh in the foreground and wait for its report). The first 66 sessions launched received text A, the last 18 text B.", + "summary": { + "sessions": 84, + "clean": 44, + "in_folder_edit_sessions": 39, + "auto_flagged": 2, + "after_manual_review": { + "benign": 1, + "outside_folder_read_own_output": 1, + "foreign_information_access": 0 + }, + "launch_text_counts": { + "A": 66, + "B": 18 + } + }, + "token_usage_sum": { + "input_tokens": 3814, + "output_tokens": 1140686, + "cache_read_input_tokens": 111474062, + "cache_creation_input_tokens": 6557167 + }, + "sessions": [ + { + "task_id": "C02_gf180_sW2_sL1", + "rep": 1, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_gf180_sW2_sL1", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Edit", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -i 's/\\[T" + } + } + ] + }, + { + "task_id": "C02_gf180_sW2_sL1", + "rep": 3, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_gf180_sW2_sL2", + "rep": 1, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_gf180_sW2_sL2", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_gf180_sW2_sL2", + "rep": 3, + "tool_calls": 21, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_ihp130_sW2_sL1", + "rep": 1, + "tool_calls": 12, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 4, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/pad_e" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C02_ihp130_sW2_sL1", + "rep": 2, + "tool_calls": 20, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_ihp130_sW2_sL1", + "rep": 3, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=" + } + } + ] + }, + { + "task_id": "C02_ihp130_sW2_sL2", + "rep": 1, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_ihp130_sW2_sL2", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_ihp130_sW2_sL2", + "rep": 3, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_sky130_sW2_sL1", + "rep": 1, + "tool_calls": 20, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=" + } + } + ] + }, + { + "task_id": "C02_sky130_sW2_sL1", + "rep": 2, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_sky130_sW2_sL1", + "rep": 3, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 3, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=" + } + } + ] + }, + { + "task_id": "C02_sky130_sW2_sL2", + "rep": 1, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C02_sky130_sW2_sL2", + "rep": 2, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 5, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/si" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && cat > p3_ans" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && cat > p4_ans" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/si" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/si" + } + } + ] + }, + { + "task_id": "C02_sky130_sW2_sL2", + "rep": 3, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_gf180_sW2_sL1", + "rep": 1, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_gf180_sW2_sL1", + "rep": 2, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_gf180_sW2_sL1", + "rep": 3, + "tool_calls": 8, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/GateGr" + } + } + ] + }, + { + "task_id": "C08_gf180_sW2_sL2", + "rep": 1, + "tool_calls": 10, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Gat" + } + } + ] + }, + { + "task_id": "C08_gf180_sW2_sL2", + "rep": 2, + "tool_calls": 8, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_gf180_sW2_sL2", + "rep": 3, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_ihp130_sW2_sL2", + "rep": 1, + "tool_calls": 6, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_ihp130_sW2_sL2", + "rep": 2, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_ihp130_sW2_sL2", + "rep": 3, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_sky130_sW2_sL1", + "rep": 1, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_sky130_sW2_sL1", + "rep": 2, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_sky130_sW2_sL1", + "rep": 3, + "tool_calls": 20, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + } + ] + }, + { + "task_id": "C08_sky130_sW2_sL2", + "rep": 1, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 4, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C08_sky130_sW2_sL2", + "rep": 2, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C08_sky130_sW2_sL2", + "rep": 3, + "tool_calls": 26, + "tools": [ + "Bash", + "Monitor", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 0, + "auto_flagged": true, + "manual_review": "outside-folder read of its own output: the agent ran submit.sh in the background and then read the background job's output file, which contains only its own tool report; no other file was read", + "flagged_calls": [ + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "until [ -s ]; do sleep 5; done; cat ", + "description": "Wait for proposal 2 report", + "timeout_ms": "600000", + "persistent": "false" + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "sleep 1; echo waiting", + "description": "noop", + "timeout_ms": "5000", + "persistent": "false" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat " + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "until [ -s ]; do sleep 10; done; cat ", + "description": "Wait for proposal 2 report", + "timeout_ms": "600000", + "persistent": "false" + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "sleep 300; echo done", + "description": "Idle wait", + "timeout_ms": "320000", + "persistent": "false" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat " + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "until [ -s ]; do sleep 10; done; cat ", + "description": "Wait for proposal 2 report", + "timeout_ms": "600000", + "persistent": "false" + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "sleep 540; echo done", + "description": "Idle wait", + "timeout_ms": "580000", + "persistent": "false" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat " + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "sleep 580; echo done", + "description": "Idle wait", + "timeout_ms": "590000", + "persistent": "false" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat " + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "until [ -s ]; do sleep 10; done; cat ", + "description": "Wait for proposal 2 report", + "timeout_ms": "600000", + "persistent": "false" + } + }, + { + "tool": "Monitor", + "class": "isolation_breach", + "input": { + "command": "sleep 590; echo done", + "description": "Idle wait", + "timeout_ms": "595000", + "persistent": "false" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat " + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL1", + "rep": 1, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 3, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL1", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 3, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e '1,/^ " + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL1", + "rep": 3, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Gat" + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL2", + "rep": 1, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 5, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/orient" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/gate_g" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/gate_g" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL2", + "rep": 2, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 7, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\ndef fo(d): return \", \".join('(\"%s\", %d)'%(d,k) for k in range(16))\ndef pl(order,ors,joins,gg):\n fing=\", \".join(fo(d) for d in order)\n return \"SharingPlan(finger_order=[%s], orien" + } + } + ] + }, + { + "task_id": "C09_gf180_sW2_sL2", + "rep": 3, + "tool_calls": 19, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 2, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && grep -n \"gate" + } + } + ] + }, + { + "task_id": "C09_ihp130_sW2_sL1", + "rep": 1, + "tool_calls": 10, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C09_ihp130_sW2_sL1", + "rep": 2, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/strap", + "dangerouslyDisableSandbox": "False" + } + } + ] + }, + { + "task_id": "C09_ihp130_sW2_sL1", + "rep": 3, + "tool_calls": 12, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C09_ihp130_sW2_sL2", + "rep": 1, + "tool_calls": 19, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && echo skip" + } + } + ] + }, + { + "task_id": "C09_ihp130_sW2_sL2", + "rep": 2, + "tool_calls": 9, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C09_ihp130_sW2_sL2", + "rep": 3, + "tool_calls": 23, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && echo ok" + } + } + ] + }, + { + "task_id": "C09_sky130_sW2_sL1", + "rep": 1, + "tool_calls": 9, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C09_sky130_sW2_sL1", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/GateG" + } + } + ] + }, + { + "task_id": "C09_sky130_sW2_sL1", + "rep": 3, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C11_gf180_sW2_sL1", + "rep": 1, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 5, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Gat" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/str" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Gat" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/dif" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/dif" + } + } + ] + }, + { + "task_id": "C11_gf180_sW2_sL1", + "rep": 2, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/contac" + } + } + ] + }, + { + "task_id": "C11_gf180_sW2_sL1", + "rep": 3, + "tool_calls": 19, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/GateGr" + } + } + ] + }, + { + "task_id": "C11_gf180_sW2_sL2", + "rep": 1, + "tool_calls": 9, + "tools": [ + "Bash", + "Edit", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C11_gf180_sW2_sL2", + "rep": 2, + "tool_calls": 17, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/side=\"" + } + } + ] + }, + { + "task_id": "C11_gf180_sW2_sL2", + "rep": 3, + "tool_calls": 12, + "tools": [ + "Bash", + "Read" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 8, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<'" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/range(" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/range(" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ran" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ran" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ran" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e '/^ 1:" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL1", + "rep": 1, + "tool_calls": 7, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/pad_e" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL1", + "rep": 2, + "tool_calls": 12, + "tools": [ + "Bash", + "Read" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 8, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && grep -n \"Gat" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL1", + "rep": 3, + "tool_calls": 22, + "tools": [ + "Bash", + "Edit", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ga" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL2", + "rep": 1, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 6, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/GateG" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/pad_e" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL2", + "rep": 2, + "tool_calls": 24, + "tools": [ + "Bash", + "Edit", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -i 's/or" + } + } + ] + }, + { + "task_id": "C11_ihp130_sW2_sL2", + "rep": 3, + "tool_calls": 12, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 2, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/GateG" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/range" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL1", + "rep": 1, + "tool_calls": 12, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 2, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed 's/conta" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL1", + "rep": 2, + "tool_calls": 20, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 4, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\nfo=[(\"M1\",k) for k in range(8)]+[(\"M2\",k) for k in range(7)]+[(\"M3\",k) for k in range(16)]+[(\"M4\",k) for k in range(16)]+[(\"M2\",k) for k in range(7,16)]+[(\"M7\",k) for k in range(16)]\np" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\nfo=[(\"M2\",0)]+[(\"M1\",k) for k in range(8)]+[(\"M7\",k) for k in range(16)]+[(\"M2\",k) for k in range(1,16)]+[(\"M3\",k) for k in range(16)]+[(\"M4\",k) for k in range(16)]\nprint(str(fo).repla" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "python3 - <<'E'\nfo=[(\"M1\",k) for k in range(8)]+[(\"M7\",k) for k in range(16)]+[(\"M2\",k) for k in range(16)]+[(\"M3\",k) for k in range(16)]+[(\"M4\",k) for k in range(16)]\nprint(str(fo).replace(\"'\",'\"'), " + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL1", + "rep": 3, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 6, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/si" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e '/^ " + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL2", + "rep": 1, + "tool_calls": 10, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 1, + "auto_flagged": true, + "manual_review": "benign: the only command outside the protocol was `cat /dev/null` (no file read)", + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "isolation_breach", + "input": { + "command": "cat /dev/null", + "description": "no-op" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL2", + "rep": 2, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": false, + "in_folder_edits": 4, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C11_sky130_sW2_sL2", + "rep": 3, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": false, + "in_folder_edits": 5, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [ + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/Ga" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && cat > p3_ans" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && sed -e 's/ra" + } + }, + { + "tool": "Bash", + "class": "in_folder_edit", + "input": { + "command": "cd && python3 - <<" + } + } + ] + }, + { + "task_id": "C16_gf180_sW2_sL1", + "rep": 1, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_gf180_sW2_sL1", + "rep": 2, + "tool_calls": 18, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_gf180_sW2_sL1", + "rep": 3, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_gf180_sW2_sL2", + "rep": 1, + "tool_calls": 9, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_gf180_sW2_sL2", + "rep": 2, + "tool_calls": 12, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_gf180_sW2_sL2", + "rep": 3, + "tool_calls": 19, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL1", + "rep": 1, + "tool_calls": 16, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL1", + "rep": 2, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL1", + "rep": 3, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL2", + "rep": 1, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL2", + "rep": 2, + "tool_calls": 10, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_ihp130_sW2_sL2", + "rep": 3, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL1", + "rep": 1, + "tool_calls": 11, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL1", + "rep": 2, + "tool_calls": 13, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL1", + "rep": 3, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL2", + "rep": 1, + "tool_calls": 14, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL2", + "rep": 2, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "A", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + }, + { + "task_id": "C16_sky130_sW2_sL2", + "rep": 3, + "tool_calls": 15, + "tools": [ + "Bash", + "Read", + "Write" + ], + "launch_text": "B", + "clean": true, + "in_folder_edits": 0, + "auto_flagged": false, + "manual_review": null, + "flagged_calls": [] + } + ] +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/results/analysis/arrangement_bandwidth_C16.json b/benchmarks/textbook_sharing/results/analysis/arrangement_bandwidth_C16.json new file mode 100644 index 00000000..aa434e34 --- /dev/null +++ b/benchmarks/textbook_sharing/results/analysis/arrangement_bandwidth_C16.json @@ -0,0 +1,1104 @@ +{ + "C16_gf180_sW1_sL1": { + "group0.arrangement=abba": { + "status": { + "auto_passed": 12 + }, + "mean_f3db_MHz": 56.66641833333333, + "mean_gain_dB": 11.627238333333334, + "mean_area_um2": 1757.4442666666666 + }, + "group0.arrangement=block": { + "status": { + "auto_passed": 9 + }, + "mean_f3db_MHz": 62.81503222222222, + "mean_gain_dB": 11.622273333333332, + "mean_area_um2": 1634.940711111111 + }, + "group0.arrangement=interleave": { + "status": { + "auto_passed": 16 + }, + "mean_f3db_MHz": 51.95348375, + "mean_gain_dB": 11.629190000000001, + "mean_area_um2": 1773.9616 + }, + "group0.arrangement=mirror": { + "status": { + "auto_passed": 12 + }, + "mean_f3db_MHz": 59.83345416666666, + "mean_gain_dB": 11.623853333333333, + "mean_area_um2": 1775.6133333333332 + }, + "group0.diffusion=all_legal": { + "status": { + "auto_passed": 19 + }, + "mean_f3db_MHz": 57.3924352631579, + "mean_gain_dB": 11.628118421052632, + "mean_area_um2": 1750.62 + }, + "group0.diffusion=none": { + "status": { + "auto_passed": 30 + }, + "mean_f3db_MHz": 56.804441, + "mean_gain_dB": 11.624878333333333, + "mean_area_um2": 1741.0921066666667 + }, + "group0.gate=per_device": { + "status": { + "auto_passed": 49 + }, + "mean_f3db_MHz": 57.03243877551021, + "mean_gain_dB": 11.626134693877551, + "mean_area_um2": 1744.7865959183673 + }, + "group0.orientation=alt_DS": { + "status": { + "auto_passed": 23 + }, + "mean_f3db_MHz": 57.05605173913044, + "mean_gain_dB": 11.627099130434782, + "mean_area_um2": 1707.281843478261 + }, + "group0.orientation=alt_SD": { + "status": { + "auto_passed": 26 + }, + "mean_f3db_MHz": 57.01155038461538, + "mean_gain_dB": 11.625281538461538, + "mean_area_um2": 1777.963876923077 + }, + "group0.strap_start=bottom": { + "status": { + "auto_passed": 26 + }, + "mean_f3db_MHz": 57.406654230769234, + "mean_gain_dB": 11.625922692307693, + "mean_area_um2": 1763.6700307692308 + }, + "group0.strap_start=top": { + "status": { + "auto_passed": 23 + }, + "mean_f3db_MHz": 56.60941260869565, + "mean_gain_dB": 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"C13_ihp130_sW2_sL1.5", + "C13_ihp130_sW2_sL2", + "C13_sky130_sW1.5_sL1", + "C13_sky130_sW1.5_sL1.5", + "C13_sky130_sW1.5_sL2", + "C13_sky130_sW1_sL1", + "C13_sky130_sW1_sL1.5", + "C13_sky130_sW1_sL2", + "C13_sky130_sW2_sL1", + "C13_sky130_sW2_sL1.5", + "C13_sky130_sW2_sL2", + "C14_gf180_sW0.5_sL1", + "C14_gf180_sW0.5_sL1.5", + "C14_gf180_sW0.5_sL2", + "C14_gf180_sW1.5_sL1", + "C14_gf180_sW1.5_sL1.5", + "C14_gf180_sW1.5_sL2", + "C14_gf180_sW1_sL1", + "C14_gf180_sW1_sL1.5", + "C14_gf180_sW1_sL2", + "C14_gf180_sW2_sL1", + "C14_gf180_sW2_sL1.5", + "C14_gf180_sW2_sL2", + "C14_ihp130_sW0.5_sL1", + "C14_ihp130_sW0.5_sL1.5", + "C14_ihp130_sW0.5_sL2", + "C14_ihp130_sW1.5_sL1", + "C14_ihp130_sW1.5_sL1.5", + "C14_ihp130_sW1.5_sL2", + "C14_ihp130_sW1_sL1", + "C14_ihp130_sW1_sL1.5", + "C14_ihp130_sW1_sL2", + "C14_ihp130_sW2_sL1", + "C14_ihp130_sW2_sL1.5", + "C14_ihp130_sW2_sL2", + "C14_sky130_sW0.5_sL1", + "C14_sky130_sW0.5_sL1.5", + "C14_sky130_sW0.5_sL2", + "C14_sky130_sW1.5_sL1", + "C14_sky130_sW1.5_sL1.5", + "C14_sky130_sW1.5_sL2", + "C14_sky130_sW1_sL1", + "C14_sky130_sW1_sL1.5", + "C14_sky130_sW1_sL2", + "C14_sky130_sW2_sL1", + "C14_sky130_sW2_sL1.5", + "C14_sky130_sW2_sL2", + "C15_gf180_sW0.5_sL1", + "C15_gf180_sW1.5_sL1", + "C15_gf180_sW1.5_sL1.5", + "C15_gf180_sW1.5_sL2", + "C15_gf180_sW1_sL1", + "C15_gf180_sW1_sL1.5", + "C15_gf180_sW1_sL2", + "C15_gf180_sW2_sL1", + "C15_gf180_sW2_sL1.5", + "C15_gf180_sW2_sL2", + "C15_ihp130_sW0.5_sL1", + "C15_ihp130_sW0.5_sL1.5", + "C15_ihp130_sW1.5_sL1", + "C15_ihp130_sW1.5_sL1.5", + "C15_ihp130_sW1.5_sL2", + "C15_ihp130_sW1_sL1", + "C15_ihp130_sW1_sL1.5", + "C15_ihp130_sW1_sL2", + "C15_ihp130_sW2_sL1", + "C15_ihp130_sW2_sL1.5", + "C15_ihp130_sW2_sL2", + "C15_sky130_sW0.5_sL1", + "C15_sky130_sW0.5_sL1.5", + "C15_sky130_sW0.5_sL2", + "C15_sky130_sW1.5_sL1", + "C15_sky130_sW1.5_sL1.5", + "C15_sky130_sW1.5_sL2", + "C15_sky130_sW1_sL1", + "C15_sky130_sW1_sL1.5", + "C15_sky130_sW1_sL2", + "C15_sky130_sW2_sL1", + "C15_sky130_sW2_sL1.5", + "C15_sky130_sW2_sL2", + "C16_gf180_sW0.5_sL1", + "C16_gf180_sW1.5_sL1", + "C16_gf180_sW1.5_sL1.5", + "C16_gf180_sW1.5_sL2", + "C16_gf180_sW1_sL1", + "C16_gf180_sW1_sL1.5", + "C16_gf180_sW1_sL2", + "C16_gf180_sW2_sL1", + "C16_gf180_sW2_sL1.5", + "C16_gf180_sW2_sL2", + "C16_ihp130_sW0.5_sL1", + "C16_ihp130_sW1.5_sL1", + "C16_ihp130_sW1.5_sL1.5", + "C16_ihp130_sW1.5_sL2", + "C16_ihp130_sW1_sL1", + "C16_ihp130_sW1_sL1.5", + "C16_ihp130_sW1_sL2", + "C16_ihp130_sW2_sL1", + "C16_ihp130_sW2_sL1.5", + "C16_ihp130_sW2_sL2", + "C16_sky130_sW0.5_sL1", + "C16_sky130_sW0.5_sL1.5", + "C16_sky130_sW0.5_sL2", + "C16_sky130_sW1.5_sL1", + "C16_sky130_sW1.5_sL1.5", + "C16_sky130_sW1.5_sL2", + "C16_sky130_sW1_sL1", + "C16_sky130_sW1_sL1.5", + "C16_sky130_sW1_sL2", + "C16_sky130_sW2_sL1", + "C16_sky130_sW2_sL1.5", + "C16_sky130_sW2_sL2", + "C17_gf180_sW0.5_sL1", + "C17_gf180_sW1.5_sL1", + "C17_gf180_sW1.5_sL1.5", + "C17_gf180_sW1.5_sL2", + "C17_gf180_sW1_sL1", + "C17_gf180_sW1_sL1.5", + "C17_gf180_sW2_sL1", + "C17_gf180_sW2_sL1.5", + "C17_gf180_sW2_sL2", + "C17_ihp130_sW1.5_sL1", + "C17_ihp130_sW1.5_sL1.5", + "C17_ihp130_sW1.5_sL2", + "C17_ihp130_sW1_sL1", + "C17_ihp130_sW1_sL1.5", + "C17_ihp130_sW1_sL2", + "C17_ihp130_sW2_sL1", + "C17_ihp130_sW2_sL1.5", + "C17_ihp130_sW2_sL2", + "C17_sky130_sW0.5_sL1", + "C17_sky130_sW1.5_sL1", + "C17_sky130_sW1.5_sL1.5", + "C17_sky130_sW1.5_sL2", + "C17_sky130_sW1_sL1", + "C17_sky130_sW1_sL1.5", + "C17_sky130_sW1_sL2", + "C17_sky130_sW2_sL1", + "C17_sky130_sW2_sL1.5", + "C17_sky130_sW2_sL2" + ], + "diagnostic": [ + { + "case_id": "C01_ihp130_sW1.5_sL1", + "reason": "schematic_not_qualified", + "detail": "|err|=0.07675 above floor 0.05" + }, + { + "case_id": "C01_ihp130_sW1.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "|err|=0.05134 above floor 0.05" + }, + { + "case_id": "C01_ihp130_sW1_sL1", + "reason": "schematic_not_qualified", + "detail": "|err|=0.05651 above floor 0.05" + }, + { + "case_id": "C01_ihp130_sW2_sL1", + "reason": "schematic_not_qualified", + "detail": "|err|=0.09228 above floor 0.05" + }, + { + "case_id": "C01_ihp130_sW2_sL1.5", + "reason": "schematic_not_qualified", + "detail": "|err|=0.06344 above floor 0.05" + }, + { + "case_id": "C03_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "vmin=0.7801 above floor 0.78" + }, + { + "case_id": "C04_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "f3db=9.953e+05 below floor 1e+06" + }, + { + "case_id": "C04_gf180_sW1.5_sL2", + "reason": "reference_spec_failed" + }, + { + "case_id": "C04_gf180_sW1_sL2", + "reason": "reference_spec_failed" + }, + { + "case_id": "C04_gf180_sW2_sL2", + "reason": "reference_spec_failed" + }, + { + "case_id": "C05_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_at_nom=0.5874 below floor 0.6" + }, + { + "case_id": "C06_sky130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=27.82 below floor 30" + }, + { + "case_id": "C06_sky130_sW1.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=28.66 below floor 30" + }, + { + "case_id": "C06_sky130_sW2_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=24.89 below floor 30" + }, + { + "case_id": "C06_sky130_sW2_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=28.59 below floor 30" + }, + { + "case_id": "C06_sky130_sW2_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=29.84 below floor 30" + }, + { + "case_id": "C08_ihp130_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=24.93 below floor 25" + }, + { + "case_id": "C08_ihp130_sW2_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=24.94 below floor 25" + }, + { + "case_id": "C09_gf180_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=33 below floor 35; ugf=1.153e+06 below floor 2e+06" + }, + { + "case_id": "C09_gf180_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "servo did not reach the output target: vout0=-0.238433 target=1.485 (tol 0.066 V); gain_lf=-26.09 below floor 35; ugf: not measurable in the schematic" + }, + { + "case_id": "C09_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "servo did not reach the output target: vout0=-0.565526 target=1.485 (tol 0.066 V); gain_lf=-37.12 below floor 35; ugf: not measurable in the schematic" + }, + { + "case_id": "C09_gf180_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "ugf=7.508e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=22.39 below floor 35; ugf=8.161e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=8.451 below floor 35; ugf=2.38e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "servo did not reach the output target: vout0=-0.378581 target=0.81 (tol 0.036 V); gain_lf=-32.29 below floor 35; ugf: not measurable in the schematic" + }, + { + "case_id": "C09_sky130_sW1.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=32.13 below floor 35; ugf=8.883e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW1.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=20.24 below floor 35; ugf=3.812e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW1_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=19.7 below floor 35; ugf=4.845e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=13.57 below floor 35; ugf=2.635e+05 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW2_sL1.5", + "reason": "schematic_not_qualified", + "detail": "ugf=1.549e+06 below floor 2e+06" + }, + { + "case_id": "C09_sky130_sW2_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=27.56 below floor 35; ugf=5.326e+05 below floor 2e+06" + }, + { + "case_id": "C10_ihp130_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=30.08 below floor 35" + }, + { + "case_id": "C10_ihp130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=27.28 below floor 35" + }, + { + "case_id": "C10_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=21.41 below floor 35" + }, + { + "case_id": "C10_ihp130_sW1_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=34.19 below floor 35" + }, + { + "case_id": "C10_ihp130_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=33.42 below floor 35" + }, + { + "case_id": "C10_sky130_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "gain_lf=31.79 below floor 35" + }, + { + "case_id": "C10_sky130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=28.3 below floor 35" + }, + { + "case_id": "C10_sky130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=24.99 below floor 35" + }, + { + "case_id": "C10_sky130_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=33.8 below floor 35" + }, + { + "case_id": "C12_sky130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "f3db=9.794e+05 below floor 1e+06" + }, + { + "case_id": "C13_gf180_sW0.5_sL1", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the gf180 minimum 0.36 um" + }, + { + "case_id": "C13_gf180_sW0.5_sL1.5", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the gf180 minimum 0.36 um" + }, + { + "case_id": "C13_gf180_sW0.5_sL2", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the gf180 minimum 0.36 um" + }, + { + "case_id": "C13_ihp130_sW0.5_sL1", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the ihp130 minimum 0.3 um" + }, + { + "case_id": "C13_ihp130_sW0.5_sL1.5", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the ihp130 minimum 0.3 um" + }, + { + "case_id": "C13_ihp130_sW0.5_sL2", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the ihp130 minimum 0.3 um" + }, + { + "case_id": "C13_sky130_sW0.5_sL1", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the sky130 minimum 0.29 um" + }, + { + "case_id": "C13_sky130_sW0.5_sL1.5", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the sky130 minimum 0.29 um" + }, + { + "case_id": "C13_sky130_sW0.5_sL2", + "reason": "parameter_illegal", + "detail": "unit finger width 0.25 um of M1 below the sky130 minimum 0.29 um" + }, + { + "case_id": "C15_gf180_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=7.201 below floor 8" + }, + { + "case_id": "C15_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.973 below floor 8" + }, + { + "case_id": "C15_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=7.377 below floor 8" + }, + { + "case_id": "C16_gf180_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=6.852 below floor 8" + }, + { + "case_id": "C16_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.577 below floor 8" + }, + { + "case_id": "C16_ihp130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=7.371 below floor 8" + }, + { + "case_id": "C16_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=6.721 below floor 8" + }, + { + "case_id": "C17_gf180_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=4.396 below floor 6" + }, + { + "case_id": "C17_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=3.003 below floor 6" + }, + { + "case_id": "C17_gf180_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.996 below floor 6" + }, + { + "case_id": "C17_ihp130_sW0.5_sL1", + "reason": "reference_spec_failed" + }, + { + "case_id": "C17_ihp130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.942 below floor 6" + }, + { + "case_id": "C17_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.469 below floor 6" + }, + { + "case_id": "C17_sky130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "gain_lf=5.423 below floor 6" + }, + { + "case_id": "C17_sky130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "gain_lf=4.267 below floor 6" + }, + { + "case_id": "C18_gf180_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=26.94 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=21.36 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "servo did not reach the output target: vout0=1.725938 target=1.65 (tol 0.066 V); thd_pct=20.72 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1.5_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=28.89 above floor 3; out_swing=0.3135 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=38.76 above floor 3; out_swing=0.4003 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1.5_sL2", + "reason": "schematic_not_qualified", + "detail": "thd_pct=33.01 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=32.9 above floor 3; out_swing=0.4151 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=29.98 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW1_sL2", + "reason": "schematic_not_qualified", + "detail": "thd_pct=21.38 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW2_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=26.61 above floor 3; out_swing=0.2552 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW2_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=33.43 above floor 3; out_swing=0.3971 below floor 0.825" + }, + { + "case_id": "C18_gf180_sW2_sL2", + "reason": "schematic_not_qualified", + "detail": "thd_pct=42.28 above floor 3; out_swing=0 below floor 0.825" + }, + { + "case_id": "C18_ihp130_sW0.5_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=54.68 above floor 3; out_swing=0 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW0.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=40.33 above floor 3; out_swing=0 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW0.5_sL2", + "reason": "schematic_not_qualified", + "detail": "thd_pct=36.63 above floor 3; out_swing=0 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1.5_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=25.63 above floor 3; out_swing=0.1936 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1.5_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=31.37 above floor 3; out_swing=0.228 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1.5_sL2", + "reason": "schematic_not_qualified", + "detail": "thd_pct=34.67 above floor 3; out_swing=0.2387 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1_sL1", + "reason": "schematic_not_qualified", + "detail": "thd_pct=31.41 above floor 3; out_swing=0.1982 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1_sL1.5", + "reason": "schematic_not_qualified", + "detail": "thd_pct=39.25 above floor 3; out_swing=0.2183 below floor 0.3" + }, + { + "case_id": "C18_ihp130_sW1_sL2", + "reason": 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(prod(p_g) <= limit)", + "limit": 64 + }, + "evaluated": { + "auto_passed": 49 + }, + "review": { + "pass": 6, + "review_pending": 43 + } + }, + "C16_sky130_sW2_sL2": { + "ledger": { + "per_group": [ + { + "devices": [ + "M1", + "M2" + ], + "raw": 256, + "static_illegal": 16, + "equivalent_duplicate": 191, + "unique": 49 + } + ], + "raw_per_group": 256, + "global_product_of_unique": 49, + "named_distinct": 2, + "selected_for_evaluation": 49, + "sampling": "exhaustive (prod(p_g) <= limit)", + "limit": 64 + }, + "evaluated": { + "auto_passed": 49 + }, + "review": { + "review_pending": 46, + "pass": 3 + } + } + }, + "totals": { + "selected": 3404, + "eval:auto_passed": 3360, + "review:pass": 721, + "review:review_pending": 2664, + "review:suspicious(resolved_ok)": 19, + "eval:spec_failed": 44 + } + } +} \ No newline at end of file diff --git a/benchmarks/textbook_sharing/results/count_ledger.md b/benchmarks/textbook_sharing/results/count_ledger.md new file mode 100644 index 00000000..b4d52d89 --- /dev/null +++ b/benchmarks/textbook_sharing/results/count_ledger.md @@ -0,0 +1,18 @@ +# Count ledger + +| level | count | +|---|---| +| requested | 648 | +| parameter_illegal | 9 | +| duplicate | 0 | +| distinct_legal | 639 | +| schematic_not_qualified | 88 | +| qualified | 551 | +| formal_entries | 547 | +| diagnostic | 101 | + +reference (independent mode) first status: {"auto_passed": 547, "spec_failed": 4} + +mode rows: {"auto_passed": 1608, "NA": 592, "spec_failed": 4} + +selection candidates: {"selected": 3404, "eval:auto_passed": 3360, "review:pass": 721, "review:review_pending": 2664, "review:suspicious(resolved_ok)": 19, "eval:spec_failed": 44} diff --git a/benchmarks/textbook_sharing/results/redesign_search/attempts_gf180_sky130.json b/benchmarks/textbook_sharing/results/redesign_search/attempts_gf180_sky130.json new file mode 100644 index 00000000..7c2b2ef2 --- /dev/null +++ b/benchmarks/textbook_sharing/results/redesign_search/attempts_gf180_sky130.json @@ -0,0 +1,4369 @@ +[ + { + "pdk": "gf180", + "ib": 5e-06, + "wd": 1, + "wf": 1, + "lm": 1.0, + "tag": "ib5u_wd1_wf1_lm1", + "qualified": false, + "reasons": [ + "thd_pct=12.26 above floor 3", + "f3db=2.817e+06 below floor 5e+06", + "out_swing=0.2891 below floor 0.825" + ], + "measures": { + "vout0": 1.64797, + "vin0": 0.7974522, + "iq": 1.674419e-05, + "gain_lf": 28.4035, + "f3db": 2817459.0, + "out_swing": 0.289131, + "thd_pct": 12.2571 + }, + "sizing": { + "M1": { + "w": 2.0, + "l": 0.56, + "nf": 4 + }, + "M2": { + "w": 4.0, + "l": 0.56, + "nf": 8 + }, + "M3": { + "w": 8.0, + "l": 0.56, + "nf": 16 + }, + "M4": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M5": { + "w": 16.0, + "l": 0.56, + "nf": 32 + }, + "M6": { + "w": 32.0, + "l": 0.56, + "nf": 64 + } + }, + "bias": { + "VB1": { + "replica": "M2", + "current": 5e-06 + } + } + }, + { + "pdk": "gf180", + "ib": 5e-06, + "wd": 1, + "wf": 1, + "lm": 2.0, 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