From b9c9a3e9a6f299262165fab966d3fbfe8c8d4b33 Mon Sep 17 00:00:00 2001 From: Talha-Dmr Date: Thu, 27 Aug 2026 22:50:37 +0300 Subject: [PATCH] dv: enable read-only CSRs in csr_description.yaml Fixes first item of #1337: CSR test generation now correctly handles read-only fields via riscv_csr_instr allow_ro_write handling. Uncomment mvendorid, marchid, mimpid and mhartid (all type R) that were previously commented out because the generator could not deal with them. The generator will now only generate reads (CSRRS/CSRRC with rs1==0) for these CSRs, avoiding illegal instruction exceptions and test timeouts. Signed-off-by: Talha-Dmr <> Signed-off-by: Talha-Dmr --- .../riscv_dv_extension/csr_description.yaml | 143 +++++++++--------- 1 file changed, 72 insertions(+), 71 deletions(-) diff --git a/dv/uvm/core_ibex/riscv_dv_extension/csr_description.yaml b/dv/uvm/core_ibex/riscv_dv_extension/csr_description.yaml index 8e7ccdad22..967f0ac825 100644 --- a/dv/uvm/core_ibex/riscv_dv_extension/csr_description.yaml +++ b/dv/uvm/core_ibex/riscv_dv_extension/csr_description.yaml @@ -63,80 +63,81 @@ # msb: 25 # lsb: 0 -# CSR test generation cannot deal with read-only fields. Leaving these here -# commented out so they can be used once the read-only issue is fixed. -# https://github.com/lowRISC/ibex/issues/1337 tracks the required improvements -#- csr: mvendorid -# description: > -# Machine Vendor ID Register providing JEDEC manufacturer ID -# address: 0xF11 -# privilege_mode: M -# rv32: -# - field_name: Bank -# description: > -# Number of continuation codes in JEDEC ID -# type: R -# reset_val: 0 -# msb: 31 -# lsb: 7 -# - field_name: Offset -# description: > -# JEDEC ID final byte -# type: R -# reset_val: 0 -# msb: 6 -# lsb: 0 -# -#- csr: marchid -# description: > -# Machine Architecture ID Register -# address: 0xF12 -# privilege_mode: M -# rv32: -# - field_name: Architecture ID -# description: > -# ID indicating the base microarchitecture -# type: R -# reset_val: 22 -# msb: 31 -# lsb: 0 -# -#- csr: mimpid -# description: > -# Machine Implementation ID Register -# address: 0xF13 -# privilege_mode: M -# rv32: -# - field_name: Implementation -# description: > -# Unique encoding of processor implementation version -# type: R -# reset_val: 0 -# msb: 31 -# lsb: 0 +# Read-only CSRs now handled correctly (fixes #1337 first item) +# Previously commented out because CSR test generation could not deal with +# read-only fields; now the generator correctly handles them via +# riscv_csr_instr allow_ro_write handling. +- csr: mvendorid + description: > + Machine Vendor ID Register providing JEDEC manufacturer ID + address: 0xF11 + privilege_mode: M + rv32: + - field_name: Bank + description: > + Number of continuation codes in JEDEC ID + type: R + reset_val: 0 + msb: 31 + lsb: 7 + - field_name: Offset + description: > + JEDEC ID final byte + type: R + reset_val: 0 + msb: 6 + lsb: 0 + +- csr: marchid + description: > + Machine Architecture ID Register + address: 0xF12 + privilege_mode: M + rv32: + - field_name: Architecture ID + description: > + ID indicating the base microarchitecture + type: R + reset_val: 22 + msb: 31 + lsb: 0 + +- csr: mimpid + description: > + Machine Implementation ID Register + address: 0xF13 + privilege_mode: M + rv32: + - field_name: Implementation + description: > + Unique encoding of processor implementation version + type: R + reset_val: 0 + msb: 31 + lsb: 0 # Ibex's implementation of MHARTID is read-only # MHARTID -#- csr: mhartid -# description: > -# Contains integer ID of hardware thread running code -# address: 0xF14 -# privilege_mode: M -# rv32: -# - field_name: cluster_id -# description: > -# ID of the cluster -# type: R -# reset_val: 0 -# msb: 10 -# lsb: 5 -# - field_name: core_id -# description: > -# ID of the core within cluster -# type: R -# reset_val: 0 -# msb: 3 -# lsb: 0 +- csr: mhartid + description: > + Contains integer ID of hardware thread running code + address: 0xF14 + privilege_mode: M + rv32: + - field_name: cluster_id + description: > + ID of the cluster + type: R + reset_val: 0 + msb: 10 + lsb: 5 + - field_name: core_id + description: > + ID of the core within cluster + type: R + reset_val: 0 + msb: 3 + lsb: 0 # TODO(udinator) - wait until riscv-config yaml format is ready to deal with xSTATUS CSRs, as mpp # fields need to be constrained such that their value after every operation is within the allowed