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Add I32x16::dot4_u8_i8_add and the U8x64 nibble split on every backend - #386
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dot4_u8_i8_add adds four u8 * i8 products to each i32 lane, the operation AVX-512 VNNI does with vpdpbusd and turbovec writes by hand twice (vpdpbusd on x86, SDOT on aarch64). Without VNNI every backend widens even and odd bytes into 16-bit lanes and uses a 16-bit multiply-add, so no intermediate saturates; the vpmaddubsw emulation would clamp 2 * 255 * 127 to 32767. low_nibbles/high_nibbles split each byte; high_nibbles is one gf2p8affine when GFNI is compiled in. Also fixes U16x32::to_f32x16_lo/hi on aarch64 and wasm: U16x32 comes from the scalar file there while F32x16 is native, so the method returned a type that is not ndarray::simd::F32x16 and the aarch64 lib tests did not compile. The parity test covers byte and accumulator extremes, the saturation case and lane placement; the NEON and wasm parity programs check the same. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMjKnig6MXTd41Lf2v
Adds the saturation trap to the facade contract doc next to the VPABSB note, and a blackboard entry with the backends witnessed, the disable runs and the loose ends. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMjKnig6MXTd41Lf2v
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AdaWorldAPI
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October 29, 2026 14:28
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…1848 Adds section R2. Rows moved: H1 partly closed by #385 (first U16x32 parity found two AVX-512 bugs); H3 reframed (count_ones lowers to the same vpshufb nibble table on AVX2, so a rewrite would only hide it); AVX2 mask_blend set as R2 burn-down item #1 by measurement. New dots N10-N15: the two 9-bit contracts agree across repos; recall and cost were measured on different layouts; the AVX2 masked dot hides compiler-emitted shuffles the source guard cannot see; W4's ndarray half shipped in #386; the u8->i8 view and R3 are one ruling; NEON and wasm lib tests are not in CI. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMPh2Seh2WLccCksAdY
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Summary
Three new facade methods, each realized on every backend: AVX-512, AVX2, AVX-only, scalar, NEON, wasm and nightly.
I32x16::dot4_u8_i8_add(a: U8x64, b: I8x64)addsa[4j..4j+4] · b[4j..4j+4](u8 × signed i8) to each i32 lanej.vpdpbusd.a, sign-extended forb), then combined with a 16-bit multiply-add. Every product and partial sum is exact. Only the final addition to the accumulator wraps, asvpdpbusddoes.vpmaddubswemulation: that one saturates each pair sum ati16, and2 * 255 * 127 = 64 770clamps to 32 767.U8x64::low_nibblesreturnsx & 0x0F.U8x64::high_nibblesreturnsx >> 4. With GFNI compiled in it is a singlegf2p8affine; otherwise a 16-bit shift and a mask.Why: turbovec's VNNI "permute-dot" kernels write this dot product by hand twice, as
vpdpbusdon x86 andSDOTon aarch64. They also keep a separate macro variant just for the GFNI high nibble. With these methods in the facade, those kernels can move ontondarray::simd.Also fixed:
U16x32::to_f32x16_lo/hion aarch64 and wasm, which came from #385.U16x32comes from the scalar file whileF32x16is native.ndarray::simd::F32x16, and the aarch64 lib tests did not compile at all.Tests
simd::dot4_nibble_facade_paritychecks four things:i32::MIN/i32::MAXaccumulators;The NEON and wasm parity programs gain the same checks (codes
0x500..), so CI covers those backends too.vpdpbusd,gf2p8affineconfig-v4(AVX-512, no VNNI/GFNI)vpmaddwdconfig-v3(AVX2)config-avxunderqemu -cpu SandyBridgeconfig-v2underqemu -cpu Nehalemu16x32_facade_paritynightly-simdcore::simdscripts/neon-parity.sh,scripts/wasm-parity.shGates:
cargo clippy --config <tier> -- -D warnings: clean on native, v4, v3, v2 and aarch64. The AVX tier's 8 errors already exist on master; none is on an added line.cargo fmt --check: clean.Disable runs, each red as expected:
vpmaddubswrealization fails the saturation test and the reference test;vpdpbusdsin place ofvpdpbusdfails the reference test on thei32::MAXaccumulator.Not done
vpdpbusdisn't used on the AVX2 tier.USDOT: not used under i8mm.i8 × i8form: turbovec'sxor 0x80plus correction has no facade word yet.None of these is measured.
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