[maleadt]

Part of #135.

findall on a matrix returns CartesianIndexes by default (items=keys(A)). On CUDA that took a fixed 13-19 µs more than returning Ints (items=LinearIndices(A)), even for tiny masks. At 4096×4096 it took 440 µs against 185 µs.

The cause was the conversion from a linear position to a CartesianIndex. Base does it with checked, signed 64-bit integer divisions. GPUs have no hardware instruction for those and emulate them with long instruction sequences. In the scatter pass of findall, each thread converts the positions of its run one after another, so this cost was paid several times per thread.

This PR converts with unsigned divisions instead: 32-bit ones when the index space has fewer than 2^32 elements, 64-bit ones otherwise. It also drops the division-by-zero check. That check can never fire here, because a position only exists when no axis is empty. Offset and stepped axes are handled as before.

RTX 5080, mask with half its elements true. Minimum of 50 synchronized runs (CUDA.@elapsed), variants interleaved, best of 3 rounds, on a GPU shared with at most one other process. µs:

mask	keys, main	keys, this PR	LinearIndices
100×10	38.2	24.2	23.2
1000×100	42.8	25.4	24.0
4096×4096	438.2	268.2	185.3

The small masks now cost the same as with Int items. At 4096×4096 the remaining difference comes from writing 16-byte indices instead of 8-byte ones.

On an Apple M1 and an Intel Iris Xe, the timings stay the same within noise. On the M1, Cartesian findall costs as much as gathering precomputed CartesianIndexes from an array, so the divisions were never its bottleneck there.

There are no API changes. Tested on CUDA, OpenCL (PoCL), the CPU back-end, Metal, oneAPI and AMDGPU. Direct tests of the conversion cover offset, descending and 0- and 1-dimensional indices, and index spaces just below and above 2^32 elements.

[maleadt]

Not going to merge this one yet because it may prove unnecessary once we have GPUCompiler-level integer narrowing (TBD).