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cuda: keep the GDN state gather when its ids memory is reused - #318
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The gather fusion skips the GET_ROWS and reads ids later in the GDN kernel, but ggml-alloc can give the ids memory to a node that runs in between. Keep the GET_ROWS when a node up to the GDN output overlaps ids, or when the GDN op runs on a concurrent stream.
khosravipasha
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Oct 5, 2026
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Copilot review overview
🟡 Changes recommended
The overlap check ignores writable backend allocation space beyond a tensor's logical size and lacks regression coverage.
Review effort: Balanced
Findings: 2
Open (2)
What changed in this PR
Prevents CUDA GDN gather fusion from reading reused ids memory.
Changes:
- Detects overlapping tensor memory before GDN execution.
- Disables fusion when GDN runs concurrently.
| File | Description |
|---|---|
ggml/src/ggml-cuda/ggml-cuda.cu |
Adds safety checks for deferred GDN gather reads. |
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| // ggml-alloc sees the GET_ROWS as the last reader of ids, so a later node can reuse ids memory before the GDN kernel reads it | ||
| const char * ids_beg = (const char *) ids->data; | ||
| const char * ids_end = ids_beg + ggml_nbytes(ids); | ||
| for (int k = node_idx + 1; k <= j; ++k) { |
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| const char * ids_beg = (const char *) ids->data; | ||
| const char * ids_end = ids_beg + ggml_nbytes(ids); | ||
| for (int k = node_idx + 1; k <= j; ++k) { | ||
| const ggml_tensor * t = cgraph->nodes[k]; | ||
| const char * b = (const char *) t->data; | ||
| if (b != nullptr && b < ids_end && ids_beg < b + ggml_nbytes(t)) { | ||
| return false; | ||
| } | ||
| } |
imaami
pushed a commit
to imaami/llama.cpp
that referenced
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Oct 13, 2026
Add the planar and SoA activation layouts, dedicated PTQ1 mat-vec, native q4_0/q8_0 KV reads and fused Hadamard quantization from Cary Palmer and sudoingX. Fold recurrent-state gathers only while their row IDs remain live. Keep batch-invariant dispatch, slot-stride bounds, 64-lane quantization, pool lifetimes and HIP/MUSA fallbacks in the same integration. Source: PrismML-Eng#221 Source: PrismML-Eng#218 Source: PrismML-Eng#215 Source: PrismML-Eng#258 Source: PrismML-Eng#303 Source: PrismML-Eng#318 Source commits (PrismML-Eng/llama.cpp): 5244cea 88c4bc6 2459f68 8e18ce3 Co-authored-by: sudoingX <200180104+sudoingX@users.noreply.github.com> Co-authored-by: bri-prism <288398250+bri-prism@users.noreply.github.com> Assisted-by: GitHub Copilot Assisted-by: OpenAI Codex Ported and rebased by Codex.
imaami
pushed a commit
to imaami/llama.cpp
that referenced
this pull request
Oct 13, 2026
Add the planar and SoA activation layouts, dedicated PTQ1 mat-vec, native q4_0/q8_0 KV reads and fused Hadamard quantization from Cary Palmer and sudoingX. Fold recurrent-state gathers only while their row IDs remain live. Honor batch-invariant dispatch and slot-stride bounds, use 64-lane quantization, and preserve pool lifetimes and HIP/MUSA fallbacks. Source: PrismML-Eng#221 Source: PrismML-Eng#218 Source: PrismML-Eng#215 Source: PrismML-Eng#258 Source: PrismML-Eng#303 Source: PrismML-Eng#318 Source commits (PrismML-Eng/llama.cpp): 5244cea 88c4bc6 2459f68 8e18ce3 Co-authored-by: sudoingX <200180104+sudoingX@users.noreply.github.com> Co-authored-by: bri-prism <288398250+bri-prism@users.noreply.github.com> Assisted-by: GitHub Copilot Assisted-by: OpenAI Codex Ported and rebased by Codex.
imaami
pushed a commit
to imaami/llama.cpp
that referenced
this pull request
Oct 13, 2026
Add the planar and SoA activation layouts, dedicated PTQ1 mat-vec, native q4_0/q8_0 KV reads and fused Hadamard quantization from Cary Palmer and sudoingX. Fold recurrent-state gathers only while their row IDs remain live. Honor batch-invariant dispatch and slot-stride bounds, use 64-lane quantization, and preserve pool lifetimes and HIP/MUSA fallbacks. Source: PrismML-Eng#221 Source: PrismML-Eng#218 Source: PrismML-Eng#215 Source: PrismML-Eng#258 Source: PrismML-Eng#303 Source: PrismML-Eng#318 Source commits (PrismML-Eng/llama.cpp): 5244cea 88c4bc6 2459f68 8e18ce3 Co-authored-by: sudoingX <200180104+sudoingX@users.noreply.github.com> Co-authored-by: bri-prism <288398250+bri-prism@users.noreply.github.com> Assisted-by: GitHub Copilot Assisted-by: OpenAI Codex Ported and rebased by Codex.
imaami
pushed a commit
to imaami/llama.cpp
that referenced
this pull request
Oct 13, 2026
Add the planar and SoA activation layouts, dedicated PTQ1 mat-vec, native q4_0/q8_0 KV reads and fused Hadamard quantization from Cary Palmer and sudoingX. Fold recurrent-state gathers only while their row IDs remain live. Honor batch-invariant dispatch and slot-stride bounds, use 64-lane quantization, and preserve pool lifetimes and HIP/MUSA fallbacks. Source: PrismML-Eng#221 Source: PrismML-Eng#218 Source: PrismML-Eng#215 Source: PrismML-Eng#258 Source: PrismML-Eng#303 Source: PrismML-Eng#318 Source commits (PrismML-Eng/llama.cpp): 5244cea 88c4bc6 2459f68 8e18ce3 Co-authored-by: sudoingX <200180104+sudoingX@users.noreply.github.com> Co-authored-by: bri-prism <288398250+bri-prism@users.noreply.github.com> Assisted-by: GitHub Copilot Assisted-by: OpenAI Codex Ported and rebased by Codex.
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Overview
The CUDA GDN gather fusion (
ggml_cuda_try_gdn_gather_skip, added in #221) skips the recurrent-stateGET_ROWSand lets the GDN kernel read the cache row through theidstensor. ggml-alloc does not know about this deferred read: for the allocator the skippedGET_ROWSis the last reader ofids, so it can give theidsmemory to a node that runs before the GDN op. The kernel then reads activation data as a slot index and crashes withan illegal memory access was encountered.This PR keeps the fusion, but falls back to the normal
GET_ROWSfor a layer when:GET_ROWSup to and including the GDN output overlaps theidsmemory, orOther layers keep the fused path.
Additional information
Seen on an A100 with a hybrid GDN vision-language model: a prompt with two images crashed
llama-mtmd-cliand killedllama-serveron the first request. With a debug build, the overlap was the last GDN layer'salphaprojection, which the allocator placed on the scheduler's device copy ofinp_s_copy. The faulting index decoded to the float bit pattern of a gate value. Other models with different tensor sizes did not hit the overlap. That was layout luck, so the check does not depend on the model.Validation (A100-SXM4-80GB, CUDA 12.4):
llama-serverhandles three consecutive two-image requests (HTTP 200) and stays up. Before this change the process died on the first request.compute-sanitizer --tool memcheck: 0 errors. Before: invalid global read ingated_delta_net_cuda.GGML_CUDA_GDN_GATHER_FUSION=0(300 tokens).llama-benchpp512 / tg128 on two models, 5 reps, arms interleaved twice: all differences are within one standard deviation.Not tested: other GPUs, release binaries, and the SYCL fused GDN path.
Requirements