Student QoL: flags and hi/lo, source lines in step, MIPS32 widths, x86 syntax; fix stale examples

[timsherwood]

Improvements from reviewing MapacheSPIM the way a second-year student would use it.

Console

• regs shows MIPS hi/lo and the condition flags. ARM64 shows nzcv: N Z C V and x86-64 shows rflags: CF ZF SF OF. Both get ★ when they change, so students can see what cmp, mult and div did. New Simulator.get_special_regs() and get_flags().
• step shows each source line before the machine instructions it assembled to. This makes pseudo-instructions visible (la → auipc + addi).
• MIPS32 values are shown at their real width. Registers, the PC and addresses in messages use 8 hex digits instead of 16, regs binary shows 32 bits, and regs decimal is sized for 32-bit values.
• x86-64 is disassembled in the syntax the source was written in, AT&T or Intel. This applies to step, disasm and the crash message. toolchain.x86.syntax_by_line() reuses the assembler's own per-instruction decision, including .att_syntax and .intel_syntax. Instructions that read the same in both syntaxes follow whichever syntax the rest of the program mostly uses. ELF files with no source stay in Intel syntax, as before.
• regs and pc without a loaded program now say to load one. Before, regs showed a meaningless r0–r31 dump, and my flags change would have made it crash.

Examples and docs

• RISC-V fibonacci and matrix_multiply now exit with the exit syscall, like every other example, instead of HTIF tohost (left over from the Sail backend). fibonacci prints its result, and a stack-frame comment that listed the saved registers in the wrong slots is fixed. Their binaries are rebuilt with make DEBUG=1; the other ISAs' binaries came out byte-identical.
• Tests that relied on fibonacci's tohost exit now use a small dedicated tohost program. The simulator still supports tohost for outside ELFs.
• Removed the stale examples/arm/README.md. It said to install a cross-toolchain, used old load paths and gave the wrong base address.
• Console Guide:
  • A register table for all four ISAs replaces the RISC-V-only one.
  • Added notes on hi/lo and flags, plus stepreg and disasm entries (disasm wasn't documented before).
  • Removed the redundant Tips section.
• Transcripts in the README, Quick Start and Console Guide are regenerated from real output. In the main README only those transcripts and two one-line factual notes changed.
• Small help-text fixes: help regs now lists MIPS, help step loses its filler tips, and help pc no longer says the PC always advances by 4, which is wrong on x86.

Testing

• pytest tests: 641 passed, 92 skipped. The skips are the GNU differential tests, since binutils isn't installed locally.
• New tests are in tests/test_special_registers.py and tests/test_step_display.py.
• ruff check, ruff format --check and mypy on mapachespim/ are clean.

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