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Clean up FastSimulation's handling of slice (s) LogicNets for ~15% speedup. - #494

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fdxmw merged 1 commit into
UCSBarchlab:developmentfrom
fdxmw:sim
Jul 15, 2026
Merged

fdxmw merged 1 commit into
UCSBarchlab:developmentfrom
fdxmw:sim

Clean up `FastSimulation`'s handling of slice (`s`) `LogicNets` for ~…

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