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📝 Document the CPU identification table and the rule that keeps it honest - #34

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📝 Document the CPU identification table and the rule that keeps it honest#34
manupawickramasinghe wants to merge 1 commit into
fix/restore-cpu-codename-detectionfrom
docs/cpu-identification

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Documentation only. No code changes — zero lines under app/src/, no test
or CI impact.

Stacked on #33. GitHub retargets this to master automatically once #33 merges.

Why

#33 restored the CPUID → microarchitecture codename table and fixed three
Threadrippers that were reporting an EPYC codename. Two things came out of that
work that lived nowhere but the code and a PR description:

  • It is a genuine competitive feature, and the README never said so.
  • It has a specific way of going wrong, and a contributor adding the next
    CPU had no way to know.

A PR description does not survive the merge. These belong in the repo.

What changed

File Change
README.md New differentiator paragraph under What actually separates it; the System Summary feature bullet now describes what that panel shows
app/README.md New Adding a CPU codename section — the two rules for extending the table
TODO.md Records the ExtendedModel spec deviation at sysinfo.rs:49 under Code quality
app/PROJECT_SUMMARY.md sysinfo.rs said "~427 lines" (it is ~1300); System Summary row now mentions the codename and memory-type decode

The competitive claim, and why it is safe to make

The README now states that LibreHardwareMonitor's own CPU table matches only
families 06h and 0Fh, so Intel's Nova Lake (12h) and Diamond Rapids
(13h) are structurally unreachable for it. That was verified by reading
LibreHardwareMonitorLib/Hardware/Cpu/IntelCpu.cs upstream, not assumed.

It is scoped to CPU identification, which is SensorView's own CPUID decode
in sysinfo.rs. It deliberately does not claim any advantage in sensor
coverage
, which on Windows comes from LHM.

The rule being written down

A 0x00..=0x0f range written around one sourced model silently swallows its
neighbours. AMD families 17h, 19h and 1Ah each ship a Threadripper at model
08h, immediately beside the server part at 01h/02h — which is how three
workstation CPUs came to report an EPYC codename. app/README.md now states
the rule, and the a_threadripper_is_not_an_epyc test enforces it.

Also recorded: intel-family.h writes family numbers in decimal, so
IFM(18, …) is family 12h, not 18h. That mistake reads as a plausible entry
because 19h is AMD's Zen 3/Zen 4 family.

Verification

Docs-only, so nothing to run — but for completeness, #33 is green on all four
platform builds (windows/nsis, macos/dmg, ubuntu/deb+appimage, ubuntu-arm/deb)
with 172 tests passing and cargo clippy --all-targets -- -D warnings clean.

🤖 Generated with Claude Code

https://claude.ai/code/session_018o7QQhLP2tNHG62b1d2q7R

…nest

The codename table restored in #33 is a competitive feature and a fragile one,
and neither fact was written down anywhere outside the code.

README gains a differentiator paragraph: every entry is traceable to
`intel-family.h` or libcpuid's `recog_amd.c`, and LibreHardwareMonitor's own
table matches only families 06h and 0Fh, so Intel's 12h/13h parts are
unreachable for it. The System Summary bullet now says what that panel
actually shows, including the decoded SMBIOS memory type.

app/README gains the two rules a contributor adding a CPU needs: cite the
source or fall back to a generation, and match a single model rather than a
high-nibble range — the range mistake is what put an EPYC codename on three
Threadrippers.

TODO records the ExtendedModel deviation at sysinfo.rs:49, which was found
during review and deliberately left unfixed. It only existed in a PR
description before this, which does not survive the merge.

PROJECT_SUMMARY's sysinfo.rs line said ~427 lines; it is ~1300.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_018o7QQhLP2tNHG62b1d2q7R
Copilot AI lite review requested due to automatic review settings September 5, 2026 19:58

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