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Accelerate small-prime FFTs with fused SIMD kernels - #181
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Reduce transform overhead through specialized SIMD base cases, fused stages, and fewer memory passes while preserving exact modular arithmetic and the existing bit-reversed spectrum order.
• Add register-resident AVX2/FMA 8-, 16-, and 32-point kernels, plus AVX-512 32-/64-point kernels and eight-lane stages.
• Interleave independent compensated products and inline butterfly helpers to reduce spills and call overhead.
• Block large radix-4 passes for cache reuse. Provide optional radix-8/16 stages with twiddle preparation outside coefficient loops; radix 4 remains the default.
• Skip redundant inverse leaf reductions after pointwise multiplication, whose outputs satisfy the stricter input bound.
• Preserve scalar/integer fallbacks and exactness across supported rounding modes.
On AMD EPYC 9454 with GCC 15.2, the default configuration reduces the estimated cost of two forward transforms plus one inverse by 2.48–3.04× versus master at sizes 1,024–32,768. These estimates sum separately measured transform timings; they do not measure complete polynomial multiplication.