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init_lcd_deepsleep() calls uart_reset() on every wake from retention sleep, which rewinds the hardware TX register cycle to 0x90. The SDK's uart_TxIndex is kept in retained RAM and is not reset, and each 13-byte LCD frame advances it by one. After a wake, uart_ndma_send_byte() then writes into the wrong registers and the LCD receives a shuffled frame. The XOR checksum does not depend on byte order, so some of these frames are accepted and show partly drawn digits until a later frame happens to be aligned again. The SDK documents that uart_ndma_clear_tx_index() must be called after waking up. Call it right after uart_reset(). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Fixes partly drawn digits on boards with the UART LCD (B1.5, B1.6).
Symptom
Every now and then one digit, usually the last one, shows with some segments missing. It fixes itself after a while. Seen on a B1.5 (hwVersion 15).
Cause
init_lcd_deepsleep()callsuart_reset()on every wake from retention sleep, which rewinds the hardware TX register cycle to0x90. The SDK's software indexuart_TxIndexis in retained RAM, so it survives the wake and is never reset. Each 13-byte LCD frame moves it forward by one (13 mod 4), so after a wakeuart_ndma_send_byte()usually writes into the wrong one of the four TX registers and the LCD gets a shuffled frame.The frame checksum is an XOR of the six data bytes, which does not depend on their order, so some of the shuffled frames are accepted and drawn. The display recovers when a later frame happens to line up with the hardware again.
The SDK header (
platform/chip_8258/uart.h) documents this requirement: "this index should be reset to 0, when send data after system wakeup", and providesuart_ndma_clear_tx_index()for it.Fix
Call
uart_ndma_clear_tx_index()right afteruart_reset(). This is one line; the I2C LCD boards are not affected.Testing
master). I checked the disassembly to confirm thatinit_lcd_deepsleep()now clearsuart_TxIndex.Independent of #201 and #202.
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