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1. microTheia microTheia Public

   Event-based, general-purpose machine vision ASIC

   Python 1 3

2. asic_spi_cdc_sram_wrapper asic_spi_cdc_sram_wrapper Public

   ASIC subsystem for type 0 SPI port utilizing register based CDC that drains into/from GF180 SRAM macro-based FIFO buffers

   SystemVerilog

3. VLSIDA/HighTide VLSIDA/HighTide Public

   Verilog 37 16

4. x320-stm-usb x320-stm-usb Public

   adding ability to stream evt data from sensor to host over usb

   C

5. The-OpenROAD-Project/OpenROAD The-OpenROAD-Project/OpenROAD Public

   OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

   Verilog 3.1k 1k

6. GT2N GT2N Public

   Forked from azadnaeemi/GT2N

   Using for K8s Jobs - Developing OpenRCX-compatible extraction rules

   Tcl