ci: Bump bitfield from 0.19.5 to 0.20.0

alioth/Cargo.toml

@@ -8,7 +8,7 @@ license.workspace = true
 
 [dependencies]
 alioth-macros.workspace = true
-bitfield = "0.19.4"
+bitfield = "0.20.0"
 bitflags = "2.11.1"
 chrono = "0.4.44"
 flume.workspace = true

alioth/src/arch/aarch64/reg.rs

@@ -116,7 +116,7 @@ bitfield! {
     /// https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/ESR-EL2--Exception-Syndrome-Register--EL2-
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
     #[repr(transparent)]
-    pub struct EsrEl2(u64);
+    pub struct EsrEl2(pub u64);
     impl Debug;
     pub iss2, _: 36, 32;
     pub u8, into EsrEl2Ec, ec, _: 31, 26;
@@ -135,7 +135,7 @@ consts! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct EsrEl2DataAbort(u32);
+    pub struct EsrEl2DataAbort(pub u32);
     impl Debug;
     pub isv, _: 24;
     pub sas, _: 23, 22;
@@ -155,7 +155,7 @@ bitfield! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-     pub struct EsrEl2SysReg(u32);
+     pub struct EsrEl2SysReg(pub u32);
      impl Debug;
      pub is_read, _: 0;
      pub u16, crm, _: 4, 1;
@@ -168,7 +168,7 @@ bitfield! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct MpidrEl1(u64);
+    pub struct MpidrEl1(pub u64);
     impl Debug;
     pub u8, aff3, set_aff3: 39, 32;
     pub u, set_u: 30;

alioth/src/arch/x86_64/cpuid.rs

@@ -61,7 +61,7 @@ bitflags! {
 }
 
 bitfield! {
-    pub struct CpuidExt1fEbx(u32);
+    pub struct CpuidExt1fEbx(pub u32);
     impl new;
     pub u8, cbit_pos, set_cbit_pos : 5, 0;
     pub u8, phys_addr_reduction, set_phys_addr_reduction : 11, 6;

alioth/src/arch/x86_64/intr.rs

@@ -44,7 +44,7 @@ consts! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct MsiAddrLo(u32);
+    pub struct MsiAddrLo(pub u32);
     impl Debug;
     pub u8, from into DestinationMode, mode, set_mode : 2, 2;
     pub redirection, set_redirection : 3;
@@ -56,14 +56,14 @@ bitfield! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct MsiAddrHi(u32);
+    pub struct MsiAddrHi(pub u32);
     impl Debug;
     pub dest_id_hi, set_dest_id_hi : 31, 8;
 }
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct MsiData(u32);
+    pub struct MsiData(pub u32);
     impl Debug;
     impl new;
     pub u8, vector, set_vector : 7, 0;

alioth/src/arch/x86_64/ioapic.rs

@@ -31,15 +31,15 @@ pub const IOAPIC_VER: u8 = 0x11;
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct RegId(u32);
+    pub struct RegId(pub u32);
     impl Debug;
     impl new;
     pub u8, id, set_id : 27, 24;
 }
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct RegVer(u32);
+    pub struct RegVer(pub u32);
     impl Debug;
     impl new;
     pub u8, version, set_version : 7, 0;
@@ -48,7 +48,7 @@ bitfield! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct RedirectEntry(u64);
+    pub struct RedirectEntry(pub u64);
     impl Debug;
     pub u8,	vector, set_vector : 7, 0;
     pub u8, from into DeliveryMode, delivery_mode, set_delivery_mode : 10, 8;

alioth/src/arch/x86_64/msr.rs

@@ -55,7 +55,7 @@ bitflags! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct ApicBase(u64);
+    pub struct ApicBase(pub u64);
     impl Debug;
     pub bsp, set_bsp : 8;
     pub x2apic, set_x2apic : 10;

alioth/src/arch/x86_64/reg.rs

@@ -153,7 +153,7 @@ bitfield! {
     ///
     /// See Intel Architecture Software Developer's Manual, Vol.3, Table 24-2.
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct SegAccess(u32);
+    pub struct SegAccess(pub u32);
     impl Debug;
     pub seg_type, _ : 3, 0;
     pub s_code_data, _ : 4;

alioth/src/arch/x86_64/sev.rs

@@ -53,7 +53,7 @@ bitfield! {
     ///
     /// From Secure Encrypted Virtualization API Version 0.24, Revision 3.24, Ch.2, Table 2.
     #[derive(Clone, Copy, Default, PartialEq, Eq, Serialize, Deserialize, Help)]
-    pub struct SevPolicy(u32);
+    pub struct SevPolicy(pub u32);
     impl Debug;
     pub no_debug, set_no_debug: 0;
     pub no_ks, set_no_ks: 1;
@@ -70,7 +70,7 @@ bitfield! {
     ///
     /// From SEV SNP Firmware ABI Specification, Revision 1.55, Sec.4.3, Table 9.
     #[derive(Clone, Copy, Default, PartialEq, Eq, Serialize, Deserialize, Help)]
-    pub struct SnpPolicy(u64);
+    pub struct SnpPolicy(pub u64);
     impl Debug;
     pub api_minor, set_api_minor: 7,0;
     pub api_major, set_api_major: 15,8;

alioth/src/blk/qcow2.rs

@@ -86,7 +86,7 @@ bitfield! {
     /// QCOW2 L1 Table Entry
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash, KnownLayout, Immutable, FromBytes, IntoBytes)]
     #[repr(transparent)]
-    pub struct Qcow2L1(u64);
+    pub struct Qcow2L1(pub u64);
     impl Debug;
     pub rc1, _: 63;
     pub offset, _: 55, 9;
@@ -101,7 +101,7 @@ impl Qcow2L1 {
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash, KnownLayout, Immutable, FromBytes, IntoBytes)]
     #[repr(transparent)]
-    pub struct Qcow2L2(u64);
+    pub struct Qcow2L2(pub u64);
     impl Debug;
     pub desc, _: 61, 0;
     pub compressed, _: 62;
@@ -111,7 +111,7 @@ bitfield! {
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash, KnownLayout, Immutable, FromBytes, IntoBytes)]
     #[repr(transparent)]
-    pub struct Qcow2StdDesc(u64);
+    pub struct Qcow2StdDesc(pub u64);
     impl Debug;
     pub offset, _: 55, 9;
     pub zero, _: 0;

alioth/src/device/cmos.rs

@@ -23,7 +23,7 @@ use crate::mem::emulated::{Action, Mmio};
 use crate::{bitflags, consts, mem};
 
 bitfield! {
-    pub struct CmosReg(u8);
+    pub struct CmosReg(pub u8);
     pub disable_nmi, set_disable_nmi: 7;
     pub reg, set_reg: 6, 0;
 }
@@ -41,7 +41,7 @@ consts! {
 }
 
 bitfield! {
-    pub struct CmosRegA(u8);
+    pub struct CmosRegA(pub u8);
     impl new;
     pub u8, from into CmosIntrFreq, intr_freq, set_intr_freq: 3, 0;
     pub u8, from into CmosTimeBase, time_base, set_time_base: 6, 4;

alioth/src/device/serial.rs

@@ -52,7 +52,7 @@ bitflags! {
 // offset 0x2, write, FIFO Control Register (FCR)
 bitfield! {
     #[derive(Copy, Clone, Default)]
-    pub struct FifoControl(u8);
+    pub struct FifoControl(pub u8);
     impl Debug;
     rx_trigger_size_bits, _: 7, 6;
     dma_mode, _: 3;
@@ -76,7 +76,7 @@ impl FifoControl {
 // offset 0x2, read, Interrupt Identification Register
 bitfield! {
     #[derive(Copy, Clone)]
-    pub struct InterruptIdentification(u8);
+    pub struct InterruptIdentification(pub u8);
     impl Debug;
     fifo_enabled, _: 7, 6;
     interrupt_id, set_interrupt_id: 3,1;
@@ -116,7 +116,7 @@ impl Default for InterruptIdentification {
 // offset 0x3, Line Control Register (LCR)
 bitfield! {
     #[derive(Copy, Clone)]
-    pub struct LineControl(u8);
+    pub struct LineControl(pub u8);
     impl Debug;
     divisor_latch_access, _: 7;
     break_, _: 6;
@@ -136,7 +136,7 @@ impl Default for LineControl {
 // offset 0x4, Modem Control Register
 bitfield! {
     #[derive(Copy, Clone, Default)]
-    pub struct ModemControl(u8);
+    pub struct ModemControl(pub u8);
     impl Debug;
     loop_back, _: 4;
     out_2, _: 3;

alioth/src/firmware/acpi/bindings.rs

@@ -566,7 +566,7 @@ bitfield! {
     /// [Spec Table 4.19](https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/04_ACPI_Hardware_Specification/ACPI_Hardware_Specification.html#sleep-control-and-status-registers)
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
     #[repr(transparent)]
-    pub struct FadtSleepControlReg(u8);
+    pub struct FadtSleepControlReg(pub u8);
     impl Debug;
     pub _reserved2, _:  7, 6;
     pub slp_en, _: 5;

alioth/src/pci/cap.rs

@@ -48,7 +48,7 @@ pub struct PciCapHdr {
 bitfield! {
     #[derive(Copy, Clone, Default)]
     #[repr(C)]
-    pub struct PcieExtCapHdr(u32);
+    pub struct PcieExtCapHdr(pub u32);
     impl Debug;
     pub next, _: 31,20;
     pub version, _: 19,16;
@@ -58,7 +58,7 @@ bitfield! {
 bitfield! {
     #[derive(Copy, Clone, Default, FromBytes, Immutable, IntoBytes, KnownLayout)]
     #[repr(C)]
-    pub struct MsiMsgCtrl(u16);
+    pub struct MsiMsgCtrl(pub u16);
     impl Debug;
     pub enable, set_enable: 0;
     pub multi_msg_cap, set_multi_msg_cap: 3, 1;
@@ -261,7 +261,7 @@ where
 bitfield! {
     #[derive(Copy, Clone, Default, FromBytes, Immutable, IntoBytes, KnownLayout)]
     #[repr(C)]
-    pub struct MsixMsgCtrl(u16);
+    pub struct MsixMsgCtrl(pub u16);
     impl Debug;
     pub table_len, _ : 10, 0;
     pub masked, set_masked: 14;
@@ -277,7 +277,7 @@ impl MsixMsgCtrl {
 bitfield! {
     #[derive(Copy, Clone, Default, FromBytes, Immutable, IntoBytes)]
     #[repr(C)]
-    pub struct MsixCapOffset(u32);
+    pub struct MsixCapOffset(pub u32);
     impl Debug;
     pub bar, _: 2, 0;
 }
@@ -305,7 +305,7 @@ impl_mmio_for_zerocopy!(MsixCap);
 bitfield! {
     #[derive(Copy, Clone, Default)]
     #[repr(C)]
-    pub struct MsixVectorCtrl(u32);
+    pub struct MsixVectorCtrl(pub u32);
     impl Debug;
     pub masked, set_masked: 0;
 }

alioth/src/pci/pci.rs

@@ -33,7 +33,7 @@ use self::config::PciConfig;
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash, PartialOrd, Ord)]
-    pub struct Bdf(u16);
+    pub struct Bdf(pub u16);
     impl Debug;
     impl new;
     pub u8, bus, set_bus: 15, 8;

alioth/src/sys/linux/kvm.rs

@@ -642,7 +642,7 @@ consts! {
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
     #[repr(transparent)]
-    pub struct KvmVgicV3RedistRegion(u64);
+    pub struct KvmVgicV3RedistRegion(pub u64);
     impl Debug;
     pub count, set_count: 63, 52;
     pub base, set_base: 51, 16;

alioth/src/sys/linux/vfio.rs

@@ -290,7 +290,7 @@ pub struct VfioDeviceFeatureDmaBuf<const N: usize> {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct VfioDeviceFeatureFlag(u32);
+    pub struct VfioDeviceFeatureFlag(pub u32);
     impl Debug;
     impl new;
     pub u16, from into DeviceFeature, index, set_index: 15, 0;

alioth/src/vfio/user/bindings.rs

@@ -49,7 +49,7 @@ consts! {
 
 bitfield! {
     #[derive(Copy, Clone, Default, IntoBytes, FromBytes, Immutable, KnownLayout)]
-    pub struct VfioUserHeaderFlag(u32);
+    pub struct VfioUserHeaderFlag(pub u32);
     impl Debug;
     impl new;
     pub u8, from into VfioUserMessageType, ty, set_ty: 3, 0;

alioth/src/virtio/queue/packed.rs

@@ -34,7 +34,7 @@ struct Desc {
 
 bitfield! {
     #[derive(Copy, Clone, Default, PartialEq, Eq, Hash)]
-    pub struct WrappedIndex(u16);
+    pub struct WrappedIndex(pub u16);
     impl Debug;
     pub u16, offset, set_offset : 14, 0;
     pub wrap_counter, set_warp_counter: 15;

alioth/src/virtio/vu/bindings.rs

@@ -108,7 +108,7 @@ consts! {
 bitfield! {
     #[derive(Copy, Clone, Default, IntoBytes, FromBytes, Immutable)]
     #[repr(transparent)]
-    pub struct MessageFlag(u32);
+    pub struct MessageFlag(pub u32);
     impl Debug;
     pub need_reply, set_need_reply: 3;
     pub reply, set_reply: 2;