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hiteshwired/README.md

Hi, I'm Hitesh

I'm a third-year Computer Engineering student at Cal Poly SLO. I picked this major because I wanted to understand both sides of the board: what the hardware is actually doing, and how software makes it useful. Most of what I build ends up somewhere near that boundary.

Lately that has meant RISC-V processors, FPGAs, analog front ends, and low-level C. My favorite part of the work is the moment you have a theory about why something is broken and the waveform or the scope tells you whether you were right.

What I've been building

  • virtual-world-pathfinding: A* search and an entity hierarchy driving agents around a Java grid world.
  • cpe333-otter-riscv-pipeline: a 5-stage pipelined RV32I processor in SystemVerilog, with the hazard handling and the debugging notes from getting forwarding, stalls, and branch flushing to agree.
  • c-systems-projects: BMP image processing by hand, parallelism with fork and mmap, and POSIX shared-memory IPC.
  • fpga-parking-lot-controller: a passcode FSM, gate control, and seven-segment driver for the DE1-SoC.
  • fsk-ir-receiver: an infrared receiver front end that recovers frequency-shift-keyed data, designed and tuned in LTspice.

A few older repositories are still here. They are early learning work and I have left them that way on purpose; the progression seems more honest than a tidy highlight reel.

Outside the coursework

I'm a Resident Advisor, which has taught me more about staying calm and communicating clearly than any lecture has. I also started detailing cars in high school and grew it into a small repeat-client business that I still run; pricing your own time and getting the job right the first time turned out to be their own kind of engineering problem.

I spend time with Cal Poly Racing and the Computer Engineering Society, and I'm minoring in Ethics, Public Policy, Science, and Technology because I think asking who a technology serves matters as much as asking whether it can be built. Outside of all that I like to travel and say yes to things that push me past my comfort zone.

Reach me

Pinned Loading

  1. c-systems-projects c-systems-projects Public

    Low-level systems programming in C: BMP image processing, parallelism with fork/mmap, and POSIX shared-memory IPC.

    C

  2. cpe333-otter-riscv-pipeline cpe333-otter-riscv-pipeline Public

    5-stage pipelined RV32I RISC-V processor (OTTER) in SystemVerilog for Basys 3: forwarding, load-use stalls, branch flushing, plus RISC-V assembly test suites and self-checking testbenches.

    SystemVerilog

  3. featherweight featherweight Public

    A non-preemptive, user-level thread (LWP) library for x86-64 Linux, in C.

    C

  4. P2 P2 Public

    STM32 embedded C course project: a keypad-driven waveform generator using the DAC and hardware timers on the STM32L476 (Nucleo). Cal Poly coursework.

    C

  5. SecurityMod2 SecurityMod2 Public

    Applied cryptography lab in Python: AES ECB/CBC from scratch with PKCS#7, a CBC bit-flipping attack, and AES-vs-RSA performance benchmarking.

    Python

  6. virtual-world-pathfinding virtual-world-pathfinding Public

    Java grid-world simulation with scheduled entity behaviors and an A* pathfinding strategy, rendered with Processing.

    Java