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munailwaqar/README.md

Hi, I'm Munail ๐Ÿ‘‹

RTL / CPU Design Engineer working on RISC-V CPU microarchitecture and hardware security.

  • ๐Ÿ”ง Contributed 6 merged ISA extensions to the OpenHW Group CVA6 RISC-V core โ€” see my merged PRs
  • ๐ŸŽ“ MS in Digital & Embedded Systems, researching hardware security for autonomous vehicles
  • ๐ŸŒฑ Interested in CPU design, ASIC design, and SoC architecture
  • ๐Ÿ“ซ Reach me on LinkedIn

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