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Fix randomx_get_flags not reporting hardware AES on RISC-V #370

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Fix randomx_get_flags not reporting hardware AES on RISC-V #370

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18 changes: 18 additions & 0 deletions src/aes_hash_rv64_zvkned.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -30,12 +30,30 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "aes_hash.hpp"
#include "randomx.h"
#include "blake2/endian.h"
#include "intrin_portable.h"

#include <riscv_vector.h>

static FORCE_INLINE vuint32m1_t aesenc_zvkned(vuint32m1_t a, vuint32m1_t b) { return __riscv_vaesem_vv_u32m1(a, b, 8); }
static FORCE_INLINE vuint32m1_t aesdec_zvkned(vuint32m1_t a, vuint32m1_t b, vuint32m1_t zero) { return __riscv_vxor_vv_u32m1(__riscv_vaesdm_vv_u32m1(a, zero, 8), b, 8); }

rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey)
{
const vuint32m1_t a = __riscv_vle32_v_u32m1(v.u32, 4);
const vuint32m1_t k = __riscv_vle32_v_u32m1(rkey.u32, 4);
__riscv_vse32_v_u32m1(v.u32, __riscv_vaesem_vv_u32m1(a, k, 4), 4);
return v;
}

rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey)
{
const vuint32m1_t a = __riscv_vle32_v_u32m1(v.u32, 4);
const vuint32m1_t k = __riscv_vle32_v_u32m1(rkey.u32, 4);
const vuint32m1_t zero = {};
__riscv_vse32_v_u32m1(v.u32, __riscv_vxor_vv_u32m1(__riscv_vaesdm_vv_u32m1(a, zero, 4), k, 4), 4);
return v;
}

static constexpr uint32_t AES_HASH_1R_STATE02[8] = { 0x92b52c0d, 0x9fa856de, 0xcc82db47, 0xd7983aad, 0x6a770017, 0xae62c7d0, 0x5079506b, 0xe8a07ce4 };
static constexpr uint32_t AES_HASH_1R_STATE13[8] = { 0x338d996e, 0x15c7b798, 0xf59e125a, 0xace78057, 0x630a240c, 0x07ad828d, 0x79a10005, 0x7e994948 };

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13 changes: 11 additions & 2 deletions src/intrin_portable.h
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Expand Up @@ -772,13 +772,22 @@ FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
return x;
}

#ifdef __riscv
rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey);
rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey);

#define HAVE_AES 1
#endif

#define RANDOMX_DEFAULT_FENV

#endif

#ifndef HAVE_AES
static const char* platformError = "Platform doesn't support hardware AES";
#if !defined(HAVE_AES) || defined(__riscv)
static const char* const platformError = "Platform doesn't support hardware AES";
#endif

#ifndef HAVE_AES
#include <stdexcept>

FORCE_INLINE rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
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7 changes: 6 additions & 1 deletion src/tests/tests.cpp
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Expand Up @@ -1250,7 +1250,12 @@ int main() {
}
});

runTest("Hardware AES not supported", !HAVE_AES && !randomx::cpu.hasAes(), []() {
#ifdef __riscv
constexpr bool hardAesCheckedAtRuntime = true;
#else
constexpr bool hardAesCheckedAtRuntime = !HAVE_AES;
#endif
runTest("Hardware AES not supported", hardAesCheckedAtRuntime && !randomx::cpu.hasAes(), []() {
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assert(randomx_create_vm(RANDOMX_FLAG_HARD_AES, cache, nullptr) == nullptr);
});

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