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fix(gic): use correct distributor registers for ESPI enable and routing - #656
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chetan-rathore merged 1 commit intoOct 23, 2026
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Extended SPI (ESPI) support in the GICv3 driver had two register addressing bugs: 1. v3_enable_extended_interrupt_source() wrote to GICD_ICENABLERE (Clear-Enable) instead of GICD_ISENABLERE (Set-Enable). As a result, attempting to enable an ESPI source would clear/disable it. Define GICD_ISENABLERE (0x1200) in acs_gic.h and write to it when enabling ESPI. 2. v3_route_extended_interrupt() programmed GICD_IROUTERn (0x6000, legacy SPI range) and did not subtract EXTENDED_SPI_START_INTID (4096) from int_id, writing to an incorrect offset well past the distributor routing space. Route ESPIs through GICD_IROUTERnE (0x8000) using the 0-based ESPI index (int_id - EXTENDED_SPI_START_INTID). Fixes ARM-software#605 Signed-off-by: La1itchauhan <chauhanlalitofficial@gmail.com>
chetan-rathore
merged commit Oct 23, 2026
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ARM-software:release/sbsa/v8.0.3
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Extended SPI (ESPI) support in the GICv3 driver had two register addressing bugs:
v3_enable_extended_interrupt_source() wrote to GICD_ICENABLERE (Clear-Enable) instead of GICD_ISENABLERE (Set-Enable). As a result, attempting to enable an ESPI source would clear/disable it. Define GICD_ISENABLERE (0x1200) in acs_gic.h and write to it when enabling ESPI.
v3_route_extended_interrupt() programmed GICD_IROUTERn (0x6000, legacy SPI range) and did not subtract EXTENDED_SPI_START_INTID (4096) from int_id, writing to an incorrect offset well past the distributor routing space. Route ESPIs through GICD_IROUTERnE (0x8000) using the 0-based ESPI index (int_id - EXTENDED_SPI_START_INTID).
Fixes #605