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Virtual CSR over the DR cube; aggregation as BF16 GEMM (ndarray tile + ndarray CBLAS); benchmark of every arm - #1984
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The virtual CSR keeps graph adjacency in the lanes' own 256x256 cube coordinates: each row tile lists its nonempty column tiles, each pair one 256x256 bitmask block, with no row-pointer or column-index array. Row i's neighbors are read in place from tile(i)/slot(i). Neighbor aggregation (plus-times) runs as BF16 GEMMs over it: ndarray's strided tile GEMM (AMX on this host) with A read in place from the slab, or staged, and, behind the mkl feature, MKL cblas_gemm_bf16bf16f32 with A a strided BF16 view of the same slab. All three are exact against an explicit-CSR oracle, including a partial last tile and the full 64K. bench_vcsr measures three graphs. The GEMM realizations win only when blocks are dense (community graph, 6.4x over a scalar CSR loop) and lose on a degree-8 local graph; every row is in milliseconds and none passes the lance-graph ms gate. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMWgnUU9g7Ldyn6sbk
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMWgnUU9g7Ldyn6sbk
The comparator arm now calls ndarray's CBLAS-compatible backend::cblas_gemm_bf16bf16f32 instead of upstream mkl_rt, and the mkl feature is gone. That entry takes dense u16 and no lda, so A is staged per block; at n = 65536 the slab pitch equals K, so for the whole-universe WHERE GEMM the slab is passed in place. bench_all replaces both benches: every arm of both labs, oracle-checked, in one markdown table, committed as BENCH.md. The board entry records the decision not to promote the virtual CSR to a production crate, and why. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMWgnUU9g7Ldyn6sbk
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Stacked on #1983, and based on its branch. Retarget to
mainonce #1983 merges. Both need AdaWorldAPI/ndarray#414.What this adds
A virtual CSR (
vcsr.rs). Graph adjacency in the lanes' own 256 × 256 cube coordinates.(tile_r, tile_c, slot_r, slot_c).row_ptrorcol_idxarrays.ExplicitCsris the materialized form of the same edges, kept only as the oracle.Neighbour aggregation (
spmm.rs).Y[p][i] = Σ_{j ∈ row(i)} lane_p[j](plus-times) over 16 DT64-bound lanes, as BF16 GEMMs per block:backend::cblas_gemm_bf16bf16f32. This is the CBLAS-compatible entry (AMX, then AVX-512 BF16, then scalar), with no external library. It takes dense&[u16]and nolda, so A is staged per block.bench_all. Every arm of #1983 and of this PR, oracle-checked, in one table. The result is committed ascrates/dr-isa-stream-lab/BENCH.md.blasgraph's
CsrStorage(BitVec values, HDR semirings) is not realized by a floating-point GEMM. Its adapter is a named seam, not wired.Benchmark highlights (AMX host, n = 65,536, 16 lanes)
matmul_bf16_to_f32copies both operands, andbf16_tile_gemm_16x16VNNI-packs B and allocates each call, so it runs about 20× slower than the strided tile path on the same problem.Decision: no production crate yet
Every graph arm misses the gate. Even the dense case is bounded at about 1.4 ms by its own 268M MACs. The best arm on the sparse graph is the scalar loop.
The WHERE terminal meets the gate. If it is promoted, it belongs in the Quack / mask-risc terminal set behind DT64 binding, not in a new crate.
Revisit conditions are in
.claude/board/entries/2026-11-08-dr-virtual-csr-bf16-gemm.md.Correctness
lane[j], notlane[i].-D warningsis clean.🤖 Generated with Claude Code
https://claude.ai/code/session_01XAqKMMWgnUU9g7Ldyn6sbk