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Add a strided-A entry to the BF16 tile GEMM - #414
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bf16_tile_gemm_16x16_packed requires A as a dense 16xK buffer, so an A that already lives in memory with another row pitch (for example 16 equally spaced bf16 lanes of one slab) had to be copied first. TILELOADD takes the row stride as an operand, so the copy was an API limit, not a hardware one. bf16_tile_gemm_16x16_packed_strided reads row i at a[i*stride..][..K]. The AMX and AVX-512 tiers read in place; the decode+FMA tier gathers the 16 rows. The tier kernels take the stride, and the existing entries pass K, so their behaviour is unchanged. Tests cover every tier this host has, a fixture whose gap a dense misread would pick up, and the stride and length checks. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMMWgnUU9g7Ldyn6sbk
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Added a second commit, The tile GEMM takes The consumer is AdaWorldAPI/lance-graph#1984. There MKL reads the slab in place as a strided view with @codex review Generated by Claude Code |
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Codex Review: Didn't find any major issues. 🎉 Reviewed commit: ℹ️ About Codex in GitHubYour team has set up Codex to review pull requests in this repo. Reviews are triggered when you
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I reverted the A finding on that entry, measured in AdaWorldAPI/lance-graph#1984 (
So the CBLAS-compatible entry repacks everything on every call. A prepacked-B or strided variant would close the gap. That belongs in its own PR, not this one. Generated by Claude Code |
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Both post-merge Codex P2s on this PR (the fallback tier asserting They were also the cause of the Generated by Claude Code |
Problem
bf16_tile_gemm_16x16_packedaccepts A only as a dense16 × Kbuffer. An A operand that is already in memory with a different row pitch has to be copied before the call. For example, 16 equally spaced bf16 lanes of one slab, with row = lane and column = position within the lane.The AMX hardware does not need that copy.
TILELOADDtakes the row stride as an operand.amx_pathhardcodeda_stride = k * 2, so the limit came from the API.Change
bf16_tile_gemm_16x16_packed_strided(a, a_row_stride, b, c): rowiof A isa[i·a_row_stride..][..K].TDPBF16PSand AVX-512VDPBF16PSread A in place.a_row_stride >= Kanda.len() >= 15·a_row_stride + K.bf16_tile_gemm_16x16and_packedpassK.ndarray::simdnext to_packed.Validation
Granite Rapids host,
amx_available() = true, reported byexamples/amx_probe.strided_entry_reads_rows_in_place_exactly: exact integer parity at pitches K, K+1, K+32 and 4K+7. Each gap is filled with a sentinel value.strided_rows_are_exact_on_every_tier_this_host_has: drives the AMX, AVX-512 and gather tiers directly. A host's dispatch reaches only one of them. All three ran here; none printed SKIP.strided_entry_does_not_read_the_gap: shows that a dense misread of the same slab gives a different result, so the fixture can tell pitch from K.should_panictests: a stride shorter than K, and a buffer that is too short.a_stride = k * 2inamx_pathfails exactly the two strided parity tests (12 pass, 2 fail).cargo clippy --lib --tests -D warningsand the facet-stride guard (--diff origin/master) are both clean, and the new doctest passes.Why now
This came out of a lab that feeds source-owned SoA lanes, addressed through lance-graph's DR coordinates, into a BF16 GEMM. Without this entry, a slab of equally spaced bf16 lanes could not be loaded as an AMX A tile without staging.
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