[not-matthias]

Decode arm64 MRS of every ID register Linux emulates for EL0, and of TPIDRRO_EL0, instead of raising SIGILL.

Linux traps and emulates EL0 reads of Op0=3, Op1=0, CRn=0, CRm=2..7, returning the sanitized value or 0 for untracked registers (is_emulated() / emulate_sys_reg() in arch/arm64/kernel/cpufeature.c). VEX decoded only part of that range, so reads such as ID_AA64FPFR0_EL1 worked natively but crashed under Valgrind. NumKong reads it unconditionally in a load-time constructor, so import numkong (and import usearch >= 2.25) died with exit 132 and no traceback.

Changes:

• One catch-all case after the specific ID-register cases returns 0 for any remaining S3_0_C0_C<2..7>_<op2>. This reports the features as absent, consistent with the SVE-free PFR0 and zero PFR1 Valgrind already reports and with the HWCAPs it hides. An exhaustive check over all 128 CRm/op2 encodings in CRn=0 shows the decoder now accepts exactly the set the kernel emulates (CRm=1 and unknown CRm=0 encodings still SIGILL, as natively).
• The case labelled ID_AA64ZFR0_EL1 actually decodes 0xD5380440 = ID_AA64PFR2_EL1; relabelled.
• MRS TPIDRRO_EL0 returns 0: EL0 may read it (Arm ARM), and Linux zeroes it for AArch64 tasks (tls_thread_switch()). MSR to it stays undefined, as on hardware.
• New none/tests/arm64/mrs_id_regs regression test.

Verification (x86_64 host, aarch64 cross-build run under qemu-aarch64 -cpu max; not yet run on real arm64 hardware, and CI does not run arm64 tests):

	mrs_id_regs	import numkong (7.6.0, CPython 3.12)
master	SIGILL, exit 132	SIGILL at the ID_AA64FPFR0_EL1 read, exit 132
this PR	passes, output matches	imports; capabilities serial, neon

Encodings cross-checked against Linux arch/arm64/tools/sysreg and the LLVM disassembler. Upstream has the same gap (KDE bug 487413).

Closes #58

[greptile-apps]

Confidence Score: 5/5

[Medium impact] The PR appears safe to merge; no actionable issues were found.

Summary

Extends ARM64 register reads so programs can check additional CPU features without hitting SIGILL.

• Arm64 programs can read the remaining EL0 ID registers under Valgrind.
• Arm64 reads of TPIDRRO_EL0 return zero under Valgrind.

No actionable issues found. Runtime tests were not run during this review.

_{Reviews (1) · Last reviewed commit: "fix(vex): decode arm64 MRS of TPIDRRO_EL..." · Reviewed by Greptile}

[codspeed]

Merging this PR will not alter performance

✅ 84 untouched benchmarks
⏩ 60 skipped benchmarks¹

---

_{Comparing cod-4082-arm64-mrs-of-id_aa64fpfr0_el1-and-other-id-registers-is-not (8a69791) with master (8f356dd)}

Footnotes

1. 60 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

[GuillaumeLagrange]

olgtm, quite niche but always good to fix