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3 changes: 3 additions & 0 deletions flow/designs/asap7/aes-mbff/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,9 @@ export PLATFORM = asap7
export DESIGN_NAME = aes_cipher_top
export DESIGN_NICKNAME = aes-mbff

# ignore unsynthesizable timing controls
export SYNTH_SLANG_ARGS += --ignore-timing

export VERILOG_FILES = $(sort $(wildcard $(DESIGN_HOME)/src/aes/*.v))
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/aes/constraint.sdc

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5 changes: 5 additions & 0 deletions flow/scripts/synth.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -143,6 +143,11 @@ if {
synth -flatten -run coarse:fine {*}$synth_full_args
}

# Resolve internal tristates left by the slang frontend ---
if { [env_var_equals SYNTH_HDL_FRONTEND slang] } {
tribuf -logic
opt_clean
}

if { $::env(SYNTH_MOCK_LARGE_MEMORIES) } {
memory_collect
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