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The timed scheduler resumed a process only after a delay, an event or a condition, one host round trip per edge. A Veryl testbench's `clk.next(n)` needs the fused tick loop the event-driven `Simulator` already has, or moving it to process kernels would cost two orders of magnitude. - `ProcessStatus::WaitClock`: a kernel waits for a number of rising edges of a process clock, named by a new clock slot among the clocks the process may wait on; the runtime schema lists them with their periods. `ProcessKernelBuilder::wait_clock` builds the wait. The native image container version becomes 12. - The scheduler generates a clock's edges from the first wait on it, in the order the Veryl testbench runner uses: rising edges due after the processes of the time have run, falling edges half a period later, and a process resumes one period after its last counted edge, before the edge that follows. When every live process waits on the one clock that is due and nothing else is pending, it runs the edges as fused ticks through `SimulationExecutor::tick_many` and advances time past them. `step_until` keeps such a run within `run_until`'s end. Snapshots and schedule parts carry the generated clocks and clock waits; `Simulation::ticks` counts the edges. - The SDK gains `Statement::ClockCycles` and `ModuleBuilder::clock_period`. A counter that one, two or four processes wait on now runs at about 515 million cycles per second on the native backend, against 401 million for the single-process testbench VM and 2.4 million for its multi-process path.
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Merging this PR will not alter performance
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- `Simulation::run_until` bounds the fused ticks a woken process starts by its end time (`poll_waiting_until`). - A step reports the time its fused ticks reached. - A clock edge beyond simulation time is a runtime error, like a delay. - The edges a backend completed before an error count before the error is reported. - Fused ticks are not used when a register drives another event domain or when the clock is high; a high clock falls before its first counted rising edge, so every counted edge is one the registers saw. - `restore` translates every process clock before changing anything. - `FrontendArtifact::validate` checks process clocks as the builder does: a period of at least two on a one-bit signal that clocks a register.
# Conflicts: # crates/celox-runtime/src/simulation.rs
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# Conflicts: # crates/celox-frontend-core/src/symbolic/assembly.rs
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# Conflicts: # crates/celox/src/simulation.rs
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# Conflicts: # crates/celox-runtime/src/simulation.rs # crates/celox/src/backend/native/image_file.rs # crates/celox/src/simulation.rs
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Converted to draft: superseded by the redesign in #1123 (comment). Kept as a reference implementation; it will be closed when its replacement merges. |
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Stacked on #1159, part of #1123. Process clock waits support generated clocks, fusion, time/tick limits, resets, checkpoints and native images. Host/process occurrences and newly activated clocks share an FF batch and sample pre-edge state. Pending normalizing falls publish before the next rise, and the time-slot delta budget covers generated-clock rounds and immediate kernel continuations.
Clock ownership retains consumed scheduled drives across timestamps, checkpoints and exported schedules. Failed activation preserves waits and conflicts without crediting ticks. Publication baselines are separate from last driven levels: recovery preserves unpublished phases and rejects actual raw clock mutation, while unused escaped pointers remain recoverable. Falling-edge cleanup requires complete trigger discovery and all required publications, so a waiter-sampling failure cannot discard an unexecuted fall. Delta-limit errors retain a zero-count waiter and the remaining runnable batch for retry.
The clean settle fallback polls through the captured timestamp. A real compiled level-wait kernel followed by a four-cycle SDK wait exercises the raw-memory path. Four-backend regressions cover sampling failures before publication, exactly-once retry, zero-count error/checkpoint recovery, clock replay, snapshots, images and custom execution hooks.
Native container22 includes the out-of-band Finish header and validates clock bindings and tick-loop eligibility. Fallible phases disable fusion emission/dispatch, and custom executors use per-edge hooks unless they opt in. Attaching an image requires trust in its complete compiler-produced code and metadata; structural checks/checksums do not authenticate an adversarial rewrite. The ProcessClockState drive field belongs to the API introduced here.
Validation: library263, formatting and all-target clippy pass. Parent host-write publication, zero-trip dependency and package-context repairs are integrated. Final #1161 validation covers library288, SV3156, checkpoint/component/runtime/SDK/stepping consumers and freshly rebuilt NAPI/JS437. External timing128 passes with only existing exclusions/limitations. Full platform/latest-head CI remains required before merge.