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tools/parakeet: x86_64 AVX2 kernel tier for the five-value GEMM - #75
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x86_64 only had the scalar tier, which runs the encoder below real time and leaves ASR on x86_64 Android emulator images unusable. pk-kernels-avx2.cpp adds decode (PSHUFB nibble lookup), the 8-row tile (VPMADDWD on int16-widened straight and half-swapped token pairs, the same scheme as the dotprod tier) and the decoder matvec. Widening to int16 keeps every int8 product exact, so the tier is bit-identical to scalar for any input. The file is built with -mavx2 (/arch:AVX2) and entered only after CPUID AVX2 plus XGETBV YMM state; PK_KERNEL=avx2 / --kernel avx2 force it. The kernel test now also runs 200 random full-range int8 tile and matvec cases (including the all -128 corner) against scalar for every tier. CMake no longer passes the ARM -march flags to an x86_64 build on an Apple silicon host (CMAKE_OSX_ARCHITECTURES=x86_64). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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I'm merging with failing checks. Every failure on this PR also fails on the base branch head (51b38ee), for the same reason: misaki-g2p does not build under GCC To get a real CI signal on this change, I opened #76, a draft CI probe that merges this PR on top of #74:
ctest output is not verbose, so the CI logs do not show which tiers were selected. Locally under Rosetta 2 with AVX reporting enabled, the test selects 🤖 Generated with Claude Code |
What
Adds an x86_64 AVX2 tier to the Parakeet five-value int8 kernels in
tools/parakeet. Until now x86_64 had only the scalar tier, which runs the encoder below real time. That makes ASR on x86_64 Android emulator images unusable.src/pk-kernels-avx2.cppprovides three kernels:PSHUFBnibble lookup.VPMADDWDon int16-widened straight and half-swapped token pairs, the same scheme as the dotprod tier.VPMADDUBSWsaturation and no -128 corner case.XGETBVcheck that the OS saves YMM state. The file is compiled with-mavx2(/arch:AVX2on MSVC), so the baseline stays x86-64.PK_KERNEL=avx2or--kernel avx2forces the tier, andpk_params.kernel = 4selects it.-marchflags to an x86_64 build on an Apple silicon host (CMAKE_OSX_ARCHITECTURES=x86_64).tests/test_parakeet_kernels.cppnow also runs 200 random full-range int8 tile and matvec cases against scalar for every tier present, including the all -128 corner.AVX-512 VNNI is not included. I had no way to execute it here, because Rosetta 2 has no AVX-512, and I did not want to ship an unexecuted tier.
Validation
All runs were on an Apple M4 Max. The x86_64 binaries were cross-compiled and run under Rosetta 2 with
arch -x86_64 -e ROSETTA_ADVERTISE_AVX=1. Rosetta executes AVX2 but only reports it in CPUID when that variable is set. Linux x86_64 CI runstest-parakeet-kernels(labelmain) on real hardware.test-parakeet-kernels(x86_64, Rosetta) foundscalar, avx2and all checks passed: decode, tile for np 1-4, gemm driver at 1 and 3 threads, matvec, and the 200 random full-range cases. Native arm64 (scalar, dotprod, i8mm) also passed, including the new random cases.ref-cmd(20 utterances). I rantest-parakeet-paritywithphonon-2-fv5.gguf(sha256dc552eb7…) on x86_64 withPK_KERNEL=avx2and withPK_KERNEL=scalar. The two report logs are line-for-line identical apart from the tier name. Text and token ids are identical on 20/20, and WER against the reference transcripts is 0.ref-ls(6 utterances, avx2). PARITY OK, 6/6 text and token ids identical, WER 0.ref-cmd, the x86_64 build fails the encoder cosine gate with both tiers: utterance c11 has a mean frame cosine of 0.978 against the 0.98 gate. The scalar tier gives exactly the same numbers, so the AVX2 tier did not cause this; it comes from the non-NEON fp32 code paths inpk-ops/parakeet.cpp. The native arm64 build passes the same fixtures (worst 0.9895). I did not loosen the gate.x86_64build compiles the avx2 file with-mavx2. Thearm64-v8abuild has no-mavx2.This PR was prepared with AI assistance (Claude Code), which wrote and tested the change.
🤖 Generated with Claude Code